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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) ST-Ericsson SA 2013
0004  *
0005  * Author: Patrice Chotard <patrice.chotard@st.com>
0006  *
0007  * Driver allows to use AxB5xx unused pins to be used as GPIO
0008  */
0009 #include <linux/kernel.h>
0010 #include <linux/types.h>
0011 #include <linux/slab.h>
0012 #include <linux/init.h>
0013 #include <linux/err.h>
0014 #include <linux/of.h>
0015 #include <linux/of_device.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/gpio/driver.h>
0018 #include <linux/irq.h>
0019 #include <linux/irqdomain.h>
0020 #include <linux/interrupt.h>
0021 #include <linux/bitops.h>
0022 #include <linux/mfd/abx500.h>
0023 #include <linux/mfd/abx500/ab8500.h>
0024 #include <linux/pinctrl/pinctrl.h>
0025 #include <linux/pinctrl/consumer.h>
0026 #include <linux/pinctrl/pinmux.h>
0027 #include <linux/pinctrl/pinconf.h>
0028 #include <linux/pinctrl/pinconf-generic.h>
0029 #include <linux/pinctrl/machine.h>
0030 
0031 #include "pinctrl-abx500.h"
0032 #include "../core.h"
0033 #include "../pinconf.h"
0034 #include "../pinctrl-utils.h"
0035 
0036 /*
0037  * GPIO registers offset
0038  * Bank: 0x10
0039  */
0040 #define AB8500_GPIO_SEL1_REG    0x00
0041 #define AB8500_GPIO_SEL2_REG    0x01
0042 #define AB8500_GPIO_SEL3_REG    0x02
0043 #define AB8500_GPIO_SEL4_REG    0x03
0044 #define AB8500_GPIO_SEL5_REG    0x04
0045 #define AB8500_GPIO_SEL6_REG    0x05
0046 
0047 #define AB8500_GPIO_DIR1_REG    0x10
0048 #define AB8500_GPIO_DIR2_REG    0x11
0049 #define AB8500_GPIO_DIR3_REG    0x12
0050 #define AB8500_GPIO_DIR4_REG    0x13
0051 #define AB8500_GPIO_DIR5_REG    0x14
0052 #define AB8500_GPIO_DIR6_REG    0x15
0053 
0054 #define AB8500_GPIO_OUT1_REG    0x20
0055 #define AB8500_GPIO_OUT2_REG    0x21
0056 #define AB8500_GPIO_OUT3_REG    0x22
0057 #define AB8500_GPIO_OUT4_REG    0x23
0058 #define AB8500_GPIO_OUT5_REG    0x24
0059 #define AB8500_GPIO_OUT6_REG    0x25
0060 
0061 #define AB8500_GPIO_PUD1_REG    0x30
0062 #define AB8500_GPIO_PUD2_REG    0x31
0063 #define AB8500_GPIO_PUD3_REG    0x32
0064 #define AB8500_GPIO_PUD4_REG    0x33
0065 #define AB8500_GPIO_PUD5_REG    0x34
0066 #define AB8500_GPIO_PUD6_REG    0x35
0067 
0068 #define AB8500_GPIO_IN1_REG 0x40
0069 #define AB8500_GPIO_IN2_REG 0x41
0070 #define AB8500_GPIO_IN3_REG 0x42
0071 #define AB8500_GPIO_IN4_REG 0x43
0072 #define AB8500_GPIO_IN5_REG 0x44
0073 #define AB8500_GPIO_IN6_REG 0x45
0074 #define AB8500_GPIO_ALTFUN_REG  0x50
0075 
0076 #define ABX500_GPIO_INPUT   0
0077 #define ABX500_GPIO_OUTPUT  1
0078 
0079 struct abx500_pinctrl {
0080     struct device *dev;
0081     struct pinctrl_dev *pctldev;
0082     struct abx500_pinctrl_soc_data *soc;
0083     struct gpio_chip chip;
0084     struct ab8500 *parent;
0085     struct abx500_gpio_irq_cluster *irq_cluster;
0086     int irq_cluster_size;
0087 };
0088 
0089 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
0090                    unsigned offset, bool *bit)
0091 {
0092     struct abx500_pinctrl *pct = gpiochip_get_data(chip);
0093     u8 pos = offset % 8;
0094     u8 val;
0095     int ret;
0096 
0097     reg += offset / 8;
0098     ret = abx500_get_register_interruptible(pct->dev,
0099                         AB8500_MISC, reg, &val);
0100     if (ret < 0) {
0101         dev_err(pct->dev,
0102             "%s read reg =%x, offset=%x failed (%d)\n",
0103             __func__, reg, offset, ret);
0104         return ret;
0105     }
0106 
0107     *bit = !!(val & BIT(pos));
0108 
0109     return 0;
0110 }
0111 
0112 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
0113                 unsigned offset, int val)
0114 {
0115     struct abx500_pinctrl *pct = gpiochip_get_data(chip);
0116     u8 pos = offset % 8;
0117     int ret;
0118 
0119     reg += offset / 8;
0120     ret = abx500_mask_and_set_register_interruptible(pct->dev,
0121                 AB8500_MISC, reg, BIT(pos), val << pos);
0122     if (ret < 0)
0123         dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
0124                 __func__, reg, offset, ret);
0125 
0126     return ret;
0127 }
0128 
0129 /**
0130  * abx500_gpio_get() - Get the particular GPIO value
0131  * @chip:   Gpio device
0132  * @offset: GPIO number to read
0133  */
0134 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
0135 {
0136     struct abx500_pinctrl *pct = gpiochip_get_data(chip);
0137     bool bit;
0138     bool is_out;
0139     u8 gpio_offset = offset - 1;
0140     int ret;
0141 
0142     ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
0143             gpio_offset, &is_out);
0144     if (ret < 0)
0145         goto out;
0146 
0147     if (is_out)
0148         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
0149                 gpio_offset, &bit);
0150     else
0151         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
0152                 gpio_offset, &bit);
0153 out:
0154     if (ret < 0) {
0155         dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
0156         return ret;
0157     }
0158 
0159     return bit;
0160 }
0161 
0162 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
0163 {
0164     struct abx500_pinctrl *pct = gpiochip_get_data(chip);
0165     int ret;
0166 
0167     ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
0168     if (ret < 0)
0169         dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
0170 }
0171 
0172 static int abx500_gpio_direction_output(struct gpio_chip *chip,
0173                     unsigned offset,
0174                     int val)
0175 {
0176     struct abx500_pinctrl *pct = gpiochip_get_data(chip);
0177     int ret;
0178 
0179     /* set direction as output */
0180     ret = abx500_gpio_set_bits(chip,
0181                 AB8500_GPIO_DIR1_REG,
0182                 offset,
0183                 ABX500_GPIO_OUTPUT);
0184     if (ret < 0)
0185         goto out;
0186 
0187     /* disable pull down */
0188     ret = abx500_gpio_set_bits(chip,
0189                 AB8500_GPIO_PUD1_REG,
0190                 offset,
0191                 ABX500_GPIO_PULL_NONE);
0192 
0193 out:
0194     if (ret < 0) {
0195         dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
0196         return ret;
0197     }
0198 
0199     /* set the output as 1 or 0 */
0200     return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
0201 }
0202 
0203 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
0204 {
0205     /* set the register as input */
0206     return abx500_gpio_set_bits(chip,
0207                 AB8500_GPIO_DIR1_REG,
0208                 offset,
0209                 ABX500_GPIO_INPUT);
0210 }
0211 
0212 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
0213 {
0214     struct abx500_pinctrl *pct = gpiochip_get_data(chip);
0215     /* The AB8500 GPIO numbers are off by one */
0216     int gpio = offset + 1;
0217     int hwirq;
0218     int i;
0219 
0220     for (i = 0; i < pct->irq_cluster_size; i++) {
0221         struct abx500_gpio_irq_cluster *cluster =
0222             &pct->irq_cluster[i];
0223 
0224         if (gpio >= cluster->start && gpio <= cluster->end) {
0225             /*
0226              * The ABx500 GPIO's associated IRQs are clustered together
0227              * throughout the interrupt numbers at irregular intervals.
0228              * To solve this quandry, we have placed the read-in values
0229              * into the cluster information table.
0230              */
0231             hwirq = gpio - cluster->start + cluster->to_irq;
0232             return irq_create_mapping(pct->parent->domain, hwirq);
0233         }
0234     }
0235 
0236     return -EINVAL;
0237 }
0238 
0239 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
0240                unsigned gpio, int alt_setting)
0241 {
0242     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0243     struct alternate_functions af = pct->soc->alternate_functions[gpio];
0244     int ret;
0245     int val;
0246     unsigned offset;
0247 
0248     const char *modes[] = {
0249         [ABX500_DEFAULT]    = "default",
0250         [ABX500_ALT_A]      = "altA",
0251         [ABX500_ALT_B]      = "altB",
0252         [ABX500_ALT_C]      = "altC",
0253     };
0254 
0255     /* sanity check */
0256     if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
0257         ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
0258         ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
0259         dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
0260                 modes[alt_setting]);
0261         return -EINVAL;
0262     }
0263 
0264     /* on ABx5xx, there is no GPIO0, so adjust the offset */
0265     offset = gpio - 1;
0266 
0267     switch (alt_setting) {
0268     case ABX500_DEFAULT:
0269         /*
0270          * for ABx5xx family, default mode is always selected by
0271          * writing 0 to GPIOSELx register, except for pins which
0272          * support at least ALT_B mode, default mode is selected
0273          * by writing 1 to GPIOSELx register
0274          */
0275         val = 0;
0276         if (af.alt_bit1 != UNUSED)
0277             val++;
0278 
0279         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
0280                        offset, val);
0281         break;
0282 
0283     case ABX500_ALT_A:
0284         /*
0285          * for ABx5xx family, alt_a mode is always selected by
0286          * writing 1 to GPIOSELx register, except for pins which
0287          * support at least ALT_B mode, alt_a mode is selected
0288          * by writing 0 to GPIOSELx register and 0 in ALTFUNC
0289          * register
0290          */
0291         if (af.alt_bit1 != UNUSED) {
0292             ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
0293                     offset, 0);
0294             if (ret < 0)
0295                 goto out;
0296 
0297             ret = abx500_gpio_set_bits(chip,
0298                     AB8500_GPIO_ALTFUN_REG,
0299                     af.alt_bit1,
0300                     !!(af.alta_val & BIT(0)));
0301             if (ret < 0)
0302                 goto out;
0303 
0304             if (af.alt_bit2 != UNUSED)
0305                 ret = abx500_gpio_set_bits(chip,
0306                     AB8500_GPIO_ALTFUN_REG,
0307                     af.alt_bit2,
0308                     !!(af.alta_val & BIT(1)));
0309         } else
0310             ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
0311                     offset, 1);
0312         break;
0313 
0314     case ABX500_ALT_B:
0315         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
0316                 offset, 0);
0317         if (ret < 0)
0318             goto out;
0319 
0320         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
0321                 af.alt_bit1, !!(af.altb_val & BIT(0)));
0322         if (ret < 0)
0323             goto out;
0324 
0325         if (af.alt_bit2 != UNUSED)
0326             ret = abx500_gpio_set_bits(chip,
0327                     AB8500_GPIO_ALTFUN_REG,
0328                     af.alt_bit2,
0329                     !!(af.altb_val & BIT(1)));
0330         break;
0331 
0332     case ABX500_ALT_C:
0333         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
0334                 offset, 0);
0335         if (ret < 0)
0336             goto out;
0337 
0338         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
0339                 af.alt_bit2, !!(af.altc_val & BIT(0)));
0340         if (ret < 0)
0341             goto out;
0342 
0343         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
0344                 af.alt_bit2, !!(af.altc_val & BIT(1)));
0345         break;
0346 
0347     default:
0348         dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
0349 
0350         return -EINVAL;
0351     }
0352 out:
0353     if (ret < 0)
0354         dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
0355 
0356     return ret;
0357 }
0358 
0359 #ifdef CONFIG_DEBUG_FS
0360 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
0361               unsigned gpio)
0362 {
0363     u8 mode;
0364     bool bit_mode;
0365     bool alt_bit1;
0366     bool alt_bit2;
0367     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0368     struct alternate_functions af = pct->soc->alternate_functions[gpio];
0369     /* on ABx5xx, there is no GPIO0, so adjust the offset */
0370     unsigned offset = gpio - 1;
0371     int ret;
0372 
0373     /*
0374      * if gpiosel_bit is set to unused,
0375      * it means no GPIO or special case
0376      */
0377     if (af.gpiosel_bit == UNUSED)
0378         return ABX500_DEFAULT;
0379 
0380     /* read GpioSelx register */
0381     ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
0382             af.gpiosel_bit, &bit_mode);
0383     if (ret < 0)
0384         goto out;
0385 
0386     mode = bit_mode;
0387 
0388     /* sanity check */
0389     if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
0390         (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
0391         dev_err(pct->dev,
0392             "alt_bitX value not in correct range (-1 to 7)\n");
0393         return -EINVAL;
0394     }
0395 
0396     /* if alt_bit2 is used, alt_bit1 must be used too */
0397     if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
0398         dev_err(pct->dev,
0399             "if alt_bit2 is used, alt_bit1 can't be unused\n");
0400         return -EINVAL;
0401     }
0402 
0403     /* check if pin use AlternateFunction register */
0404     if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
0405         return mode;
0406     /*
0407      * if pin GPIOSEL bit is set and pin supports alternate function,
0408      * it means DEFAULT mode
0409      */
0410     if (mode)
0411         return ABX500_DEFAULT;
0412 
0413     /*
0414      * pin use the AlternatFunction register
0415      * read alt_bit1 value
0416      */
0417     ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
0418                 af.alt_bit1, &alt_bit1);
0419     if (ret < 0)
0420         goto out;
0421 
0422     if (af.alt_bit2 != UNUSED) {
0423         /* read alt_bit2 value */
0424         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
0425                 af.alt_bit2,
0426                 &alt_bit2);
0427         if (ret < 0)
0428             goto out;
0429     } else
0430         alt_bit2 = 0;
0431 
0432     mode = (alt_bit2 << 1) + alt_bit1;
0433     if (mode == af.alta_val)
0434         return ABX500_ALT_A;
0435     else if (mode == af.altb_val)
0436         return ABX500_ALT_B;
0437     else
0438         return ABX500_ALT_C;
0439 
0440 out:
0441     dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
0442     return ret;
0443 }
0444 
0445 #include <linux/seq_file.h>
0446 
0447 static void abx500_gpio_dbg_show_one(struct seq_file *s,
0448                      struct pinctrl_dev *pctldev,
0449                      struct gpio_chip *chip,
0450                      unsigned offset, unsigned gpio)
0451 {
0452     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0453     const char *label = gpiochip_is_requested(chip, offset - 1);
0454     u8 gpio_offset = offset - 1;
0455     int mode = -1;
0456     bool is_out;
0457     bool pd;
0458     int ret;
0459 
0460     const char *modes[] = {
0461         [ABX500_DEFAULT]    = "default",
0462         [ABX500_ALT_A]      = "altA",
0463         [ABX500_ALT_B]      = "altB",
0464         [ABX500_ALT_C]      = "altC",
0465     };
0466 
0467     const char *pull_up_down[] = {
0468         [ABX500_GPIO_PULL_DOWN]     = "pull down",
0469         [ABX500_GPIO_PULL_NONE]     = "pull none",
0470         [ABX500_GPIO_PULL_NONE + 1] = "pull none",
0471         [ABX500_GPIO_PULL_UP]       = "pull up",
0472     };
0473 
0474     ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
0475             gpio_offset, &is_out);
0476     if (ret < 0)
0477         goto out;
0478 
0479     seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
0480            gpio, label ?: "(none)",
0481            is_out ? "out" : "in ");
0482 
0483     if (!is_out) {
0484         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
0485                 gpio_offset, &pd);
0486         if (ret < 0)
0487             goto out;
0488 
0489         seq_printf(s, " %-9s", pull_up_down[pd]);
0490     } else
0491         seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
0492 
0493     mode = abx500_get_mode(pctldev, chip, offset);
0494 
0495     seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
0496 
0497 out:
0498     if (ret < 0)
0499         dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
0500 }
0501 
0502 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
0503 {
0504     unsigned i;
0505     unsigned gpio = chip->base;
0506     struct abx500_pinctrl *pct = gpiochip_get_data(chip);
0507     struct pinctrl_dev *pctldev = pct->pctldev;
0508 
0509     for (i = 0; i < chip->ngpio; i++, gpio++) {
0510         /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
0511         abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
0512         seq_putc(s, '\n');
0513     }
0514 }
0515 
0516 #else
0517 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
0518                         struct pinctrl_dev *pctldev,
0519                         struct gpio_chip *chip,
0520                         unsigned offset, unsigned gpio)
0521 {
0522 }
0523 #define abx500_gpio_dbg_show    NULL
0524 #endif
0525 
0526 static const struct gpio_chip abx500gpio_chip = {
0527     .label          = "abx500-gpio",
0528     .owner          = THIS_MODULE,
0529     .request        = gpiochip_generic_request,
0530     .free           = gpiochip_generic_free,
0531     .direction_input    = abx500_gpio_direction_input,
0532     .get            = abx500_gpio_get,
0533     .direction_output   = abx500_gpio_direction_output,
0534     .set            = abx500_gpio_set,
0535     .to_irq         = abx500_gpio_to_irq,
0536     .dbg_show       = abx500_gpio_dbg_show,
0537 };
0538 
0539 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
0540 {
0541     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0542 
0543     return pct->soc->nfunctions;
0544 }
0545 
0546 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
0547                      unsigned function)
0548 {
0549     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0550 
0551     return pct->soc->functions[function].name;
0552 }
0553 
0554 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
0555                       unsigned function,
0556                       const char * const **groups,
0557                       unsigned * const num_groups)
0558 {
0559     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0560 
0561     *groups = pct->soc->functions[function].groups;
0562     *num_groups = pct->soc->functions[function].ngroups;
0563 
0564     return 0;
0565 }
0566 
0567 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
0568               unsigned group)
0569 {
0570     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0571     struct gpio_chip *chip = &pct->chip;
0572     const struct abx500_pingroup *g;
0573     int i;
0574     int ret = 0;
0575 
0576     g = &pct->soc->groups[group];
0577     if (g->altsetting < 0)
0578         return -EINVAL;
0579 
0580     dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
0581 
0582     for (i = 0; i < g->npins; i++) {
0583         dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
0584             g->pins[i], g->altsetting);
0585 
0586         ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
0587     }
0588 
0589     if (ret < 0)
0590         dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
0591 
0592     return ret;
0593 }
0594 
0595 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
0596                    struct pinctrl_gpio_range *range,
0597                    unsigned offset)
0598 {
0599     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0600     const struct abx500_pinrange *p;
0601     int ret;
0602     int i;
0603 
0604     /*
0605      * Different ranges have different ways to enable GPIO function on a
0606      * pin, so refer back to our local range type, where we handily define
0607      * what altfunc enables GPIO for a certain pin.
0608      */
0609     for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
0610         p = &pct->soc->gpio_ranges[i];
0611         if ((offset >= p->offset) &&
0612             (offset < (p->offset + p->npins)))
0613           break;
0614     }
0615 
0616     if (i == pct->soc->gpio_num_ranges) {
0617         dev_err(pct->dev, "%s failed to locate range\n", __func__);
0618         return -ENODEV;
0619     }
0620 
0621     dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
0622         p->altfunc, offset);
0623 
0624     ret = abx500_set_mode(pct->pctldev, &pct->chip,
0625                   offset, p->altfunc);
0626     if (ret < 0)
0627         dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
0628 
0629     return ret;
0630 }
0631 
0632 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
0633                      struct pinctrl_gpio_range *range,
0634                      unsigned offset)
0635 {
0636 }
0637 
0638 static const struct pinmux_ops abx500_pinmux_ops = {
0639     .get_functions_count = abx500_pmx_get_funcs_cnt,
0640     .get_function_name = abx500_pmx_get_func_name,
0641     .get_function_groups = abx500_pmx_get_func_groups,
0642     .set_mux = abx500_pmx_set,
0643     .gpio_request_enable = abx500_gpio_request_enable,
0644     .gpio_disable_free = abx500_gpio_disable_free,
0645 };
0646 
0647 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
0648 {
0649     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0650 
0651     return pct->soc->ngroups;
0652 }
0653 
0654 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
0655                      unsigned selector)
0656 {
0657     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0658 
0659     return pct->soc->groups[selector].name;
0660 }
0661 
0662 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
0663                  unsigned selector,
0664                  const unsigned **pins,
0665                  unsigned *num_pins)
0666 {
0667     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0668 
0669     *pins = pct->soc->groups[selector].pins;
0670     *num_pins = pct->soc->groups[selector].npins;
0671 
0672     return 0;
0673 }
0674 
0675 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
0676                 struct seq_file *s, unsigned offset)
0677 {
0678     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0679     struct gpio_chip *chip = &pct->chip;
0680 
0681     abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
0682                  chip->base + offset - 1);
0683 }
0684 
0685 static int abx500_dt_add_map_mux(struct pinctrl_map **map,
0686         unsigned *reserved_maps,
0687         unsigned *num_maps, const char *group,
0688         const char *function)
0689 {
0690     if (*num_maps == *reserved_maps)
0691         return -ENOSPC;
0692 
0693     (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
0694     (*map)[*num_maps].data.mux.group = group;
0695     (*map)[*num_maps].data.mux.function = function;
0696     (*num_maps)++;
0697 
0698     return 0;
0699 }
0700 
0701 static int abx500_dt_add_map_configs(struct pinctrl_map **map,
0702         unsigned *reserved_maps,
0703         unsigned *num_maps, const char *group,
0704         unsigned long *configs, unsigned num_configs)
0705 {
0706     unsigned long *dup_configs;
0707 
0708     if (*num_maps == *reserved_maps)
0709         return -ENOSPC;
0710 
0711     dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
0712                   GFP_KERNEL);
0713     if (!dup_configs)
0714         return -ENOMEM;
0715 
0716     (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
0717 
0718     (*map)[*num_maps].data.configs.group_or_pin = group;
0719     (*map)[*num_maps].data.configs.configs = dup_configs;
0720     (*map)[*num_maps].data.configs.num_configs = num_configs;
0721     (*num_maps)++;
0722 
0723     return 0;
0724 }
0725 
0726 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
0727                     const char *pin_name)
0728 {
0729     int i, pin_number;
0730     struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
0731 
0732     if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
0733         for (i = 0; i < npct->soc->npins; i++)
0734             if (npct->soc->pins[i].number == pin_number)
0735                 return npct->soc->pins[i].name;
0736     return NULL;
0737 }
0738 
0739 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
0740         struct device_node *np,
0741         struct pinctrl_map **map,
0742         unsigned *reserved_maps,
0743         unsigned *num_maps)
0744 {
0745     int ret;
0746     const char *function = NULL;
0747     unsigned long *configs;
0748     unsigned int nconfigs = 0;
0749     struct property *prop;
0750 
0751     ret = of_property_read_string(np, "function", &function);
0752     if (ret >= 0) {
0753         const char *group;
0754 
0755         ret = of_property_count_strings(np, "groups");
0756         if (ret < 0)
0757             goto exit;
0758 
0759         ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
0760                         num_maps, ret);
0761         if (ret < 0)
0762             goto exit;
0763 
0764         of_property_for_each_string(np, "groups", prop, group) {
0765             ret = abx500_dt_add_map_mux(map, reserved_maps,
0766                     num_maps, group, function);
0767             if (ret < 0)
0768                 goto exit;
0769         }
0770     }
0771 
0772     ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
0773     if (nconfigs) {
0774         const char *gpio_name;
0775         const char *pin;
0776 
0777         ret = of_property_count_strings(np, "pins");
0778         if (ret < 0)
0779             goto exit;
0780 
0781         ret = pinctrl_utils_reserve_map(pctldev, map,
0782                         reserved_maps,
0783                         num_maps, ret);
0784         if (ret < 0)
0785             goto exit;
0786 
0787         of_property_for_each_string(np, "pins", prop, pin) {
0788             gpio_name = abx500_find_pin_name(pctldev, pin);
0789 
0790             ret = abx500_dt_add_map_configs(map, reserved_maps,
0791                     num_maps, gpio_name, configs, 1);
0792             if (ret < 0)
0793                 goto exit;
0794         }
0795     }
0796 
0797 exit:
0798     return ret;
0799 }
0800 
0801 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
0802                  struct device_node *np_config,
0803                  struct pinctrl_map **map, unsigned *num_maps)
0804 {
0805     unsigned reserved_maps;
0806     struct device_node *np;
0807     int ret;
0808 
0809     reserved_maps = 0;
0810     *map = NULL;
0811     *num_maps = 0;
0812 
0813     for_each_child_of_node(np_config, np) {
0814         ret = abx500_dt_subnode_to_map(pctldev, np, map,
0815                 &reserved_maps, num_maps);
0816         if (ret < 0) {
0817             pinctrl_utils_free_map(pctldev, *map, *num_maps);
0818             of_node_put(np);
0819             return ret;
0820         }
0821     }
0822 
0823     return 0;
0824 }
0825 
0826 static const struct pinctrl_ops abx500_pinctrl_ops = {
0827     .get_groups_count = abx500_get_groups_cnt,
0828     .get_group_name = abx500_get_group_name,
0829     .get_group_pins = abx500_get_group_pins,
0830     .pin_dbg_show = abx500_pin_dbg_show,
0831     .dt_node_to_map = abx500_dt_node_to_map,
0832     .dt_free_map = pinctrl_utils_free_map,
0833 };
0834 
0835 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
0836               unsigned pin,
0837               unsigned long *config)
0838 {
0839     return -ENOSYS;
0840 }
0841 
0842 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
0843               unsigned pin,
0844               unsigned long *configs,
0845               unsigned num_configs)
0846 {
0847     struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
0848     struct gpio_chip *chip = &pct->chip;
0849     unsigned offset;
0850     int ret = -EINVAL;
0851     int i;
0852     enum pin_config_param param;
0853     enum pin_config_param argument;
0854 
0855     for (i = 0; i < num_configs; i++) {
0856         param = pinconf_to_config_param(configs[i]);
0857         argument = pinconf_to_config_argument(configs[i]);
0858 
0859         dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
0860             pin, configs[i],
0861             (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
0862             (param == PIN_CONFIG_OUTPUT) ?
0863             (argument ? "high" : "low") :
0864             (argument ? "pull up" : "pull down"));
0865 
0866         /* on ABx500, there is no GPIO0, so adjust the offset */
0867         offset = pin - 1;
0868 
0869         switch (param) {
0870         case PIN_CONFIG_BIAS_DISABLE:
0871             ret = abx500_gpio_direction_input(chip, offset);
0872             if (ret < 0)
0873                 goto out;
0874 
0875             /* Chip only supports pull down */
0876             ret = abx500_gpio_set_bits(chip,
0877                 AB8500_GPIO_PUD1_REG, offset,
0878                 ABX500_GPIO_PULL_NONE);
0879             break;
0880 
0881         case PIN_CONFIG_BIAS_PULL_DOWN:
0882             ret = abx500_gpio_direction_input(chip, offset);
0883             if (ret < 0)
0884                 goto out;
0885             /*
0886              * if argument = 1 set the pull down
0887              * else clear the pull down
0888              * Chip only supports pull down
0889              */
0890             ret = abx500_gpio_set_bits(chip,
0891             AB8500_GPIO_PUD1_REG,
0892                 offset,
0893                 argument ? ABX500_GPIO_PULL_DOWN :
0894                 ABX500_GPIO_PULL_NONE);
0895             break;
0896 
0897         case PIN_CONFIG_BIAS_PULL_UP:
0898             ret = abx500_gpio_direction_input(chip, offset);
0899             if (ret < 0)
0900                 goto out;
0901             /*
0902              * if argument = 1 set the pull up
0903              * else clear the pull up
0904              */
0905             ret = abx500_gpio_direction_input(chip, offset);
0906             break;
0907 
0908         case PIN_CONFIG_OUTPUT:
0909             ret = abx500_gpio_direction_output(chip, offset,
0910                 argument);
0911             break;
0912 
0913         default:
0914             dev_err(chip->parent,
0915                 "illegal configuration requested\n");
0916         }
0917     } /* for each config */
0918 out:
0919     if (ret < 0)
0920         dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
0921 
0922     return ret;
0923 }
0924 
0925 static const struct pinconf_ops abx500_pinconf_ops = {
0926     .pin_config_get = abx500_pin_config_get,
0927     .pin_config_set = abx500_pin_config_set,
0928     .is_generic = true,
0929 };
0930 
0931 static struct pinctrl_desc abx500_pinctrl_desc = {
0932     .name = "pinctrl-abx500",
0933     .pctlops = &abx500_pinctrl_ops,
0934     .pmxops = &abx500_pinmux_ops,
0935     .confops = &abx500_pinconf_ops,
0936     .owner = THIS_MODULE,
0937 };
0938 
0939 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
0940 {
0941     unsigned int lowest = 0;
0942     unsigned int highest = 0;
0943     unsigned int npins = 0;
0944     int i;
0945 
0946     /*
0947      * Compute number of GPIOs from the last SoC gpio range descriptors
0948      * These ranges may include "holes" but the GPIO number space shall
0949      * still be homogeneous, so we need to detect and account for any
0950      * such holes so that these are included in the number of GPIO pins.
0951      */
0952     for (i = 0; i < soc->gpio_num_ranges; i++) {
0953         unsigned gstart;
0954         unsigned gend;
0955         const struct abx500_pinrange *p;
0956 
0957         p = &soc->gpio_ranges[i];
0958         gstart = p->offset;
0959         gend = p->offset + p->npins - 1;
0960 
0961         if (i == 0) {
0962             /* First iteration, set start values */
0963             lowest = gstart;
0964             highest = gend;
0965         } else {
0966             if (gstart < lowest)
0967                 lowest = gstart;
0968             if (gend > highest)
0969                 highest = gend;
0970         }
0971     }
0972     /* this gives the absolute number of pins */
0973     npins = highest - lowest + 1;
0974     return npins;
0975 }
0976 
0977 static const struct of_device_id abx500_gpio_match[] = {
0978     { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
0979     { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
0980     { }
0981 };
0982 
0983 static int abx500_gpio_probe(struct platform_device *pdev)
0984 {
0985     struct device_node *np = pdev->dev.of_node;
0986     const struct of_device_id *match;
0987     struct abx500_pinctrl *pct;
0988     unsigned int id = -1;
0989     int ret;
0990     int i;
0991 
0992     if (!np) {
0993         dev_err(&pdev->dev, "gpio dt node missing\n");
0994         return -ENODEV;
0995     }
0996 
0997     pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL);
0998     if (!pct)
0999         return -ENOMEM;
1000 
1001     pct->dev = &pdev->dev;
1002     pct->parent = dev_get_drvdata(pdev->dev.parent);
1003     pct->chip = abx500gpio_chip;
1004     pct->chip.parent = &pdev->dev;
1005     pct->chip.base = -1; /* Dynamic allocation */
1006 
1007     match = of_match_device(abx500_gpio_match, &pdev->dev);
1008     if (!match) {
1009         dev_err(&pdev->dev, "gpio dt not matching\n");
1010         return -ENODEV;
1011     }
1012     id = (unsigned long)match->data;
1013 
1014     /* Poke in other ASIC variants here */
1015     switch (id) {
1016     case PINCTRL_AB8500:
1017         abx500_pinctrl_ab8500_init(&pct->soc);
1018         break;
1019     case PINCTRL_AB8505:
1020         abx500_pinctrl_ab8505_init(&pct->soc);
1021         break;
1022     default:
1023         dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1024         return -EINVAL;
1025     }
1026 
1027     if (!pct->soc) {
1028         dev_err(&pdev->dev, "Invalid SOC data\n");
1029         return -EINVAL;
1030     }
1031 
1032     pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1033     pct->irq_cluster = pct->soc->gpio_irq_cluster;
1034     pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1035 
1036     ret = gpiochip_add_data(&pct->chip, pct);
1037     if (ret) {
1038         dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1039         return ret;
1040     }
1041     dev_info(&pdev->dev, "added gpiochip\n");
1042 
1043     abx500_pinctrl_desc.pins = pct->soc->pins;
1044     abx500_pinctrl_desc.npins = pct->soc->npins;
1045     pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc,
1046                          pct);
1047     if (IS_ERR(pct->pctldev)) {
1048         dev_err(&pdev->dev,
1049             "could not register abx500 pinctrl driver\n");
1050         ret = PTR_ERR(pct->pctldev);
1051         goto out_rem_chip;
1052     }
1053     dev_info(&pdev->dev, "registered pin controller\n");
1054 
1055     /* We will handle a range of GPIO pins */
1056     for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1057         const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1058 
1059         ret = gpiochip_add_pin_range(&pct->chip,
1060                     dev_name(&pdev->dev),
1061                     p->offset - 1, p->offset, p->npins);
1062         if (ret < 0)
1063             goto out_rem_chip;
1064     }
1065 
1066     platform_set_drvdata(pdev, pct);
1067     dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1068 
1069     return 0;
1070 
1071 out_rem_chip:
1072     gpiochip_remove(&pct->chip);
1073     return ret;
1074 }
1075 
1076 /**
1077  * abx500_gpio_remove() - remove Ab8500-gpio driver
1078  * @pdev:   Platform device registered
1079  */
1080 static int abx500_gpio_remove(struct platform_device *pdev)
1081 {
1082     struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1083 
1084     gpiochip_remove(&pct->chip);
1085     return 0;
1086 }
1087 
1088 static struct platform_driver abx500_gpio_driver = {
1089     .driver = {
1090         .name = "abx500-gpio",
1091         .of_match_table = abx500_gpio_match,
1092     },
1093     .probe = abx500_gpio_probe,
1094     .remove = abx500_gpio_remove,
1095 };
1096 
1097 static int __init abx500_gpio_init(void)
1098 {
1099     return platform_driver_register(&abx500_gpio_driver);
1100 }
1101 core_initcall(abx500_gpio_init);
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