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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) ST-Ericsson SA 2012
0004  *
0005  * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
0006  */
0007 
0008 #include <linux/kernel.h>
0009 #include <linux/gpio/driver.h>
0010 #include <linux/pinctrl/pinctrl.h>
0011 #include <linux/mfd/abx500/ab8500.h>
0012 #include "pinctrl-abx500.h"
0013 
0014 /* All the pins that can be used for GPIO and some other functions */
0015 #define ABX500_GPIO(offset) (offset)
0016 
0017 #define AB8505_PIN_N4       ABX500_GPIO(1)
0018 #define AB8505_PIN_R5       ABX500_GPIO(2)
0019 #define AB8505_PIN_P5       ABX500_GPIO(3)
0020 /* hole */
0021 #define AB8505_PIN_B16      ABX500_GPIO(10)
0022 #define AB8505_PIN_B17      ABX500_GPIO(11)
0023 /* hole */
0024 #define AB8505_PIN_D17      ABX500_GPIO(13)
0025 #define AB8505_PIN_C16      ABX500_GPIO(14)
0026 /* hole */
0027 #define AB8505_PIN_P2       ABX500_GPIO(17)
0028 #define AB8505_PIN_N3       ABX500_GPIO(18)
0029 #define AB8505_PIN_T1       ABX500_GPIO(19)
0030 #define AB8505_PIN_P3       ABX500_GPIO(20)
0031 /* hole */
0032 #define AB8505_PIN_H14      ABX500_GPIO(34)
0033 /* hole */
0034 #define AB8505_PIN_J15      ABX500_GPIO(40)
0035 #define AB8505_PIN_J14      ABX500_GPIO(41)
0036 /* hole */
0037 #define AB8505_PIN_L4       ABX500_GPIO(50)
0038 /* hole */
0039 #define AB8505_PIN_D16      ABX500_GPIO(52)
0040 #define AB8505_PIN_D15      ABX500_GPIO(53)
0041 
0042 /* indicates the higher GPIO number */
0043 #define AB8505_GPIO_MAX_NUMBER  53
0044 
0045 /*
0046  * The names of the pins are denoted by GPIO number and ball name, even
0047  * though they can be used for other things than GPIO, this is the first
0048  * column in the table of the data sheet and often used on schematics and
0049  * such.
0050  */
0051 static const struct pinctrl_pin_desc ab8505_pins[] = {
0052     PINCTRL_PIN(AB8505_PIN_N4, "GPIO1_N4"),
0053     PINCTRL_PIN(AB8505_PIN_R5, "GPIO2_R5"),
0054     PINCTRL_PIN(AB8505_PIN_P5, "GPIO3_P5"),
0055 /* hole */
0056     PINCTRL_PIN(AB8505_PIN_B16, "GPIO10_B16"),
0057     PINCTRL_PIN(AB8505_PIN_B17, "GPIO11_B17"),
0058 /* hole */
0059     PINCTRL_PIN(AB8505_PIN_D17, "GPIO13_D17"),
0060     PINCTRL_PIN(AB8505_PIN_C16, "GPIO14_C16"),
0061 /* hole */
0062     PINCTRL_PIN(AB8505_PIN_P2, "GPIO17_P2"),
0063     PINCTRL_PIN(AB8505_PIN_N3, "GPIO18_N3"),
0064     PINCTRL_PIN(AB8505_PIN_T1, "GPIO19_T1"),
0065     PINCTRL_PIN(AB8505_PIN_P3, "GPIO20_P3"),
0066 /* hole */
0067     PINCTRL_PIN(AB8505_PIN_H14, "GPIO34_H14"),
0068 /* hole */
0069     PINCTRL_PIN(AB8505_PIN_J15, "GPIO40_J15"),
0070     PINCTRL_PIN(AB8505_PIN_J14, "GPIO41_J14"),
0071 /* hole */
0072     PINCTRL_PIN(AB8505_PIN_L4, "GPIO50_L4"),
0073 /* hole */
0074     PINCTRL_PIN(AB8505_PIN_D16, "GPIO52_D16"),
0075     PINCTRL_PIN(AB8505_PIN_D15, "GPIO53_D15"),
0076 };
0077 
0078 /*
0079  * Maps local GPIO offsets to local pin numbers
0080  */
0081 static const struct abx500_pinrange ab8505_pinranges[] = {
0082     ABX500_PINRANGE(1, 3, ABX500_ALT_A),
0083     ABX500_PINRANGE(10, 2, ABX500_DEFAULT),
0084     ABX500_PINRANGE(13, 1, ABX500_DEFAULT),
0085     ABX500_PINRANGE(14, 1, ABX500_ALT_A),
0086     ABX500_PINRANGE(17, 4, ABX500_ALT_A),
0087     ABX500_PINRANGE(34, 1, ABX500_ALT_A),
0088     ABX500_PINRANGE(40, 2, ABX500_ALT_A),
0089     ABX500_PINRANGE(50, 1, ABX500_DEFAULT),
0090     ABX500_PINRANGE(52, 2, ABX500_ALT_A),
0091 };
0092 
0093 /*
0094  * Read the pin group names like this:
0095  * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
0096  *
0097  * The groups are arranged as sets per altfunction column, so we can
0098  * mux in one group at a time by selecting the same altfunction for them
0099  * all. When functions require pins on different altfunctions, you need
0100  * to combine several groups.
0101  */
0102 
0103 /* default column */
0104 static const unsigned sysclkreq2_d_1_pins[] = { AB8505_PIN_N4 };
0105 static const unsigned sysclkreq3_d_1_pins[] = { AB8505_PIN_R5 };
0106 static const unsigned sysclkreq4_d_1_pins[] = { AB8505_PIN_P5 };
0107 static const unsigned gpio10_d_1_pins[] = { AB8505_PIN_B16 };
0108 static const unsigned gpio11_d_1_pins[] = { AB8505_PIN_B17 };
0109 static const unsigned gpio13_d_1_pins[] = { AB8505_PIN_D17 };
0110 static const unsigned pwmout1_d_1_pins[] = { AB8505_PIN_C16 };
0111 /* audio data interface 2*/
0112 static const unsigned adi2_d_1_pins[] = { AB8505_PIN_P2, AB8505_PIN_N3,
0113                     AB8505_PIN_T1, AB8505_PIN_P3 };
0114 static const unsigned extcpena_d_1_pins[] = { AB8505_PIN_H14 };
0115 /* modem SDA/SCL */
0116 static const unsigned modsclsda_d_1_pins[] = { AB8505_PIN_J15, AB8505_PIN_J14 };
0117 static const unsigned gpio50_d_1_pins[] = { AB8505_PIN_L4 };
0118 static const unsigned resethw_d_1_pins[] = { AB8505_PIN_D16 };
0119 static const unsigned service_d_1_pins[] = { AB8505_PIN_D15 };
0120 
0121 /* Altfunction A column */
0122 static const unsigned gpio1_a_1_pins[] = { AB8505_PIN_N4 };
0123 static const unsigned gpio2_a_1_pins[] = { AB8505_PIN_R5 };
0124 static const unsigned gpio3_a_1_pins[] = { AB8505_PIN_P5 };
0125 static const unsigned hiqclkena_a_1_pins[] = { AB8505_PIN_B16 };
0126 static const unsigned pdmclk_a_1_pins[] = { AB8505_PIN_B17 };
0127 static const unsigned uarttxdata_a_1_pins[] = { AB8505_PIN_D17 };
0128 static const unsigned gpio14_a_1_pins[] = { AB8505_PIN_C16 };
0129 static const unsigned gpio17_a_1_pins[] = { AB8505_PIN_P2 };
0130 static const unsigned gpio18_a_1_pins[] = { AB8505_PIN_N3 };
0131 static const unsigned gpio19_a_1_pins[] = { AB8505_PIN_T1 };
0132 static const unsigned gpio20_a_1_pins[] = { AB8505_PIN_P3 };
0133 static const unsigned gpio34_a_1_pins[] = { AB8505_PIN_H14 };
0134 static const unsigned gpio40_a_1_pins[] = { AB8505_PIN_J15 };
0135 static const unsigned gpio41_a_1_pins[] = { AB8505_PIN_J14 };
0136 static const unsigned uartrxdata_a_1_pins[] = { AB8505_PIN_J14 };
0137 static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 };
0138 static const unsigned gpio52_a_1_pins[] = { AB8505_PIN_D16 };
0139 static const unsigned gpio53_a_1_pins[] = { AB8505_PIN_D15 };
0140 
0141 /* Altfunction B colum */
0142 static const unsigned pdmdata_b_1_pins[] = { AB8505_PIN_B16 };
0143 static const unsigned extvibrapwm1_b_1_pins[] = { AB8505_PIN_D17 };
0144 static const unsigned extvibrapwm2_b_1_pins[] = { AB8505_PIN_L4 };
0145 
0146 /* Altfunction C column */
0147 static const unsigned usbvdat_c_1_pins[] = { AB8505_PIN_D17 };
0148 
0149 #define AB8505_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins,      \
0150             .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
0151 
0152 static const struct abx500_pingroup ab8505_groups[] = {
0153     AB8505_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
0154     AB8505_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
0155     AB8505_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
0156     AB8505_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
0157     AB8505_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
0158     AB8505_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
0159     AB8505_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
0160     AB8505_PIN_GROUP(adi2_d_1, ABX500_DEFAULT),
0161     AB8505_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
0162     AB8505_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
0163     AB8505_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT),
0164     AB8505_PIN_GROUP(resethw_d_1, ABX500_DEFAULT),
0165     AB8505_PIN_GROUP(service_d_1, ABX500_DEFAULT),
0166     AB8505_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
0167     AB8505_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
0168     AB8505_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
0169     AB8505_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A),
0170     AB8505_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A),
0171     AB8505_PIN_GROUP(uarttxdata_a_1, ABX500_ALT_A),
0172     AB8505_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
0173     AB8505_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
0174     AB8505_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
0175     AB8505_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
0176     AB8505_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
0177     AB8505_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
0178     AB8505_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
0179     AB8505_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
0180     AB8505_PIN_GROUP(uartrxdata_a_1, ABX500_ALT_A),
0181     AB8505_PIN_GROUP(gpio50_a_1, ABX500_ALT_A),
0182     AB8505_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
0183     AB8505_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
0184     AB8505_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B),
0185     AB8505_PIN_GROUP(extvibrapwm1_b_1, ABX500_ALT_B),
0186     AB8505_PIN_GROUP(extvibrapwm2_b_1, ABX500_ALT_B),
0187     AB8505_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
0188 };
0189 
0190 /* We use this macro to define the groups applicable to a function */
0191 #define AB8505_FUNC_GROUPS(a, b...)    \
0192 static const char * const a##_groups[] = { b };
0193 
0194 AB8505_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
0195         "sysclkreq4_d_1");
0196 AB8505_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1",
0197         "gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1",
0198         "gpio17_a_1", "gpio18_a_1", "gpio19_a_1", "gpio20_a_1",
0199         "gpio34_a_1", "gpio40_a_1", "gpio41_a_1", "gpio50_d_1",
0200         "gpio52_a_1", "gpio53_a_1");
0201 AB8505_FUNC_GROUPS(pwmout, "pwmout1_d_1");
0202 AB8505_FUNC_GROUPS(adi2, "adi2_d_1");
0203 AB8505_FUNC_GROUPS(extcpena, "extcpena_d_1");
0204 AB8505_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
0205 AB8505_FUNC_GROUPS(resethw, "resethw_d_1");
0206 AB8505_FUNC_GROUPS(service, "service_d_1");
0207 AB8505_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1");
0208 AB8505_FUNC_GROUPS(pdm, "pdmclk_a_1", "pdmdata_b_1");
0209 AB8505_FUNC_GROUPS(uartdata, "uarttxdata_a_1", "uartrxdata_a_1");
0210 AB8505_FUNC_GROUPS(extvibra, "extvibrapwm1_b_1", "extvibrapwm2_b_1");
0211 AB8505_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
0212 
0213 #define FUNCTION(fname)                 \
0214     {                       \
0215         .name = #fname,             \
0216         .groups = fname##_groups,       \
0217         .ngroups = ARRAY_SIZE(fname##_groups),  \
0218     }
0219 
0220 static const struct abx500_function ab8505_functions[] = {
0221     FUNCTION(sysclkreq),
0222     FUNCTION(gpio),
0223     FUNCTION(pwmout),
0224     FUNCTION(adi2),
0225     FUNCTION(extcpena),
0226     FUNCTION(modsclsda),
0227     FUNCTION(resethw),
0228     FUNCTION(service),
0229     FUNCTION(hiqclkena),
0230     FUNCTION(pdm),
0231     FUNCTION(uartdata),
0232     FUNCTION(extvibra),
0233     FUNCTION(extvibra),
0234     FUNCTION(usbvdat),
0235 };
0236 
0237 /*
0238  * this table translates what's is in the AB8505 specification regarding the
0239  * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
0240  * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
0241  * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
0242  *
0243  * example :
0244  *
0245  *  ALTERNATE_FUNCTIONS(13,     4,      3,      4, 1, 0, 2),
0246  *  means that pin AB8505_PIN_D18 (pin 13) supports 4 mux (default/ALT_A,
0247  *  ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
0248  *  select the mux. ALTA, ALTB and ALTC val indicates values to write in
0249  *  ALTERNATFUNC register. We need to specifies these values as SOC
0250  *  designers didn't apply the same logic on how to select mux in the
0251  *  ABx500 family.
0252  *
0253  *  As this pins supports at least ALT_B mux, default mux is
0254  *  selected by writing 1 in GPIOSEL bit :
0255  *
0256  *      | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
0257  *  default |       1       |          0          |          0
0258  *  alt_A   |       0       |          0          |          1
0259  *  alt_B   |       0       |          0          |          0
0260  *  alt_C   |       0       |          1          |          0
0261  *
0262  *  ALTERNATE_FUNCTIONS(1,      0, UNUSED, UNUSED),
0263  *  means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL
0264  *  register is used to select the mux. As this pins doesn't support at
0265  *  least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
0266  *
0267  *      | GPIOSEL bit=0 | alternatfunc bit2=  | alternatfunc bit1=
0268  *  default |       0       |          0          |          0
0269  *  alt_A   |       1       |          0          |          0
0270  */
0271 
0272 static struct
0273 alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1] = {
0274     ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
0275     ALTERNATE_FUNCTIONS(1,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
0276     ALTERNATE_FUNCTIONS(2,      1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
0277     ALTERNATE_FUNCTIONS(3,      2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
0278     ALTERNATE_FUNCTIONS(4, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO4, bit 3 reserved */
0279     ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5, bit 4 reserved */
0280     ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6, bit 5 reserved */
0281     ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7, bit 6 reserved */
0282     ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8, bit 7 reserved */
0283 
0284     ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9, bit 0 reserved */
0285     ALTERNATE_FUNCTIONS(10,      1,      0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */
0286     ALTERNATE_FUNCTIONS(11,      2,      1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 2 */
0287     ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12, bit3 reserved */
0288     ALTERNATE_FUNCTIONS(13,      4,      3,      4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
0289     ALTERNATE_FUNCTIONS(14,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
0290     ALTERNATE_FUNCTIONS(15, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 6 reserved */
0291     ALTERNATE_FUNCTIONS(16, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 7 reserved  */
0292     /*
0293      * pins 17 to 20 are special case, only bit 0 is used to select
0294      * alternate function for these 4 pins.
0295      * bits 1 to 3 are reserved
0296      */
0297     ALTERNATE_FUNCTIONS(17,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
0298     ALTERNATE_FUNCTIONS(18,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
0299     ALTERNATE_FUNCTIONS(19,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
0300     ALTERNATE_FUNCTIONS(20,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
0301     ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21, bit 4 reserved */
0302     ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22, bit 5 reserved */
0303     ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23, bit 6 reserved */
0304     ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24, bit 7 reserved */
0305 
0306     ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25, bit 0 reserved */
0307     ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26, bit 1 reserved */
0308     ALTERNATE_FUNCTIONS(27, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO27, bit 2 reserved */
0309     ALTERNATE_FUNCTIONS(28, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO28, bit 3 reserved */
0310     ALTERNATE_FUNCTIONS(29, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO29, bit 4 reserved */
0311     ALTERNATE_FUNCTIONS(30, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO30, bit 5 reserved */
0312     ALTERNATE_FUNCTIONS(31, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO31, bit 6 reserved */
0313     ALTERNATE_FUNCTIONS(32, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO32, bit 7 reserved */
0314 
0315     ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33, bit 0 reserved */
0316     ALTERNATE_FUNCTIONS(34,      1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
0317     ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35, bit 2 reserved */
0318     ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36, bit 2 reserved */
0319     ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37, bit 2 reserved */
0320     ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38, bit 2 reserved */
0321     ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39, bit 2 reserved */
0322     ALTERNATE_FUNCTIONS(40,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7*/
0323 
0324     ALTERNATE_FUNCTIONS(41,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
0325     ALTERNATE_FUNCTIONS(42, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO42, bit 1 reserved */
0326     ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43, bit 2 reserved */
0327     ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44, bit 3 reserved */
0328     ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45, bit 4 reserved */
0329     ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46, bit 5 reserved */
0330     ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47, bit 6 reserved */
0331     ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48, bit 7 reserved */
0332 
0333     ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */
0334     ALTERNATE_FUNCTIONS(50,      1,      2, UNUSED, 1, 0, 0), /* GPIO50, altA controlled by bit 1 */
0335     ALTERNATE_FUNCTIONS(51, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */
0336     ALTERNATE_FUNCTIONS(52,      3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
0337     ALTERNATE_FUNCTIONS(53,      4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
0338 };
0339 
0340 /*
0341  * For AB8505 Only some GPIOs are interrupt capable, and they are
0342  * organized in discontiguous clusters:
0343  *
0344  *  GPIO10 to GPIO11
0345  *  GPIO13
0346  *  GPIO40 and GPIO41
0347  *  GPIO50
0348  *  GPIO52 to GPIO53
0349  */
0350 static struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = {
0351     GPIO_IRQ_CLUSTER(10, 11, AB8500_INT_GPIO10R),
0352     GPIO_IRQ_CLUSTER(13, 13, AB8500_INT_GPIO13R),
0353     GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
0354     GPIO_IRQ_CLUSTER(50, 50, AB9540_INT_GPIO50R),
0355     GPIO_IRQ_CLUSTER(52, 53, AB9540_INT_GPIO52R),
0356 };
0357 
0358 static struct abx500_pinctrl_soc_data ab8505_soc = {
0359     .gpio_ranges = ab8505_pinranges,
0360     .gpio_num_ranges = ARRAY_SIZE(ab8505_pinranges),
0361     .pins = ab8505_pins,
0362     .npins = ARRAY_SIZE(ab8505_pins),
0363     .functions = ab8505_functions,
0364     .nfunctions = ARRAY_SIZE(ab8505_functions),
0365     .groups = ab8505_groups,
0366     .ngroups = ARRAY_SIZE(ab8505_groups),
0367     .alternate_functions = ab8505_alternate_functions,
0368     .gpio_irq_cluster = ab8505_gpio_irq_cluster,
0369     .ngpio_irq_cluster = ARRAY_SIZE(ab8505_gpio_irq_cluster),
0370     .irq_gpio_rising_offset = AB8500_INT_GPIO6R,
0371     .irq_gpio_falling_offset = AB8500_INT_GPIO6F,
0372     .irq_gpio_factor = 1,
0373 };
0374 
0375 void
0376 abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
0377 {
0378     *soc = &ab8505_soc;
0379 }
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