pinctrl/mvebu/pinctrl-mvebu.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Marvell MVEBU pinctrl driver
0004  *
0005  * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
0006  *          Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
0007  */
0008
0009 #ifndef __PINCTRL_MVEBU_H__
0010 #define __PINCTRL_MVEBU_H__
0011
0012 /**
0013  * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
0014  * @base: base address of pinctrl hardware
0015  * @regmap.map: regmap structure
0016  * @regmap.offset: regmap offset
0017  */
0018 struct mvebu_mpp_ctrl_data {
0019     union {
0020         void __iomem *base;
0021         struct {
0022             struct regmap *map;
0023             u32 offset;
0024         } regmap;
0025     };
0026 };
0027
0028 /**
0029  * struct mvebu_mpp_ctrl - describe a mpp control
0030  * @name: name of the control group
0031  * @pid: first pin id handled by this control
0032  * @npins: number of pins controlled by this control
0033  * @mpp_get: (optional) special function to get mpp setting
0034  * @mpp_set: (optional) special function to set mpp setting
0035  * @mpp_gpio_req: (optional) special function to request gpio
0036  * @mpp_gpio_dir: (optional) special function to set gpio direction
0037  *
0038  * A mpp_ctrl describes a muxable unit, e.g. pin, group of pins, or
0039  * internal function, inside the SoC. Each muxable unit can be switched
0040  * between two or more different settings, e.g. assign mpp pin 13 to
0041  * uart1 or sata.
0042  *
0043  * The mpp_get/_set functions are mandatory and are used to get/set a
0044  * specific mode. The optional mpp_gpio_req/_dir functions can be used
0045  * to allow pin settings with varying gpio pins.
0046  */
0047 struct mvebu_mpp_ctrl {
0048     const char *name;
0049     u8 pid;
0050     u8 npins;
0051     unsigned *pins;
0052     int (*mpp_get)(struct mvebu_mpp_ctrl_data *data, unsigned pid,
0053                unsigned long *config);
0054     int (*mpp_set)(struct mvebu_mpp_ctrl_data *data, unsigned pid,
0055                unsigned long config);
0056     int (*mpp_gpio_req)(struct mvebu_mpp_ctrl_data *data, unsigned pid);
0057     int (*mpp_gpio_dir)(struct mvebu_mpp_ctrl_data *data, unsigned pid,
0058                 bool input);
0059 };
0060
0061 /**
0062  * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
0063  * @val: ctrl setting value
0064  * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
0065  * @subname: (optional) additional ctrl setting name, e.g. rts, cts
0066  * @variant: (optional) variant identifier mask
0067  * @flags: (private) flags to store gpi/gpo/gpio capabilities
0068  *
0069  * A ctrl_setting describes a specific internal mux function that a mpp pin
0070  * can be switched to. The value (val) will be written in the corresponding
0071  * register for common mpp pin configuration registers on MVEBU. SoC specific
0072  * mpp_get/_set function may use val to distinguish between different settings.
0073  *
0074  * The name will be used to switch to this setting in DT description, e.g.
0075  * marvell,function = "uart2". subname is only for debugging purposes.
0076  *
0077  * If name is one of "gpi", "gpo", "gpio" gpio capabilities are
0078  * parsed during initialization and stored in flags.
0079  *
0080  * The variant can be used to combine different revisions of one SoC to a
0081  * common pinctrl driver. It is matched (AND) with variant of soc_info to
0082  * determine if a setting is available on the current SoC revision.
0083  */
0084 struct mvebu_mpp_ctrl_setting {
0085     u8 val;
0086     const char *name;
0087     const char *subname;
0088     u8 variant;
0089     u8 flags;
0090 #define  MVEBU_SETTING_GPO  (1 << 0)
0091 #define  MVEBU_SETTING_GPI  (1 << 1)
0092 };
0093
0094 /**
0095  * struct mvebu_mpp_mode - link ctrl and settings
0096  * @pid: first pin id handled by this mode
0097  * @settings: list of settings available for this mode
0098  *
0099  * A mode connects all available settings with the corresponding mpp_ctrl
0100  * given by pid.
0101  */
0102 struct mvebu_mpp_mode {
0103     u8 pid;
0104     struct mvebu_mpp_ctrl_setting *settings;
0105 };
0106
0107 /**
0108  * struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu
0109  * @variant: variant mask of soc_info
0110  * @controls: list of available mvebu_mpp_ctrls
0111  * @control_data: optional array, one entry for each control
0112  * @ncontrols: number of available mvebu_mpp_ctrls
0113  * @modes: list of available mvebu_mpp_modes
0114  * @nmodes: number of available mvebu_mpp_modes
0115  * @gpioranges: list of pinctrl_gpio_ranges
0116  * @ngpioranges: number of available pinctrl_gpio_ranges
0117  *
0118  * This struct describes all pinctrl related information for a specific SoC.
0119  * If variant is unequal 0 it will be matched (AND) with variant of each
0120  * setting and allows to distinguish between different revisions of one SoC.
0121  */
0122 struct mvebu_pinctrl_soc_info {
0123     u8 variant;
0124     const struct mvebu_mpp_ctrl *controls;
0125     struct mvebu_mpp_ctrl_data *control_data;
0126     int ncontrols;
0127     struct mvebu_mpp_mode *modes;
0128     int nmodes;
0129     struct pinctrl_gpio_range *gpioranges;
0130     int ngpioranges;
0131 };
0132
0133 #define MPP_FUNC_CTRL(_idl, _idh, _name, _func)         \
0134     {                           \
0135         .name = _name,                  \
0136         .pid = _idl,                    \
0137         .npins = _idh - _idl + 1,           \
0138         .pins = (unsigned[_idh - _idl + 1]) { },    \
0139         .mpp_get = _func ## _get,           \
0140         .mpp_set = _func ## _set,           \
0141         .mpp_gpio_req = NULL,               \
0142         .mpp_gpio_dir = NULL,               \
0143     }
0144
0145 #define MPP_FUNC_GPIO_CTRL(_idl, _idh, _name, _func)        \
0146     {                           \
0147         .name = _name,                  \
0148         .pid = _idl,                    \
0149         .npins = _idh - _idl + 1,           \
0150         .pins = (unsigned[_idh - _idl + 1]) { },    \
0151         .mpp_get = _func ## _get,           \
0152         .mpp_set = _func ## _set,           \
0153         .mpp_gpio_req = _func ## _gpio_req,     \
0154         .mpp_gpio_dir = _func ## _gpio_dir,     \
0155     }
0156
0157 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask)     \
0158     {                           \
0159         .val = _val,                    \
0160         .name = _name,                  \
0161         .subname = _subname,                \
0162         .variant = _mask,               \
0163         .flags = 0,                 \
0164     }
0165
0166 #if defined(CONFIG_DEBUG_FS)
0167 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask)      \
0168     _MPP_VAR_FUNCTION(_val, _name, _subname, _mask)
0169 #else
0170 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask)      \
0171     _MPP_VAR_FUNCTION(_val, _name, NULL, _mask)
0172 #endif
0173
0174 #define MPP_FUNCTION(_val, _name, _subname)         \
0175     MPP_VAR_FUNCTION(_val, _name, _subname, (u8)-1)
0176
0177 #define MPP_MODE(_id, ...)                  \
0178     {                           \
0179         .pid = _id,                 \
0180         .settings = (struct mvebu_mpp_ctrl_setting[]){  \
0181             __VA_ARGS__, { } },         \
0182     }
0183
0184 #define MPP_GPIO_RANGE(_id, _pinbase, _gpiobase, _npins)    \
0185     {                           \
0186         .name = "mvebu-gpio",               \
0187         .id = _id,                  \
0188         .pin_base = _pinbase,               \
0189         .base = _gpiobase,              \
0190         .npins = _npins,                \
0191     }
0192
0193 #define MVEBU_MPPS_PER_REG  8
0194 #define MVEBU_MPP_BITS      4
0195 #define MVEBU_MPP_MASK      0xf
0196
0197 int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid,
0198                    unsigned long *config);
0199 int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid,
0200                    unsigned long config);
0201 int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid,
0202                   unsigned long *config);
0203 int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid,
0204                   unsigned long config);
0205
0206 int mvebu_pinctrl_probe(struct platform_device *pdev);
0207 int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev);
0208 int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev,
0209                       struct device *syscon_dev, u32 offset);
0210
0211 #endif