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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Marvell Armada XP pinctrl driver based on mvebu pinctrl core
0004  *
0005  * Copyright (C) 2012 Marvell
0006  *
0007  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
0008  *
0009  * This file supports the three variants of Armada XP SoCs that are
0010  * available: mv78230, mv78260 and mv78460. From a pin muxing
0011  * perspective, the mv78230 has 49 MPP pins. The mv78260 and mv78460
0012  * both have 67 MPP pins (more GPIOs and address lines for the memory
0013  * bus mainly).
0014  */
0015 
0016 #include <linux/err.h>
0017 #include <linux/init.h>
0018 #include <linux/io.h>
0019 #include <linux/platform_device.h>
0020 #include <linux/clk.h>
0021 #include <linux/of.h>
0022 #include <linux/of_device.h>
0023 #include <linux/pinctrl/pinctrl.h>
0024 #include <linux/bitops.h>
0025 
0026 #include "pinctrl-mvebu.h"
0027 
0028 static u32 *mpp_saved_regs;
0029 
0030 enum armada_xp_variant {
0031     V_MV78230   = BIT(0),
0032     V_MV78260   = BIT(1),
0033     V_MV78460   = BIT(2),
0034     V_MV78230_PLUS  = (V_MV78230 | V_MV78260 | V_MV78460),
0035     V_MV78260_PLUS  = (V_MV78260 | V_MV78460),
0036     V_98DX3236  = BIT(3),
0037     V_98DX3336  = BIT(4),
0038     V_98DX4251  = BIT(5),
0039     V_98DX3236_PLUS = (V_98DX3236 | V_98DX3336 | V_98DX4251),
0040 };
0041 
0042 static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
0043     MPP_MODE(0,
0044          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0045          MPP_VAR_FUNCTION(0x1, "ge0", "txclkout",   V_MV78230_PLUS),
0046          MPP_VAR_FUNCTION(0x4, "lcd", "d0",         V_MV78230_PLUS)),
0047     MPP_MODE(1,
0048          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0049          MPP_VAR_FUNCTION(0x1, "ge0", "txd0",       V_MV78230_PLUS),
0050          MPP_VAR_FUNCTION(0x4, "lcd", "d1",         V_MV78230_PLUS)),
0051     MPP_MODE(2,
0052          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0053          MPP_VAR_FUNCTION(0x1, "ge0", "txd1",       V_MV78230_PLUS),
0054          MPP_VAR_FUNCTION(0x4, "lcd", "d2",         V_MV78230_PLUS)),
0055     MPP_MODE(3,
0056          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0057          MPP_VAR_FUNCTION(0x1, "ge0", "txd2",       V_MV78230_PLUS),
0058          MPP_VAR_FUNCTION(0x4, "lcd", "d3",         V_MV78230_PLUS)),
0059     MPP_MODE(4,
0060          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0061          MPP_VAR_FUNCTION(0x1, "ge0", "txd3",       V_MV78230_PLUS),
0062          MPP_VAR_FUNCTION(0x4, "lcd", "d4",         V_MV78230_PLUS)),
0063     MPP_MODE(5,
0064          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0065          MPP_VAR_FUNCTION(0x1, "ge0", "txctl",      V_MV78230_PLUS),
0066          MPP_VAR_FUNCTION(0x4, "lcd", "d5",         V_MV78230_PLUS)),
0067     MPP_MODE(6,
0068          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0069          MPP_VAR_FUNCTION(0x1, "ge0", "rxd0",       V_MV78230_PLUS),
0070          MPP_VAR_FUNCTION(0x4, "lcd", "d6",         V_MV78230_PLUS)),
0071     MPP_MODE(7,
0072          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0073          MPP_VAR_FUNCTION(0x1, "ge0", "rxd1",       V_MV78230_PLUS),
0074          MPP_VAR_FUNCTION(0x4, "lcd", "d7",         V_MV78230_PLUS)),
0075     MPP_MODE(8,
0076          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0077          MPP_VAR_FUNCTION(0x1, "ge0", "rxd2",       V_MV78230_PLUS),
0078          MPP_VAR_FUNCTION(0x4, "lcd", "d8",         V_MV78230_PLUS)),
0079     MPP_MODE(9,
0080          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0081          MPP_VAR_FUNCTION(0x1, "ge0", "rxd3",       V_MV78230_PLUS),
0082          MPP_VAR_FUNCTION(0x4, "lcd", "d9",         V_MV78230_PLUS)),
0083     MPP_MODE(10,
0084          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0085          MPP_VAR_FUNCTION(0x1, "ge0", "rxctl",      V_MV78230_PLUS),
0086          MPP_VAR_FUNCTION(0x4, "lcd", "d10",        V_MV78230_PLUS)),
0087     MPP_MODE(11,
0088          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0089          MPP_VAR_FUNCTION(0x1, "ge0", "rxclk",      V_MV78230_PLUS),
0090          MPP_VAR_FUNCTION(0x4, "lcd", "d11",        V_MV78230_PLUS)),
0091     MPP_MODE(12,
0092          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0093          MPP_VAR_FUNCTION(0x1, "ge0", "txd4",       V_MV78230_PLUS),
0094          MPP_VAR_FUNCTION(0x2, "ge1", "txclkout",   V_MV78230_PLUS),
0095          MPP_VAR_FUNCTION(0x4, "lcd", "d12",        V_MV78230_PLUS)),
0096     MPP_MODE(13,
0097          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0098          MPP_VAR_FUNCTION(0x1, "ge0", "txd5",       V_MV78230_PLUS),
0099          MPP_VAR_FUNCTION(0x2, "ge1", "txd0",       V_MV78230_PLUS),
0100          MPP_VAR_FUNCTION(0x3, "spi1", "mosi",      V_MV78230_PLUS),
0101          MPP_VAR_FUNCTION(0x4, "lcd", "d13",        V_MV78230_PLUS)),
0102     MPP_MODE(14,
0103          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0104          MPP_VAR_FUNCTION(0x1, "ge0", "txd6",       V_MV78230_PLUS),
0105          MPP_VAR_FUNCTION(0x2, "ge1", "txd1",       V_MV78230_PLUS),
0106          MPP_VAR_FUNCTION(0x3, "spi1", "sck",       V_MV78230_PLUS),
0107          MPP_VAR_FUNCTION(0x4, "lcd", "d14",        V_MV78230_PLUS)),
0108     MPP_MODE(15,
0109          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0110          MPP_VAR_FUNCTION(0x1, "ge0", "txd7",       V_MV78230_PLUS),
0111          MPP_VAR_FUNCTION(0x2, "ge1", "txd2",       V_MV78230_PLUS),
0112          MPP_VAR_FUNCTION(0x4, "lcd", "d15",        V_MV78230_PLUS)),
0113     MPP_MODE(16,
0114          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0115          MPP_VAR_FUNCTION(0x1, "ge0", "txclk",      V_MV78230_PLUS),
0116          MPP_VAR_FUNCTION(0x2, "ge1", "txd3",       V_MV78230_PLUS),
0117          MPP_VAR_FUNCTION(0x3, "spi1", "cs0",       V_MV78230_PLUS),
0118          MPP_VAR_FUNCTION(0x4, "lcd", "d16",        V_MV78230_PLUS)),
0119     MPP_MODE(17,
0120          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0121          MPP_VAR_FUNCTION(0x1, "ge0", "col",        V_MV78230_PLUS),
0122          MPP_VAR_FUNCTION(0x2, "ge1", "txctl",      V_MV78230_PLUS),
0123          MPP_VAR_FUNCTION(0x3, "spi1", "miso",      V_MV78230_PLUS),
0124          MPP_VAR_FUNCTION(0x4, "lcd", "d17",        V_MV78230_PLUS)),
0125     MPP_MODE(18,
0126          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0127          MPP_VAR_FUNCTION(0x1, "ge0", "rxerr",      V_MV78230_PLUS),
0128          MPP_VAR_FUNCTION(0x2, "ge1", "rxd0",       V_MV78230_PLUS),
0129          MPP_VAR_FUNCTION(0x3, "ptp", "trig",       V_MV78230_PLUS),
0130          MPP_VAR_FUNCTION(0x4, "lcd", "d18",        V_MV78230_PLUS)),
0131     MPP_MODE(19,
0132          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0133          MPP_VAR_FUNCTION(0x1, "ge0", "crs",        V_MV78230_PLUS),
0134          MPP_VAR_FUNCTION(0x2, "ge1", "rxd1",       V_MV78230_PLUS),
0135          MPP_VAR_FUNCTION(0x3, "ptp", "evreq",      V_MV78230_PLUS),
0136          MPP_VAR_FUNCTION(0x4, "lcd", "d19",        V_MV78230_PLUS)),
0137     MPP_MODE(20,
0138          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0139          MPP_VAR_FUNCTION(0x1, "ge0", "rxd4",       V_MV78230_PLUS),
0140          MPP_VAR_FUNCTION(0x2, "ge1", "rxd2",       V_MV78230_PLUS),
0141          MPP_VAR_FUNCTION(0x3, "ptp", "clk",        V_MV78230_PLUS),
0142          MPP_VAR_FUNCTION(0x4, "lcd", "d20",        V_MV78230_PLUS)),
0143     MPP_MODE(21,
0144          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0145          MPP_VAR_FUNCTION(0x1, "ge0", "rxd5",       V_MV78230_PLUS),
0146          MPP_VAR_FUNCTION(0x2, "ge1", "rxd3",       V_MV78230_PLUS),
0147          MPP_VAR_FUNCTION(0x3, "dram", "bat",       V_MV78230_PLUS),
0148          MPP_VAR_FUNCTION(0x4, "lcd", "d21",        V_MV78230_PLUS)),
0149     MPP_MODE(22,
0150          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0151          MPP_VAR_FUNCTION(0x1, "ge0", "rxd6",       V_MV78230_PLUS),
0152          MPP_VAR_FUNCTION(0x2, "ge1", "rxctl",      V_MV78230_PLUS),
0153          MPP_VAR_FUNCTION(0x3, "sata0", "prsnt",    V_MV78230_PLUS),
0154          MPP_VAR_FUNCTION(0x4, "lcd", "d22",        V_MV78230_PLUS)),
0155     MPP_MODE(23,
0156          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0157          MPP_VAR_FUNCTION(0x1, "ge0", "rxd7",       V_MV78230_PLUS),
0158          MPP_VAR_FUNCTION(0x2, "ge1", "rxclk",      V_MV78230_PLUS),
0159          MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
0160          MPP_VAR_FUNCTION(0x4, "lcd", "d23",        V_MV78230_PLUS)),
0161     MPP_MODE(24,
0162          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0163          MPP_VAR_FUNCTION(0x1, "sata1", "prsnt",    V_MV78230_PLUS),
0164          MPP_VAR_FUNCTION(0x3, "tdm", "rst",        V_MV78230_PLUS),
0165          MPP_VAR_FUNCTION(0x4, "lcd", "hsync",      V_MV78230_PLUS)),
0166     MPP_MODE(25,
0167          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0168          MPP_VAR_FUNCTION(0x1, "sata0", "prsnt",    V_MV78230_PLUS),
0169          MPP_VAR_FUNCTION(0x3, "tdm", "pclk",       V_MV78230_PLUS),
0170          MPP_VAR_FUNCTION(0x4, "lcd", "vsync",      V_MV78230_PLUS)),
0171     MPP_MODE(26,
0172          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0173          MPP_VAR_FUNCTION(0x3, "tdm", "fsync",      V_MV78230_PLUS),
0174          MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS)),
0175     MPP_MODE(27,
0176          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0177          MPP_VAR_FUNCTION(0x1, "ptp", "trig",       V_MV78230_PLUS),
0178          MPP_VAR_FUNCTION(0x3, "tdm", "dtx",        V_MV78230_PLUS),
0179          MPP_VAR_FUNCTION(0x4, "lcd", "e",          V_MV78230_PLUS)),
0180     MPP_MODE(28,
0181          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0182          MPP_VAR_FUNCTION(0x1, "ptp", "evreq",      V_MV78230_PLUS),
0183          MPP_VAR_FUNCTION(0x3, "tdm", "drx",        V_MV78230_PLUS),
0184          MPP_VAR_FUNCTION(0x4, "lcd", "pwm",        V_MV78230_PLUS)),
0185     MPP_MODE(29,
0186          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0187          MPP_VAR_FUNCTION(0x1, "ptp", "clk",        V_MV78230_PLUS),
0188          MPP_VAR_FUNCTION(0x3, "tdm", "int0",       V_MV78230_PLUS),
0189          MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS)),
0190     MPP_MODE(30,
0191          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0192          MPP_VAR_FUNCTION(0x1, "sd0", "clk",        V_MV78230_PLUS),
0193          MPP_VAR_FUNCTION(0x3, "tdm", "int1",       V_MV78230_PLUS)),
0194     MPP_MODE(31,
0195          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0196          MPP_VAR_FUNCTION(0x1, "sd0", "cmd",        V_MV78230_PLUS),
0197          MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS)),
0198     MPP_MODE(32,
0199          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0200          MPP_VAR_FUNCTION(0x1, "sd0", "d0",         V_MV78230_PLUS),
0201          MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS)),
0202     MPP_MODE(33,
0203          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0204          MPP_VAR_FUNCTION(0x1, "sd0", "d1",         V_MV78230_PLUS),
0205          MPP_VAR_FUNCTION(0x3, "tdm", "int4",       V_MV78230_PLUS),
0206          MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
0207          MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS)),
0208     MPP_MODE(34,
0209          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0210          MPP_VAR_FUNCTION(0x1, "sd0", "d2",         V_MV78230_PLUS),
0211          MPP_VAR_FUNCTION(0x2, "sata0", "prsnt",    V_MV78230_PLUS),
0212          MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS),
0213          MPP_VAR_FUNCTION(0x4, "dram", "deccerr",   V_MV78230_PLUS)),
0214     MPP_MODE(35,
0215          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0216          MPP_VAR_FUNCTION(0x1, "sd0", "d3",         V_MV78230_PLUS),
0217          MPP_VAR_FUNCTION(0x2, "sata1", "prsnt",    V_MV78230_PLUS),
0218          MPP_VAR_FUNCTION(0x3, "tdm", "int6",       V_MV78230_PLUS)),
0219     MPP_MODE(36,
0220          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0221          MPP_VAR_FUNCTION(0x1, "spi0", "mosi",      V_MV78230_PLUS)),
0222     MPP_MODE(37,
0223          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0224          MPP_VAR_FUNCTION(0x1, "spi0", "miso",      V_MV78230_PLUS)),
0225     MPP_MODE(38,
0226          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0227          MPP_VAR_FUNCTION(0x1, "spi0", "sck",       V_MV78230_PLUS)),
0228     MPP_MODE(39,
0229          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0230          MPP_VAR_FUNCTION(0x1, "spi0", "cs0",       V_MV78230_PLUS)),
0231     MPP_MODE(40,
0232          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0233          MPP_VAR_FUNCTION(0x1, "spi0", "cs1",       V_MV78230_PLUS),
0234          MPP_VAR_FUNCTION(0x2, "uart2", "cts",      V_MV78230_PLUS),
0235          MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync",  V_MV78230_PLUS),
0236          MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS),
0237          MPP_VAR_FUNCTION(0x6, "spi1", "cs1",       V_MV78230_PLUS)),
0238     MPP_MODE(41,
0239          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0240          MPP_VAR_FUNCTION(0x1, "spi0", "cs2",       V_MV78230_PLUS),
0241          MPP_VAR_FUNCTION(0x2, "uart2", "rts",      V_MV78230_PLUS),
0242          MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
0243          MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync",  V_MV78230_PLUS),
0244          MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS),
0245          MPP_VAR_FUNCTION(0x6, "spi1", "cs2",       V_MV78230_PLUS)),
0246     MPP_MODE(42,
0247          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0248          MPP_VAR_FUNCTION(0x1, "uart2", "rxd",      V_MV78230_PLUS),
0249          MPP_VAR_FUNCTION(0x2, "uart0", "cts",      V_MV78230_PLUS),
0250          MPP_VAR_FUNCTION(0x3, "tdm", "int7",       V_MV78230_PLUS),
0251          MPP_VAR_FUNCTION(0x4, "tdm", "timer",      V_MV78230_PLUS)),
0252     MPP_MODE(43,
0253          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0254          MPP_VAR_FUNCTION(0x1, "uart2", "txd",      V_MV78230_PLUS),
0255          MPP_VAR_FUNCTION(0x2, "uart0", "rts",      V_MV78230_PLUS),
0256          MPP_VAR_FUNCTION(0x3, "spi0", "cs3",       V_MV78230_PLUS),
0257          MPP_VAR_FUNCTION(0x4, "pcie", "rstout",    V_MV78230_PLUS),
0258          MPP_VAR_FUNCTION(0x6, "spi1", "cs3",       V_MV78230_PLUS)),
0259     MPP_MODE(44,
0260          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0261          MPP_VAR_FUNCTION(0x1, "uart2", "cts",      V_MV78230_PLUS),
0262          MPP_VAR_FUNCTION(0x2, "uart3", "rxd",      V_MV78230_PLUS),
0263          MPP_VAR_FUNCTION(0x3, "spi0", "cs4",       V_MV78230_PLUS),
0264          MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
0265          MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS),
0266          MPP_VAR_FUNCTION(0x6, "spi1", "cs4",       V_MV78230_PLUS)),
0267     MPP_MODE(45,
0268          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0269          MPP_VAR_FUNCTION(0x1, "uart2", "rts",      V_MV78230_PLUS),
0270          MPP_VAR_FUNCTION(0x2, "uart3", "txd",      V_MV78230_PLUS),
0271          MPP_VAR_FUNCTION(0x3, "spi0", "cs5",       V_MV78230_PLUS),
0272          MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS),
0273          MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS),
0274          MPP_VAR_FUNCTION(0x6, "spi1", "cs5",       V_MV78230_PLUS)),
0275     MPP_MODE(46,
0276          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0277          MPP_VAR_FUNCTION(0x1, "uart3", "rts",      V_MV78230_PLUS),
0278          MPP_VAR_FUNCTION(0x2, "uart1", "rts",      V_MV78230_PLUS),
0279          MPP_VAR_FUNCTION(0x3, "spi0", "cs6",       V_MV78230_PLUS),
0280          MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS),
0281          MPP_VAR_FUNCTION(0x6, "spi1", "cs6",       V_MV78230_PLUS)),
0282     MPP_MODE(47,
0283          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0284          MPP_VAR_FUNCTION(0x1, "uart3", "cts",      V_MV78230_PLUS),
0285          MPP_VAR_FUNCTION(0x2, "uart1", "cts",      V_MV78230_PLUS),
0286          MPP_VAR_FUNCTION(0x3, "spi0", "cs7",       V_MV78230_PLUS),
0287          MPP_VAR_FUNCTION(0x4, "ref", "clkout",     V_MV78230_PLUS),
0288          MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS),
0289          MPP_VAR_FUNCTION(0x6, "spi1", "cs7",       V_MV78230_PLUS)),
0290     MPP_MODE(48,
0291          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
0292          MPP_VAR_FUNCTION(0x1, "dev", "clkout",     V_MV78230_PLUS),
0293          MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS),
0294          MPP_VAR_FUNCTION(0x3, "nand", "rb",        V_MV78230_PLUS)),
0295     MPP_MODE(49,
0296          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0297          MPP_VAR_FUNCTION(0x1, "dev", "we3",        V_MV78260_PLUS)),
0298     MPP_MODE(50,
0299          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0300          MPP_VAR_FUNCTION(0x1, "dev", "we2",        V_MV78260_PLUS)),
0301     MPP_MODE(51,
0302          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0303          MPP_VAR_FUNCTION(0x1, "dev", "ad16",       V_MV78260_PLUS)),
0304     MPP_MODE(52,
0305          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0306          MPP_VAR_FUNCTION(0x1, "dev", "ad17",       V_MV78260_PLUS)),
0307     MPP_MODE(53,
0308          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0309          MPP_VAR_FUNCTION(0x1, "dev", "ad18",       V_MV78260_PLUS)),
0310     MPP_MODE(54,
0311          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0312          MPP_VAR_FUNCTION(0x1, "dev", "ad19",       V_MV78260_PLUS)),
0313     MPP_MODE(55,
0314          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0315          MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS)),
0316     MPP_MODE(56,
0317          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0318          MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS)),
0319     MPP_MODE(57,
0320          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0321          MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS)),
0322     MPP_MODE(58,
0323          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0324          MPP_VAR_FUNCTION(0x1, "dev", "ad23",       V_MV78260_PLUS)),
0325     MPP_MODE(59,
0326          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0327          MPP_VAR_FUNCTION(0x1, "dev", "ad24",       V_MV78260_PLUS)),
0328     MPP_MODE(60,
0329          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0330          MPP_VAR_FUNCTION(0x1, "dev", "ad25",       V_MV78260_PLUS)),
0331     MPP_MODE(61,
0332          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0333          MPP_VAR_FUNCTION(0x1, "dev", "ad26",       V_MV78260_PLUS)),
0334     MPP_MODE(62,
0335          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0336          MPP_VAR_FUNCTION(0x1, "dev", "ad27",       V_MV78260_PLUS)),
0337     MPP_MODE(63,
0338          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0339          MPP_VAR_FUNCTION(0x1, "dev", "ad28",       V_MV78260_PLUS)),
0340     MPP_MODE(64,
0341          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0342          MPP_VAR_FUNCTION(0x1, "dev", "ad29",       V_MV78260_PLUS)),
0343     MPP_MODE(65,
0344          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0345          MPP_VAR_FUNCTION(0x1, "dev", "ad30",       V_MV78260_PLUS)),
0346     MPP_MODE(66,
0347          MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
0348          MPP_VAR_FUNCTION(0x1, "dev", "ad31",       V_MV78260_PLUS)),
0349 };
0350 
0351 static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
0352     MPP_MODE(0,
0353          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0354          MPP_VAR_FUNCTION(0x2, "spi0", "mosi",       V_98DX3236_PLUS),
0355          MPP_VAR_FUNCTION(0x4, "dev", "ad8",         V_98DX3236_PLUS)),
0356     MPP_MODE(1,
0357          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0358          MPP_VAR_FUNCTION(0x2, "spi0", "miso",       V_98DX3236_PLUS),
0359          MPP_VAR_FUNCTION(0x4, "dev", "ad9",         V_98DX3236_PLUS)),
0360     MPP_MODE(2,
0361          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0362          MPP_VAR_FUNCTION(0x2, "spi0", "sck",        V_98DX3236_PLUS),
0363          MPP_VAR_FUNCTION(0x4, "dev", "ad10",        V_98DX3236_PLUS)),
0364     MPP_MODE(3,
0365          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0366          MPP_VAR_FUNCTION(0x2, "spi0", "cs0",        V_98DX3236_PLUS),
0367          MPP_VAR_FUNCTION(0x4, "dev", "ad11",        V_98DX3236_PLUS)),
0368     MPP_MODE(4,
0369          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0370          MPP_VAR_FUNCTION(0x2, "spi0", "cs1",        V_98DX3236_PLUS),
0371          MPP_VAR_FUNCTION(0x3, "smi", "mdc",         V_98DX3236_PLUS),
0372          MPP_VAR_FUNCTION(0x4, "dev", "cs0",         V_98DX3236_PLUS)),
0373     MPP_MODE(5,
0374          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0375          MPP_VAR_FUNCTION(0x1, "pex", "rsto",        V_98DX3236_PLUS),
0376          MPP_VAR_FUNCTION(0x2, "sd0", "cmd",         V_98DX4251),
0377          MPP_VAR_FUNCTION(0x4, "dev", "bootcs",      V_98DX3236_PLUS)),
0378     MPP_MODE(6,
0379          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0380          MPP_VAR_FUNCTION(0x2, "sd0", "clk",         V_98DX4251),
0381          MPP_VAR_FUNCTION(0x4, "dev", "a2",          V_98DX3236_PLUS)),
0382     MPP_MODE(7,
0383          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0384          MPP_VAR_FUNCTION(0x2, "sd0", "d0",          V_98DX4251),
0385          MPP_VAR_FUNCTION(0x4, "dev", "ale0",        V_98DX3236_PLUS)),
0386     MPP_MODE(8,
0387          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0388          MPP_VAR_FUNCTION(0x2, "sd0", "d1",          V_98DX4251),
0389          MPP_VAR_FUNCTION(0x4, "dev", "ale1",        V_98DX3236_PLUS)),
0390     MPP_MODE(9,
0391          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0392          MPP_VAR_FUNCTION(0x2, "sd0", "d2",          V_98DX4251),
0393          MPP_VAR_FUNCTION(0x4, "dev", "ready0",      V_98DX3236_PLUS)),
0394     MPP_MODE(10,
0395          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0396          MPP_VAR_FUNCTION(0x2, "sd0", "d3",          V_98DX4251),
0397          MPP_VAR_FUNCTION(0x4, "dev", "ad12",        V_98DX3236_PLUS)),
0398     MPP_MODE(11,
0399          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0400          MPP_VAR_FUNCTION(0x2, "uart1", "rxd",       V_98DX3236_PLUS),
0401          MPP_VAR_FUNCTION(0x3, "uart0", "cts",       V_98DX3236_PLUS),
0402          MPP_VAR_FUNCTION(0x4, "dev", "ad13",        V_98DX3236_PLUS)),
0403     MPP_MODE(12,
0404          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0405          MPP_VAR_FUNCTION(0x2, "uart1", "txd",       V_98DX3236_PLUS),
0406          MPP_VAR_FUNCTION(0x3, "uart0", "rts",       V_98DX3236_PLUS),
0407          MPP_VAR_FUNCTION(0x4, "dev", "ad14",        V_98DX3236_PLUS)),
0408     MPP_MODE(13,
0409          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0410          MPP_VAR_FUNCTION(0x1, "intr", "out",        V_98DX3236_PLUS),
0411          MPP_VAR_FUNCTION(0x4, "dev", "ad15",        V_98DX3236_PLUS)),
0412     MPP_MODE(14,
0413          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0414          MPP_VAR_FUNCTION(0x1, "i2c0", "sck",        V_98DX3236_PLUS)),
0415     MPP_MODE(15,
0416          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0417          MPP_VAR_FUNCTION(0x1, "i2c0", "sda",        V_98DX3236_PLUS)),
0418     MPP_MODE(16,
0419          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0420          MPP_VAR_FUNCTION(0x4, "dev", "oe",          V_98DX3236_PLUS)),
0421     MPP_MODE(17,
0422          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0423          MPP_VAR_FUNCTION(0x4, "dev", "clkout",      V_98DX3236_PLUS)),
0424     MPP_MODE(18,
0425          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0426          MPP_VAR_FUNCTION(0x3, "uart1", "txd",       V_98DX3236_PLUS)),
0427     MPP_MODE(19,
0428          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0429          MPP_VAR_FUNCTION(0x3, "uart1", "rxd",       V_98DX3236_PLUS),
0430          MPP_VAR_FUNCTION(0x4, "nand", "rb",         V_98DX3236_PLUS)),
0431     MPP_MODE(20,
0432          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0433          MPP_VAR_FUNCTION(0x4, "dev", "we0",         V_98DX3236_PLUS)),
0434     MPP_MODE(21,
0435          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0436          MPP_VAR_FUNCTION(0x4, "dev", "ad0",         V_98DX3236_PLUS)),
0437     MPP_MODE(22,
0438          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0439          MPP_VAR_FUNCTION(0x4, "dev", "ad1",         V_98DX3236_PLUS)),
0440     MPP_MODE(23,
0441          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0442          MPP_VAR_FUNCTION(0x4, "dev", "ad2",         V_98DX3236_PLUS)),
0443     MPP_MODE(24,
0444          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0445          MPP_VAR_FUNCTION(0x4, "dev", "ad3",         V_98DX3236_PLUS)),
0446     MPP_MODE(25,
0447          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0448          MPP_VAR_FUNCTION(0x4, "dev", "ad4",         V_98DX3236_PLUS)),
0449     MPP_MODE(26,
0450          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0451          MPP_VAR_FUNCTION(0x4, "dev", "ad5",         V_98DX3236_PLUS)),
0452     MPP_MODE(27,
0453          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0454          MPP_VAR_FUNCTION(0x4, "dev", "ad6",         V_98DX3236_PLUS)),
0455     MPP_MODE(28,
0456          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0457          MPP_VAR_FUNCTION(0x4, "dev", "ad7",         V_98DX3236_PLUS)),
0458     MPP_MODE(29,
0459          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0460          MPP_VAR_FUNCTION(0x4, "dev", "a0",          V_98DX3236_PLUS)),
0461     MPP_MODE(30,
0462          MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
0463          MPP_VAR_FUNCTION(0x4, "dev", "a1",          V_98DX3236_PLUS)),
0464     MPP_MODE(31,
0465          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0466          MPP_VAR_FUNCTION(0x1, "slv_smi", "mdc",     V_98DX3236_PLUS),
0467          MPP_VAR_FUNCTION(0x3, "smi", "mdc",         V_98DX3236_PLUS),
0468          MPP_VAR_FUNCTION(0x4, "dev", "we1",         V_98DX3236_PLUS)),
0469     MPP_MODE(32,
0470          MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
0471          MPP_VAR_FUNCTION(0x1, "slv_smi", "mdio",    V_98DX3236_PLUS),
0472          MPP_VAR_FUNCTION(0x3, "smi", "mdio",        V_98DX3236_PLUS),
0473          MPP_VAR_FUNCTION(0x4, "dev", "cs1",         V_98DX3236_PLUS)),
0474 };
0475 
0476 static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info;
0477 
0478 static const struct of_device_id armada_xp_pinctrl_of_match[] = {
0479     {
0480         .compatible = "marvell,mv78230-pinctrl",
0481         .data       = (void *) V_MV78230,
0482     },
0483     {
0484         .compatible = "marvell,mv78260-pinctrl",
0485         .data       = (void *) V_MV78260,
0486     },
0487     {
0488         .compatible = "marvell,mv78460-pinctrl",
0489         .data       = (void *) V_MV78460,
0490     },
0491     {
0492         .compatible = "marvell,98dx3236-pinctrl",
0493         .data       = (void *) V_98DX3236,
0494     },
0495     {
0496         .compatible = "marvell,98dx4251-pinctrl",
0497         .data       = (void *) V_98DX4251,
0498     },
0499     { },
0500 };
0501 
0502 static const struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
0503     MPP_FUNC_CTRL(0, 48, NULL, mvebu_mmio_mpp_ctrl),
0504 };
0505 
0506 static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
0507     MPP_GPIO_RANGE(0,   0,  0, 32),
0508     MPP_GPIO_RANGE(1,  32, 32, 17),
0509 };
0510 
0511 static const struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
0512     MPP_FUNC_CTRL(0, 66, NULL, mvebu_mmio_mpp_ctrl),
0513 };
0514 
0515 static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
0516     MPP_GPIO_RANGE(0,   0,  0, 32),
0517     MPP_GPIO_RANGE(1,  32, 32, 32),
0518     MPP_GPIO_RANGE(2,  64, 64,  3),
0519 };
0520 
0521 static const struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
0522     MPP_FUNC_CTRL(0, 66, NULL, mvebu_mmio_mpp_ctrl),
0523 };
0524 
0525 static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = {
0526     MPP_GPIO_RANGE(0,   0,  0, 32),
0527     MPP_GPIO_RANGE(1,  32, 32, 32),
0528     MPP_GPIO_RANGE(2,  64, 64,  3),
0529 };
0530 
0531 static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = {
0532     MPP_FUNC_CTRL(0, 32, NULL, mvebu_mmio_mpp_ctrl),
0533 };
0534 
0535 static struct pinctrl_gpio_range mv98dx3236_mpp_gpio_ranges[] = {
0536     MPP_GPIO_RANGE(0, 0, 0, 32),
0537 };
0538 
0539 static int armada_xp_pinctrl_suspend(struct platform_device *pdev,
0540                      pm_message_t state)
0541 {
0542     struct mvebu_pinctrl_soc_info *soc =
0543         platform_get_drvdata(pdev);
0544     int i, nregs;
0545 
0546     nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
0547 
0548     for (i = 0; i < nregs; i++)
0549         mpp_saved_regs[i] = readl(soc->control_data[0].base + i * 4);
0550 
0551     return 0;
0552 }
0553 
0554 static int armada_xp_pinctrl_resume(struct platform_device *pdev)
0555 {
0556     struct mvebu_pinctrl_soc_info *soc =
0557         platform_get_drvdata(pdev);
0558     int i, nregs;
0559 
0560     nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
0561 
0562     for (i = 0; i < nregs; i++)
0563         writel(mpp_saved_regs[i], soc->control_data[0].base + i * 4);
0564 
0565     return 0;
0566 }
0567 
0568 static int armada_xp_pinctrl_probe(struct platform_device *pdev)
0569 {
0570     struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
0571     const struct of_device_id *match =
0572         of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
0573     int nregs;
0574 
0575     if (!match)
0576         return -ENODEV;
0577 
0578     soc->variant = (unsigned) match->data & 0xff;
0579 
0580     switch (soc->variant) {
0581     case V_MV78230:
0582         soc->controls = mv78230_mpp_controls;
0583         soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls);
0584         soc->modes = armada_xp_mpp_modes;
0585         /* We don't necessarily want the full list of the
0586          * armada_xp_mpp_modes, but only the first 'n' ones
0587          * that are available on this SoC */
0588         soc->nmodes = mv78230_mpp_controls[0].npins;
0589         soc->gpioranges = mv78230_mpp_gpio_ranges;
0590         soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges);
0591         break;
0592     case V_MV78260:
0593         soc->controls = mv78260_mpp_controls;
0594         soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls);
0595         soc->modes = armada_xp_mpp_modes;
0596         /* We don't necessarily want the full list of the
0597          * armada_xp_mpp_modes, but only the first 'n' ones
0598          * that are available on this SoC */
0599         soc->nmodes = mv78260_mpp_controls[0].npins;
0600         soc->gpioranges = mv78260_mpp_gpio_ranges;
0601         soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges);
0602         break;
0603     case V_MV78460:
0604         soc->controls = mv78460_mpp_controls;
0605         soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls);
0606         soc->modes = armada_xp_mpp_modes;
0607         /* We don't necessarily want the full list of the
0608          * armada_xp_mpp_modes, but only the first 'n' ones
0609          * that are available on this SoC */
0610         soc->nmodes = mv78460_mpp_controls[0].npins;
0611         soc->gpioranges = mv78460_mpp_gpio_ranges;
0612         soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges);
0613         break;
0614     case V_98DX3236:
0615     case V_98DX3336:
0616     case V_98DX4251:
0617         /* fall-through */
0618         soc->controls = mv98dx3236_mpp_controls;
0619         soc->ncontrols = ARRAY_SIZE(mv98dx3236_mpp_controls);
0620         soc->modes = mv98dx3236_mpp_modes;
0621         soc->nmodes = mv98dx3236_mpp_controls[0].npins;
0622         soc->gpioranges = mv98dx3236_mpp_gpio_ranges;
0623         soc->ngpioranges = ARRAY_SIZE(mv98dx3236_mpp_gpio_ranges);
0624         break;
0625     }
0626 
0627     nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
0628 
0629     mpp_saved_regs = devm_kmalloc_array(&pdev->dev, nregs, sizeof(u32),
0630                         GFP_KERNEL);
0631     if (!mpp_saved_regs)
0632         return -ENOMEM;
0633 
0634     pdev->dev.platform_data = soc;
0635 
0636     return mvebu_pinctrl_simple_mmio_probe(pdev);
0637 }
0638 
0639 static struct platform_driver armada_xp_pinctrl_driver = {
0640     .driver = {
0641         .name = "armada-xp-pinctrl",
0642         .of_match_table = armada_xp_pinctrl_of_match,
0643     },
0644     .probe = armada_xp_pinctrl_probe,
0645     .suspend = armada_xp_pinctrl_suspend,
0646     .resume = armada_xp_pinctrl_resume,
0647 };
0648 builtin_platform_driver(armada_xp_pinctrl_driver);
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