pinctrl/mvebu/pinctrl-armada-ap806.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Marvell Armada ap806 pinctrl driver based on mvebu pinctrl core
0004  *
0005  * Copyright (C) 2017 Marvell
0006  *
0007  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
0008  * Hanna Hawa <hannah@marvell.com>
0009  */
0010
0011 #include <linux/err.h>
0012 #include <linux/init.h>
0013 #include <linux/io.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/of.h>
0016 #include <linux/of_device.h>
0017 #include <linux/pinctrl/pinctrl.h>
0018
0019 #include "pinctrl-mvebu.h"
0020
0021 static struct mvebu_mpp_mode armada_ap806_mpp_modes[] = {
0022     MPP_MODE(0,
0023          MPP_FUNCTION(0, "gpio",    NULL),
0024          MPP_FUNCTION(1, "sdio",    "clk"),
0025          MPP_FUNCTION(3, "spi0",    "clk")),
0026     MPP_MODE(1,
0027          MPP_FUNCTION(0, "gpio",    NULL),
0028          MPP_FUNCTION(1, "sdio",    "cmd"),
0029          MPP_FUNCTION(3, "spi0",    "miso")),
0030     MPP_MODE(2,
0031          MPP_FUNCTION(0, "gpio",    NULL),
0032          MPP_FUNCTION(1, "sdio",    "d0"),
0033          MPP_FUNCTION(3, "spi0",    "mosi")),
0034     MPP_MODE(3,
0035          MPP_FUNCTION(0, "gpio",    NULL),
0036          MPP_FUNCTION(1, "sdio",    "d1"),
0037          MPP_FUNCTION(3, "spi0",    "cs0n")),
0038     MPP_MODE(4,
0039          MPP_FUNCTION(0, "gpio",    NULL),
0040          MPP_FUNCTION(1, "sdio",    "d2"),
0041          MPP_FUNCTION(3, "i2c0",    "sda")),
0042     MPP_MODE(5,
0043          MPP_FUNCTION(0, "gpio",    NULL),
0044          MPP_FUNCTION(1, "sdio",    "d3"),
0045          MPP_FUNCTION(3, "i2c0",    "sdk")),
0046     MPP_MODE(6,
0047          MPP_FUNCTION(0, "gpio",    NULL),
0048          MPP_FUNCTION(1, "sdio",    "ds")),
0049     MPP_MODE(7,
0050          MPP_FUNCTION(0, "gpio",    NULL),
0051          MPP_FUNCTION(1, "sdio",    "d4"),
0052          MPP_FUNCTION(3, "uart1",   "rxd")),
0053     MPP_MODE(8,
0054          MPP_FUNCTION(0, "gpio",    NULL),
0055          MPP_FUNCTION(1, "sdio",    "d5"),
0056          MPP_FUNCTION(3, "uart1",   "txd")),
0057     MPP_MODE(9,
0058          MPP_FUNCTION(0, "gpio",    NULL),
0059          MPP_FUNCTION(1, "sdio",    "d6"),
0060          MPP_FUNCTION(3, "spi0",    "cs1n")),
0061     MPP_MODE(10,
0062          MPP_FUNCTION(0, "gpio",    NULL),
0063          MPP_FUNCTION(1, "sdio",    "d7")),
0064     MPP_MODE(11,
0065          MPP_FUNCTION(0, "gpio",    NULL),
0066          MPP_FUNCTION(3, "uart0",   "txd")),
0067     MPP_MODE(12,
0068          MPP_FUNCTION(0, "gpio",    NULL),
0069          MPP_FUNCTION(1, "sdio",    "pw_off"),
0070          MPP_FUNCTION(2, "sdio",    "hw_rst")),
0071     MPP_MODE(13,
0072          MPP_FUNCTION(0, "gpio",    NULL)),
0073     MPP_MODE(14,
0074          MPP_FUNCTION(0, "gpio",    NULL)),
0075     MPP_MODE(15,
0076          MPP_FUNCTION(0, "gpio",    NULL)),
0077     MPP_MODE(16,
0078          MPP_FUNCTION(0, "gpio",    NULL)),
0079     MPP_MODE(17,
0080          MPP_FUNCTION(0, "gpio",    NULL)),
0081     MPP_MODE(18,
0082          MPP_FUNCTION(0, "gpio",    NULL)),
0083     MPP_MODE(19,
0084          MPP_FUNCTION(0, "gpio",    NULL),
0085          MPP_FUNCTION(3, "uart0",   "rxd"),
0086          MPP_FUNCTION(4, "sdio",    "pw_off")),
0087 };
0088
0089 static struct mvebu_pinctrl_soc_info armada_ap806_pinctrl_info;
0090
0091 static const struct of_device_id armada_ap806_pinctrl_of_match[] = {
0092     {
0093         .compatible = "marvell,ap806-pinctrl",
0094     },
0095     { },
0096 };
0097
0098 static const struct mvebu_mpp_ctrl armada_ap806_mpp_controls[] = {
0099     MPP_FUNC_CTRL(0, 19, NULL, mvebu_regmap_mpp_ctrl),
0100 };
0101
0102 static struct pinctrl_gpio_range armada_ap806_mpp_gpio_ranges[] = {
0103     MPP_GPIO_RANGE(0,   0,  0, 20),
0104 };
0105
0106 static int armada_ap806_pinctrl_probe(struct platform_device *pdev)
0107 {
0108     struct mvebu_pinctrl_soc_info *soc = &armada_ap806_pinctrl_info;
0109     const struct of_device_id *match =
0110         of_match_device(armada_ap806_pinctrl_of_match, &pdev->dev);
0111
0112     if (!match || !pdev->dev.parent)
0113         return -ENODEV;
0114
0115     soc->variant = 0; /* no variants for Armada AP806 */
0116     soc->controls = armada_ap806_mpp_controls;
0117     soc->ncontrols = ARRAY_SIZE(armada_ap806_mpp_controls);
0118     soc->gpioranges = armada_ap806_mpp_gpio_ranges;
0119     soc->ngpioranges = ARRAY_SIZE(armada_ap806_mpp_gpio_ranges);
0120     soc->modes = armada_ap806_mpp_modes;
0121     soc->nmodes = armada_ap806_mpp_controls[0].npins;
0122
0123     pdev->dev.platform_data = soc;
0124
0125     return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0);
0126 }
0127
0128 static struct platform_driver armada_ap806_pinctrl_driver = {
0129     .driver = {
0130         .name = "armada-ap806-pinctrl",
0131         .of_match_table = of_match_ptr(armada_ap806_pinctrl_of_match),
0132     },
0133     .probe = armada_ap806_pinctrl_probe,
0134 };
0135
0136 builtin_platform_driver(armada_ap806_pinctrl_driver);