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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Pin controller and GPIO driver for Amlogic Meson8b.
0004  *
0005  * Copyright (C) 2015 Endless Mobile, Inc.
0006  * Author: Carlo Caione <carlo@endlessm.com>
0007  */
0008 
0009 #include <dt-bindings/gpio/meson8b-gpio.h>
0010 #include "pinctrl-meson.h"
0011 #include "pinctrl-meson8-pmx.h"
0012 
0013 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
0014     MESON_PIN(GPIOX_0),
0015     MESON_PIN(GPIOX_1),
0016     MESON_PIN(GPIOX_2),
0017     MESON_PIN(GPIOX_3),
0018     MESON_PIN(GPIOX_4),
0019     MESON_PIN(GPIOX_5),
0020     MESON_PIN(GPIOX_6),
0021     MESON_PIN(GPIOX_7),
0022     MESON_PIN(GPIOX_8),
0023     MESON_PIN(GPIOX_9),
0024     MESON_PIN(GPIOX_10),
0025     MESON_PIN(GPIOX_11),
0026     MESON_PIN(GPIOX_16),
0027     MESON_PIN(GPIOX_17),
0028     MESON_PIN(GPIOX_18),
0029     MESON_PIN(GPIOX_19),
0030     MESON_PIN(GPIOX_20),
0031     MESON_PIN(GPIOX_21),
0032 
0033     MESON_PIN(GPIOY_0),
0034     MESON_PIN(GPIOY_1),
0035     MESON_PIN(GPIOY_3),
0036     MESON_PIN(GPIOY_6),
0037     MESON_PIN(GPIOY_7),
0038     MESON_PIN(GPIOY_8),
0039     MESON_PIN(GPIOY_9),
0040     MESON_PIN(GPIOY_10),
0041     MESON_PIN(GPIOY_11),
0042     MESON_PIN(GPIOY_12),
0043     MESON_PIN(GPIOY_13),
0044     MESON_PIN(GPIOY_14),
0045 
0046     MESON_PIN(GPIODV_9),
0047     MESON_PIN(GPIODV_24),
0048     MESON_PIN(GPIODV_25),
0049     MESON_PIN(GPIODV_26),
0050     MESON_PIN(GPIODV_27),
0051     MESON_PIN(GPIODV_28),
0052     MESON_PIN(GPIODV_29),
0053 
0054     MESON_PIN(GPIOH_0),
0055     MESON_PIN(GPIOH_1),
0056     MESON_PIN(GPIOH_2),
0057     MESON_PIN(GPIOH_3),
0058     MESON_PIN(GPIOH_4),
0059     MESON_PIN(GPIOH_5),
0060     MESON_PIN(GPIOH_6),
0061     MESON_PIN(GPIOH_7),
0062     MESON_PIN(GPIOH_8),
0063     MESON_PIN(GPIOH_9),
0064 
0065     MESON_PIN(CARD_0),
0066     MESON_PIN(CARD_1),
0067     MESON_PIN(CARD_2),
0068     MESON_PIN(CARD_3),
0069     MESON_PIN(CARD_4),
0070     MESON_PIN(CARD_5),
0071     MESON_PIN(CARD_6),
0072 
0073     MESON_PIN(BOOT_0),
0074     MESON_PIN(BOOT_1),
0075     MESON_PIN(BOOT_2),
0076     MESON_PIN(BOOT_3),
0077     MESON_PIN(BOOT_4),
0078     MESON_PIN(BOOT_5),
0079     MESON_PIN(BOOT_6),
0080     MESON_PIN(BOOT_7),
0081     MESON_PIN(BOOT_8),
0082     MESON_PIN(BOOT_9),
0083     MESON_PIN(BOOT_10),
0084     MESON_PIN(BOOT_11),
0085     MESON_PIN(BOOT_12),
0086     MESON_PIN(BOOT_13),
0087     MESON_PIN(BOOT_14),
0088     MESON_PIN(BOOT_15),
0089     MESON_PIN(BOOT_16),
0090     MESON_PIN(BOOT_17),
0091     MESON_PIN(BOOT_18),
0092 
0093     MESON_PIN(DIF_0_P),
0094     MESON_PIN(DIF_0_N),
0095     MESON_PIN(DIF_1_P),
0096     MESON_PIN(DIF_1_N),
0097     MESON_PIN(DIF_2_P),
0098     MESON_PIN(DIF_2_N),
0099     MESON_PIN(DIF_3_P),
0100     MESON_PIN(DIF_3_N),
0101     MESON_PIN(DIF_4_P),
0102     MESON_PIN(DIF_4_N),
0103 };
0104 
0105 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
0106     MESON_PIN(GPIOAO_0),
0107     MESON_PIN(GPIOAO_1),
0108     MESON_PIN(GPIOAO_2),
0109     MESON_PIN(GPIOAO_3),
0110     MESON_PIN(GPIOAO_4),
0111     MESON_PIN(GPIOAO_5),
0112     MESON_PIN(GPIOAO_6),
0113     MESON_PIN(GPIOAO_7),
0114     MESON_PIN(GPIOAO_8),
0115     MESON_PIN(GPIOAO_9),
0116     MESON_PIN(GPIOAO_10),
0117     MESON_PIN(GPIOAO_11),
0118     MESON_PIN(GPIOAO_12),
0119     MESON_PIN(GPIOAO_13),
0120 
0121     /*
0122      * The following 2 pins are not mentionned in the public datasheet
0123      * According to this datasheet, they can't be used with the gpio
0124      * interrupt controller
0125      */
0126     MESON_PIN(GPIO_BSD_EN),
0127     MESON_PIN(GPIO_TEST_N),
0128 };
0129 
0130 /* bank X */
0131 static const unsigned int sd_d0_a_pins[]    = { GPIOX_0 };
0132 static const unsigned int sd_d1_a_pins[]    = { GPIOX_1 };
0133 static const unsigned int sd_d2_a_pins[]    = { GPIOX_2 };
0134 static const unsigned int sd_d3_a_pins[]    = { GPIOX_3 };
0135 static const unsigned int sdxc_d0_0_a_pins[]    = { GPIOX_4 };
0136 static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5,
0137                             GPIOX_6, GPIOX_7 };
0138 static const unsigned int sdxc_d13_0_a_pins[]   = { GPIOX_5, GPIOX_6,
0139                             GPIOX_7 };
0140 static const unsigned int sd_clk_a_pins[]   = { GPIOX_8 };
0141 static const unsigned int sd_cmd_a_pins[]   = { GPIOX_9 };
0142 static const unsigned int xtal_32k_out_pins[]   = { GPIOX_10 };
0143 static const unsigned int xtal_24m_out_pins[]   = { GPIOX_11 };
0144 static const unsigned int uart_tx_b0_pins[] = { GPIOX_16 };
0145 static const unsigned int uart_rx_b0_pins[] = { GPIOX_17 };
0146 static const unsigned int uart_cts_b0_pins[]    = { GPIOX_18 };
0147 static const unsigned int uart_rts_b0_pins[]    = { GPIOX_19 };
0148 
0149 static const unsigned int sdxc_d0_1_a_pins[]    = { GPIOX_0 };
0150 static const unsigned int sdxc_d13_1_a_pins[]   = { GPIOX_1, GPIOX_2,
0151                             GPIOX_3 };
0152 static const unsigned int pcm_out_a_pins[]  = { GPIOX_4 };
0153 static const unsigned int pcm_in_a_pins[]   = { GPIOX_5 };
0154 static const unsigned int pcm_fs_a_pins[]   = { GPIOX_6 };
0155 static const unsigned int pcm_clk_a_pins[]  = { GPIOX_7 };
0156 static const unsigned int sdxc_clk_a_pins[] = { GPIOX_8 };
0157 static const unsigned int sdxc_cmd_a_pins[] = { GPIOX_9 };
0158 static const unsigned int pwm_vs_0_pins[]   = { GPIOX_10 };
0159 static const unsigned int pwm_e_pins[]      = { GPIOX_10 };
0160 static const unsigned int pwm_vs_1_pins[]   = { GPIOX_11 };
0161 
0162 static const unsigned int uart_tx_a_pins[]  = { GPIOX_4 };
0163 static const unsigned int uart_rx_a_pins[]  = { GPIOX_5 };
0164 static const unsigned int uart_cts_a_pins[] = { GPIOX_6 };
0165 static const unsigned int uart_rts_a_pins[] = { GPIOX_7 };
0166 static const unsigned int uart_tx_b1_pins[] = { GPIOX_8 };
0167 static const unsigned int uart_rx_b1_pins[] = { GPIOX_9 };
0168 static const unsigned int uart_cts_b1_pins[]    = { GPIOX_10 };
0169 static const unsigned int uart_rts_b1_pins[]    = { GPIOX_20 };
0170 
0171 static const unsigned int iso7816_0_clk_pins[]  = { GPIOX_6 };
0172 static const unsigned int iso7816_0_data_pins[] = { GPIOX_7 };
0173 static const unsigned int spi_sclk_0_pins[] = { GPIOX_8 };
0174 static const unsigned int spi_miso_0_pins[] = { GPIOX_9 };
0175 static const unsigned int spi_mosi_0_pins[] = { GPIOX_10 };
0176 static const unsigned int iso7816_det_pins[]    = { GPIOX_16 };
0177 static const unsigned int iso7816_reset_pins[]  = { GPIOX_17 };
0178 static const unsigned int iso7816_1_clk_pins[]  = { GPIOX_18 };
0179 static const unsigned int iso7816_1_data_pins[] = { GPIOX_19 };
0180 static const unsigned int spi_ss0_0_pins[]  = { GPIOX_20 };
0181 
0182 static const unsigned int tsin_clk_b_pins[] = { GPIOX_8 };
0183 static const unsigned int tsin_sop_b_pins[] = { GPIOX_9 };
0184 static const unsigned int tsin_d0_b_pins[]  = { GPIOX_10 };
0185 static const unsigned int pwm_b_pins[]      = { GPIOX_11 };
0186 static const unsigned int i2c_sda_d0_pins[] = { GPIOX_16 };
0187 static const unsigned int i2c_sck_d0_pins[] = { GPIOX_17 };
0188 static const unsigned int tsin_d_valid_b_pins[] = { GPIOX_20 };
0189 
0190 /* bank Y */
0191 static const unsigned int tsin_d_valid_a_pins[] = { GPIOY_0 };
0192 static const unsigned int tsin_sop_a_pins[] = { GPIOY_1 };
0193 static const unsigned int tsin_d17_a_pins[] = {
0194     GPIOY_6, GPIOY_7, GPIOY_10, GPIOY_11, GPIOY_12, GPIOY_13, GPIOY_14,
0195 };
0196 static const unsigned int tsin_clk_a_pins[] = { GPIOY_8 };
0197 static const unsigned int tsin_d0_a_pins[]  = { GPIOY_9 };
0198 
0199 static const unsigned int spdif_out_0_pins[]    = { GPIOY_3 };
0200 
0201 static const unsigned int xtal_24m_pins[]   = { GPIOY_3 };
0202 static const unsigned int iso7816_2_clk_pins[]  = { GPIOY_13 };
0203 static const unsigned int iso7816_2_data_pins[] = { GPIOY_14 };
0204 
0205 /* bank DV */
0206 static const unsigned int pwm_d_pins[]      = { GPIODV_28 };
0207 static const unsigned int pwm_c0_pins[]     = { GPIODV_29 };
0208 
0209 static const unsigned int pwm_vs_2_pins[]   = { GPIODV_9 };
0210 static const unsigned int pwm_vs_3_pins[]   = { GPIODV_28 };
0211 static const unsigned int pwm_vs_4_pins[]   = { GPIODV_29 };
0212 
0213 static const unsigned int xtal24_out_pins[] = { GPIODV_29 };
0214 
0215 static const unsigned int uart_tx_c_pins[]  = { GPIODV_24 };
0216 static const unsigned int uart_rx_c_pins[]  = { GPIODV_25 };
0217 static const unsigned int uart_cts_c_pins[] = { GPIODV_26 };
0218 static const unsigned int uart_rts_c_pins[] = { GPIODV_27 };
0219 
0220 static const unsigned int pwm_c1_pins[]     = { GPIODV_9 };
0221 
0222 static const unsigned int i2c_sda_a_pins[]  = { GPIODV_24 };
0223 static const unsigned int i2c_sck_a_pins[]  = { GPIODV_25 };
0224 static const unsigned int i2c_sda_b0_pins[] = { GPIODV_26 };
0225 static const unsigned int i2c_sck_b0_pins[] = { GPIODV_27 };
0226 static const unsigned int i2c_sda_c0_pins[] = { GPIODV_28 };
0227 static const unsigned int i2c_sck_c0_pins[] = { GPIODV_29 };
0228 
0229 /* bank H */
0230 static const unsigned int hdmi_hpd_pins[]   = { GPIOH_0 };
0231 static const unsigned int hdmi_sda_pins[]   = { GPIOH_1 };
0232 static const unsigned int hdmi_scl_pins[]   = { GPIOH_2 };
0233 static const unsigned int hdmi_cec_0_pins[] = { GPIOH_3 };
0234 static const unsigned int eth_txd1_0_pins[] = { GPIOH_5 };
0235 static const unsigned int eth_txd0_0_pins[] = { GPIOH_6 };
0236 static const unsigned int eth_rxd3_h_pins[] = { GPIOH_5 };
0237 static const unsigned int eth_rxd2_h_pins[] = { GPIOH_6 };
0238 static const unsigned int clk_24m_out_pins[]    = { GPIOH_9 };
0239 
0240 static const unsigned int spi_ss1_pins[]    = { GPIOH_0 };
0241 static const unsigned int spi_ss2_pins[]    = { GPIOH_1 };
0242 static const unsigned int spi_ss0_1_pins[]  = { GPIOH_3 };
0243 static const unsigned int spi_miso_1_pins[] = { GPIOH_4 };
0244 static const unsigned int spi_mosi_1_pins[] = { GPIOH_5 };
0245 static const unsigned int spi_sclk_1_pins[] = { GPIOH_6 };
0246 
0247 static const unsigned int eth_txd3_pins[]   = { GPIOH_7 };
0248 static const unsigned int eth_txd2_pins[]   = { GPIOH_8 };
0249 static const unsigned int eth_tx_clk_pins[] = { GPIOH_9 };
0250 
0251 static const unsigned int i2c_sda_b1_pins[] = { GPIOH_3 };
0252 static const unsigned int i2c_sck_b1_pins[] = { GPIOH_4 };
0253 static const unsigned int i2c_sda_c1_pins[] = { GPIOH_5 };
0254 static const unsigned int i2c_sck_c1_pins[] = { GPIOH_6 };
0255 static const unsigned int i2c_sda_d1_pins[] = { GPIOH_7 };
0256 static const unsigned int i2c_sck_d1_pins[] = { GPIOH_8 };
0257 
0258 /* bank BOOT */
0259 static const unsigned int nand_io_pins[] = {
0260     BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7
0261 };
0262 static const unsigned int nand_io_ce0_pins[]    = { BOOT_8 };
0263 static const unsigned int nand_io_ce1_pins[]    = { BOOT_9 };
0264 static const unsigned int nand_io_rb0_pins[]    = { BOOT_10 };
0265 static const unsigned int nand_ale_pins[]   = { BOOT_11 };
0266 static const unsigned int nand_cle_pins[]   = { BOOT_12 };
0267 static const unsigned int nand_wen_clk_pins[]   = { BOOT_13 };
0268 static const unsigned int nand_ren_clk_pins[]   = { BOOT_14 };
0269 static const unsigned int nand_dqs_15_pins[]    = { BOOT_15 };
0270 static const unsigned int nand_dqs_18_pins[]    = { BOOT_18 };
0271 
0272 static const unsigned int sdxc_d0_c_pins[]  = { BOOT_0};
0273 static const unsigned int sdxc_d13_c_pins[] = { BOOT_1, BOOT_2,
0274                             BOOT_3 };
0275 static const unsigned int sdxc_d47_c_pins[] = { BOOT_4, BOOT_5,
0276                             BOOT_6, BOOT_7 };
0277 static const unsigned int sdxc_clk_c_pins[] = { BOOT_8 };
0278 static const unsigned int sdxc_cmd_c_pins[] = { BOOT_10 };
0279 static const unsigned int nor_d_pins[]      = { BOOT_11 };
0280 static const unsigned int nor_q_pins[]      = { BOOT_12 };
0281 static const unsigned int nor_c_pins[]      = { BOOT_13 };
0282 static const unsigned int nor_cs_pins[]     = { BOOT_18 };
0283 
0284 static const unsigned int sd_d0_c_pins[]    = { BOOT_0 };
0285 static const unsigned int sd_d1_c_pins[]    = { BOOT_1 };
0286 static const unsigned int sd_d2_c_pins[]    = { BOOT_2 };
0287 static const unsigned int sd_d3_c_pins[]    = { BOOT_3 };
0288 static const unsigned int sd_cmd_c_pins[]   = { BOOT_8 };
0289 static const unsigned int sd_clk_c_pins[]   = { BOOT_10 };
0290 
0291 /* bank CARD */
0292 static const unsigned int sd_d1_b_pins[]    = { CARD_0 };
0293 static const unsigned int sd_d0_b_pins[]    = { CARD_1 };
0294 static const unsigned int sd_clk_b_pins[]   = { CARD_2 };
0295 static const unsigned int sd_cmd_b_pins[]   = { CARD_3 };
0296 static const unsigned int sd_d3_b_pins[]    = { CARD_4 };
0297 static const unsigned int sd_d2_b_pins[]    = { CARD_5 };
0298 
0299 static const unsigned int sdxc_d13_b_pins[] = { CARD_0,  CARD_4,
0300                             CARD_5 };
0301 static const unsigned int sdxc_d0_b_pins[]  = { CARD_1 };
0302 static const unsigned int sdxc_clk_b_pins[] = { CARD_2 };
0303 static const unsigned int sdxc_cmd_b_pins[] = { CARD_3 };
0304 
0305 /* bank AO */
0306 static const unsigned int uart_tx_ao_a_pins[]   = { GPIOAO_0 };
0307 static const unsigned int uart_rx_ao_a_pins[]   = { GPIOAO_1 };
0308 static const unsigned int uart_cts_ao_a_pins[]  = { GPIOAO_2 };
0309 static const unsigned int uart_rts_ao_a_pins[]  = { GPIOAO_3 };
0310 static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 };
0311 static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 };
0312 static const unsigned int clk_32k_in_out_pins[] = { GPIOAO_6 };
0313 static const unsigned int remote_input_pins[]   = { GPIOAO_7 };
0314 static const unsigned int hdmi_cec_1_pins[] = { GPIOAO_12 };
0315 static const unsigned int ir_blaster_pins[] = { GPIOAO_13 };
0316 
0317 static const unsigned int pwm_c2_pins[]     = { GPIOAO_3 };
0318 static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 };
0319 static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 };
0320 static const unsigned int ir_remote_out_pins[]  = { GPIOAO_7 };
0321 static const unsigned int i2s_am_clk_out_pins[] = { GPIOAO_8 };
0322 static const unsigned int i2s_ao_clk_out_pins[] = { GPIOAO_9 };
0323 static const unsigned int i2s_lr_clk_out_pins[] = { GPIOAO_10 };
0324 static const unsigned int i2s_out_01_pins[] = { GPIOAO_11 };
0325 
0326 static const unsigned int uart_tx_ao_b0_pins[]  = { GPIOAO_0 };
0327 static const unsigned int uart_rx_ao_b0_pins[]  = { GPIOAO_1 };
0328 static const unsigned int uart_cts_ao_b_pins[]  = { GPIOAO_2 };
0329 static const unsigned int uart_rts_ao_b_pins[]  = { GPIOAO_3 };
0330 static const unsigned int uart_tx_ao_b1_pins[]  = { GPIOAO_4 };
0331 static const unsigned int uart_rx_ao_b1_pins[]  = { GPIOAO_5 };
0332 static const unsigned int spdif_out_1_pins[]    = { GPIOAO_6 };
0333 
0334 static const unsigned int i2s_in_ch01_pins[]    = { GPIOAO_6 };
0335 static const unsigned int i2s_ao_clk_in_pins[]  = { GPIOAO_9 };
0336 static const unsigned int i2s_lr_clk_in_pins[]  = { GPIOAO_10 };
0337 
0338 /* bank DIF */
0339 static const unsigned int eth_rxd1_pins[]   = { DIF_0_P };
0340 static const unsigned int eth_rxd0_pins[]   = { DIF_0_N };
0341 static const unsigned int eth_rx_dv_pins[]  = { DIF_1_P };
0342 static const unsigned int eth_rx_clk_pins[] = { DIF_1_N };
0343 static const unsigned int eth_txd0_1_pins[] = { DIF_2_P };
0344 static const unsigned int eth_txd1_1_pins[] = { DIF_2_N };
0345 static const unsigned int eth_rxd3_pins[]   = { DIF_2_P };
0346 static const unsigned int eth_rxd2_pins[]   = { DIF_2_N };
0347 static const unsigned int eth_tx_en_pins[]  = { DIF_3_P };
0348 static const unsigned int eth_ref_clk_pins[]    = { DIF_3_N };
0349 static const unsigned int eth_mdc_pins[]    = { DIF_4_P };
0350 static const unsigned int eth_mdio_en_pins[]    = { DIF_4_N };
0351 
0352 static struct meson_pmx_group meson8b_cbus_groups[] = {
0353     GPIO_GROUP(GPIOX_0),
0354     GPIO_GROUP(GPIOX_1),
0355     GPIO_GROUP(GPIOX_2),
0356     GPIO_GROUP(GPIOX_3),
0357     GPIO_GROUP(GPIOX_4),
0358     GPIO_GROUP(GPIOX_5),
0359     GPIO_GROUP(GPIOX_6),
0360     GPIO_GROUP(GPIOX_7),
0361     GPIO_GROUP(GPIOX_8),
0362     GPIO_GROUP(GPIOX_9),
0363     GPIO_GROUP(GPIOX_10),
0364     GPIO_GROUP(GPIOX_11),
0365     GPIO_GROUP(GPIOX_16),
0366     GPIO_GROUP(GPIOX_17),
0367     GPIO_GROUP(GPIOX_18),
0368     GPIO_GROUP(GPIOX_19),
0369     GPIO_GROUP(GPIOX_20),
0370     GPIO_GROUP(GPIOX_21),
0371 
0372     GPIO_GROUP(GPIOY_0),
0373     GPIO_GROUP(GPIOY_1),
0374     GPIO_GROUP(GPIOY_3),
0375     GPIO_GROUP(GPIOY_6),
0376     GPIO_GROUP(GPIOY_7),
0377     GPIO_GROUP(GPIOY_8),
0378     GPIO_GROUP(GPIOY_9),
0379     GPIO_GROUP(GPIOY_10),
0380     GPIO_GROUP(GPIOY_11),
0381     GPIO_GROUP(GPIOY_12),
0382     GPIO_GROUP(GPIOY_13),
0383     GPIO_GROUP(GPIOY_14),
0384 
0385     GPIO_GROUP(GPIODV_9),
0386     GPIO_GROUP(GPIODV_24),
0387     GPIO_GROUP(GPIODV_25),
0388     GPIO_GROUP(GPIODV_26),
0389     GPIO_GROUP(GPIODV_27),
0390     GPIO_GROUP(GPIODV_28),
0391     GPIO_GROUP(GPIODV_29),
0392 
0393     GPIO_GROUP(GPIOH_0),
0394     GPIO_GROUP(GPIOH_1),
0395     GPIO_GROUP(GPIOH_2),
0396     GPIO_GROUP(GPIOH_3),
0397     GPIO_GROUP(GPIOH_4),
0398     GPIO_GROUP(GPIOH_5),
0399     GPIO_GROUP(GPIOH_6),
0400     GPIO_GROUP(GPIOH_7),
0401     GPIO_GROUP(GPIOH_8),
0402     GPIO_GROUP(GPIOH_9),
0403 
0404     GPIO_GROUP(CARD_0),
0405     GPIO_GROUP(CARD_1),
0406     GPIO_GROUP(CARD_2),
0407     GPIO_GROUP(CARD_3),
0408     GPIO_GROUP(CARD_4),
0409     GPIO_GROUP(CARD_5),
0410     GPIO_GROUP(CARD_6),
0411 
0412     GPIO_GROUP(BOOT_0),
0413     GPIO_GROUP(BOOT_1),
0414     GPIO_GROUP(BOOT_2),
0415     GPIO_GROUP(BOOT_3),
0416     GPIO_GROUP(BOOT_4),
0417     GPIO_GROUP(BOOT_5),
0418     GPIO_GROUP(BOOT_6),
0419     GPIO_GROUP(BOOT_7),
0420     GPIO_GROUP(BOOT_8),
0421     GPIO_GROUP(BOOT_9),
0422     GPIO_GROUP(BOOT_10),
0423     GPIO_GROUP(BOOT_11),
0424     GPIO_GROUP(BOOT_12),
0425     GPIO_GROUP(BOOT_13),
0426     GPIO_GROUP(BOOT_14),
0427     GPIO_GROUP(BOOT_15),
0428     GPIO_GROUP(BOOT_16),
0429     GPIO_GROUP(BOOT_17),
0430     GPIO_GROUP(BOOT_18),
0431 
0432     GPIO_GROUP(DIF_0_P),
0433     GPIO_GROUP(DIF_0_N),
0434     GPIO_GROUP(DIF_1_P),
0435     GPIO_GROUP(DIF_1_N),
0436     GPIO_GROUP(DIF_2_P),
0437     GPIO_GROUP(DIF_2_N),
0438     GPIO_GROUP(DIF_3_P),
0439     GPIO_GROUP(DIF_3_N),
0440     GPIO_GROUP(DIF_4_P),
0441     GPIO_GROUP(DIF_4_N),
0442 
0443     /* bank X */
0444     GROUP(sd_d0_a,      8,  5),
0445     GROUP(sd_d1_a,      8,  4),
0446     GROUP(sd_d2_a,      8,  3),
0447     GROUP(sd_d3_a,      8,  2),
0448     GROUP(sdxc_d0_0_a,  5,  29),
0449     GROUP(sdxc_d47_a,   5,  12),
0450     GROUP(sdxc_d13_0_a, 5,  28),
0451     GROUP(sd_clk_a,     8,  1),
0452     GROUP(sd_cmd_a,     8,  0),
0453     GROUP(xtal_32k_out, 3,  22),
0454     GROUP(xtal_24m_out, 3,  20),
0455     GROUP(uart_tx_b0,   4,  9),
0456     GROUP(uart_rx_b0,   4,  8),
0457     GROUP(uart_cts_b0,  4,  7),
0458     GROUP(uart_rts_b0,  4,  6),
0459     GROUP(sdxc_d0_1_a,  5,  14),
0460     GROUP(sdxc_d13_1_a, 5,  13),
0461     GROUP(pcm_out_a,    3,  30),
0462     GROUP(pcm_in_a,     3,  29),
0463     GROUP(pcm_fs_a,     3,  28),
0464     GROUP(pcm_clk_a,    3,  27),
0465     GROUP(sdxc_clk_a,   5,  11),
0466     GROUP(sdxc_cmd_a,   5,  10),
0467     GROUP(pwm_vs_0,     7,  31),
0468     GROUP(pwm_e,        9,  19),
0469     GROUP(pwm_vs_1,     7,  30),
0470     GROUP(uart_tx_a,    4,  17),
0471     GROUP(uart_rx_a,    4,  16),
0472     GROUP(uart_cts_a,   4,  15),
0473     GROUP(uart_rts_a,   4,  14),
0474     GROUP(uart_tx_b1,   6,  19),
0475     GROUP(uart_rx_b1,   6,  18),
0476     GROUP(uart_cts_b1,  6,  17),
0477     GROUP(uart_rts_b1,  6,  16),
0478     GROUP(iso7816_0_clk,    5,  9),
0479     GROUP(iso7816_0_data,   5,  8),
0480     GROUP(spi_sclk_0,   4,  22),
0481     GROUP(spi_miso_0,   4,  24),
0482     GROUP(spi_mosi_0,   4,  23),
0483     GROUP(iso7816_det,  4,  21),
0484     GROUP(iso7816_reset,    4,  20),
0485     GROUP(iso7816_1_clk,    4,  19),
0486     GROUP(iso7816_1_data,   4,  18),
0487     GROUP(spi_ss0_0,    4,  25),
0488     GROUP(tsin_clk_b,   3,  6),
0489     GROUP(tsin_sop_b,   3,  7),
0490     GROUP(tsin_d0_b,    3,  8),
0491     GROUP(pwm_b,        2,  3),
0492     GROUP(i2c_sda_d0,   4,  5),
0493     GROUP(i2c_sck_d0,   4,  4),
0494     GROUP(tsin_d_valid_b,   3,  9),
0495 
0496     /* bank Y */
0497     GROUP(tsin_d_valid_a,   3,  2),
0498     GROUP(tsin_sop_a,   3,  1),
0499     GROUP(tsin_d17_a,   3,  5),
0500     GROUP(tsin_clk_a,   3,  0),
0501     GROUP(tsin_d0_a,    3,  4),
0502     GROUP(spdif_out_0,  1,  7),
0503     GROUP(xtal_24m,     3,  18),
0504     GROUP(iso7816_2_clk,    5,  7),
0505     GROUP(iso7816_2_data,   5,  6),
0506 
0507     /* bank DV */
0508     GROUP(pwm_d,        3,  26),
0509     GROUP(pwm_c0,       3,  25),
0510     GROUP(pwm_vs_2,     7,  28),
0511     GROUP(pwm_vs_3,     7,  27),
0512     GROUP(pwm_vs_4,     7,  26),
0513     GROUP(xtal24_out,   7,  25),
0514     GROUP(uart_tx_c,    6,  23),
0515     GROUP(uart_rx_c,    6,  22),
0516     GROUP(uart_cts_c,   6,  21),
0517     GROUP(uart_rts_c,   6,  20),
0518     GROUP(pwm_c1,       3,  24),
0519     GROUP(i2c_sda_a,    9,  31),
0520     GROUP(i2c_sck_a,    9,  30),
0521     GROUP(i2c_sda_b0,   9,  29),
0522     GROUP(i2c_sck_b0,   9,  28),
0523     GROUP(i2c_sda_c0,   9,  27),
0524     GROUP(i2c_sck_c0,   9,  26),
0525 
0526     /* bank H */
0527     GROUP(hdmi_hpd,     1,  26),
0528     GROUP(hdmi_sda,     1,  25),
0529     GROUP(hdmi_scl,     1,  24),
0530     GROUP(hdmi_cec_0,   1,  23),
0531     GROUP(eth_txd1_0,   7,  21),
0532     GROUP(eth_txd0_0,   7,  20),
0533     GROUP(clk_24m_out,  4,  1),
0534     GROUP(spi_ss1,      8,  11),
0535     GROUP(spi_ss2,      8,  12),
0536     GROUP(spi_ss0_1,    9,  13),
0537     GROUP(spi_miso_1,   9,  12),
0538     GROUP(spi_mosi_1,   9,  11),
0539     GROUP(spi_sclk_1,   9,  10),
0540     GROUP(eth_rxd3_h,   6,  15),
0541     GROUP(eth_rxd2_h,   6,  14),
0542     GROUP(eth_txd3,     6,  13),
0543     GROUP(eth_txd2,     6,  12),
0544     GROUP(eth_tx_clk,   6,  11),
0545     GROUP(i2c_sda_b1,   5,  27),
0546     GROUP(i2c_sck_b1,   5,  26),
0547     GROUP(i2c_sda_c1,   5,  25),
0548     GROUP(i2c_sck_c1,   5,  24),
0549     GROUP(i2c_sda_d1,   4,  3),
0550     GROUP(i2c_sck_d1,   4,  2),
0551 
0552     /* bank BOOT */
0553     GROUP(nand_io,      2,  26),
0554     GROUP(nand_io_ce0,  2,  25),
0555     GROUP(nand_io_ce1,  2,  24),
0556     GROUP(nand_io_rb0,  2,  17),
0557     GROUP(nand_ale,     2,  21),
0558     GROUP(nand_cle,     2,  20),
0559     GROUP(nand_wen_clk, 2,  19),
0560     GROUP(nand_ren_clk, 2,  18),
0561     GROUP(nand_dqs_15,  2,  27),
0562     GROUP(nand_dqs_18,  2,  28),
0563     GROUP(sdxc_d0_c,    4,  30),
0564     GROUP(sdxc_d13_c,   4,  29),
0565     GROUP(sdxc_d47_c,   4,  28),
0566     GROUP(sdxc_clk_c,   7,  19),
0567     GROUP(sdxc_cmd_c,   7,  18),
0568     GROUP(nor_d,        5,  1),
0569     GROUP(nor_q,        5,  3),
0570     GROUP(nor_c,        5,  2),
0571     GROUP(nor_cs,       5,  0),
0572     GROUP(sd_d0_c,      6,  29),
0573     GROUP(sd_d1_c,      6,  28),
0574     GROUP(sd_d2_c,      6,  27),
0575     GROUP(sd_d3_c,      6,  26),
0576     GROUP(sd_cmd_c,     6,  30),
0577     GROUP(sd_clk_c,     6,  31),
0578 
0579     /* bank CARD */
0580     GROUP(sd_d1_b,      2,  14),
0581     GROUP(sd_d0_b,      2,  15),
0582     GROUP(sd_clk_b,     2,  11),
0583     GROUP(sd_cmd_b,     2,  10),
0584     GROUP(sd_d3_b,      2,  12),
0585     GROUP(sd_d2_b,      2,  13),
0586     GROUP(sdxc_d13_b,   2,  6),
0587     GROUP(sdxc_d0_b,    2,  7),
0588     GROUP(sdxc_clk_b,   2,  5),
0589     GROUP(sdxc_cmd_b,   2,  4),
0590 
0591     /* bank DIF */
0592     GROUP(eth_rxd1,     6,  0),
0593     GROUP(eth_rxd0,     6,  1),
0594     GROUP(eth_rx_dv,    6,  2),
0595     GROUP(eth_rx_clk,   6,  3),
0596     GROUP(eth_txd0_1,   6,  4),
0597     GROUP(eth_txd1_1,   6,  5),
0598     GROUP(eth_tx_en,    6,  6),
0599     GROUP(eth_ref_clk,  6,  8),
0600     GROUP(eth_mdc,      6,  9),
0601     GROUP(eth_mdio_en,  6,  10),
0602     GROUP(eth_rxd3,     7,  22),
0603     GROUP(eth_rxd2,     7,  23),
0604 };
0605 
0606 static struct meson_pmx_group meson8b_aobus_groups[] = {
0607     GPIO_GROUP(GPIOAO_0),
0608     GPIO_GROUP(GPIOAO_1),
0609     GPIO_GROUP(GPIOAO_2),
0610     GPIO_GROUP(GPIOAO_3),
0611     GPIO_GROUP(GPIOAO_4),
0612     GPIO_GROUP(GPIOAO_5),
0613     GPIO_GROUP(GPIOAO_6),
0614     GPIO_GROUP(GPIOAO_7),
0615     GPIO_GROUP(GPIOAO_8),
0616     GPIO_GROUP(GPIOAO_9),
0617     GPIO_GROUP(GPIOAO_10),
0618     GPIO_GROUP(GPIOAO_11),
0619     GPIO_GROUP(GPIOAO_12),
0620     GPIO_GROUP(GPIOAO_13),
0621     GPIO_GROUP(GPIO_BSD_EN),
0622     GPIO_GROUP(GPIO_TEST_N),
0623 
0624     /* bank AO */
0625     GROUP(uart_tx_ao_a, 0,  12),
0626     GROUP(uart_rx_ao_a, 0,  11),
0627     GROUP(uart_cts_ao_a,    0,  10),
0628     GROUP(uart_rts_ao_a,    0,  9),
0629     GROUP(i2c_mst_sck_ao,   0,  6),
0630     GROUP(i2c_mst_sda_ao,   0,  5),
0631     GROUP(clk_32k_in_out,   0,  18),
0632     GROUP(remote_input, 0,  0),
0633     GROUP(hdmi_cec_1,   0,  17),
0634     GROUP(ir_blaster,   0,  31),
0635     GROUP(pwm_c2,       0,  22),
0636     GROUP(i2c_sck_ao,   0,  2),
0637     GROUP(i2c_sda_ao,   0,  1),
0638     GROUP(ir_remote_out,    0,  21),
0639     GROUP(i2s_am_clk_out,   0,  30),
0640     GROUP(i2s_ao_clk_out,   0,  29),
0641     GROUP(i2s_lr_clk_out,   0,  28),
0642     GROUP(i2s_out_01,   0,  27),
0643     GROUP(uart_tx_ao_b0,    0,  26),
0644     GROUP(uart_rx_ao_b0,    0,  25),
0645     GROUP(uart_cts_ao_b,    0,  8),
0646     GROUP(uart_rts_ao_b,    0,  7),
0647     GROUP(uart_tx_ao_b1,    0,  24),
0648     GROUP(uart_rx_ao_b1,    0,  23),
0649     GROUP(spdif_out_1,  0,  16),
0650     GROUP(i2s_in_ch01,  0,  13),
0651     GROUP(i2s_ao_clk_in,    0,  15),
0652     GROUP(i2s_lr_clk_in,    0,  14),
0653 };
0654 
0655 static const char * const gpio_periphs_groups[] = {
0656     "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
0657     "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
0658     "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
0659     "GPIOX_19", "GPIOX_20", "GPIOX_21",
0660 
0661     "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
0662     "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
0663     "GPIOY_13", "GPIOY_14",
0664 
0665     "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
0666     "GPIODV_27", "GPIODV_28", "GPIODV_29",
0667 
0668     "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
0669     "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
0670 
0671     "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
0672     "CARD_5", "CARD_6",
0673 
0674     "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
0675     "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
0676     "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
0677     "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
0678 
0679     "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
0680     "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
0681     "DIF_4_P", "DIF_4_N"
0682 };
0683 
0684 static const char * const gpio_aobus_groups[] = {
0685     "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
0686     "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
0687     "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
0688     "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N"
0689 };
0690 
0691 static const char * const sd_a_groups[] = {
0692     "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
0693     "sd_cmd_a"
0694 };
0695 
0696 static const char * const sdxc_a_groups[] = {
0697     "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
0698     "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d13_1_a"
0699 };
0700 
0701 static const char * const pcm_a_groups[] = {
0702     "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
0703 };
0704 
0705 static const char * const uart_a_groups[] = {
0706     "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
0707 };
0708 
0709 static const char * const uart_b_groups[] = {
0710     "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
0711     "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
0712 };
0713 
0714 static const char * const iso7816_groups[] = {
0715     "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
0716     "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
0717 };
0718 
0719 static const char * const i2c_d_groups[] = {
0720     "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
0721 };
0722 
0723 static const char * const xtal_groups[] = {
0724     "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
0725 };
0726 
0727 static const char * const uart_c_groups[] = {
0728     "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
0729 };
0730 
0731 static const char * const i2c_c_groups[] = {
0732     "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
0733 };
0734 
0735 static const char * const hdmi_groups[] = {
0736     "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0"
0737 };
0738 
0739 static const char * const hdmi_cec_groups[] = {
0740     "hdmi_cec_1"
0741 };
0742 
0743 static const char * const spi_groups[] = {
0744     "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
0745     "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
0746     "spi_miso_1", "spi_ss2"
0747 };
0748 
0749 static const char * const ethernet_groups[] = {
0750     "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
0751     "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
0752     "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
0753     "eth_txd2", "eth_txd3", "eth_rxd3", "eth_rxd2",
0754     "eth_rxd3_h", "eth_rxd2_h"
0755 };
0756 
0757 static const char * const i2c_a_groups[] = {
0758     "i2c_sda_a", "i2c_sck_a",
0759 };
0760 
0761 static const char * const i2c_b_groups[] = {
0762     "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
0763 };
0764 
0765 static const char * const sd_c_groups[] = {
0766     "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
0767     "sd_cmd_c", "sd_clk_c"
0768 };
0769 
0770 static const char * const sdxc_c_groups[] = {
0771     "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
0772     "sdxc_clk_c"
0773 };
0774 
0775 static const char * const nand_groups[] = {
0776     "nand_io", "nand_io_ce0", "nand_io_ce1",
0777     "nand_io_rb0", "nand_ale", "nand_cle",
0778     "nand_wen_clk", "nand_ren_clk", "nand_dqs_15",
0779     "nand_dqs_18"
0780 };
0781 
0782 static const char * const nor_groups[] = {
0783     "nor_d", "nor_q", "nor_c", "nor_cs"
0784 };
0785 
0786 static const char * const sd_b_groups[] = {
0787     "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
0788     "sd_d3_b", "sd_d2_b"
0789 };
0790 
0791 static const char * const sdxc_b_groups[] = {
0792     "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
0793 };
0794 
0795 static const char * const uart_ao_groups[] = {
0796     "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
0797 };
0798 
0799 static const char * const remote_groups[] = {
0800     "remote_input", "ir_blaster", "ir_remote_out"
0801 };
0802 
0803 static const char * const i2c_slave_ao_groups[] = {
0804     "i2c_sck_ao", "i2c_sda_ao"
0805 };
0806 
0807 static const char * const uart_ao_b_groups[] = {
0808     "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
0809     "uart_cts_ao_b", "uart_rts_ao_b"
0810 };
0811 
0812 static const char * const i2c_mst_ao_groups[] = {
0813     "i2c_mst_sck_ao", "i2c_mst_sda_ao"
0814 };
0815 
0816 static const char * const clk_24m_groups[] = {
0817     "clk_24m_out"
0818 };
0819 
0820 static const char * const clk_32k_groups[] = {
0821     "clk_32k_in_out"
0822 };
0823 
0824 static const char * const spdif_0_groups[] = {
0825     "spdif_out_0"
0826 };
0827 
0828 static const char * const spdif_1_groups[] = {
0829     "spdif_out_1"
0830 };
0831 
0832 static const char * const i2s_groups[] = {
0833     "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
0834     "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
0835     "i2s_lr_clk_in"
0836 };
0837 
0838 static const char * const pwm_b_groups[] = {
0839     "pwm_b"
0840 };
0841 
0842 static const char * const pwm_c_groups[] = {
0843     "pwm_c0", "pwm_c1"
0844 };
0845 
0846 static const char * const pwm_c_ao_groups[] = {
0847     "pwm_c2"
0848 };
0849 
0850 static const char * const pwm_d_groups[] = {
0851     "pwm_d"
0852 };
0853 
0854 static const char * const pwm_e_groups[] = {
0855     "pwm_e"
0856 };
0857 
0858 static const char * const pwm_vs_groups[] = {
0859     "pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
0860     "pwm_vs_3", "pwm_vs_4"
0861 };
0862 
0863 static const char * const tsin_a_groups[] = {
0864     "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
0865     "tsin_d_valid_a"
0866 };
0867 
0868 static const char * const tsin_b_groups[] = {
0869     "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
0870 };
0871 
0872 static struct meson_pmx_func meson8b_cbus_functions[] = {
0873     FUNCTION(gpio_periphs),
0874     FUNCTION(sd_a),
0875     FUNCTION(sdxc_a),
0876     FUNCTION(pcm_a),
0877     FUNCTION(uart_a),
0878     FUNCTION(uart_b),
0879     FUNCTION(iso7816),
0880     FUNCTION(i2c_d),
0881     FUNCTION(xtal),
0882     FUNCTION(uart_c),
0883     FUNCTION(i2c_c),
0884     FUNCTION(hdmi),
0885     FUNCTION(spi),
0886     FUNCTION(ethernet),
0887     FUNCTION(i2c_a),
0888     FUNCTION(i2c_b),
0889     FUNCTION(sd_c),
0890     FUNCTION(sdxc_c),
0891     FUNCTION(nand),
0892     FUNCTION(nor),
0893     FUNCTION(sd_b),
0894     FUNCTION(sdxc_b),
0895     FUNCTION(spdif_0),
0896     FUNCTION(pwm_b),
0897     FUNCTION(pwm_c),
0898     FUNCTION(pwm_d),
0899     FUNCTION(pwm_e),
0900     FUNCTION(pwm_vs),
0901     FUNCTION(tsin_a),
0902     FUNCTION(tsin_b),
0903     FUNCTION(clk_24m),
0904 };
0905 
0906 static struct meson_pmx_func meson8b_aobus_functions[] = {
0907     FUNCTION(gpio_aobus),
0908     FUNCTION(uart_ao),
0909     FUNCTION(uart_ao_b),
0910     FUNCTION(i2c_slave_ao),
0911     FUNCTION(i2c_mst_ao),
0912     FUNCTION(i2s),
0913     FUNCTION(remote),
0914     FUNCTION(clk_32k),
0915     FUNCTION(pwm_c_ao),
0916     FUNCTION(spdif_1),
0917     FUNCTION(hdmi_cec),
0918 };
0919 
0920 static struct meson_bank meson8b_cbus_banks[] = {
0921     /*   name        first          last        irq       pullen   pull     dir      out      in   */
0922     BANK("X0..11",   GPIOX_0,   GPIOX_11,   97, 108,  4,  0,   4,  0,   0,  0,   1,  0,   2,  0),
0923     BANK("X16..21",  GPIOX_16,  GPIOX_21,  113, 118,  4, 16,   4, 16,   0, 16,   1, 16,   2, 16),
0924     BANK("Y0..1",    GPIOY_0,   GPIOY_1,    80,  81,  3,  0,   3,  0,   3,  0,   4,  0,   5,  0),
0925     BANK("Y3",   GPIOY_3,   GPIOY_3,    83,  83,  3,  3,   3,  3,   3,  3,   4,  3,   5,  3),
0926     BANK("Y6..14",   GPIOY_6,   GPIOY_14,   86,  94,  3,  6,   3,  6,   3,  6,   4,  6,   5,  6),
0927     BANK("DV9",  GPIODV_9,  GPIODV_9,   59,  59,  0,  9,   0,  9,   7,  9,   8,  9,   9,  9),
0928     BANK("DV24..29", GPIODV_24, GPIODV_29,  74,  79,  0, 24,   0, 24,   7, 24,   8, 24,   9, 24),
0929     BANK("H",    GPIOH_0,   GPIOH_9,    14,  23,  1, 16,   1, 16,   9, 19,  10, 19,  11, 19),
0930     BANK("CARD",     CARD_0,    CARD_6,     43,  49,  2, 20,   2, 20,   0, 22,   1, 22,   2, 22),
0931     BANK("BOOT",     BOOT_0,    BOOT_18,    24,  42,  2,  0,   2,  0,   9,  0,  10,  0,  11,  0),
0932 
0933     /*
0934      * The following bank is not mentionned in the public datasheet
0935      * There is no information whether it can be used with the gpio
0936      * interrupt controller
0937      */
0938     BANK("DIF",  DIF_0_P,   DIF_4_N,    -1,  -1,  5,  8,   5,  8,  12, 12,  13, 12,  14, 12),
0939 };
0940 
0941 static struct meson_bank meson8b_aobus_banks[] = {
0942     /*   name    first     lastc        irq    pullen  pull    dir     out     in  */
0943     BANK("AO",   GPIOAO_0, GPIO_TEST_N, 0, 13, 0,  16, 0, 0,  0,  0,  0, 16,  1,  0),
0944 };
0945 
0946 static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
0947     .name       = "cbus-banks",
0948     .pins       = meson8b_cbus_pins,
0949     .groups     = meson8b_cbus_groups,
0950     .funcs      = meson8b_cbus_functions,
0951     .banks      = meson8b_cbus_banks,
0952     .num_pins   = ARRAY_SIZE(meson8b_cbus_pins),
0953     .num_groups = ARRAY_SIZE(meson8b_cbus_groups),
0954     .num_funcs  = ARRAY_SIZE(meson8b_cbus_functions),
0955     .num_banks  = ARRAY_SIZE(meson8b_cbus_banks),
0956     .pmx_ops    = &meson8_pmx_ops,
0957 };
0958 
0959 static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
0960     .name       = "aobus-banks",
0961     .pins       = meson8b_aobus_pins,
0962     .groups     = meson8b_aobus_groups,
0963     .funcs      = meson8b_aobus_functions,
0964     .banks      = meson8b_aobus_banks,
0965     .num_pins   = ARRAY_SIZE(meson8b_aobus_pins),
0966     .num_groups = ARRAY_SIZE(meson8b_aobus_groups),
0967     .num_funcs  = ARRAY_SIZE(meson8b_aobus_functions),
0968     .num_banks  = ARRAY_SIZE(meson8b_aobus_banks),
0969     .pmx_ops    = &meson8_pmx_ops,
0970     .parse_dt   = &meson8_aobus_parse_dt_extra,
0971 };
0972 
0973 static const struct of_device_id meson8b_pinctrl_dt_match[] = {
0974     {
0975         .compatible = "amlogic,meson8b-cbus-pinctrl",
0976         .data = &meson8b_cbus_pinctrl_data,
0977     },
0978     {
0979         .compatible = "amlogic,meson8b-aobus-pinctrl",
0980         .data = &meson8b_aobus_pinctrl_data,
0981     },
0982     { },
0983 };
0984 
0985 static struct platform_driver meson8b_pinctrl_driver = {
0986     .probe      = meson_pinctrl_probe,
0987     .driver = {
0988         .name   = "meson8b-pinctrl",
0989         .of_match_table = meson8b_pinctrl_dt_match,
0990     },
0991 };
0992 builtin_platform_driver(meson8b_pinctrl_driver);