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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin
0004  * bindings for MediaTek SoC.
0005  *
0006  * Copyright (C) 2018 MediaTek Inc.
0007  * Author: Sean Wang <sean.wang@mediatek.com>
0008  *     Zhiyong Tao <zhiyong.tao@mediatek.com>
0009  *     Hongzhou.Yang <hongzhou.yang@mediatek.com>
0010  */
0011 
0012 #include <linux/gpio/driver.h>
0013 #include <linux/module.h>
0014 #include <dt-bindings/pinctrl/mt65xx.h>
0015 #include "pinctrl-paris.h"
0016 
0017 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
0018 
0019 /* Custom pinconf parameters */
0020 #define MTK_PIN_CONFIG_TDSEL    (PIN_CONFIG_END + 1)
0021 #define MTK_PIN_CONFIG_RDSEL    (PIN_CONFIG_END + 2)
0022 #define MTK_PIN_CONFIG_PU_ADV   (PIN_CONFIG_END + 3)
0023 #define MTK_PIN_CONFIG_PD_ADV   (PIN_CONFIG_END + 4)
0024 #define MTK_PIN_CONFIG_DRV_ADV  (PIN_CONFIG_END + 5)
0025 
0026 static const struct pinconf_generic_params mtk_custom_bindings[] = {
0027     {"mediatek,tdsel",  MTK_PIN_CONFIG_TDSEL,       0},
0028     {"mediatek,rdsel",  MTK_PIN_CONFIG_RDSEL,       0},
0029     {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV,     1},
0030     {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV,   1},
0031     {"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2},
0032 };
0033 
0034 #ifdef CONFIG_DEBUG_FS
0035 static const struct pin_config_item mtk_conf_items[] = {
0036     PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
0037     PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
0038     PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
0039     PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
0040     PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true),
0041 };
0042 #endif
0043 
0044 static const char * const mtk_gpio_functions[] = {
0045     "func0", "func1", "func2", "func3",
0046     "func4", "func5", "func6", "func7",
0047     "func8", "func9", "func10", "func11",
0048     "func12", "func13", "func14", "func15",
0049 };
0050 
0051 /*
0052  * This section supports converting to/from custom MTK_PIN_CONFIG_DRV_ADV
0053  * and standard PIN_CONFIG_DRIVE_STRENGTH_UA pin configs.
0054  *
0055  * The custom value encodes three hardware bits as follows:
0056  *
0057  *   |           Bits           |
0058  *   | 2 (E1) | 1 (E0) | 0 (EN) | drive strength (uA)
0059  *   ------------------------------------------------
0060  *   |    x   |    x   |    0   | disabled, use standard drive strength
0061  *   -------------------------------------
0062  *   |    0   |    0   |    1   |  125 uA
0063  *   |    0   |    1   |    1   |  250 uA
0064  *   |    1   |    0   |    1   |  500 uA
0065  *   |    1   |    1   |    1   | 1000 uA
0066  */
0067 static const int mtk_drv_adv_uA[] = { 125, 250, 500, 1000 };
0068 
0069 static int mtk_drv_adv_to_uA(int val)
0070 {
0071     /* This should never happen. */
0072     if (WARN_ON_ONCE(val < 0 || val > 7))
0073         return -EINVAL;
0074 
0075     /* Bit 0 simply enables this hardware part */
0076     if (!(val & BIT(0)))
0077         return -EINVAL;
0078 
0079     return mtk_drv_adv_uA[(val >> 1)];
0080 }
0081 
0082 static int mtk_drv_uA_to_adv(int val)
0083 {
0084     switch (val) {
0085     case 125:
0086         return 0x1;
0087     case 250:
0088         return 0x3;
0089     case 500:
0090         return 0x5;
0091     case 1000:
0092         return 0x7;
0093     }
0094 
0095     return -EINVAL;
0096 }
0097 
0098 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
0099                       struct pinctrl_gpio_range *range,
0100                       unsigned int pin)
0101 {
0102     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0103     const struct mtk_pin_desc *desc;
0104 
0105     desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0106 
0107     return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
0108                 hw->soc->gpio_m);
0109 }
0110 
0111 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
0112                      struct pinctrl_gpio_range *range,
0113                      unsigned int pin, bool input)
0114 {
0115     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0116     const struct mtk_pin_desc *desc;
0117 
0118     desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0119 
0120     /* hardware would take 0 as input direction */
0121     return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
0122 }
0123 
0124 static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
0125                unsigned int pin, unsigned long *config)
0126 {
0127     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0128     u32 param = pinconf_to_config_param(*config);
0129     int pullup, reg, err = -ENOTSUPP, ret = 1;
0130     const struct mtk_pin_desc *desc;
0131 
0132     if (pin >= hw->soc->npins)
0133         return -EINVAL;
0134 
0135     desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0136 
0137     switch (param) {
0138     case PIN_CONFIG_BIAS_DISABLE:
0139     case PIN_CONFIG_BIAS_PULL_UP:
0140     case PIN_CONFIG_BIAS_PULL_DOWN:
0141         if (!hw->soc->bias_get_combo)
0142             break;
0143         err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
0144         if (err)
0145             break;
0146         if (ret == MTK_PUPD_SET_R1R0_00)
0147             ret = MTK_DISABLE;
0148         if (param == PIN_CONFIG_BIAS_DISABLE) {
0149             if (ret != MTK_DISABLE)
0150                 err = -EINVAL;
0151         } else if (param == PIN_CONFIG_BIAS_PULL_UP) {
0152             if (!pullup || ret == MTK_DISABLE)
0153                 err = -EINVAL;
0154         } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) {
0155             if (pullup || ret == MTK_DISABLE)
0156                 err = -EINVAL;
0157         }
0158         break;
0159     case PIN_CONFIG_SLEW_RATE:
0160         err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret);
0161         break;
0162     case PIN_CONFIG_INPUT_ENABLE:
0163     case PIN_CONFIG_OUTPUT_ENABLE:
0164         err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
0165         if (err)
0166             break;
0167         /*     CONFIG     Current direction return value
0168          * -------------  ----------------- ----------------------
0169          * OUTPUT_ENABLE       output       1 (= HW value)
0170          *                     input        0 (= HW value)
0171          * INPUT_ENABLE        output       0 (= reverse HW value)
0172          *                     input        1 (= reverse HW value)
0173          */
0174         if (param == PIN_CONFIG_INPUT_ENABLE)
0175             ret = !ret;
0176 
0177         break;
0178     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0179         err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
0180         if (err)
0181             break;
0182         /* return error when in output mode
0183          * because schmitt trigger only work in input mode
0184          */
0185         if (ret) {
0186             err = -EINVAL;
0187             break;
0188         }
0189 
0190         err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret);
0191         break;
0192     case PIN_CONFIG_DRIVE_STRENGTH:
0193         if (!hw->soc->drive_get)
0194             break;
0195 
0196         if (hw->soc->adv_drive_get) {
0197             err = hw->soc->adv_drive_get(hw, desc, &ret);
0198             if (!err) {
0199                 err = mtk_drv_adv_to_uA(ret);
0200                 if (err > 0) {
0201                     /* PIN_CONFIG_DRIVE_STRENGTH_UA used */
0202                     err = -EINVAL;
0203                     break;
0204                 }
0205             }
0206         }
0207 
0208         err = hw->soc->drive_get(hw, desc, &ret);
0209         break;
0210     case PIN_CONFIG_DRIVE_STRENGTH_UA:
0211         if (!hw->soc->adv_drive_get)
0212             break;
0213 
0214         err = hw->soc->adv_drive_get(hw, desc, &ret);
0215         if (err)
0216             break;
0217         err = mtk_drv_adv_to_uA(ret);
0218         if (err < 0)
0219             break;
0220 
0221         ret = err;
0222         err = 0;
0223         break;
0224     case MTK_PIN_CONFIG_TDSEL:
0225     case MTK_PIN_CONFIG_RDSEL:
0226         reg = (param == MTK_PIN_CONFIG_TDSEL) ?
0227                PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
0228         err = mtk_hw_get_value(hw, desc, reg, &ret);
0229         break;
0230     case MTK_PIN_CONFIG_PU_ADV:
0231     case MTK_PIN_CONFIG_PD_ADV:
0232         if (!hw->soc->adv_pull_get)
0233             break;
0234         pullup = param == MTK_PIN_CONFIG_PU_ADV;
0235         err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
0236         break;
0237     case MTK_PIN_CONFIG_DRV_ADV:
0238         if (!hw->soc->adv_drive_get)
0239             break;
0240         err = hw->soc->adv_drive_get(hw, desc, &ret);
0241         break;
0242     }
0243 
0244     if (!err)
0245         *config = pinconf_to_config_packed(param, ret);
0246 
0247     return err;
0248 }
0249 
0250 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
0251                enum pin_config_param param, u32 arg)
0252 {
0253     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0254     const struct mtk_pin_desc *desc;
0255     int err = -ENOTSUPP;
0256     u32 reg;
0257 
0258     if (pin >= hw->soc->npins)
0259         return -EINVAL;
0260 
0261     desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0262 
0263     switch ((u32)param) {
0264     case PIN_CONFIG_BIAS_DISABLE:
0265         if (!hw->soc->bias_set_combo)
0266             break;
0267         err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE);
0268         break;
0269     case PIN_CONFIG_BIAS_PULL_UP:
0270         if (!hw->soc->bias_set_combo)
0271             break;
0272         err = hw->soc->bias_set_combo(hw, desc, 1, arg);
0273         break;
0274     case PIN_CONFIG_BIAS_PULL_DOWN:
0275         if (!hw->soc->bias_set_combo)
0276             break;
0277         err = hw->soc->bias_set_combo(hw, desc, 0, arg);
0278         break;
0279     case PIN_CONFIG_OUTPUT_ENABLE:
0280         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
0281                        MTK_DISABLE);
0282         /* Keep set direction to consider the case that a GPIO pin
0283          *  does not have SMT control
0284          */
0285         if (err != -ENOTSUPP)
0286             break;
0287 
0288         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
0289                        MTK_OUTPUT);
0290         break;
0291     case PIN_CONFIG_INPUT_ENABLE:
0292         /* regard all non-zero value as enable */
0293         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg);
0294         if (err)
0295             break;
0296 
0297         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
0298                        MTK_INPUT);
0299         break;
0300     case PIN_CONFIG_SLEW_RATE:
0301         /* regard all non-zero value as enable */
0302         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg);
0303         break;
0304     case PIN_CONFIG_OUTPUT:
0305         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
0306                        arg);
0307         if (err)
0308             break;
0309 
0310         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
0311                        MTK_OUTPUT);
0312         break;
0313     case PIN_CONFIG_INPUT_SCHMITT:
0314     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0315         /* arg = 1: Input mode & SMT enable ;
0316          * arg = 0: Output mode & SMT disable
0317          */
0318         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg);
0319         if (err)
0320             break;
0321 
0322         err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg);
0323         break;
0324     case PIN_CONFIG_DRIVE_STRENGTH:
0325         if (!hw->soc->drive_set)
0326             break;
0327         err = hw->soc->drive_set(hw, desc, arg);
0328         break;
0329     case PIN_CONFIG_DRIVE_STRENGTH_UA:
0330         if (!hw->soc->adv_drive_set)
0331             break;
0332 
0333         err = mtk_drv_uA_to_adv(arg);
0334         if (err < 0)
0335             break;
0336         err = hw->soc->adv_drive_set(hw, desc, err);
0337         break;
0338     case MTK_PIN_CONFIG_TDSEL:
0339     case MTK_PIN_CONFIG_RDSEL:
0340         reg = (param == MTK_PIN_CONFIG_TDSEL) ?
0341                PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
0342         err = mtk_hw_set_value(hw, desc, reg, arg);
0343         break;
0344     case MTK_PIN_CONFIG_PU_ADV:
0345     case MTK_PIN_CONFIG_PD_ADV:
0346         if (!hw->soc->adv_pull_set)
0347             break;
0348         err = hw->soc->adv_pull_set(hw, desc,
0349                         (param == MTK_PIN_CONFIG_PU_ADV),
0350                         arg);
0351         break;
0352     case MTK_PIN_CONFIG_DRV_ADV:
0353         if (!hw->soc->adv_drive_set)
0354             break;
0355         err = hw->soc->adv_drive_set(hw, desc, arg);
0356         break;
0357     }
0358 
0359     return err;
0360 }
0361 
0362 static struct mtk_pinctrl_group *
0363 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin)
0364 {
0365     int i;
0366 
0367     for (i = 0; i < hw->soc->ngrps; i++) {
0368         struct mtk_pinctrl_group *grp = hw->groups + i;
0369 
0370         if (grp->pin == pin)
0371             return grp;
0372     }
0373 
0374     return NULL;
0375 }
0376 
0377 static const struct mtk_func_desc *
0378 mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum)
0379 {
0380     const struct mtk_pin_desc *pin = hw->soc->pins + pin_num;
0381     const struct mtk_func_desc *func = pin->funcs;
0382 
0383     while (func && func->name) {
0384         if (func->muxval == fnum)
0385             return func;
0386         func++;
0387     }
0388 
0389     return NULL;
0390 }
0391 
0392 static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num,
0393                     u32 fnum)
0394 {
0395     int i;
0396 
0397     for (i = 0; i < hw->soc->npins; i++) {
0398         const struct mtk_pin_desc *pin = hw->soc->pins + i;
0399 
0400         if (pin->number == pin_num) {
0401             const struct mtk_func_desc *func = pin->funcs;
0402 
0403             while (func && func->name) {
0404                 if (func->muxval == fnum)
0405                     return true;
0406                 func++;
0407             }
0408 
0409             break;
0410         }
0411     }
0412 
0413     return false;
0414 }
0415 
0416 static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl,
0417                      u32 pin, u32 fnum,
0418                      struct mtk_pinctrl_group *grp,
0419                      struct pinctrl_map **map,
0420                      unsigned *reserved_maps,
0421                      unsigned *num_maps)
0422 {
0423     bool ret;
0424 
0425     if (*num_maps == *reserved_maps)
0426         return -ENOSPC;
0427 
0428     (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
0429     (*map)[*num_maps].data.mux.group = grp->name;
0430 
0431     ret = mtk_pctrl_is_function_valid(pctl, pin, fnum);
0432     if (!ret) {
0433         dev_err(pctl->dev, "invalid function %d on pin %d .\n",
0434             fnum, pin);
0435         return -EINVAL;
0436     }
0437 
0438     (*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum];
0439     (*num_maps)++;
0440 
0441     return 0;
0442 }
0443 
0444 static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
0445                        struct device_node *node,
0446                        struct pinctrl_map **map,
0447                        unsigned *reserved_maps,
0448                        unsigned *num_maps)
0449 {
0450     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0451     int num_pins, num_funcs, maps_per_pin, i, err;
0452     struct mtk_pinctrl_group *grp;
0453     unsigned int num_configs;
0454     bool has_config = false;
0455     unsigned long *configs;
0456     u32 pinfunc, pin, func;
0457     struct property *pins;
0458     unsigned reserve = 0;
0459 
0460     pins = of_find_property(node, "pinmux", NULL);
0461     if (!pins) {
0462         dev_err(hw->dev, "missing pins property in node %pOFn .\n",
0463             node);
0464         return -EINVAL;
0465     }
0466 
0467     err = pinconf_generic_parse_dt_config(node, pctldev, &configs,
0468                           &num_configs);
0469     if (err)
0470         return err;
0471 
0472     if (num_configs)
0473         has_config = true;
0474 
0475     num_pins = pins->length / sizeof(u32);
0476     num_funcs = num_pins;
0477     maps_per_pin = 0;
0478     if (num_funcs)
0479         maps_per_pin++;
0480     if (has_config && num_pins >= 1)
0481         maps_per_pin++;
0482 
0483     if (!num_pins || !maps_per_pin) {
0484         err = -EINVAL;
0485         goto exit;
0486     }
0487 
0488     reserve = num_pins * maps_per_pin;
0489 
0490     err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps,
0491                     reserve);
0492     if (err < 0)
0493         goto exit;
0494 
0495     for (i = 0; i < num_pins; i++) {
0496         err = of_property_read_u32_index(node, "pinmux", i, &pinfunc);
0497         if (err)
0498             goto exit;
0499 
0500         pin = MTK_GET_PIN_NO(pinfunc);
0501         func = MTK_GET_PIN_FUNC(pinfunc);
0502 
0503         if (pin >= hw->soc->npins ||
0504             func >= ARRAY_SIZE(mtk_gpio_functions)) {
0505             dev_err(hw->dev, "invalid pins value.\n");
0506             err = -EINVAL;
0507             goto exit;
0508         }
0509 
0510         grp = mtk_pctrl_find_group_by_pin(hw, pin);
0511         if (!grp) {
0512             dev_err(hw->dev, "unable to match pin %d to group\n",
0513                 pin);
0514             err = -EINVAL;
0515             goto exit;
0516         }
0517 
0518         err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map,
0519                             reserved_maps, num_maps);
0520         if (err < 0)
0521             goto exit;
0522 
0523         if (has_config) {
0524             err = pinctrl_utils_add_map_configs(pctldev, map,
0525                                 reserved_maps,
0526                                 num_maps,
0527                                 grp->name,
0528                                 configs,
0529                                 num_configs,
0530                                 PIN_MAP_TYPE_CONFIGS_GROUP);
0531             if (err < 0)
0532                 goto exit;
0533         }
0534     }
0535 
0536     err = 0;
0537 
0538 exit:
0539     kfree(configs);
0540     return err;
0541 }
0542 
0543 static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
0544                     struct device_node *np_config,
0545                     struct pinctrl_map **map,
0546                     unsigned *num_maps)
0547 {
0548     struct device_node *np;
0549     unsigned reserved_maps;
0550     int ret;
0551 
0552     *map = NULL;
0553     *num_maps = 0;
0554     reserved_maps = 0;
0555 
0556     for_each_child_of_node(np_config, np) {
0557         ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map,
0558                           &reserved_maps,
0559                           num_maps);
0560         if (ret < 0) {
0561             pinctrl_utils_free_map(pctldev, *map, *num_maps);
0562             of_node_put(np);
0563             return ret;
0564         }
0565     }
0566 
0567     return 0;
0568 }
0569 
0570 static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
0571 {
0572     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0573 
0574     return hw->soc->ngrps;
0575 }
0576 
0577 static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev,
0578                         unsigned group)
0579 {
0580     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0581 
0582     return hw->groups[group].name;
0583 }
0584 
0585 static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
0586                     unsigned group, const unsigned **pins,
0587                     unsigned *num_pins)
0588 {
0589     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0590 
0591     *pins = (unsigned *)&hw->groups[group].pin;
0592     *num_pins = 1;
0593 
0594     return 0;
0595 }
0596 
0597 static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field)
0598 {
0599     const struct mtk_pin_desc *desc;
0600     int value, err;
0601 
0602     if (gpio >= hw->soc->npins)
0603         return -EINVAL;
0604 
0605     desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
0606 
0607     err = mtk_hw_get_value(hw, desc, field, &value);
0608     if (err)
0609         return err;
0610 
0611     return value;
0612 }
0613 
0614 #define mtk_pctrl_get_pinmux(hw, gpio)          \
0615     mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE)
0616 
0617 #define mtk_pctrl_get_direction(hw, gpio)       \
0618     mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DIR)
0619 
0620 #define mtk_pctrl_get_out(hw, gpio)         \
0621     mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DO)
0622 
0623 #define mtk_pctrl_get_in(hw, gpio)          \
0624     mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DI)
0625 
0626 #define mtk_pctrl_get_smt(hw, gpio)         \
0627     mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_SMT)
0628 
0629 #define mtk_pctrl_get_ies(hw, gpio)         \
0630     mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_IES)
0631 
0632 #define mtk_pctrl_get_driving(hw, gpio)         \
0633     mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)
0634 
0635 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
0636     unsigned int gpio, char *buf, unsigned int buf_len)
0637 {
0638     int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1, rsel = -1;
0639     const struct mtk_pin_desc *desc;
0640     u32 try_all_type = 0;
0641 
0642     if (gpio >= hw->soc->npins)
0643         return -EINVAL;
0644 
0645     if (mtk_is_virt_gpio(hw, gpio))
0646         return -EINVAL;
0647 
0648     desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
0649     pinmux = mtk_pctrl_get_pinmux(hw, gpio);
0650     if (pinmux >= hw->soc->nfuncs)
0651         pinmux -= hw->soc->nfuncs;
0652 
0653     mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
0654 
0655     if (hw->soc->pull_type)
0656         try_all_type = hw->soc->pull_type[desc->number];
0657 
0658     if (hw->rsel_si_unit && (try_all_type & MTK_PULL_RSEL_TYPE)) {
0659         rsel = pullen;
0660         pullen = 1;
0661     } else {
0662         /* Case for: R1R0 */
0663         if (pullen == MTK_PUPD_SET_R1R0_00) {
0664             pullen = 0;
0665             r1 = 0;
0666             r0 = 0;
0667         } else if (pullen == MTK_PUPD_SET_R1R0_01) {
0668             pullen = 1;
0669             r1 = 0;
0670             r0 = 1;
0671         } else if (pullen == MTK_PUPD_SET_R1R0_10) {
0672             pullen = 1;
0673             r1 = 1;
0674             r0 = 0;
0675         } else if (pullen == MTK_PUPD_SET_R1R0_11) {
0676             pullen = 1;
0677             r1 = 1;
0678             r0 = 1;
0679         }
0680 
0681         /* Case for: RSEL */
0682         if (pullen >= MTK_PULL_SET_RSEL_000 &&
0683             pullen <= MTK_PULL_SET_RSEL_111) {
0684             rsel = pullen - MTK_PULL_SET_RSEL_000;
0685             pullen = 1;
0686         }
0687     }
0688     len += scnprintf(buf + len, buf_len - len,
0689             "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
0690             gpio,
0691             pinmux,
0692             mtk_pctrl_get_direction(hw, gpio),
0693             mtk_pctrl_get_out(hw, gpio),
0694             mtk_pctrl_get_in(hw, gpio),
0695             mtk_pctrl_get_driving(hw, gpio),
0696             mtk_pctrl_get_smt(hw, gpio),
0697             mtk_pctrl_get_ies(hw, gpio),
0698             pullen,
0699             pullup);
0700 
0701     if (r1 != -1)
0702         len += scnprintf(buf + len, buf_len - len, " (%1d %1d)", r1, r0);
0703     else if (rsel != -1)
0704         len += scnprintf(buf + len, buf_len - len, " (%1d)", rsel);
0705 
0706     return len;
0707 }
0708 EXPORT_SYMBOL_GPL(mtk_pctrl_show_one_pin);
0709 
0710 #define PIN_DBG_BUF_SZ 96
0711 static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
0712               unsigned int gpio)
0713 {
0714     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0715     char buf[PIN_DBG_BUF_SZ];
0716 
0717     (void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ);
0718 
0719     seq_printf(s, "%s", buf);
0720 }
0721 
0722 static const struct pinctrl_ops mtk_pctlops = {
0723     .dt_node_to_map     = mtk_pctrl_dt_node_to_map,
0724     .dt_free_map        = pinctrl_utils_free_map,
0725     .get_groups_count   = mtk_pctrl_get_groups_count,
0726     .get_group_name     = mtk_pctrl_get_group_name,
0727     .get_group_pins     = mtk_pctrl_get_group_pins,
0728     .pin_dbg_show           = mtk_pctrl_dbg_show,
0729 };
0730 
0731 static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
0732 {
0733     return ARRAY_SIZE(mtk_gpio_functions);
0734 }
0735 
0736 static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev,
0737                      unsigned selector)
0738 {
0739     return mtk_gpio_functions[selector];
0740 }
0741 
0742 static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
0743                    unsigned function,
0744                    const char * const **groups,
0745                    unsigned * const num_groups)
0746 {
0747     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0748 
0749     *groups = hw->grp_names;
0750     *num_groups = hw->soc->ngrps;
0751 
0752     return 0;
0753 }
0754 
0755 static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev,
0756                unsigned function,
0757                unsigned group)
0758 {
0759     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0760     struct mtk_pinctrl_group *grp = hw->groups + group;
0761     const struct mtk_func_desc *desc_func;
0762     const struct mtk_pin_desc *desc;
0763     bool ret;
0764 
0765     ret = mtk_pctrl_is_function_valid(hw, grp->pin, function);
0766     if (!ret) {
0767         dev_err(hw->dev, "invalid function %d on group %d .\n",
0768             function, group);
0769         return -EINVAL;
0770     }
0771 
0772     desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function);
0773     if (!desc_func)
0774         return -EINVAL;
0775 
0776     desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin];
0777     mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval);
0778 
0779     return 0;
0780 }
0781 
0782 static const struct pinmux_ops mtk_pmxops = {
0783     .get_functions_count    = mtk_pmx_get_funcs_cnt,
0784     .get_function_name  = mtk_pmx_get_func_name,
0785     .get_function_groups    = mtk_pmx_get_func_groups,
0786     .set_mux        = mtk_pmx_set_mux,
0787     .gpio_set_direction = mtk_pinmux_gpio_set_direction,
0788     .gpio_request_enable    = mtk_pinmux_gpio_request_enable,
0789 };
0790 
0791 static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group,
0792                    unsigned long *config)
0793 {
0794     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0795     struct mtk_pinctrl_group *grp = &hw->groups[group];
0796 
0797      /* One pin per group only */
0798     return mtk_pinconf_get(pctldev, grp->pin, config);
0799 }
0800 
0801 static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
0802                    unsigned long *configs, unsigned num_configs)
0803 {
0804     struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0805     struct mtk_pinctrl_group *grp = &hw->groups[group];
0806     bool drive_strength_uA_found = false;
0807     bool adv_drve_strength_found = false;
0808     int i, ret;
0809 
0810     for (i = 0; i < num_configs; i++) {
0811         ret = mtk_pinconf_set(pctldev, grp->pin,
0812                       pinconf_to_config_param(configs[i]),
0813                       pinconf_to_config_argument(configs[i]));
0814         if (ret < 0)
0815             return ret;
0816 
0817         if (pinconf_to_config_param(configs[i]) == PIN_CONFIG_DRIVE_STRENGTH_UA)
0818             drive_strength_uA_found = true;
0819         if (pinconf_to_config_param(configs[i]) == MTK_PIN_CONFIG_DRV_ADV)
0820             adv_drve_strength_found = true;
0821     }
0822 
0823     /*
0824      * Disable advanced drive strength mode if drive-strength-microamp
0825      * is not set. However, mediatek,drive-strength-adv takes precedence
0826      * as its value can explicitly request the mode be enabled or not.
0827      */
0828     if (hw->soc->adv_drive_set && !drive_strength_uA_found &&
0829         !adv_drve_strength_found)
0830         hw->soc->adv_drive_set(hw, &hw->soc->pins[grp->pin], 0);
0831 
0832     return 0;
0833 }
0834 
0835 static const struct pinconf_ops mtk_confops = {
0836     .pin_config_get = mtk_pinconf_get,
0837     .pin_config_group_get   = mtk_pconf_group_get,
0838     .pin_config_group_set   = mtk_pconf_group_set,
0839     .is_generic = true,
0840 };
0841 
0842 static struct pinctrl_desc mtk_desc = {
0843     .name = PINCTRL_PINCTRL_DEV,
0844     .pctlops = &mtk_pctlops,
0845     .pmxops = &mtk_pmxops,
0846     .confops = &mtk_confops,
0847     .owner = THIS_MODULE,
0848 };
0849 
0850 static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
0851 {
0852     struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0853     const struct mtk_pin_desc *desc;
0854     int value, err;
0855 
0856     if (gpio >= hw->soc->npins)
0857         return -EINVAL;
0858 
0859     /*
0860      * "Virtual" GPIOs are always and only used for interrupts
0861      * Since they are only used for interrupts, they are always inputs
0862      */
0863     if (mtk_is_virt_gpio(hw, gpio))
0864         return 1;
0865 
0866     desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
0867 
0868     err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value);
0869     if (err)
0870         return err;
0871 
0872     if (value)
0873         return GPIO_LINE_DIRECTION_OUT;
0874 
0875     return GPIO_LINE_DIRECTION_IN;
0876 }
0877 
0878 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
0879 {
0880     struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0881     const struct mtk_pin_desc *desc;
0882     int value, err;
0883 
0884     if (gpio >= hw->soc->npins)
0885         return -EINVAL;
0886 
0887     desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
0888 
0889     err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
0890     if (err)
0891         return err;
0892 
0893     return !!value;
0894 }
0895 
0896 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
0897 {
0898     struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0899     const struct mtk_pin_desc *desc;
0900 
0901     if (gpio >= hw->soc->npins)
0902         return;
0903 
0904     desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
0905 
0906     mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
0907 }
0908 
0909 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
0910 {
0911     struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0912 
0913     if (gpio >= hw->soc->npins)
0914         return -EINVAL;
0915 
0916     return pinctrl_gpio_direction_input(chip->base + gpio);
0917 }
0918 
0919 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
0920                      int value)
0921 {
0922     struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0923 
0924     if (gpio >= hw->soc->npins)
0925         return -EINVAL;
0926 
0927     mtk_gpio_set(chip, gpio, value);
0928 
0929     return pinctrl_gpio_direction_output(chip->base + gpio);
0930 }
0931 
0932 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
0933 {
0934     struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0935     const struct mtk_pin_desc *desc;
0936 
0937     if (!hw->eint)
0938         return -ENOTSUPP;
0939 
0940     desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
0941 
0942     if (desc->eint.eint_n == EINT_NA)
0943         return -ENOTSUPP;
0944 
0945     return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
0946 }
0947 
0948 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
0949                    unsigned long config)
0950 {
0951     struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0952     const struct mtk_pin_desc *desc;
0953     u32 debounce;
0954 
0955     desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
0956 
0957     if (!hw->eint ||
0958         pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
0959         desc->eint.eint_n == EINT_NA)
0960         return -ENOTSUPP;
0961 
0962     debounce = pinconf_to_config_argument(config);
0963 
0964     return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
0965 }
0966 
0967 static int mtk_build_gpiochip(struct mtk_pinctrl *hw)
0968 {
0969     struct gpio_chip *chip = &hw->chip;
0970     int ret;
0971 
0972     chip->label     = PINCTRL_PINCTRL_DEV;
0973     chip->parent        = hw->dev;
0974     chip->request       = gpiochip_generic_request;
0975     chip->free      = gpiochip_generic_free;
0976     chip->get_direction = mtk_gpio_get_direction;
0977     chip->direction_input   = mtk_gpio_direction_input;
0978     chip->direction_output  = mtk_gpio_direction_output;
0979     chip->get       = mtk_gpio_get;
0980     chip->set       = mtk_gpio_set;
0981     chip->to_irq        = mtk_gpio_to_irq;
0982     chip->set_config    = mtk_gpio_set_config;
0983     chip->base      = -1;
0984     chip->ngpio     = hw->soc->npins;
0985     chip->of_gpio_n_cells   = 2;
0986 
0987     ret = gpiochip_add_data(chip, hw);
0988     if (ret < 0)
0989         return ret;
0990 
0991     return 0;
0992 }
0993 
0994 static int mtk_pctrl_build_state(struct platform_device *pdev)
0995 {
0996     struct mtk_pinctrl *hw = platform_get_drvdata(pdev);
0997     int i;
0998 
0999     /* Allocate groups */
1000     hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
1001                     sizeof(*hw->groups), GFP_KERNEL);
1002     if (!hw->groups)
1003         return -ENOMEM;
1004 
1005     /* We assume that one pin is one group, use pin name as group name. */
1006     hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
1007                        sizeof(*hw->grp_names), GFP_KERNEL);
1008     if (!hw->grp_names)
1009         return -ENOMEM;
1010 
1011     for (i = 0; i < hw->soc->npins; i++) {
1012         const struct mtk_pin_desc *pin = hw->soc->pins + i;
1013         struct mtk_pinctrl_group *group = hw->groups + i;
1014 
1015         group->name = pin->name;
1016         group->pin = pin->number;
1017 
1018         hw->grp_names[i] = pin->name;
1019     }
1020 
1021     return 0;
1022 }
1023 
1024 int mtk_paris_pinctrl_probe(struct platform_device *pdev)
1025 {
1026     struct device *dev = &pdev->dev;
1027     struct pinctrl_pin_desc *pins;
1028     struct mtk_pinctrl *hw;
1029     int err, i;
1030 
1031     hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
1032     if (!hw)
1033         return -ENOMEM;
1034 
1035     platform_set_drvdata(pdev, hw);
1036 
1037     hw->soc = device_get_match_data(dev);
1038     if (!hw->soc)
1039         return -ENOENT;
1040 
1041     hw->dev = &pdev->dev;
1042 
1043     if (!hw->soc->nbase_names)
1044         return dev_err_probe(dev, -EINVAL,
1045             "SoC should be assigned at least one register base\n");
1046 
1047     hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
1048                       sizeof(*hw->base), GFP_KERNEL);
1049     if (!hw->base)
1050         return -ENOMEM;
1051 
1052     for (i = 0; i < hw->soc->nbase_names; i++) {
1053         hw->base[i] = devm_platform_ioremap_resource_byname(pdev,
1054                     hw->soc->base_names[i]);
1055         if (IS_ERR(hw->base[i]))
1056             return PTR_ERR(hw->base[i]);
1057     }
1058 
1059     hw->nbase = hw->soc->nbase_names;
1060 
1061     if (of_find_property(hw->dev->of_node,
1062                  "mediatek,rsel-resistance-in-si-unit", NULL))
1063         hw->rsel_si_unit = true;
1064     else
1065         hw->rsel_si_unit = false;
1066 
1067     spin_lock_init(&hw->lock);
1068 
1069     err = mtk_pctrl_build_state(pdev);
1070     if (err)
1071         return dev_err_probe(dev, err, "build state failed\n");
1072 
1073     /* Copy from internal struct mtk_pin_desc to register to the core */
1074     pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
1075                   GFP_KERNEL);
1076     if (!pins)
1077         return -ENOMEM;
1078 
1079     for (i = 0; i < hw->soc->npins; i++) {
1080         pins[i].number = hw->soc->pins[i].number;
1081         pins[i].name = hw->soc->pins[i].name;
1082     }
1083 
1084     /* Setup pins descriptions per SoC types */
1085     mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
1086     mtk_desc.npins = hw->soc->npins;
1087     mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
1088     mtk_desc.custom_params = mtk_custom_bindings;
1089 #ifdef CONFIG_DEBUG_FS
1090     mtk_desc.custom_conf_items = mtk_conf_items;
1091 #endif
1092 
1093     err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
1094                          &hw->pctrl);
1095     if (err)
1096         return err;
1097 
1098     err = pinctrl_enable(hw->pctrl);
1099     if (err)
1100         return err;
1101 
1102     err = mtk_build_eint(hw, pdev);
1103     if (err)
1104         dev_warn(&pdev->dev,
1105              "Failed to add EINT, but pinctrl still can work\n");
1106 
1107     /* Build gpiochip should be after pinctrl_enable is done */
1108     err = mtk_build_gpiochip(hw);
1109     if (err)
1110         return dev_err_probe(dev, err, "Failed to add gpio_chip\n");
1111 
1112     platform_set_drvdata(pdev, hw);
1113 
1114     return 0;
1115 }
1116 EXPORT_SYMBOL_GPL(mtk_paris_pinctrl_probe);
1117 
1118 static int mtk_paris_pinctrl_suspend(struct device *device)
1119 {
1120     struct mtk_pinctrl *pctl = dev_get_drvdata(device);
1121 
1122     return mtk_eint_do_suspend(pctl->eint);
1123 }
1124 
1125 static int mtk_paris_pinctrl_resume(struct device *device)
1126 {
1127     struct mtk_pinctrl *pctl = dev_get_drvdata(device);
1128 
1129     return mtk_eint_do_resume(pctl->eint);
1130 }
1131 
1132 const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = {
1133     .suspend_noirq = mtk_paris_pinctrl_suspend,
1134     .resume_noirq = mtk_paris_pinctrl_resume,
1135 };
1136 
1137 MODULE_LICENSE("GPL v2");
1138 MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Paris");
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