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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * The MT7623 driver based on Linux generic pinctrl binding.
0004  *
0005  * Copyright (C) 2015 - 2018 MediaTek Inc.
0006  * Author: Biao Huang <biao.huang@mediatek.com>
0007  *     Ryder Lee <ryder.lee@mediatek.com>
0008  *     Sean Wang <sean.wang@mediatek.com>
0009  */
0010 
0011 #include "pinctrl-moore.h"
0012 
0013 #define PIN_BOND_REG0       0xb10
0014 #define PIN_BOND_REG1       0xf20
0015 #define PIN_BOND_REG2       0xef0
0016 #define BOND_PCIE_CLR       (0x77 << 3)
0017 #define BOND_I2S_CLR        0x3
0018 #define BOND_MSDC0E_CLR     0x1
0019 
0020 #define PIN_FIELD15(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \
0021     PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,    \
0022                _x_bits, 15, false)
0023 
0024 #define PIN_FIELD16(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \
0025     PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,    \
0026                _x_bits, 16, 0)
0027 
0028 #define PINS_FIELD16(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits)    \
0029     PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,    \
0030                _x_bits, 16, 1)
0031 
0032 #define MT7623_PIN(_number, _name, _eint_n, _drv_grp)           \
0033     MTK_PIN(_number, _name, 0, _eint_n, _drv_grp)
0034 
0035 static const struct mtk_pin_field_calc mt7623_pin_mode_range[] = {
0036     PIN_FIELD15(0, 278, 0x760, 0x10, 0, 3),
0037 };
0038 
0039 static const struct mtk_pin_field_calc mt7623_pin_dir_range[] = {
0040     PIN_FIELD16(0, 175, 0x0, 0x10, 0, 1),
0041     PIN_FIELD16(176, 278, 0xc0, 0x10, 0, 1),
0042 };
0043 
0044 static const struct mtk_pin_field_calc mt7623_pin_di_range[] = {
0045     PIN_FIELD16(0, 278, 0x630, 0x10, 0, 1),
0046 };
0047 
0048 static const struct mtk_pin_field_calc mt7623_pin_do_range[] = {
0049     PIN_FIELD16(0, 278, 0x500, 0x10, 0, 1),
0050 };
0051 
0052 static const struct mtk_pin_field_calc mt7623_pin_ies_range[] = {
0053     PINS_FIELD16(0, 6, 0xb20, 0x10, 0, 1),
0054     PINS_FIELD16(7, 9, 0xb20, 0x10, 1, 1),
0055     PINS_FIELD16(10, 13, 0xb30, 0x10, 3, 1),
0056     PINS_FIELD16(14, 15, 0xb30, 0x10, 13, 1),
0057     PINS_FIELD16(16, 17, 0xb40, 0x10, 7, 1),
0058     PINS_FIELD16(18, 29, 0xb40, 0x10, 13, 1),
0059     PINS_FIELD16(30, 32, 0xb40, 0x10, 7, 1),
0060     PINS_FIELD16(33, 37, 0xb40, 0x10, 13, 1),
0061     PIN_FIELD16(38, 38, 0xb20, 0x10, 13, 1),
0062     PINS_FIELD16(39, 42, 0xb40, 0x10, 13, 1),
0063     PINS_FIELD16(43, 45, 0xb20, 0x10, 10, 1),
0064     PINS_FIELD16(47, 48, 0xb20, 0x10, 11, 1),
0065     PIN_FIELD16(49, 49, 0xb20, 0x10, 12, 1),
0066     PINS_FIELD16(50, 52, 0xb20, 0x10, 13, 1),
0067     PINS_FIELD16(53, 56, 0xb20, 0x10, 14, 1),
0068     PINS_FIELD16(57, 58, 0xb20, 0x10, 15, 1),
0069     PIN_FIELD16(59, 59, 0xb30, 0x10, 10, 1),
0070     PINS_FIELD16(60, 62, 0xb30, 0x10, 0, 1),
0071     PINS_FIELD16(63, 65, 0xb30, 0x10, 1, 1),
0072     PINS_FIELD16(66, 71, 0xb30, 0x10, 2, 1),
0073     PINS_FIELD16(72, 74, 0xb20, 0x10, 12, 1),
0074     PINS_FIELD16(75, 76, 0xb30, 0x10, 3, 1),
0075     PINS_FIELD16(77, 78, 0xb30, 0x10, 4, 1),
0076     PINS_FIELD16(79, 82, 0xb30, 0x10, 5, 1),
0077     PINS_FIELD16(83, 84, 0xb30, 0x10, 2, 1),
0078     PIN_FIELD16(85, 85, 0xda0, 0x10, 4, 1),
0079     PIN_FIELD16(86, 86, 0xd90, 0x10, 4, 1),
0080     PINS_FIELD16(87, 90, 0xdb0, 0x10, 4, 1),
0081     PINS_FIELD16(101, 104, 0xb30, 0x10, 6, 1),
0082     PIN_FIELD16(105, 105, 0xd40, 0x10, 4, 1),
0083     PIN_FIELD16(106, 106, 0xd30, 0x10, 4, 1),
0084     PINS_FIELD16(107, 110, 0xd50, 0x10, 4, 1),
0085     PINS_FIELD16(111, 115, 0xce0, 0x10, 4, 1),
0086     PIN_FIELD16(116, 116, 0xcd0, 0x10, 4, 1),
0087     PIN_FIELD16(117, 117, 0xcc0, 0x10, 4, 1),
0088     PINS_FIELD16(118, 121, 0xce0, 0x10, 4, 1),
0089     PINS_FIELD16(122, 125, 0xb30, 0x10, 7, 1),
0090     PIN_FIELD16(126, 126, 0xb20, 0x10, 12, 1),
0091     PINS_FIELD16(127, 142, 0xb30, 0x10, 9, 1),
0092     PINS_FIELD16(143, 160, 0xb30, 0x10, 10, 1),
0093     PINS_FIELD16(161, 168, 0xb30, 0x10, 12, 1),
0094     PINS_FIELD16(169, 183, 0xb30, 0x10, 10, 1),
0095     PINS_FIELD16(184, 186, 0xb30, 0x10, 9, 1),
0096     PIN_FIELD16(187, 187, 0xb30, 0x10, 14, 1),
0097     PIN_FIELD16(188, 188, 0xb20, 0x10, 13, 1),
0098     PINS_FIELD16(189, 193, 0xb30, 0x10, 15, 1),
0099     PINS_FIELD16(194, 198, 0xb40, 0x10, 0, 1),
0100     PIN_FIELD16(199, 199, 0xb20, 0x10, 1, 1),
0101     PINS_FIELD16(200, 202, 0xb40, 0x10, 1, 1),
0102     PINS_FIELD16(203, 207, 0xb40, 0x10, 2, 1),
0103     PINS_FIELD16(208, 209, 0xb40, 0x10, 3, 1),
0104     PIN_FIELD16(210, 210, 0xb40, 0x10, 4, 1),
0105     PINS_FIELD16(211, 235, 0xb40, 0x10, 5, 1),
0106     PINS_FIELD16(236, 241, 0xb40, 0x10, 6, 1),
0107     PINS_FIELD16(242, 243, 0xb40, 0x10, 7, 1),
0108     PINS_FIELD16(244, 247, 0xb40, 0x10, 8, 1),
0109     PIN_FIELD16(248, 248, 0xb40, 0x10, 9, 1),
0110     PINS_FIELD16(249, 257, 0xfc0, 0x10, 4, 1),
0111     PIN_FIELD16(258, 258, 0xcb0, 0x10, 4, 1),
0112     PIN_FIELD16(259, 259, 0xc90, 0x10, 4, 1),
0113     PIN_FIELD16(260, 260, 0x3a0, 0x10, 4, 1),
0114     PIN_FIELD16(261, 261, 0xd50, 0x10, 4, 1),
0115     PINS_FIELD16(262, 277, 0xb40, 0x10, 12, 1),
0116     PIN_FIELD16(278, 278, 0xb40, 0x10, 13, 1),
0117 };
0118 
0119 static const struct mtk_pin_field_calc mt7623_pin_smt_range[] = {
0120     PINS_FIELD16(0, 6, 0xb50, 0x10, 0, 1),
0121     PINS_FIELD16(7, 9, 0xb50, 0x10, 1, 1),
0122     PINS_FIELD16(10, 13, 0xb60, 0x10, 3, 1),
0123     PINS_FIELD16(14, 15, 0xb60, 0x10, 13, 1),
0124     PINS_FIELD16(16, 17, 0xb70, 0x10, 7, 1),
0125     PINS_FIELD16(18, 29, 0xb70, 0x10, 13, 1),
0126     PINS_FIELD16(30, 32, 0xb70, 0x10, 7, 1),
0127     PINS_FIELD16(33, 37, 0xb70, 0x10, 13, 1),
0128     PIN_FIELD16(38, 38, 0xb50, 0x10, 13, 1),
0129     PINS_FIELD16(39, 42, 0xb70, 0x10, 13, 1),
0130     PINS_FIELD16(43, 45, 0xb50, 0x10, 10, 1),
0131     PINS_FIELD16(47, 48, 0xb50, 0x10, 11, 1),
0132     PIN_FIELD16(49, 49, 0xb50, 0x10, 12, 1),
0133     PINS_FIELD16(50, 52, 0xb50, 0x10, 13, 1),
0134     PINS_FIELD16(53, 56, 0xb50, 0x10, 14, 1),
0135     PINS_FIELD16(57, 58, 0xb50, 0x10, 15, 1),
0136     PIN_FIELD16(59, 59, 0xb60, 0x10, 10, 1),
0137     PINS_FIELD16(60, 62, 0xb60, 0x10, 0, 1),
0138     PINS_FIELD16(63, 65, 0xb60, 0x10, 1, 1),
0139     PINS_FIELD16(66, 71, 0xb60, 0x10, 2, 1),
0140     PINS_FIELD16(72, 74, 0xb50, 0x10, 12, 1),
0141     PINS_FIELD16(75, 76, 0xb60, 0x10, 3, 1),
0142     PINS_FIELD16(77, 78, 0xb60, 0x10, 4, 1),
0143     PINS_FIELD16(79, 82, 0xb60, 0x10, 5, 1),
0144     PINS_FIELD16(83, 84, 0xb60, 0x10, 2, 1),
0145     PIN_FIELD16(85, 85, 0xda0, 0x10, 11, 1),
0146     PIN_FIELD16(86, 86, 0xd90, 0x10, 11, 1),
0147     PIN_FIELD16(87, 87, 0xdc0, 0x10, 3, 1),
0148     PIN_FIELD16(88, 88, 0xdc0, 0x10, 7, 1),
0149     PIN_FIELD16(89, 89, 0xdc0, 0x10, 11, 1),
0150     PIN_FIELD16(90, 90, 0xdc0, 0x10, 15, 1),
0151     PINS_FIELD16(101, 104, 0xb60, 0x10, 6, 1),
0152     PIN_FIELD16(105, 105, 0xd40, 0x10, 11, 1),
0153     PIN_FIELD16(106, 106, 0xd30, 0x10, 11, 1),
0154     PIN_FIELD16(107, 107, 0xd60, 0x10, 3, 1),
0155     PIN_FIELD16(108, 108, 0xd60, 0x10, 7, 1),
0156     PIN_FIELD16(109, 109, 0xd60, 0x10, 11, 1),
0157     PIN_FIELD16(110, 110, 0xd60, 0x10, 15, 1),
0158     PIN_FIELD16(111, 111, 0xd00, 0x10, 15, 1),
0159     PIN_FIELD16(112, 112, 0xd00, 0x10, 11, 1),
0160     PIN_FIELD16(113, 113, 0xd00, 0x10, 7, 1),
0161     PIN_FIELD16(114, 114, 0xd00, 0x10, 3, 1),
0162     PIN_FIELD16(115, 115, 0xd10, 0x10, 3, 1),
0163     PIN_FIELD16(116, 116, 0xcd0, 0x10, 11, 1),
0164     PIN_FIELD16(117, 117, 0xcc0, 0x10, 11, 1),
0165     PIN_FIELD16(118, 118, 0xcf0, 0x10, 15, 1),
0166     PIN_FIELD16(119, 119, 0xcf0, 0x10, 7, 1),
0167     PIN_FIELD16(120, 120, 0xcf0, 0x10, 3, 1),
0168     PIN_FIELD16(121, 121, 0xcf0, 0x10, 7, 1),
0169     PINS_FIELD16(122, 125, 0xb60, 0x10, 7, 1),
0170     PIN_FIELD16(126, 126, 0xb50, 0x10, 12, 1),
0171     PINS_FIELD16(127, 142, 0xb60, 0x10, 9, 1),
0172     PINS_FIELD16(143, 160, 0xb60, 0x10, 10, 1),
0173     PINS_FIELD16(161, 168, 0xb60, 0x10, 12, 1),
0174     PINS_FIELD16(169, 183, 0xb60, 0x10, 10, 1),
0175     PINS_FIELD16(184, 186, 0xb60, 0x10, 9, 1),
0176     PIN_FIELD16(187, 187, 0xb60, 0x10, 14, 1),
0177     PIN_FIELD16(188, 188, 0xb50, 0x10, 13, 1),
0178     PINS_FIELD16(189, 193, 0xb60, 0x10, 15, 1),
0179     PINS_FIELD16(194, 198, 0xb70, 0x10, 0, 1),
0180     PIN_FIELD16(199, 199, 0xb50, 0x10, 1, 1),
0181     PINS_FIELD16(200, 202, 0xb70, 0x10, 1, 1),
0182     PINS_FIELD16(203, 207, 0xb70, 0x10, 2, 1),
0183     PINS_FIELD16(208, 209, 0xb70, 0x10, 3, 1),
0184     PIN_FIELD16(210, 210, 0xb70, 0x10, 4, 1),
0185     PINS_FIELD16(211, 235, 0xb70, 0x10, 5, 1),
0186     PINS_FIELD16(236, 241, 0xb70, 0x10, 6, 1),
0187     PINS_FIELD16(242, 243, 0xb70, 0x10, 7, 1),
0188     PINS_FIELD16(244, 247, 0xb70, 0x10, 8, 1),
0189     PIN_FIELD16(248, 248, 0xb70, 0x10, 9, 10),
0190     PIN_FIELD16(249, 249, 0x140, 0x10, 3, 1),
0191     PIN_FIELD16(250, 250, 0x130, 0x10, 15, 1),
0192     PIN_FIELD16(251, 251, 0x130, 0x10, 11, 1),
0193     PIN_FIELD16(252, 252, 0x130, 0x10, 7, 1),
0194     PIN_FIELD16(253, 253, 0x130, 0x10, 3, 1),
0195     PIN_FIELD16(254, 254, 0xf40, 0x10, 15, 1),
0196     PIN_FIELD16(255, 255, 0xf40, 0x10, 11, 1),
0197     PIN_FIELD16(256, 256, 0xf40, 0x10, 7, 1),
0198     PIN_FIELD16(257, 257, 0xf40, 0x10, 3, 1),
0199     PIN_FIELD16(258, 258, 0xcb0, 0x10, 11, 1),
0200     PIN_FIELD16(259, 259, 0xc90, 0x10, 11, 1),
0201     PIN_FIELD16(260, 260, 0x3a0, 0x10, 11, 1),
0202     PIN_FIELD16(261, 261, 0x0b0, 0x10, 3, 1),
0203     PINS_FIELD16(262, 277, 0xb70, 0x10, 12, 1),
0204     PIN_FIELD16(278, 278, 0xb70, 0x10, 13, 1),
0205 };
0206 
0207 static const struct mtk_pin_field_calc mt7623_pin_pullen_range[] = {
0208     PIN_FIELD16(0, 278, 0x150, 0x10, 0, 1),
0209 };
0210 
0211 static const struct mtk_pin_field_calc mt7623_pin_pullsel_range[] = {
0212     PIN_FIELD16(0, 278, 0x280, 0x10, 0, 1),
0213 };
0214 
0215 static const struct mtk_pin_field_calc mt7623_pin_drv_range[] = {
0216     PINS_FIELD16(0, 6, 0xf50, 0x10, 0, 4),
0217     PINS_FIELD16(7, 9, 0xf50, 0x10, 4, 4),
0218     PINS_FIELD16(10, 13, 0xf50, 0x10, 4, 4),
0219     PINS_FIELD16(14, 15, 0xf50, 0x10, 12, 4),
0220     PINS_FIELD16(16, 17, 0xf60, 0x10, 0, 4),
0221     PINS_FIELD16(18, 21, 0xf60, 0x10, 0, 4),
0222     PINS_FIELD16(22, 26, 0xf60, 0x10, 8, 4),
0223     PINS_FIELD16(27, 29, 0xf60, 0x10, 12, 4),
0224     PINS_FIELD16(30, 32, 0xf60, 0x10, 0, 4),
0225     PINS_FIELD16(33, 37, 0xf70, 0x10, 0, 4),
0226     PIN_FIELD16(38, 38, 0xf70, 0x10, 4, 4),
0227     PINS_FIELD16(39, 42, 0xf70, 0x10, 8, 4),
0228     PINS_FIELD16(43, 45, 0xf70, 0x10, 12, 4),
0229     PINS_FIELD16(47, 48, 0xf80, 0x10, 0, 4),
0230     PIN_FIELD16(49, 49, 0xf80, 0x10, 4, 4),
0231     PINS_FIELD16(50, 52, 0xf70, 0x10, 4, 4),
0232     PINS_FIELD16(53, 56, 0xf80, 0x10, 12, 4),
0233     PINS_FIELD16(60, 62, 0xf90, 0x10, 8, 4),
0234     PINS_FIELD16(63, 65, 0xf90, 0x10, 12, 4),
0235     PINS_FIELD16(66, 71, 0xfa0, 0x10, 0, 4),
0236     PINS_FIELD16(72, 74, 0xf80, 0x10, 4, 4),
0237     PIN_FIELD16(85, 85, 0xda0, 0x10, 0, 4),
0238     PIN_FIELD16(86, 86, 0xd90, 0x10, 0, 4),
0239     PINS_FIELD16(87, 90, 0xdb0, 0x10, 0, 4),
0240     PIN_FIELD16(105, 105, 0xd40, 0x10, 0, 4),
0241     PIN_FIELD16(106, 106, 0xd30, 0x10, 0, 4),
0242     PINS_FIELD16(107, 110, 0xd50, 0x10, 0, 4),
0243     PINS_FIELD16(111, 115, 0xce0, 0x10, 0, 4),
0244     PIN_FIELD16(116, 116, 0xcd0, 0x10, 0, 4),
0245     PIN_FIELD16(117, 117, 0xcc0, 0x10, 0, 4),
0246     PINS_FIELD16(118, 121, 0xce0, 0x10, 0, 4),
0247     PIN_FIELD16(126, 126, 0xf80, 0x10, 4, 4),
0248     PIN_FIELD16(188, 188, 0xf70, 0x10, 4, 4),
0249     PINS_FIELD16(189, 193, 0xfe0, 0x10, 8, 4),
0250     PINS_FIELD16(194, 198, 0xfe0, 0x10, 12, 4),
0251     PIN_FIELD16(199, 199, 0xf50, 0x10, 4, 4),
0252     PINS_FIELD16(200, 202, 0xfd0, 0x10, 0, 4),
0253     PINS_FIELD16(203, 207, 0xfd0, 0x10, 4, 4),
0254     PINS_FIELD16(208, 209, 0xfd0, 0x10, 8, 4),
0255     PIN_FIELD16(210, 210, 0xfd0, 0x10, 12, 4),
0256     PINS_FIELD16(211, 235, 0xff0, 0x10, 0, 4),
0257     PINS_FIELD16(236, 241, 0xff0, 0x10, 4, 4),
0258     PINS_FIELD16(242, 243, 0xff0, 0x10, 8, 4),
0259     PIN_FIELD16(248, 248, 0xf00, 0x10, 0, 4),
0260     PINS_FIELD16(249, 256, 0xfc0, 0x10, 0, 4),
0261     PIN_FIELD16(257, 257, 0xce0, 0x10, 0, 4),
0262     PIN_FIELD16(258, 258, 0xcb0, 0x10, 0, 4),
0263     PIN_FIELD16(259, 259, 0xc90, 0x10, 0, 4),
0264     PIN_FIELD16(260, 260, 0x3a0, 0x10, 0, 4),
0265     PIN_FIELD16(261, 261, 0xd50, 0x10, 0, 4),
0266     PINS_FIELD16(262, 277, 0xf00, 0x10, 8, 4),
0267     PIN_FIELD16(278, 278, 0xf70, 0x10, 8, 4),
0268 };
0269 
0270 static const struct mtk_pin_field_calc mt7623_pin_tdsel_range[] = {
0271     PINS_FIELD16(262, 276, 0x4c0, 0x10, 0, 4),
0272 };
0273 
0274 static const struct mtk_pin_field_calc mt7623_pin_pupd_range[] = {
0275     /* MSDC0 */
0276     PIN_FIELD16(111, 111, 0xd00, 0x10, 12, 1),
0277     PIN_FIELD16(112, 112, 0xd00, 0x10, 8, 1),
0278     PIN_FIELD16(113, 113, 0xd00, 0x10, 4, 1),
0279     PIN_FIELD16(114, 114, 0xd00, 0x10, 0, 1),
0280     PIN_FIELD16(115, 115, 0xd10, 0x10, 0, 1),
0281     PIN_FIELD16(116, 116, 0xcd0, 0x10, 8, 1),
0282     PIN_FIELD16(117, 117, 0xcc0, 0x10, 8, 1),
0283     PIN_FIELD16(118, 118, 0xcf0, 0x10, 12, 1),
0284     PIN_FIELD16(119, 119, 0xcf0, 0x10, 8, 1),
0285     PIN_FIELD16(120, 120, 0xcf0, 0x10, 4, 1),
0286     PIN_FIELD16(121, 121, 0xcf0, 0x10, 0, 1),
0287     /* MSDC1 */
0288     PIN_FIELD16(105, 105, 0xd40, 0x10, 8, 1),
0289     PIN_FIELD16(106, 106, 0xd30, 0x10, 8, 1),
0290     PIN_FIELD16(107, 107, 0xd60, 0x10, 0, 1),
0291     PIN_FIELD16(108, 108, 0xd60, 0x10, 10, 1),
0292     PIN_FIELD16(109, 109, 0xd60, 0x10, 4, 1),
0293     PIN_FIELD16(110, 110, 0xc60, 0x10, 12, 1),
0294     /* MSDC1 */
0295     PIN_FIELD16(85, 85, 0xda0, 0x10, 8, 1),
0296     PIN_FIELD16(86, 86, 0xd90, 0x10, 8, 1),
0297     PIN_FIELD16(87, 87, 0xdc0, 0x10, 0, 1),
0298     PIN_FIELD16(88, 88, 0xdc0, 0x10, 10, 1),
0299     PIN_FIELD16(89, 89, 0xdc0, 0x10, 4, 1),
0300     PIN_FIELD16(90, 90, 0xdc0, 0x10, 12, 1),
0301     /* MSDC0E */
0302     PIN_FIELD16(249, 249, 0x140, 0x10, 0, 1),
0303     PIN_FIELD16(250, 250, 0x130, 0x10, 12, 1),
0304     PIN_FIELD16(251, 251, 0x130, 0x10, 8, 1),
0305     PIN_FIELD16(252, 252, 0x130, 0x10, 4, 1),
0306     PIN_FIELD16(253, 253, 0x130, 0x10, 0, 1),
0307     PIN_FIELD16(254, 254, 0xf40, 0x10, 12, 1),
0308     PIN_FIELD16(255, 255, 0xf40, 0x10, 8, 1),
0309     PIN_FIELD16(256, 256, 0xf40, 0x10, 4, 1),
0310     PIN_FIELD16(257, 257, 0xf40, 0x10, 0, 1),
0311     PIN_FIELD16(258, 258, 0xcb0, 0x10, 8, 1),
0312     PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1),
0313     PIN_FIELD16(261, 261, 0x140, 0x10, 8, 1),
0314 };
0315 
0316 static const struct mtk_pin_field_calc mt7623_pin_r1_range[] = {
0317     /* MSDC0 */
0318     PIN_FIELD16(111, 111, 0xd00, 0x10, 13, 1),
0319     PIN_FIELD16(112, 112, 0xd00, 0x10, 9, 1),
0320     PIN_FIELD16(113, 113, 0xd00, 0x10, 5, 1),
0321     PIN_FIELD16(114, 114, 0xd00, 0x10, 1, 1),
0322     PIN_FIELD16(115, 115, 0xd10, 0x10, 1, 1),
0323     PIN_FIELD16(116, 116, 0xcd0, 0x10, 9, 1),
0324     PIN_FIELD16(117, 117, 0xcc0, 0x10, 9, 1),
0325     PIN_FIELD16(118, 118, 0xcf0, 0x10, 13, 1),
0326     PIN_FIELD16(119, 119, 0xcf0, 0x10, 9, 1),
0327     PIN_FIELD16(120, 120, 0xcf0, 0x10, 5, 1),
0328     PIN_FIELD16(121, 121, 0xcf0, 0x10, 1, 1),
0329     /* MSDC1 */
0330     PIN_FIELD16(105, 105, 0xd40, 0x10, 9, 1),
0331     PIN_FIELD16(106, 106, 0xd30, 0x10, 9, 1),
0332     PIN_FIELD16(107, 107, 0xd60, 0x10, 1, 1),
0333     PIN_FIELD16(108, 108, 0xd60, 0x10, 9, 1),
0334     PIN_FIELD16(109, 109, 0xd60, 0x10, 5, 1),
0335     PIN_FIELD16(110, 110, 0xc60, 0x10, 13, 1),
0336     /* MSDC2 */
0337     PIN_FIELD16(85, 85, 0xda0, 0x10, 9, 1),
0338     PIN_FIELD16(86, 86, 0xd90, 0x10, 9, 1),
0339     PIN_FIELD16(87, 87, 0xdc0, 0x10, 1, 1),
0340     PIN_FIELD16(88, 88, 0xdc0, 0x10, 9, 1),
0341     PIN_FIELD16(89, 89, 0xdc0, 0x10, 5, 1),
0342     PIN_FIELD16(90, 90, 0xdc0, 0x10, 13, 1),
0343     /* MSDC0E */
0344     PIN_FIELD16(249, 249, 0x140, 0x10, 1, 1),
0345     PIN_FIELD16(250, 250, 0x130, 0x10, 13, 1),
0346     PIN_FIELD16(251, 251, 0x130, 0x10, 9, 1),
0347     PIN_FIELD16(252, 252, 0x130, 0x10, 5, 1),
0348     PIN_FIELD16(253, 253, 0x130, 0x10, 1, 1),
0349     PIN_FIELD16(254, 254, 0xf40, 0x10, 13, 1),
0350     PIN_FIELD16(255, 255, 0xf40, 0x10, 9, 1),
0351     PIN_FIELD16(256, 256, 0xf40, 0x10, 5, 1),
0352     PIN_FIELD16(257, 257, 0xf40, 0x10, 1, 1),
0353     PIN_FIELD16(258, 258, 0xcb0, 0x10, 9, 1),
0354     PIN_FIELD16(259, 259, 0xc90, 0x10, 9, 1),
0355     PIN_FIELD16(261, 261, 0x140, 0x10, 9, 1),
0356 };
0357 
0358 static const struct mtk_pin_field_calc mt7623_pin_r0_range[] = {
0359     /* MSDC0 */
0360     PIN_FIELD16(111, 111, 0xd00, 0x10, 14, 1),
0361     PIN_FIELD16(112, 112, 0xd00, 0x10, 10, 1),
0362     PIN_FIELD16(113, 113, 0xd00, 0x10, 6, 1),
0363     PIN_FIELD16(114, 114, 0xd00, 0x10, 2, 1),
0364     PIN_FIELD16(115, 115, 0xd10, 0x10, 2, 1),
0365     PIN_FIELD16(116, 116, 0xcd0, 0x10, 10, 1),
0366     PIN_FIELD16(117, 117, 0xcc0, 0x10, 10, 1),
0367     PIN_FIELD16(118, 118, 0xcf0, 0x10, 14, 1),
0368     PIN_FIELD16(119, 119, 0xcf0, 0x10, 10, 1),
0369     PIN_FIELD16(120, 120, 0xcf0, 0x10, 6, 1),
0370     PIN_FIELD16(121, 121, 0xcf0, 0x10, 2, 1),
0371     /* MSDC1 */
0372     PIN_FIELD16(105, 105, 0xd40, 0x10, 10, 1),
0373     PIN_FIELD16(106, 106, 0xd30, 0x10, 10, 1),
0374     PIN_FIELD16(107, 107, 0xd60, 0x10, 2, 1),
0375     PIN_FIELD16(108, 108, 0xd60, 0x10, 8, 1),
0376     PIN_FIELD16(109, 109, 0xd60, 0x10, 6, 1),
0377     PIN_FIELD16(110, 110, 0xc60, 0x10, 14, 1),
0378     /* MSDC2 */
0379     PIN_FIELD16(85, 85, 0xda0, 0x10, 10, 1),
0380     PIN_FIELD16(86, 86, 0xd90, 0x10, 10, 1),
0381     PIN_FIELD16(87, 87, 0xdc0, 0x10, 2, 1),
0382     PIN_FIELD16(88, 88, 0xdc0, 0x10, 8, 1),
0383     PIN_FIELD16(89, 89, 0xdc0, 0x10, 6, 1),
0384     PIN_FIELD16(90, 90, 0xdc0, 0x10, 14, 1),
0385     /* MSDC0E */
0386     PIN_FIELD16(249, 249, 0x140, 0x10, 2, 1),
0387     PIN_FIELD16(250, 250, 0x130, 0x10, 14, 1),
0388     PIN_FIELD16(251, 251, 0x130, 0x10, 10, 1),
0389     PIN_FIELD16(252, 252, 0x130, 0x10, 6, 1),
0390     PIN_FIELD16(253, 253, 0x130, 0x10, 2, 1),
0391     PIN_FIELD16(254, 254, 0xf40, 0x10, 14, 1),
0392     PIN_FIELD16(255, 255, 0xf40, 0x10, 10, 1),
0393     PIN_FIELD16(256, 256, 0xf40, 0x10, 6, 1),
0394     PIN_FIELD16(257, 257, 0xf40, 0x10, 5, 1),
0395     PIN_FIELD16(258, 258, 0xcb0, 0x10, 10, 1),
0396     PIN_FIELD16(259, 259, 0xc90, 0x10, 10, 1),
0397     PIN_FIELD16(261, 261, 0x140, 0x10, 10, 1),
0398 };
0399 
0400 static const struct mtk_pin_reg_calc mt7623_reg_cals[] = {
0401     [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7623_pin_mode_range),
0402     [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7623_pin_dir_range),
0403     [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt7623_pin_di_range),
0404     [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt7623_pin_do_range),
0405     [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt7623_pin_smt_range),
0406     [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt7623_pin_pullsel_range),
0407     [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt7623_pin_pullen_range),
0408     [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt7623_pin_drv_range),
0409     [PINCTRL_PIN_REG_TDSEL] = MTK_RANGE(mt7623_pin_tdsel_range),
0410     [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt7623_pin_ies_range),
0411     [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt7623_pin_pupd_range),
0412     [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt7623_pin_r0_range),
0413     [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt7623_pin_r1_range),
0414 };
0415 
0416 static const struct mtk_pin_desc mt7623_pins[] = {
0417     MT7623_PIN(0, "PWRAP_SPI0_MI", 148, DRV_GRP3),
0418     MT7623_PIN(1, "PWRAP_SPI0_MO", 149, DRV_GRP3),
0419     MT7623_PIN(2, "PWRAP_INT", 150, DRV_GRP3),
0420     MT7623_PIN(3, "PWRAP_SPI0_CK", 151, DRV_GRP3),
0421     MT7623_PIN(4, "PWRAP_SPI0_CSN", 152, DRV_GRP3),
0422     MT7623_PIN(5, "PWRAP_SPI0_CK2", 153, DRV_GRP3),
0423     MT7623_PIN(6, "PWRAP_SPI0_CSN2", 154, DRV_GRP3),
0424     MT7623_PIN(7, "SPI1_CSN", 155, DRV_GRP3),
0425     MT7623_PIN(8, "SPI1_MI", 156, DRV_GRP3),
0426     MT7623_PIN(9, "SPI1_MO", 157, DRV_GRP3),
0427     MT7623_PIN(10, "RTC32K_CK", 158, DRV_GRP3),
0428     MT7623_PIN(11, "WATCHDOG", 159, DRV_GRP3),
0429     MT7623_PIN(12, "SRCLKENA", 160, DRV_GRP3),
0430     MT7623_PIN(13, "SRCLKENAI", 161, DRV_GRP3),
0431     MT7623_PIN(14, "URXD2", 162, DRV_GRP1),
0432     MT7623_PIN(15, "UTXD2", 163, DRV_GRP1),
0433     MT7623_PIN(16, "I2S5_DATA_IN", 164, DRV_GRP1),
0434     MT7623_PIN(17, "I2S5_BCK", 165, DRV_GRP1),
0435     MT7623_PIN(18, "PCM_CLK", 166, DRV_GRP1),
0436     MT7623_PIN(19, "PCM_SYNC", 167, DRV_GRP1),
0437     MT7623_PIN(20, "PCM_RX", EINT_NA, DRV_GRP1),
0438     MT7623_PIN(21, "PCM_TX", EINT_NA, DRV_GRP1),
0439     MT7623_PIN(22, "EINT0", 0, DRV_GRP1),
0440     MT7623_PIN(23, "EINT1", 1, DRV_GRP1),
0441     MT7623_PIN(24, "EINT2", 2, DRV_GRP1),
0442     MT7623_PIN(25, "EINT3", 3, DRV_GRP1),
0443     MT7623_PIN(26, "EINT4", 4, DRV_GRP1),
0444     MT7623_PIN(27, "EINT5", 5, DRV_GRP1),
0445     MT7623_PIN(28, "EINT6", 6, DRV_GRP1),
0446     MT7623_PIN(29, "EINT7", 7, DRV_GRP1),
0447     MT7623_PIN(30, "I2S5_LRCK", 12, DRV_GRP1),
0448     MT7623_PIN(31, "I2S5_MCLK", 13, DRV_GRP1),
0449     MT7623_PIN(32, "I2S5_DATA", 14, DRV_GRP1),
0450     MT7623_PIN(33, "I2S1_DATA", 15, DRV_GRP1),
0451     MT7623_PIN(34, "I2S1_DATA_IN", 16, DRV_GRP1),
0452     MT7623_PIN(35, "I2S1_BCK", 17, DRV_GRP1),
0453     MT7623_PIN(36, "I2S1_LRCK", 18, DRV_GRP1),
0454     MT7623_PIN(37, "I2S1_MCLK", 19, DRV_GRP1),
0455     MT7623_PIN(38, "I2S2_DATA", 20, DRV_GRP1),
0456     MT7623_PIN(39, "JTMS", 21, DRV_GRP3),
0457     MT7623_PIN(40, "JTCK", 22, DRV_GRP3),
0458     MT7623_PIN(41, "JTDI", 23, DRV_GRP3),
0459     MT7623_PIN(42, "JTDO", 24, DRV_GRP3),
0460     MT7623_PIN(43, "NCLE", 25, DRV_GRP1),
0461     MT7623_PIN(44, "NCEB1", 26, DRV_GRP1),
0462     MT7623_PIN(45, "NCEB0", 27, DRV_GRP1),
0463     MT7623_PIN(46, "IR", 28, DRV_FIXED),
0464     MT7623_PIN(47, "NREB", 29, DRV_GRP1),
0465     MT7623_PIN(48, "NRNB", 30, DRV_GRP1),
0466     MT7623_PIN(49, "I2S0_DATA", 31, DRV_GRP1),
0467     MT7623_PIN(50, "I2S2_BCK", 32, DRV_GRP1),
0468     MT7623_PIN(51, "I2S2_DATA_IN", 33, DRV_GRP1),
0469     MT7623_PIN(52, "I2S2_LRCK", 34, DRV_GRP1),
0470     MT7623_PIN(53, "SPI0_CSN", 35, DRV_GRP1),
0471     MT7623_PIN(54, "SPI0_CK", 36, DRV_GRP1),
0472     MT7623_PIN(55, "SPI0_MI", 37, DRV_GRP1),
0473     MT7623_PIN(56, "SPI0_MO", 38, DRV_GRP1),
0474     MT7623_PIN(57, "SDA1", 39, DRV_FIXED),
0475     MT7623_PIN(58, "SCL1", 40, DRV_FIXED),
0476     MT7623_PIN(59, "RAMBUF_I_CLK", EINT_NA, DRV_FIXED),
0477     MT7623_PIN(60, "WB_RSTB", 41, DRV_GRP3),
0478     MT7623_PIN(61, "F2W_DATA", 42, DRV_GRP3),
0479     MT7623_PIN(62, "F2W_CLK", 43, DRV_GRP3),
0480     MT7623_PIN(63, "WB_SCLK", 44, DRV_GRP3),
0481     MT7623_PIN(64, "WB_SDATA", 45, DRV_GRP3),
0482     MT7623_PIN(65, "WB_SEN", 46, DRV_GRP3),
0483     MT7623_PIN(66, "WB_CRTL0", 47, DRV_GRP3),
0484     MT7623_PIN(67, "WB_CRTL1", 48, DRV_GRP3),
0485     MT7623_PIN(68, "WB_CRTL2", 49, DRV_GRP3),
0486     MT7623_PIN(69, "WB_CRTL3", 50, DRV_GRP3),
0487     MT7623_PIN(70, "WB_CRTL4", 51, DRV_GRP3),
0488     MT7623_PIN(71, "WB_CRTL5", 52, DRV_GRP3),
0489     MT7623_PIN(72, "I2S0_DATA_IN", 53, DRV_GRP1),
0490     MT7623_PIN(73, "I2S0_LRCK", 54, DRV_GRP1),
0491     MT7623_PIN(74, "I2S0_BCK", 55, DRV_GRP1),
0492     MT7623_PIN(75, "SDA0", 56, DRV_FIXED),
0493     MT7623_PIN(76, "SCL0", 57, DRV_FIXED),
0494     MT7623_PIN(77, "SDA2", 58, DRV_FIXED),
0495     MT7623_PIN(78, "SCL2", 59, DRV_FIXED),
0496     MT7623_PIN(79, "URXD0", 60, DRV_FIXED),
0497     MT7623_PIN(80, "UTXD0", 61, DRV_FIXED),
0498     MT7623_PIN(81, "URXD1", 62, DRV_FIXED),
0499     MT7623_PIN(82, "UTXD1", 63, DRV_FIXED),
0500     MT7623_PIN(83, "LCM_RST", 64, DRV_FIXED),
0501     MT7623_PIN(84, "DSI_TE", 65, DRV_FIXED),
0502     MT7623_PIN(85, "MSDC2_CMD", 66, DRV_GRP4),
0503     MT7623_PIN(86, "MSDC2_CLK", 67, DRV_GRP4),
0504     MT7623_PIN(87, "MSDC2_DAT0", 68, DRV_GRP4),
0505     MT7623_PIN(88, "MSDC2_DAT1", 69, DRV_GRP4),
0506     MT7623_PIN(89, "MSDC2_DAT2", 70, DRV_GRP4),
0507     MT7623_PIN(90, "MSDC2_DAT3", 71, DRV_GRP4),
0508     MT7623_PIN(91, "TDN3", EINT_NA, DRV_FIXED),
0509     MT7623_PIN(92, "TDP3", EINT_NA, DRV_FIXED),
0510     MT7623_PIN(93, "TDN2", EINT_NA, DRV_FIXED),
0511     MT7623_PIN(94, "TDP2", EINT_NA, DRV_FIXED),
0512     MT7623_PIN(95, "TCN", EINT_NA, DRV_FIXED),
0513     MT7623_PIN(96, "TCP", EINT_NA, DRV_FIXED),
0514     MT7623_PIN(97, "TDN1", EINT_NA, DRV_FIXED),
0515     MT7623_PIN(98, "TDP1", EINT_NA, DRV_FIXED),
0516     MT7623_PIN(99, "TDN0", EINT_NA, DRV_FIXED),
0517     MT7623_PIN(100, "TDP0", EINT_NA, DRV_FIXED),
0518     MT7623_PIN(101, "SPI2_CSN", 74, DRV_FIXED),
0519     MT7623_PIN(102, "SPI2_MI", 75, DRV_FIXED),
0520     MT7623_PIN(103, "SPI2_MO", 76, DRV_FIXED),
0521     MT7623_PIN(104, "SPI2_CLK", 77, DRV_FIXED),
0522     MT7623_PIN(105, "MSDC1_CMD", 78, DRV_GRP4),
0523     MT7623_PIN(106, "MSDC1_CLK", 79, DRV_GRP4),
0524     MT7623_PIN(107, "MSDC1_DAT0", 80, DRV_GRP4),
0525     MT7623_PIN(108, "MSDC1_DAT1", 81, DRV_GRP4),
0526     MT7623_PIN(109, "MSDC1_DAT2", 82, DRV_GRP4),
0527     MT7623_PIN(110, "MSDC1_DAT3", 83, DRV_GRP4),
0528     MT7623_PIN(111, "MSDC0_DAT7", 84, DRV_GRP4),
0529     MT7623_PIN(112, "MSDC0_DAT6", 85, DRV_GRP4),
0530     MT7623_PIN(113, "MSDC0_DAT5", 86, DRV_GRP4),
0531     MT7623_PIN(114, "MSDC0_DAT4", 87, DRV_GRP4),
0532     MT7623_PIN(115, "MSDC0_RSTB", 88, DRV_GRP4),
0533     MT7623_PIN(116, "MSDC0_CMD", 89, DRV_GRP4),
0534     MT7623_PIN(117, "MSDC0_CLK", 90, DRV_GRP4),
0535     MT7623_PIN(118, "MSDC0_DAT3", 91, DRV_GRP4),
0536     MT7623_PIN(119, "MSDC0_DAT2", 92, DRV_GRP4),
0537     MT7623_PIN(120, "MSDC0_DAT1", 93, DRV_GRP4),
0538     MT7623_PIN(121, "MSDC0_DAT0", 94, DRV_GRP4),
0539     MT7623_PIN(122, "CEC", 95, DRV_FIXED),
0540     MT7623_PIN(123, "HTPLG", 96, DRV_FIXED),
0541     MT7623_PIN(124, "HDMISCK", 97, DRV_FIXED),
0542     MT7623_PIN(125, "HDMISD", 98, DRV_FIXED),
0543     MT7623_PIN(126, "I2S0_MCLK", 99, DRV_GRP1),
0544     MT7623_PIN(127, "RAMBUF_IDATA0", EINT_NA, DRV_FIXED),
0545     MT7623_PIN(128, "RAMBUF_IDATA1", EINT_NA, DRV_FIXED),
0546     MT7623_PIN(129, "RAMBUF_IDATA2", EINT_NA, DRV_FIXED),
0547     MT7623_PIN(130, "RAMBUF_IDATA3", EINT_NA, DRV_FIXED),
0548     MT7623_PIN(131, "RAMBUF_IDATA4", EINT_NA, DRV_FIXED),
0549     MT7623_PIN(132, "RAMBUF_IDATA5", EINT_NA, DRV_FIXED),
0550     MT7623_PIN(133, "RAMBUF_IDATA6", EINT_NA, DRV_FIXED),
0551     MT7623_PIN(134, "RAMBUF_IDATA7", EINT_NA, DRV_FIXED),
0552     MT7623_PIN(135, "RAMBUF_IDATA8", EINT_NA, DRV_FIXED),
0553     MT7623_PIN(136, "RAMBUF_IDATA9", EINT_NA, DRV_FIXED),
0554     MT7623_PIN(137, "RAMBUF_IDATA10", EINT_NA, DRV_FIXED),
0555     MT7623_PIN(138, "RAMBUF_IDATA11", EINT_NA, DRV_FIXED),
0556     MT7623_PIN(139, "RAMBUF_IDATA12", EINT_NA, DRV_FIXED),
0557     MT7623_PIN(140, "RAMBUF_IDATA13", EINT_NA, DRV_FIXED),
0558     MT7623_PIN(141, "RAMBUF_IDATA14", EINT_NA, DRV_FIXED),
0559     MT7623_PIN(142, "RAMBUF_IDATA15", EINT_NA, DRV_FIXED),
0560     MT7623_PIN(143, "RAMBUF_ODATA0", EINT_NA, DRV_FIXED),
0561     MT7623_PIN(144, "RAMBUF_ODATA1", EINT_NA, DRV_FIXED),
0562     MT7623_PIN(145, "RAMBUF_ODATA2", EINT_NA, DRV_FIXED),
0563     MT7623_PIN(146, "RAMBUF_ODATA3", EINT_NA, DRV_FIXED),
0564     MT7623_PIN(147, "RAMBUF_ODATA4", EINT_NA, DRV_FIXED),
0565     MT7623_PIN(148, "RAMBUF_ODATA5", EINT_NA, DRV_FIXED),
0566     MT7623_PIN(149, "RAMBUF_ODATA6", EINT_NA, DRV_FIXED),
0567     MT7623_PIN(150, "RAMBUF_ODATA7", EINT_NA, DRV_FIXED),
0568     MT7623_PIN(151, "RAMBUF_ODATA8", EINT_NA, DRV_FIXED),
0569     MT7623_PIN(152, "RAMBUF_ODATA9", EINT_NA, DRV_FIXED),
0570     MT7623_PIN(153, "RAMBUF_ODATA10", EINT_NA, DRV_FIXED),
0571     MT7623_PIN(154, "RAMBUF_ODATA11", EINT_NA, DRV_FIXED),
0572     MT7623_PIN(155, "RAMBUF_ODATA12", EINT_NA, DRV_FIXED),
0573     MT7623_PIN(156, "RAMBUF_ODATA13", EINT_NA, DRV_FIXED),
0574     MT7623_PIN(157, "RAMBUF_ODATA14", EINT_NA, DRV_FIXED),
0575     MT7623_PIN(158, "RAMBUF_ODATA15", EINT_NA, DRV_FIXED),
0576     MT7623_PIN(159, "RAMBUF_BE0", EINT_NA, DRV_FIXED),
0577     MT7623_PIN(160, "RAMBUF_BE1", EINT_NA, DRV_FIXED),
0578     MT7623_PIN(161, "AP2PT_INT", EINT_NA, DRV_FIXED),
0579     MT7623_PIN(162, "AP2PT_INT_CLR", EINT_NA, DRV_FIXED),
0580     MT7623_PIN(163, "PT2AP_INT", EINT_NA, DRV_FIXED),
0581     MT7623_PIN(164, "PT2AP_INT_CLR", EINT_NA, DRV_FIXED),
0582     MT7623_PIN(165, "AP2UP_INT", EINT_NA, DRV_FIXED),
0583     MT7623_PIN(166, "AP2UP_INT_CLR", EINT_NA, DRV_FIXED),
0584     MT7623_PIN(167, "UP2AP_INT", EINT_NA, DRV_FIXED),
0585     MT7623_PIN(168, "UP2AP_INT_CLR", EINT_NA, DRV_FIXED),
0586     MT7623_PIN(169, "RAMBUF_ADDR0", EINT_NA, DRV_FIXED),
0587     MT7623_PIN(170, "RAMBUF_ADDR1", EINT_NA, DRV_FIXED),
0588     MT7623_PIN(171, "RAMBUF_ADDR2", EINT_NA, DRV_FIXED),
0589     MT7623_PIN(172, "RAMBUF_ADDR3", EINT_NA, DRV_FIXED),
0590     MT7623_PIN(173, "RAMBUF_ADDR4", EINT_NA, DRV_FIXED),
0591     MT7623_PIN(174, "RAMBUF_ADDR5", EINT_NA, DRV_FIXED),
0592     MT7623_PIN(175, "RAMBUF_ADDR6", EINT_NA, DRV_FIXED),
0593     MT7623_PIN(176, "RAMBUF_ADDR7", EINT_NA, DRV_FIXED),
0594     MT7623_PIN(177, "RAMBUF_ADDR8", EINT_NA, DRV_FIXED),
0595     MT7623_PIN(178, "RAMBUF_ADDR9", EINT_NA, DRV_FIXED),
0596     MT7623_PIN(179, "RAMBUF_ADDR10", EINT_NA, DRV_FIXED),
0597     MT7623_PIN(180, "RAMBUF_RW", EINT_NA, DRV_FIXED),
0598     MT7623_PIN(181, "RAMBUF_LAST", EINT_NA, DRV_FIXED),
0599     MT7623_PIN(182, "RAMBUF_HP", EINT_NA, DRV_FIXED),
0600     MT7623_PIN(183, "RAMBUF_REQ", EINT_NA, DRV_FIXED),
0601     MT7623_PIN(184, "RAMBUF_ALE", EINT_NA, DRV_FIXED),
0602     MT7623_PIN(185, "RAMBUF_DLE", EINT_NA, DRV_FIXED),
0603     MT7623_PIN(186, "RAMBUF_WDLE", EINT_NA, DRV_FIXED),
0604     MT7623_PIN(187, "RAMBUF_O_CLK", EINT_NA, DRV_FIXED),
0605     MT7623_PIN(188, "I2S2_MCLK", 100, DRV_GRP1),
0606     MT7623_PIN(189, "I2S3_DATA", 101, DRV_GRP1),
0607     MT7623_PIN(190, "I2S3_DATA_IN", 102, DRV_GRP1),
0608     MT7623_PIN(191, "I2S3_BCK", 103, DRV_GRP1),
0609     MT7623_PIN(192, "I2S3_LRCK", 104, DRV_GRP1),
0610     MT7623_PIN(193, "I2S3_MCLK", 105, DRV_GRP1),
0611     MT7623_PIN(194, "I2S4_DATA", 106, DRV_GRP1),
0612     MT7623_PIN(195, "I2S4_DATA_IN", 107, DRV_GRP1),
0613     MT7623_PIN(196, "I2S4_BCK", 108, DRV_GRP1),
0614     MT7623_PIN(197, "I2S4_LRCK", 109, DRV_GRP1),
0615     MT7623_PIN(198, "I2S4_MCLK", 110, DRV_GRP1),
0616     MT7623_PIN(199, "SPI1_CLK", 111, DRV_GRP3),
0617     MT7623_PIN(200, "SPDIF_OUT", 112, DRV_GRP1),
0618     MT7623_PIN(201, "SPDIF_IN0", 113, DRV_GRP1),
0619     MT7623_PIN(202, "SPDIF_IN1", 114, DRV_GRP1),
0620     MT7623_PIN(203, "PWM0", 115, DRV_GRP1),
0621     MT7623_PIN(204, "PWM1", 116, DRV_GRP1),
0622     MT7623_PIN(205, "PWM2", 117, DRV_GRP1),
0623     MT7623_PIN(206, "PWM3", 118, DRV_GRP1),
0624     MT7623_PIN(207, "PWM4", 119, DRV_GRP1),
0625     MT7623_PIN(208, "AUD_EXT_CK1", 120, DRV_GRP1),
0626     MT7623_PIN(209, "AUD_EXT_CK2", 121, DRV_GRP1),
0627     MT7623_PIN(210, "AUD_CLOCK", EINT_NA, DRV_GRP3),
0628     MT7623_PIN(211, "DVP_RESET", EINT_NA, DRV_GRP3),
0629     MT7623_PIN(212, "DVP_CLOCK", EINT_NA, DRV_GRP3),
0630     MT7623_PIN(213, "DVP_CS", EINT_NA, DRV_GRP3),
0631     MT7623_PIN(214, "DVP_CK", EINT_NA, DRV_GRP3),
0632     MT7623_PIN(215, "DVP_DI", EINT_NA, DRV_GRP3),
0633     MT7623_PIN(216, "DVP_DO", EINT_NA, DRV_GRP3),
0634     MT7623_PIN(217, "AP_CS", EINT_NA, DRV_GRP3),
0635     MT7623_PIN(218, "AP_CK", EINT_NA, DRV_GRP3),
0636     MT7623_PIN(219, "AP_DI", EINT_NA, DRV_GRP3),
0637     MT7623_PIN(220, "AP_DO", EINT_NA, DRV_GRP3),
0638     MT7623_PIN(221, "DVD_BCLK", EINT_NA, DRV_GRP3),
0639     MT7623_PIN(222, "T8032_CLK", EINT_NA, DRV_GRP3),
0640     MT7623_PIN(223, "AP_BCLK", EINT_NA, DRV_GRP3),
0641     MT7623_PIN(224, "HOST_CS", EINT_NA, DRV_GRP3),
0642     MT7623_PIN(225, "HOST_CK", EINT_NA, DRV_GRP3),
0643     MT7623_PIN(226, "HOST_DO0", EINT_NA, DRV_GRP3),
0644     MT7623_PIN(227, "HOST_DO1", EINT_NA, DRV_GRP3),
0645     MT7623_PIN(228, "SLV_CS", EINT_NA, DRV_GRP3),
0646     MT7623_PIN(229, "SLV_CK", EINT_NA, DRV_GRP3),
0647     MT7623_PIN(230, "SLV_DI0", EINT_NA, DRV_GRP3),
0648     MT7623_PIN(231, "SLV_DI1", EINT_NA, DRV_GRP3),
0649     MT7623_PIN(232, "AP2DSP_INT", EINT_NA, DRV_GRP3),
0650     MT7623_PIN(233, "AP2DSP_INT_CLR", EINT_NA, DRV_GRP3),
0651     MT7623_PIN(234, "DSP2AP_INT", EINT_NA, DRV_GRP3),
0652     MT7623_PIN(235, "DSP2AP_INT_CLR", EINT_NA, DRV_GRP3),
0653     MT7623_PIN(236, "EXT_SDIO3", 122, DRV_GRP1),
0654     MT7623_PIN(237, "EXT_SDIO2", 123, DRV_GRP1),
0655     MT7623_PIN(238, "EXT_SDIO1", 124, DRV_GRP1),
0656     MT7623_PIN(239, "EXT_SDIO0", 125, DRV_GRP1),
0657     MT7623_PIN(240, "EXT_XCS", 126, DRV_GRP1),
0658     MT7623_PIN(241, "EXT_SCK", 127, DRV_GRP1),
0659     MT7623_PIN(242, "URTS2", 128, DRV_GRP1),
0660     MT7623_PIN(243, "UCTS2", 129, DRV_GRP1),
0661     MT7623_PIN(244, "HDMI_SDA_RX", 130, DRV_FIXED),
0662     MT7623_PIN(245, "HDMI_SCL_RX", 131, DRV_FIXED),
0663     MT7623_PIN(246, "MHL_SENCE", 132, DRV_FIXED),
0664     MT7623_PIN(247, "HDMI_HPD_CBUS_RX", 69, DRV_FIXED),
0665     MT7623_PIN(248, "HDMI_TESTOUTP_RX", 133, DRV_GRP1),
0666     MT7623_PIN(249, "MSDC0E_RSTB", 134, DRV_GRP4),
0667     MT7623_PIN(250, "MSDC0E_DAT7", 135, DRV_GRP4),
0668     MT7623_PIN(251, "MSDC0E_DAT6", 136, DRV_GRP4),
0669     MT7623_PIN(252, "MSDC0E_DAT5", 137, DRV_GRP4),
0670     MT7623_PIN(253, "MSDC0E_DAT4", 138, DRV_GRP4),
0671     MT7623_PIN(254, "MSDC0E_DAT3", 139, DRV_GRP4),
0672     MT7623_PIN(255, "MSDC0E_DAT2", 140, DRV_GRP4),
0673     MT7623_PIN(256, "MSDC0E_DAT1", 141, DRV_GRP4),
0674     MT7623_PIN(257, "MSDC0E_DAT0", 142, DRV_GRP4),
0675     MT7623_PIN(258, "MSDC0E_CMD", 143, DRV_GRP4),
0676     MT7623_PIN(259, "MSDC0E_CLK", 144, DRV_GRP4),
0677     MT7623_PIN(260, "MSDC0E_DSL", 145, DRV_GRP4),
0678     MT7623_PIN(261, "MSDC1_INS", 146, DRV_GRP4),
0679     MT7623_PIN(262, "G2_TXEN", 8, DRV_GRP1),
0680     MT7623_PIN(263, "G2_TXD3", 9, DRV_GRP1),
0681     MT7623_PIN(264, "G2_TXD2", 10, DRV_GRP1),
0682     MT7623_PIN(265, "G2_TXD1", 11, DRV_GRP1),
0683     MT7623_PIN(266, "G2_TXD0", EINT_NA, DRV_GRP1),
0684     MT7623_PIN(267, "G2_TXC", EINT_NA, DRV_GRP1),
0685     MT7623_PIN(268, "G2_RXC", EINT_NA, DRV_GRP1),
0686     MT7623_PIN(269, "G2_RXD0", EINT_NA, DRV_GRP1),
0687     MT7623_PIN(270, "G2_RXD1", EINT_NA, DRV_GRP1),
0688     MT7623_PIN(271, "G2_RXD2", EINT_NA, DRV_GRP1),
0689     MT7623_PIN(272, "G2_RXD3", EINT_NA, DRV_GRP1),
0690     MT7623_PIN(273, "ESW_INT", 168, DRV_GRP1),
0691     MT7623_PIN(274, "G2_RXDV", EINT_NA, DRV_GRP1),
0692     MT7623_PIN(275, "MDC", EINT_NA, DRV_GRP1),
0693     MT7623_PIN(276, "MDIO", EINT_NA, DRV_GRP1),
0694     MT7623_PIN(277, "ESW_RST", EINT_NA, DRV_GRP1),
0695     MT7623_PIN(278, "JTAG_RESET", 147, DRV_GRP3),
0696     MT7623_PIN(279, "USB3_RES_BOND", EINT_NA, DRV_GRP1),
0697 };
0698 
0699 /* List all groups consisting of these pins dedicated to the enablement of
0700  * certain hardware block and the corresponding mode for all of the pins.
0701  * The hardware probably has multiple combinations of these pinouts.
0702  */
0703 
0704 /* AUDIO EXT CLK */
0705 static int mt7623_aud_ext_clk0_pins[] = { 208, };
0706 static int mt7623_aud_ext_clk0_funcs[] = { 1, };
0707 static int mt7623_aud_ext_clk1_pins[] = { 209, };
0708 static int mt7623_aud_ext_clk1_funcs[] = { 1, };
0709 
0710 /* DISP PWM */
0711 static int mt7623_disp_pwm_0_pins[] = { 72, };
0712 static int mt7623_disp_pwm_0_funcs[] = { 5, };
0713 static int mt7623_disp_pwm_1_pins[] = { 203, };
0714 static int mt7623_disp_pwm_1_funcs[] = { 2, };
0715 static int mt7623_disp_pwm_2_pins[] = { 208, };
0716 static int mt7623_disp_pwm_2_funcs[] = { 5, };
0717 
0718 /* ESW */
0719 static int mt7623_esw_int_pins[] = { 273, };
0720 static int mt7623_esw_int_funcs[] = { 1, };
0721 static int mt7623_esw_rst_pins[] = { 277, };
0722 static int mt7623_esw_rst_funcs[] = { 1, };
0723 
0724 /* EPHY */
0725 static int mt7623_ephy_pins[] = { 262, 263, 264, 265, 266, 267, 268,
0726                   269, 270, 271, 272, 274, };
0727 static int mt7623_ephy_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
0728 
0729 /* EXT_SDIO */
0730 static int mt7623_ext_sdio_pins[] = { 236, 237, 238, 239, 240, 241, };
0731 static int mt7623_ext_sdio_funcs[] = { 1, 1, 1, 1, 1, 1, };
0732 
0733 /* HDMI RX */
0734 static int mt7623_hdmi_rx_pins[] = { 247, 248, };
0735 static int mt7623_hdmi_rx_funcs[] = { 1, 1 };
0736 static int mt7623_hdmi_rx_i2c_pins[] = { 244, 245, };
0737 static int mt7623_hdmi_rx_i2c_funcs[] = { 1, 1 };
0738 
0739 /* HDMI TX */
0740 static int mt7623_hdmi_cec_pins[] = { 122, };
0741 static int mt7623_hdmi_cec_funcs[] = { 1, };
0742 static int mt7623_hdmi_htplg_pins[] = { 123, };
0743 static int mt7623_hdmi_htplg_funcs[] = { 1, };
0744 static int mt7623_hdmi_i2c_pins[] = { 124, 125, };
0745 static int mt7623_hdmi_i2c_funcs[] = { 1, 1 };
0746 
0747 /* I2C */
0748 static int mt7623_i2c0_pins[] = { 75, 76, };
0749 static int mt7623_i2c0_funcs[] = { 1, 1, };
0750 static int mt7623_i2c1_0_pins[] = { 57, 58, };
0751 static int mt7623_i2c1_0_funcs[] = { 1, 1, };
0752 static int mt7623_i2c1_1_pins[] = { 242, 243, };
0753 static int mt7623_i2c1_1_funcs[] = { 4, 4, };
0754 static int mt7623_i2c1_2_pins[] = { 85, 86, };
0755 static int mt7623_i2c1_2_funcs[] = { 3, 3, };
0756 static int mt7623_i2c1_3_pins[] = { 105, 106, };
0757 static int mt7623_i2c1_3_funcs[] = { 3, 3, };
0758 static int mt7623_i2c1_4_pins[] = { 124, 125, };
0759 static int mt7623_i2c1_4_funcs[] = { 4, 4, };
0760 static int mt7623_i2c2_0_pins[] = { 77, 78, };
0761 static int mt7623_i2c2_0_funcs[] = { 1, 1, };
0762 static int mt7623_i2c2_1_pins[] = { 89, 90, };
0763 static int mt7623_i2c2_1_funcs[] = { 3, 3, };
0764 static int mt7623_i2c2_2_pins[] = { 109, 110, };
0765 static int mt7623_i2c2_2_funcs[] = { 3, 3, };
0766 static int mt7623_i2c2_3_pins[] = { 122, 123, };
0767 static int mt7623_i2c2_3_funcs[] = { 4, 4, };
0768 
0769 /* I2S */
0770 static int mt7623_i2s0_pins[] = { 49, 72, 73, 74, 126, };
0771 static int mt7623_i2s0_funcs[] = { 1, 1, 1, 1, 1, };
0772 static int mt7623_i2s1_pins[] = { 33, 34, 35, 36, 37, };
0773 static int mt7623_i2s1_funcs[] = { 1, 1, 1, 1, 1, };
0774 static int mt7623_i2s2_bclk_lrclk_mclk_pins[] = { 50, 52, 188, };
0775 static int mt7623_i2s2_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, };
0776 static int mt7623_i2s2_data_in_pins[] = { 51, };
0777 static int mt7623_i2s2_data_in_funcs[] = { 1, };
0778 static int mt7623_i2s2_data_0_pins[] = { 203, };
0779 static int mt7623_i2s2_data_0_funcs[] = { 9, };
0780 static int mt7623_i2s2_data_1_pins[] = { 38,  };
0781 static int mt7623_i2s2_data_1_funcs[] = { 4, };
0782 static int mt7623_i2s3_bclk_lrclk_mclk_pins[] = { 191, 192, 193, };
0783 static int mt7623_i2s3_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, };
0784 static int mt7623_i2s3_data_in_pins[] = { 190, };
0785 static int mt7623_i2s3_data_in_funcs[] = { 1, };
0786 static int mt7623_i2s3_data_0_pins[] = { 204, };
0787 static int mt7623_i2s3_data_0_funcs[] = { 9, };
0788 static int mt7623_i2s3_data_1_pins[] = { 2, };
0789 static int mt7623_i2s3_data_1_funcs[] = { 0, };
0790 static int mt7623_i2s4_pins[] = { 194, 195, 196, 197, 198, };
0791 static int mt7623_i2s4_funcs[] = { 1, 1, 1, 1, 1, };
0792 static int mt7623_i2s5_pins[] = { 16, 17, 30, 31, 32, };
0793 static int mt7623_i2s5_funcs[] = { 1, 1, 1, 1, 1, };
0794 
0795 /* IR */
0796 static int mt7623_ir_pins[] = { 46, };
0797 static int mt7623_ir_funcs[] = { 1, };
0798 
0799 /* LCD */
0800 static int mt7623_mipi_tx_pins[] = { 91, 92, 93, 94, 95, 96, 97, 98,
0801                      99, 100, };
0802 static int mt7623_mipi_tx_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
0803 static int mt7623_dsi_te_pins[] = { 84, };
0804 static int mt7623_dsi_te_funcs[] = { 1, };
0805 static int mt7623_lcm_rst_pins[] = { 83, };
0806 static int mt7623_lcm_rst_funcs[] = { 1, };
0807 
0808 /* MDC/MDIO */
0809 static int mt7623_mdc_mdio_pins[] = { 275, 276, };
0810 static int mt7623_mdc_mdio_funcs[] = { 1, 1, };
0811 
0812 /* MSDC */
0813 static int mt7623_msdc0_pins[] = { 111, 112, 113, 114, 115, 116, 117, 118,
0814                    119, 120, 121, };
0815 static int mt7623_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
0816 static int mt7623_msdc1_pins[] = { 105, 106, 107, 108, 109, 110, };
0817 static int mt7623_msdc1_funcs[] = { 1, 1, 1, 1, 1, 1, };
0818 static int mt7623_msdc1_ins_pins[] = { 261, };
0819 static int mt7623_msdc1_ins_funcs[] = { 1, };
0820 static int mt7623_msdc1_wp_0_pins[] = { 29, };
0821 static int mt7623_msdc1_wp_0_funcs[] = { 1, };
0822 static int mt7623_msdc1_wp_1_pins[] = { 55, };
0823 static int mt7623_msdc1_wp_1_funcs[] = { 3, };
0824 static int mt7623_msdc1_wp_2_pins[] = { 209, };
0825 static int mt7623_msdc1_wp_2_funcs[] = { 2, };
0826 static int mt7623_msdc2_pins[] = { 85, 86, 87, 88, 89, 90, };
0827 static int mt7623_msdc2_funcs[] = { 1, 1, 1, 1, 1, 1, };
0828 static int mt7623_msdc3_pins[] = { 249, 250, 251, 252, 253, 254, 255, 256,
0829                    257, 258, 259, 260, };
0830 static int mt7623_msdc3_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
0831 
0832 /* NAND */
0833 static int mt7623_nandc_pins[] = { 43, 47, 48, 111, 112, 113, 114, 115,
0834                    116, 117, 118, 119, 120, 121, };
0835 static int mt7623_nandc_funcs[] = { 1, 1, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4,
0836                    4, 4, };
0837 static int mt7623_nandc_ceb0_pins[] = { 45, };
0838 static int mt7623_nandc_ceb0_funcs[] = { 1, };
0839 static int mt7623_nandc_ceb1_pins[] = { 44, };
0840 static int mt7623_nandc_ceb1_funcs[] = { 1, };
0841 
0842 /* RTC */
0843 static int mt7623_rtc_pins[] = { 10, };
0844 static int mt7623_rtc_funcs[] = { 1, };
0845 
0846 /* OTG */
0847 static int mt7623_otg_iddig0_0_pins[] = { 29, };
0848 static int mt7623_otg_iddig0_0_funcs[] = { 1, };
0849 static int mt7623_otg_iddig0_1_pins[] = { 44, };
0850 static int mt7623_otg_iddig0_1_funcs[] = { 2, };
0851 static int mt7623_otg_iddig0_2_pins[] = { 236, };
0852 static int mt7623_otg_iddig0_2_funcs[] = { 2, };
0853 static int mt7623_otg_iddig1_0_pins[] = { 27, };
0854 static int mt7623_otg_iddig1_0_funcs[] = { 2, };
0855 static int mt7623_otg_iddig1_1_pins[] = { 47, };
0856 static int mt7623_otg_iddig1_1_funcs[] = { 2, };
0857 static int mt7623_otg_iddig1_2_pins[] = { 238, };
0858 static int mt7623_otg_iddig1_2_funcs[] = { 2, };
0859 static int mt7623_otg_drv_vbus0_0_pins[] = { 28, };
0860 static int mt7623_otg_drv_vbus0_0_funcs[] = { 1, };
0861 static int mt7623_otg_drv_vbus0_1_pins[] = { 45, };
0862 static int mt7623_otg_drv_vbus0_1_funcs[] = { 2, };
0863 static int mt7623_otg_drv_vbus0_2_pins[] = { 237, };
0864 static int mt7623_otg_drv_vbus0_2_funcs[] = { 2, };
0865 static int mt7623_otg_drv_vbus1_0_pins[] = { 26, };
0866 static int mt7623_otg_drv_vbus1_0_funcs[] = { 2, };
0867 static int mt7623_otg_drv_vbus1_1_pins[] = { 48, };
0868 static int mt7623_otg_drv_vbus1_1_funcs[] = { 2, };
0869 static int mt7623_otg_drv_vbus1_2_pins[] = { 239, };
0870 static int mt7623_otg_drv_vbus1_2_funcs[] = { 2, };
0871 
0872 /* PCIE */
0873 static int mt7623_pcie0_0_perst_pins[] = { 208, };
0874 static int mt7623_pcie0_0_perst_funcs[] = { 3, };
0875 static int mt7623_pcie0_1_perst_pins[] = { 22, };
0876 static int mt7623_pcie0_1_perst_funcs[] = { 2, };
0877 static int mt7623_pcie1_0_perst_pins[] = { 209, };
0878 static int mt7623_pcie1_0_perst_funcs[] = { 3, };
0879 static int mt7623_pcie1_1_perst_pins[] = { 23, };
0880 static int mt7623_pcie1_1_perst_funcs[] = { 2, };
0881 static int mt7623_pcie2_0_perst_pins[] = { 24, };
0882 static int mt7623_pcie2_0_perst_funcs[] = { 2, };
0883 static int mt7623_pcie2_1_perst_pins[] = { 29, };
0884 static int mt7623_pcie2_1_perst_funcs[] = { 6, };
0885 static int mt7623_pcie0_0_wake_pins[] = { 28, };
0886 static int mt7623_pcie0_0_wake_funcs[] = { 6, };
0887 static int mt7623_pcie0_1_wake_pins[] = { 251, };
0888 static int mt7623_pcie0_1_wake_funcs[] = { 6, };
0889 static int mt7623_pcie1_0_wake_pins[] = { 27, };
0890 static int mt7623_pcie1_0_wake_funcs[] = { 6, };
0891 static int mt7623_pcie1_1_wake_pins[] = { 253, };
0892 static int mt7623_pcie1_1_wake_funcs[] = { 6, };
0893 static int mt7623_pcie2_0_wake_pins[] = { 26, };
0894 static int mt7623_pcie2_0_wake_funcs[] = { 6, };
0895 static int mt7623_pcie2_1_wake_pins[] = { 255, };
0896 static int mt7623_pcie2_1_wake_funcs[] = { 6, };
0897 static int mt7623_pcie0_clkreq_pins[] = { 250, };
0898 static int mt7623_pcie0_clkreq_funcs[] = { 6, };
0899 static int mt7623_pcie1_clkreq_pins[] = { 252, };
0900 static int mt7623_pcie1_clkreq_funcs[] = { 6, };
0901 static int mt7623_pcie2_clkreq_pins[] = { 254, };
0902 static int mt7623_pcie2_clkreq_funcs[] = { 6, };
0903 
0904 /* the pcie_*_rev are only used for MT7623 */
0905 static int mt7623_pcie0_0_rev_perst_pins[] = { 208, };
0906 static int mt7623_pcie0_0_rev_perst_funcs[] = { 11, };
0907 static int mt7623_pcie0_1_rev_perst_pins[] = { 22, };
0908 static int mt7623_pcie0_1_rev_perst_funcs[] = { 10, };
0909 static int mt7623_pcie1_0_rev_perst_pins[] = { 209, };
0910 static int mt7623_pcie1_0_rev_perst_funcs[] = { 11, };
0911 static int mt7623_pcie1_1_rev_perst_pins[] = { 23, };
0912 static int mt7623_pcie1_1_rev_perst_funcs[] = { 10, };
0913 static int mt7623_pcie2_0_rev_perst_pins[] = { 24, };
0914 static int mt7623_pcie2_0_rev_perst_funcs[] = { 11, };
0915 static int mt7623_pcie2_1_rev_perst_pins[] = { 29, };
0916 static int mt7623_pcie2_1_rev_perst_funcs[] = { 14, };
0917 
0918 /* PCM */
0919 static int mt7623_pcm_clk_0_pins[] = { 18, };
0920 static int mt7623_pcm_clk_0_funcs[] = { 1, };
0921 static int mt7623_pcm_clk_1_pins[] = { 17, };
0922 static int mt7623_pcm_clk_1_funcs[] = { 3, };
0923 static int mt7623_pcm_clk_2_pins[] = { 35, };
0924 static int mt7623_pcm_clk_2_funcs[] = { 3, };
0925 static int mt7623_pcm_clk_3_pins[] = { 50, };
0926 static int mt7623_pcm_clk_3_funcs[] = { 3, };
0927 static int mt7623_pcm_clk_4_pins[] = { 74, };
0928 static int mt7623_pcm_clk_4_funcs[] = { 3, };
0929 static int mt7623_pcm_clk_5_pins[] = { 191, };
0930 static int mt7623_pcm_clk_5_funcs[] = { 3, };
0931 static int mt7623_pcm_clk_6_pins[] = { 196, };
0932 static int mt7623_pcm_clk_6_funcs[] = { 3, };
0933 static int mt7623_pcm_sync_0_pins[] = { 19, };
0934 static int mt7623_pcm_sync_0_funcs[] = { 1, };
0935 static int mt7623_pcm_sync_1_pins[] = { 30, };
0936 static int mt7623_pcm_sync_1_funcs[] = { 3, };
0937 static int mt7623_pcm_sync_2_pins[] = { 36, };
0938 static int mt7623_pcm_sync_2_funcs[] = { 3, };
0939 static int mt7623_pcm_sync_3_pins[] = { 52, };
0940 static int mt7623_pcm_sync_3_funcs[] = { 31, };
0941 static int mt7623_pcm_sync_4_pins[] = { 73, };
0942 static int mt7623_pcm_sync_4_funcs[] = { 3, };
0943 static int mt7623_pcm_sync_5_pins[] = { 192, };
0944 static int mt7623_pcm_sync_5_funcs[] = { 3, };
0945 static int mt7623_pcm_sync_6_pins[] = { 197, };
0946 static int mt7623_pcm_sync_6_funcs[] = { 3, };
0947 static int mt7623_pcm_rx_0_pins[] = { 20, };
0948 static int mt7623_pcm_rx_0_funcs[] = { 1, };
0949 static int mt7623_pcm_rx_1_pins[] = { 16, };
0950 static int mt7623_pcm_rx_1_funcs[] = { 3, };
0951 static int mt7623_pcm_rx_2_pins[] = { 34, };
0952 static int mt7623_pcm_rx_2_funcs[] = { 3, };
0953 static int mt7623_pcm_rx_3_pins[] = { 51, };
0954 static int mt7623_pcm_rx_3_funcs[] = { 3, };
0955 static int mt7623_pcm_rx_4_pins[] = { 72, };
0956 static int mt7623_pcm_rx_4_funcs[] = { 3, };
0957 static int mt7623_pcm_rx_5_pins[] = { 190, };
0958 static int mt7623_pcm_rx_5_funcs[] = { 3, };
0959 static int mt7623_pcm_rx_6_pins[] = { 195, };
0960 static int mt7623_pcm_rx_6_funcs[] = { 3, };
0961 static int mt7623_pcm_tx_0_pins[] = { 21, };
0962 static int mt7623_pcm_tx_0_funcs[] = { 1, };
0963 static int mt7623_pcm_tx_1_pins[] = { 32, };
0964 static int mt7623_pcm_tx_1_funcs[] = { 3, };
0965 static int mt7623_pcm_tx_2_pins[] = { 33, };
0966 static int mt7623_pcm_tx_2_funcs[] = { 3, };
0967 static int mt7623_pcm_tx_3_pins[] = { 38, };
0968 static int mt7623_pcm_tx_3_funcs[] = { 3, };
0969 static int mt7623_pcm_tx_4_pins[] = { 49, };
0970 static int mt7623_pcm_tx_4_funcs[] = { 3, };
0971 static int mt7623_pcm_tx_5_pins[] = { 189, };
0972 static int mt7623_pcm_tx_5_funcs[] = { 3, };
0973 static int mt7623_pcm_tx_6_pins[] = { 194, };
0974 static int mt7623_pcm_tx_6_funcs[] = { 3, };
0975 
0976 /* PWM */
0977 static int mt7623_pwm_ch1_0_pins[] = { 203, };
0978 static int mt7623_pwm_ch1_0_funcs[] = { 1, };
0979 static int mt7623_pwm_ch1_1_pins[] = { 208, };
0980 static int mt7623_pwm_ch1_1_funcs[] = { 2, };
0981 static int mt7623_pwm_ch1_2_pins[] = { 72, };
0982 static int mt7623_pwm_ch1_2_funcs[] = { 4, };
0983 static int mt7623_pwm_ch1_3_pins[] = { 88, };
0984 static int mt7623_pwm_ch1_3_funcs[] = { 3, };
0985 static int mt7623_pwm_ch1_4_pins[] = { 108, };
0986 static int mt7623_pwm_ch1_4_funcs[] = { 3, };
0987 static int mt7623_pwm_ch2_0_pins[] = { 204, };
0988 static int mt7623_pwm_ch2_0_funcs[] = { 1, };
0989 static int mt7623_pwm_ch2_1_pins[] = { 53, };
0990 static int mt7623_pwm_ch2_1_funcs[] = { 5, };
0991 static int mt7623_pwm_ch2_2_pins[] = { 88, };
0992 static int mt7623_pwm_ch2_2_funcs[] = { 6, };
0993 static int mt7623_pwm_ch2_3_pins[] = { 108, };
0994 static int mt7623_pwm_ch2_3_funcs[] = { 6, };
0995 static int mt7623_pwm_ch2_4_pins[] = { 209, };
0996 static int mt7623_pwm_ch2_4_funcs[] = { 5, };
0997 static int mt7623_pwm_ch3_0_pins[] = { 205, };
0998 static int mt7623_pwm_ch3_0_funcs[] = { 1, };
0999 static int mt7623_pwm_ch3_1_pins[] = { 55, };
1000 static int mt7623_pwm_ch3_1_funcs[] = { 5, };
1001 static int mt7623_pwm_ch3_2_pins[] = { 89, };
1002 static int mt7623_pwm_ch3_2_funcs[] = { 6, };
1003 static int mt7623_pwm_ch3_3_pins[] = { 109, };
1004 static int mt7623_pwm_ch3_3_funcs[] = { 6, };
1005 static int mt7623_pwm_ch4_0_pins[] = { 206, };
1006 static int mt7623_pwm_ch4_0_funcs[] = { 1, };
1007 static int mt7623_pwm_ch4_1_pins[] = { 90, };
1008 static int mt7623_pwm_ch4_1_funcs[] = { 6, };
1009 static int mt7623_pwm_ch4_2_pins[] = { 110, };
1010 static int mt7623_pwm_ch4_2_funcs[] = { 6, };
1011 static int mt7623_pwm_ch4_3_pins[] = { 124, };
1012 static int mt7623_pwm_ch4_3_funcs[] = { 5, };
1013 static int mt7623_pwm_ch5_0_pins[] = { 207, };
1014 static int mt7623_pwm_ch5_0_funcs[] = { 1, };
1015 static int mt7623_pwm_ch5_1_pins[] = { 125, };
1016 static int mt7623_pwm_ch5_1_funcs[] = { 5, };
1017 
1018 /* PWRAP */
1019 static int mt7623_pwrap_pins[] = { 0, 1, 2, 3, 4, 5, 6, };
1020 static int mt7623_pwrap_funcs[] = { 1, 1, 1, 1, 1, 1, 1, };
1021 
1022 /* SPDIF */
1023 static int mt7623_spdif_in0_0_pins[] = { 56, };
1024 static int mt7623_spdif_in0_0_funcs[] = { 3, };
1025 static int mt7623_spdif_in0_1_pins[] = { 201, };
1026 static int mt7623_spdif_in0_1_funcs[] = { 1, };
1027 static int mt7623_spdif_in1_0_pins[] = { 54, };
1028 static int mt7623_spdif_in1_0_funcs[] = { 3, };
1029 static int mt7623_spdif_in1_1_pins[] = { 202, };
1030 static int mt7623_spdif_in1_1_funcs[] = { 1, };
1031 static int mt7623_spdif_out_pins[] = { 202, };
1032 static int mt7623_spdif_out_funcs[] = { 1, };
1033 
1034 /* SPI */
1035 static int mt7623_spi0_pins[] = { 53, 54, 55, 56, };
1036 static int mt7623_spi0_funcs[] = { 1, 1, 1, 1, };
1037 static int mt7623_spi1_pins[] = { 7, 199, 8, 9, };
1038 static int mt7623_spi1_funcs[] = { 1, 1, 1, 1, };
1039 static int mt7623_spi2_pins[] = { 101, 104, 102, 103, };
1040 static int mt7623_spi2_funcs[] = { 1, 1, 1, 1, };
1041 
1042 /* UART */
1043 static int mt7623_uart0_0_txd_rxd_pins[] = { 79, 80, };
1044 static int mt7623_uart0_0_txd_rxd_funcs[] = { 1, 1, };
1045 static int mt7623_uart0_1_txd_rxd_pins[] = { 87, 88, };
1046 static int mt7623_uart0_1_txd_rxd_funcs[] = { 5, 5, };
1047 static int mt7623_uart0_2_txd_rxd_pins[] = { 107, 108, };
1048 static int mt7623_uart0_2_txd_rxd_funcs[] = { 5, 5, };
1049 static int mt7623_uart0_3_txd_rxd_pins[] = { 123, 122, };
1050 static int mt7623_uart0_3_txd_rxd_funcs[] = { 5, 5, };
1051 static int mt7623_uart0_rts_cts_pins[] = { 22, 23, };
1052 static int mt7623_uart0_rts_cts_funcs[] = { 1, 1, };
1053 static int mt7623_uart1_0_txd_rxd_pins[] = { 81, 82, };
1054 static int mt7623_uart1_0_txd_rxd_funcs[] = { 1, 1, };
1055 static int mt7623_uart1_1_txd_rxd_pins[] = { 89, 90, };
1056 static int mt7623_uart1_1_txd_rxd_funcs[] = { 5, 5, };
1057 static int mt7623_uart1_2_txd_rxd_pins[] = { 109, 110, };
1058 static int mt7623_uart1_2_txd_rxd_funcs[] = { 5, 5, };
1059 static int mt7623_uart1_rts_cts_pins[] = { 24, 25, };
1060 static int mt7623_uart1_rts_cts_funcs[] = { 1, 1, };
1061 static int mt7623_uart2_0_txd_rxd_pins[] = { 14, 15, };
1062 static int mt7623_uart2_0_txd_rxd_funcs[] = { 1, 1, };
1063 static int mt7623_uart2_1_txd_rxd_pins[] = { 200, 201, };
1064 static int mt7623_uart2_1_txd_rxd_funcs[] = { 6, 6, };
1065 static int mt7623_uart2_rts_cts_pins[] = { 242, 243, };
1066 static int mt7623_uart2_rts_cts_funcs[] = { 1, 1, };
1067 static int mt7623_uart3_txd_rxd_pins[] = { 242, 243, };
1068 static int mt7623_uart3_txd_rxd_funcs[] = { 2, 2, };
1069 static int mt7623_uart3_rts_cts_pins[] = { 26, 27, };
1070 static int mt7623_uart3_rts_cts_funcs[] = { 1, 1, };
1071 
1072 /* Watchdog */
1073 static int mt7623_watchdog_0_pins[] = { 11, };
1074 static int mt7623_watchdog_0_funcs[] = { 1, };
1075 static int mt7623_watchdog_1_pins[] = { 121, };
1076 static int mt7623_watchdog_1_funcs[] = { 5, };
1077 
1078 static const struct group_desc mt7623_groups[] = {
1079     PINCTRL_PIN_GROUP("aud_ext_clk0", mt7623_aud_ext_clk0),
1080     PINCTRL_PIN_GROUP("aud_ext_clk1", mt7623_aud_ext_clk1),
1081     PINCTRL_PIN_GROUP("dsi_te", mt7623_dsi_te),
1082     PINCTRL_PIN_GROUP("disp_pwm_0", mt7623_disp_pwm_0),
1083     PINCTRL_PIN_GROUP("disp_pwm_1", mt7623_disp_pwm_1),
1084     PINCTRL_PIN_GROUP("disp_pwm_2", mt7623_disp_pwm_2),
1085     PINCTRL_PIN_GROUP("ephy", mt7623_ephy),
1086     PINCTRL_PIN_GROUP("esw_int", mt7623_esw_int),
1087     PINCTRL_PIN_GROUP("esw_rst", mt7623_esw_rst),
1088     PINCTRL_PIN_GROUP("ext_sdio", mt7623_ext_sdio),
1089     PINCTRL_PIN_GROUP("hdmi_cec", mt7623_hdmi_cec),
1090     PINCTRL_PIN_GROUP("hdmi_htplg", mt7623_hdmi_htplg),
1091     PINCTRL_PIN_GROUP("hdmi_i2c", mt7623_hdmi_i2c),
1092     PINCTRL_PIN_GROUP("hdmi_rx", mt7623_hdmi_rx),
1093     PINCTRL_PIN_GROUP("hdmi_rx_i2c", mt7623_hdmi_rx_i2c),
1094     PINCTRL_PIN_GROUP("i2c0", mt7623_i2c0),
1095     PINCTRL_PIN_GROUP("i2c1_0", mt7623_i2c1_0),
1096     PINCTRL_PIN_GROUP("i2c1_1", mt7623_i2c1_1),
1097     PINCTRL_PIN_GROUP("i2c1_2", mt7623_i2c1_2),
1098     PINCTRL_PIN_GROUP("i2c1_3", mt7623_i2c1_3),
1099     PINCTRL_PIN_GROUP("i2c1_4", mt7623_i2c1_4),
1100     PINCTRL_PIN_GROUP("i2c2_0", mt7623_i2c2_0),
1101     PINCTRL_PIN_GROUP("i2c2_1", mt7623_i2c2_1),
1102     PINCTRL_PIN_GROUP("i2c2_2", mt7623_i2c2_2),
1103     PINCTRL_PIN_GROUP("i2c2_3", mt7623_i2c2_3),
1104     PINCTRL_PIN_GROUP("i2s0", mt7623_i2s0),
1105     PINCTRL_PIN_GROUP("i2s1", mt7623_i2s1),
1106     PINCTRL_PIN_GROUP("i2s4", mt7623_i2s4),
1107     PINCTRL_PIN_GROUP("i2s5", mt7623_i2s5),
1108     PINCTRL_PIN_GROUP("i2s2_bclk_lrclk_mclk", mt7623_i2s2_bclk_lrclk_mclk),
1109     PINCTRL_PIN_GROUP("i2s3_bclk_lrclk_mclk", mt7623_i2s3_bclk_lrclk_mclk),
1110     PINCTRL_PIN_GROUP("i2s2_data_in", mt7623_i2s2_data_in),
1111     PINCTRL_PIN_GROUP("i2s3_data_in", mt7623_i2s3_data_in),
1112     PINCTRL_PIN_GROUP("i2s2_data_0", mt7623_i2s2_data_0),
1113     PINCTRL_PIN_GROUP("i2s2_data_1", mt7623_i2s2_data_1),
1114     PINCTRL_PIN_GROUP("i2s3_data_0", mt7623_i2s3_data_0),
1115     PINCTRL_PIN_GROUP("i2s3_data_1", mt7623_i2s3_data_1),
1116     PINCTRL_PIN_GROUP("ir", mt7623_ir),
1117     PINCTRL_PIN_GROUP("lcm_rst", mt7623_lcm_rst),
1118     PINCTRL_PIN_GROUP("mdc_mdio", mt7623_mdc_mdio),
1119     PINCTRL_PIN_GROUP("mipi_tx", mt7623_mipi_tx),
1120     PINCTRL_PIN_GROUP("msdc0", mt7623_msdc0),
1121     PINCTRL_PIN_GROUP("msdc1", mt7623_msdc1),
1122     PINCTRL_PIN_GROUP("msdc1_ins", mt7623_msdc1_ins),
1123     PINCTRL_PIN_GROUP("msdc1_wp_0", mt7623_msdc1_wp_0),
1124     PINCTRL_PIN_GROUP("msdc1_wp_1", mt7623_msdc1_wp_1),
1125     PINCTRL_PIN_GROUP("msdc1_wp_2", mt7623_msdc1_wp_2),
1126     PINCTRL_PIN_GROUP("msdc2", mt7623_msdc2),
1127     PINCTRL_PIN_GROUP("msdc3", mt7623_msdc3),
1128     PINCTRL_PIN_GROUP("nandc", mt7623_nandc),
1129     PINCTRL_PIN_GROUP("nandc_ceb0", mt7623_nandc_ceb0),
1130     PINCTRL_PIN_GROUP("nandc_ceb1", mt7623_nandc_ceb1),
1131     PINCTRL_PIN_GROUP("otg_iddig0_0", mt7623_otg_iddig0_0),
1132     PINCTRL_PIN_GROUP("otg_iddig0_1", mt7623_otg_iddig0_1),
1133     PINCTRL_PIN_GROUP("otg_iddig0_2", mt7623_otg_iddig0_2),
1134     PINCTRL_PIN_GROUP("otg_iddig1_0", mt7623_otg_iddig1_0),
1135     PINCTRL_PIN_GROUP("otg_iddig1_1", mt7623_otg_iddig1_1),
1136     PINCTRL_PIN_GROUP("otg_iddig1_2", mt7623_otg_iddig1_2),
1137     PINCTRL_PIN_GROUP("otg_drv_vbus0_0", mt7623_otg_drv_vbus0_0),
1138     PINCTRL_PIN_GROUP("otg_drv_vbus0_1", mt7623_otg_drv_vbus0_1),
1139     PINCTRL_PIN_GROUP("otg_drv_vbus0_2", mt7623_otg_drv_vbus0_2),
1140     PINCTRL_PIN_GROUP("otg_drv_vbus1_0", mt7623_otg_drv_vbus1_0),
1141     PINCTRL_PIN_GROUP("otg_drv_vbus1_1", mt7623_otg_drv_vbus1_1),
1142     PINCTRL_PIN_GROUP("otg_drv_vbus1_2", mt7623_otg_drv_vbus1_2),
1143     PINCTRL_PIN_GROUP("pcie0_0_perst", mt7623_pcie0_0_perst),
1144     PINCTRL_PIN_GROUP("pcie0_1_perst", mt7623_pcie0_1_perst),
1145     PINCTRL_PIN_GROUP("pcie1_0_perst", mt7623_pcie1_0_perst),
1146     PINCTRL_PIN_GROUP("pcie1_1_perst", mt7623_pcie1_1_perst),
1147     PINCTRL_PIN_GROUP("pcie1_1_perst", mt7623_pcie1_1_perst),
1148     PINCTRL_PIN_GROUP("pcie0_0_rev_perst", mt7623_pcie0_0_rev_perst),
1149     PINCTRL_PIN_GROUP("pcie0_1_rev_perst", mt7623_pcie0_1_rev_perst),
1150     PINCTRL_PIN_GROUP("pcie1_0_rev_perst", mt7623_pcie1_0_rev_perst),
1151     PINCTRL_PIN_GROUP("pcie1_1_rev_perst", mt7623_pcie1_1_rev_perst),
1152     PINCTRL_PIN_GROUP("pcie2_0_rev_perst", mt7623_pcie2_0_rev_perst),
1153     PINCTRL_PIN_GROUP("pcie2_1_rev_perst", mt7623_pcie2_1_rev_perst),
1154     PINCTRL_PIN_GROUP("pcie2_0_perst", mt7623_pcie2_0_perst),
1155     PINCTRL_PIN_GROUP("pcie2_1_perst", mt7623_pcie2_1_perst),
1156     PINCTRL_PIN_GROUP("pcie0_0_wake", mt7623_pcie0_0_wake),
1157     PINCTRL_PIN_GROUP("pcie0_1_wake", mt7623_pcie0_1_wake),
1158     PINCTRL_PIN_GROUP("pcie1_0_wake", mt7623_pcie1_0_wake),
1159     PINCTRL_PIN_GROUP("pcie1_1_wake", mt7623_pcie1_1_wake),
1160     PINCTRL_PIN_GROUP("pcie2_0_wake", mt7623_pcie2_0_wake),
1161     PINCTRL_PIN_GROUP("pcie2_1_wake", mt7623_pcie2_1_wake),
1162     PINCTRL_PIN_GROUP("pcie0_clkreq", mt7623_pcie0_clkreq),
1163     PINCTRL_PIN_GROUP("pcie1_clkreq", mt7623_pcie1_clkreq),
1164     PINCTRL_PIN_GROUP("pcie2_clkreq", mt7623_pcie2_clkreq),
1165     PINCTRL_PIN_GROUP("pcm_clk_0", mt7623_pcm_clk_0),
1166     PINCTRL_PIN_GROUP("pcm_clk_1", mt7623_pcm_clk_1),
1167     PINCTRL_PIN_GROUP("pcm_clk_2", mt7623_pcm_clk_2),
1168     PINCTRL_PIN_GROUP("pcm_clk_3", mt7623_pcm_clk_3),
1169     PINCTRL_PIN_GROUP("pcm_clk_4", mt7623_pcm_clk_4),
1170     PINCTRL_PIN_GROUP("pcm_clk_5", mt7623_pcm_clk_5),
1171     PINCTRL_PIN_GROUP("pcm_clk_6", mt7623_pcm_clk_6),
1172     PINCTRL_PIN_GROUP("pcm_sync_0", mt7623_pcm_sync_0),
1173     PINCTRL_PIN_GROUP("pcm_sync_1", mt7623_pcm_sync_1),
1174     PINCTRL_PIN_GROUP("pcm_sync_2", mt7623_pcm_sync_2),
1175     PINCTRL_PIN_GROUP("pcm_sync_3", mt7623_pcm_sync_3),
1176     PINCTRL_PIN_GROUP("pcm_sync_4", mt7623_pcm_sync_4),
1177     PINCTRL_PIN_GROUP("pcm_sync_5", mt7623_pcm_sync_5),
1178     PINCTRL_PIN_GROUP("pcm_sync_6", mt7623_pcm_sync_6),
1179     PINCTRL_PIN_GROUP("pcm_rx_0", mt7623_pcm_rx_0),
1180     PINCTRL_PIN_GROUP("pcm_rx_1", mt7623_pcm_rx_1),
1181     PINCTRL_PIN_GROUP("pcm_rx_2", mt7623_pcm_rx_2),
1182     PINCTRL_PIN_GROUP("pcm_rx_3", mt7623_pcm_rx_3),
1183     PINCTRL_PIN_GROUP("pcm_rx_4", mt7623_pcm_rx_4),
1184     PINCTRL_PIN_GROUP("pcm_rx_5", mt7623_pcm_rx_5),
1185     PINCTRL_PIN_GROUP("pcm_rx_6", mt7623_pcm_rx_6),
1186     PINCTRL_PIN_GROUP("pcm_tx_0", mt7623_pcm_tx_0),
1187     PINCTRL_PIN_GROUP("pcm_tx_1", mt7623_pcm_tx_1),
1188     PINCTRL_PIN_GROUP("pcm_tx_2", mt7623_pcm_tx_2),
1189     PINCTRL_PIN_GROUP("pcm_tx_3", mt7623_pcm_tx_3),
1190     PINCTRL_PIN_GROUP("pcm_tx_4", mt7623_pcm_tx_4),
1191     PINCTRL_PIN_GROUP("pcm_tx_5", mt7623_pcm_tx_5),
1192     PINCTRL_PIN_GROUP("pcm_tx_6", mt7623_pcm_tx_6),
1193     PINCTRL_PIN_GROUP("pwm_ch1_0", mt7623_pwm_ch1_0),
1194     PINCTRL_PIN_GROUP("pwm_ch1_1", mt7623_pwm_ch1_1),
1195     PINCTRL_PIN_GROUP("pwm_ch1_2", mt7623_pwm_ch1_2),
1196     PINCTRL_PIN_GROUP("pwm_ch1_3", mt7623_pwm_ch1_3),
1197     PINCTRL_PIN_GROUP("pwm_ch1_4", mt7623_pwm_ch1_4),
1198     PINCTRL_PIN_GROUP("pwm_ch2_0", mt7623_pwm_ch2_0),
1199     PINCTRL_PIN_GROUP("pwm_ch2_1", mt7623_pwm_ch2_1),
1200     PINCTRL_PIN_GROUP("pwm_ch2_2", mt7623_pwm_ch2_2),
1201     PINCTRL_PIN_GROUP("pwm_ch2_3", mt7623_pwm_ch2_3),
1202     PINCTRL_PIN_GROUP("pwm_ch2_4", mt7623_pwm_ch2_4),
1203     PINCTRL_PIN_GROUP("pwm_ch3_0", mt7623_pwm_ch3_0),
1204     PINCTRL_PIN_GROUP("pwm_ch3_1", mt7623_pwm_ch3_1),
1205     PINCTRL_PIN_GROUP("pwm_ch3_2", mt7623_pwm_ch3_2),
1206     PINCTRL_PIN_GROUP("pwm_ch3_3", mt7623_pwm_ch3_3),
1207     PINCTRL_PIN_GROUP("pwm_ch4_0", mt7623_pwm_ch4_0),
1208     PINCTRL_PIN_GROUP("pwm_ch4_1", mt7623_pwm_ch4_1),
1209     PINCTRL_PIN_GROUP("pwm_ch4_2", mt7623_pwm_ch4_2),
1210     PINCTRL_PIN_GROUP("pwm_ch4_3", mt7623_pwm_ch4_3),
1211     PINCTRL_PIN_GROUP("pwm_ch5_0", mt7623_pwm_ch5_0),
1212     PINCTRL_PIN_GROUP("pwm_ch5_1", mt7623_pwm_ch5_1),
1213     PINCTRL_PIN_GROUP("pwrap", mt7623_pwrap),
1214     PINCTRL_PIN_GROUP("rtc", mt7623_rtc),
1215     PINCTRL_PIN_GROUP("spdif_in0_0", mt7623_spdif_in0_0),
1216     PINCTRL_PIN_GROUP("spdif_in0_1", mt7623_spdif_in0_1),
1217     PINCTRL_PIN_GROUP("spdif_in1_0", mt7623_spdif_in1_0),
1218     PINCTRL_PIN_GROUP("spdif_in1_1", mt7623_spdif_in1_1),
1219     PINCTRL_PIN_GROUP("spdif_out", mt7623_spdif_out),
1220     PINCTRL_PIN_GROUP("spi0", mt7623_spi0),
1221     PINCTRL_PIN_GROUP("spi1", mt7623_spi1),
1222     PINCTRL_PIN_GROUP("spi2", mt7623_spi2),
1223     PINCTRL_PIN_GROUP("uart0_0_txd_rxd",  mt7623_uart0_0_txd_rxd),
1224     PINCTRL_PIN_GROUP("uart0_1_txd_rxd",  mt7623_uart0_1_txd_rxd),
1225     PINCTRL_PIN_GROUP("uart0_2_txd_rxd",  mt7623_uart0_2_txd_rxd),
1226     PINCTRL_PIN_GROUP("uart0_3_txd_rxd",  mt7623_uart0_3_txd_rxd),
1227     PINCTRL_PIN_GROUP("uart1_0_txd_rxd",  mt7623_uart1_0_txd_rxd),
1228     PINCTRL_PIN_GROUP("uart1_1_txd_rxd",  mt7623_uart1_1_txd_rxd),
1229     PINCTRL_PIN_GROUP("uart1_2_txd_rxd",  mt7623_uart1_2_txd_rxd),
1230     PINCTRL_PIN_GROUP("uart2_0_txd_rxd",  mt7623_uart2_0_txd_rxd),
1231     PINCTRL_PIN_GROUP("uart2_1_txd_rxd",  mt7623_uart2_1_txd_rxd),
1232     PINCTRL_PIN_GROUP("uart3_txd_rxd",  mt7623_uart3_txd_rxd),
1233     PINCTRL_PIN_GROUP("uart0_rts_cts",  mt7623_uart0_rts_cts),
1234     PINCTRL_PIN_GROUP("uart1_rts_cts",  mt7623_uart1_rts_cts),
1235     PINCTRL_PIN_GROUP("uart2_rts_cts",  mt7623_uart2_rts_cts),
1236     PINCTRL_PIN_GROUP("uart3_rts_cts",  mt7623_uart3_rts_cts),
1237     PINCTRL_PIN_GROUP("watchdog_0", mt7623_watchdog_0),
1238     PINCTRL_PIN_GROUP("watchdog_1", mt7623_watchdog_1),
1239 };
1240 
1241 /* Joint those groups owning the same capability in user point of view which
1242  * allows that people tend to use through the device tree.
1243  */
1244 static const char *mt7623_aud_clk_groups[] = { "aud_ext_clk0",
1245                            "aud_ext_clk1", };
1246 static const char *mt7623_disp_pwm_groups[] = { "disp_pwm_0", "disp_pwm_1",
1247                         "disp_pwm_2", };
1248 static const char *mt7623_ethernet_groups[] = { "esw_int", "esw_rst",
1249                         "ephy", "mdc_mdio", };
1250 static const char *mt7623_ext_sdio_groups[] = { "ext_sdio", };
1251 static const char *mt7623_hdmi_groups[] = { "hdmi_cec", "hdmi_htplg",
1252                         "hdmi_i2c", "hdmi_rx",
1253                         "hdmi_rx_i2c", };
1254 static const char *mt7623_i2c_groups[] = { "i2c0", "i2c1_0", "i2c1_1",
1255                        "i2c1_2", "i2c1_3", "i2c1_4",
1256                        "i2c2_0", "i2c2_1", "i2c2_2",
1257                        "i2c2_3", };
1258 static const char *mt7623_i2s_groups[] = { "i2s0", "i2s1",
1259                        "i2s2_bclk_lrclk_mclk",
1260                        "i2s3_bclk_lrclk_mclk",
1261                        "i2s4", "i2s5",
1262                        "i2s2_data_in", "i2s3_data_in",
1263                        "i2s2_data_0", "i2s2_data_1",
1264                        "i2s3_data_0", "i2s3_data_1", };
1265 static const char *mt7623_ir_groups[] = { "ir", };
1266 static const char *mt7623_lcd_groups[] = { "dsi_te", "lcm_rst", "mipi_tx", };
1267 static const char *mt7623_msdc_groups[] = { "msdc0", "msdc1", "msdc1_ins",
1268                         "msdc1_wp_0", "msdc1_wp_1",
1269                         "msdc1_wp_2", "msdc2",
1270                         "msdc3", };
1271 static const char *mt7623_nandc_groups[] = { "nandc", "nandc_ceb0",
1272                          "nandc_ceb1", };
1273 static const char *mt7623_otg_groups[] = { "otg_iddig0_0", "otg_iddig0_1",
1274                         "otg_iddig0_2", "otg_iddig1_0",
1275                         "otg_iddig1_1", "otg_iddig1_2",
1276                         "otg_drv_vbus0_0",
1277                         "otg_drv_vbus0_1",
1278                         "otg_drv_vbus0_2",
1279                         "otg_drv_vbus1_0",
1280                         "otg_drv_vbus1_1",
1281                         "otg_drv_vbus1_2", };
1282 static const char *mt7623_pcie_groups[] = { "pcie0_0_perst", "pcie0_1_perst",
1283                         "pcie1_0_perst", "pcie1_1_perst",
1284                         "pcie2_0_perst", "pcie2_1_perst",
1285                         "pcie0_0_rev_perst",
1286                         "pcie0_1_rev_perst",
1287                         "pcie1_0_rev_perst",
1288                         "pcie1_1_rev_perst",
1289                         "pcie2_0_rev_perst",
1290                         "pcie2_1_rev_perst",
1291                         "pcie0_0_wake", "pcie0_1_wake",
1292                         "pcie2_0_wake", "pcie2_1_wake",
1293                         "pcie0_clkreq", "pcie1_clkreq",
1294                         "pcie2_clkreq", };
1295 static const char *mt7623_pcm_groups[] = { "pcm_clk_0", "pcm_clk_1",
1296                        "pcm_clk_2", "pcm_clk_3",
1297                        "pcm_clk_4", "pcm_clk_5",
1298                        "pcm_clk_6", "pcm_sync_0",
1299                        "pcm_sync_1", "pcm_sync_2",
1300                        "pcm_sync_3", "pcm_sync_4",
1301                        "pcm_sync_5", "pcm_sync_6",
1302                        "pcm_rx_0", "pcm_rx_1",
1303                        "pcm_rx_2", "pcm_rx_3",
1304                        "pcm_rx_4", "pcm_rx_5",
1305                        "pcm_rx_6", "pcm_tx_0",
1306                        "pcm_tx_1", "pcm_tx_2",
1307                        "pcm_tx_3", "pcm_tx_4",
1308                        "pcm_tx_5", "pcm_tx_6", };
1309 static const char *mt7623_pwm_groups[] = { "pwm_ch1_0", "pwm_ch1_1",
1310                        "pwm_ch1_2", "pwm_ch2_0",
1311                        "pwm_ch2_1", "pwm_ch2_2",
1312                        "pwm_ch3_0", "pwm_ch3_1",
1313                        "pwm_ch3_2", "pwm_ch4_0",
1314                        "pwm_ch4_1", "pwm_ch4_2",
1315                        "pwm_ch4_3", "pwm_ch5_0",
1316                        "pwm_ch5_1", "pwm_ch5_2",
1317                        "pwm_ch6_0", "pwm_ch6_1",
1318                        "pwm_ch6_2", "pwm_ch6_3",
1319                        "pwm_ch7_0", "pwm_ch7_1",
1320                        "pwm_ch7_2", };
1321 static const char *mt7623_pwrap_groups[] = { "pwrap", };
1322 static const char *mt7623_rtc_groups[] = { "rtc", };
1323 static const char *mt7623_spi_groups[] = { "spi0", "spi2", "spi2", };
1324 static const char *mt7623_spdif_groups[] = { "spdif_in0_0", "spdif_in0_1",
1325                          "spdif_in1_0", "spdif_in1_1",
1326                          "spdif_out", };
1327 static const char *mt7623_uart_groups[] = { "uart0_0_txd_rxd",
1328                         "uart0_1_txd_rxd",
1329                         "uart0_2_txd_rxd",
1330                         "uart0_3_txd_rxd",
1331                         "uart1_0_txd_rxd",
1332                         "uart1_1_txd_rxd",
1333                         "uart1_2_txd_rxd",
1334                         "uart2_0_txd_rxd",
1335                         "uart2_1_txd_rxd",
1336                         "uart3_txd_rxd",
1337                         "uart0_rts_cts",
1338                         "uart1_rts_cts",
1339                         "uart2_rts_cts",
1340                         "uart3_rts_cts", };
1341 static const char *mt7623_wdt_groups[] = { "watchdog_0", "watchdog_1", };
1342 
1343 static const struct function_desc mt7623_functions[] = {
1344     {"audck", mt7623_aud_clk_groups, ARRAY_SIZE(mt7623_aud_clk_groups)},
1345     {"disp", mt7623_disp_pwm_groups, ARRAY_SIZE(mt7623_disp_pwm_groups)},
1346     {"eth", mt7623_ethernet_groups, ARRAY_SIZE(mt7623_ethernet_groups)},
1347     {"sdio", mt7623_ext_sdio_groups, ARRAY_SIZE(mt7623_ext_sdio_groups)},
1348     {"hdmi", mt7623_hdmi_groups, ARRAY_SIZE(mt7623_hdmi_groups)},
1349     {"i2c", mt7623_i2c_groups, ARRAY_SIZE(mt7623_i2c_groups)},
1350     {"i2s", mt7623_i2s_groups, ARRAY_SIZE(mt7623_i2s_groups)},
1351     {"ir",  mt7623_ir_groups, ARRAY_SIZE(mt7623_ir_groups)},
1352     {"lcd", mt7623_lcd_groups, ARRAY_SIZE(mt7623_lcd_groups)},
1353     {"msdc", mt7623_msdc_groups, ARRAY_SIZE(mt7623_msdc_groups)},
1354     {"nand", mt7623_nandc_groups, ARRAY_SIZE(mt7623_nandc_groups)},
1355     {"otg", mt7623_otg_groups, ARRAY_SIZE(mt7623_otg_groups)},
1356     {"pcie", mt7623_pcie_groups, ARRAY_SIZE(mt7623_pcie_groups)},
1357     {"pcm", mt7623_pcm_groups, ARRAY_SIZE(mt7623_pcm_groups)},
1358     {"pwm", mt7623_pwm_groups, ARRAY_SIZE(mt7623_pwm_groups)},
1359     {"pwrap", mt7623_pwrap_groups, ARRAY_SIZE(mt7623_pwrap_groups)},
1360     {"rtc", mt7623_rtc_groups, ARRAY_SIZE(mt7623_rtc_groups)},
1361     {"spi", mt7623_spi_groups, ARRAY_SIZE(mt7623_spi_groups)},
1362     {"spdif", mt7623_spdif_groups, ARRAY_SIZE(mt7623_spdif_groups)},
1363     {"uart", mt7623_uart_groups, ARRAY_SIZE(mt7623_uart_groups)},
1364     {"watchdog", mt7623_wdt_groups, ARRAY_SIZE(mt7623_wdt_groups)},
1365 };
1366 
1367 static const struct mtk_eint_hw mt7623_eint_hw = {
1368     .port_mask = 6,
1369     .ports     = 6,
1370     .ap_num    = 169,
1371     .db_cnt    = 20,
1372 };
1373 
1374 static struct mtk_pin_soc mt7623_data = {
1375     .reg_cal = mt7623_reg_cals,
1376     .pins = mt7623_pins,
1377     .npins = ARRAY_SIZE(mt7623_pins),
1378     .grps = mt7623_groups,
1379     .ngrps = ARRAY_SIZE(mt7623_groups),
1380     .funcs = mt7623_functions,
1381     .nfuncs = ARRAY_SIZE(mt7623_functions),
1382     .eint_hw = &mt7623_eint_hw,
1383     .gpio_m = 0,
1384     .ies_present = true,
1385     .base_names = mtk_default_register_base_names,
1386     .nbase_names = ARRAY_SIZE(mtk_default_register_base_names),
1387     .bias_disable_set = mtk_pinconf_bias_disable_set_rev1,
1388     .bias_disable_get = mtk_pinconf_bias_disable_get_rev1,
1389     .bias_set = mtk_pinconf_bias_set_rev1,
1390     .bias_get = mtk_pinconf_bias_get_rev1,
1391     .drive_set = mtk_pinconf_drive_set_rev1,
1392     .drive_get = mtk_pinconf_drive_get_rev1,
1393     .adv_pull_get = mtk_pinconf_adv_pull_get,
1394     .adv_pull_set = mtk_pinconf_adv_pull_set,
1395 };
1396 
1397 /*
1398  * There are some specific pins have mux functions greater than 8,
1399  * and if we want to switch thees high modes we need to disable
1400  * bonding constraints firstly.
1401  */
1402 static void mt7623_bonding_disable(struct platform_device *pdev)
1403 {
1404     struct mtk_pinctrl *hw = platform_get_drvdata(pdev);
1405 
1406     mtk_rmw(hw, 0, PIN_BOND_REG0, BOND_PCIE_CLR, BOND_PCIE_CLR);
1407     mtk_rmw(hw, 0, PIN_BOND_REG1, BOND_I2S_CLR, BOND_I2S_CLR);
1408     mtk_rmw(hw, 0, PIN_BOND_REG2, BOND_MSDC0E_CLR, BOND_MSDC0E_CLR);
1409 }
1410 
1411 static const struct of_device_id mt7623_pctrl_match[] = {
1412     { .compatible = "mediatek,mt7623-moore-pinctrl", },
1413     {}
1414 };
1415 
1416 static int mt7623_pinctrl_probe(struct platform_device *pdev)
1417 {
1418     int err;
1419 
1420     err = mtk_moore_pinctrl_probe(pdev, &mt7623_data);
1421     if (err)
1422         return err;
1423 
1424     mt7623_bonding_disable(pdev);
1425 
1426     return 0;
1427 }
1428 
1429 static struct platform_driver mtk_pinctrl_driver = {
1430     .probe = mt7623_pinctrl_probe,
1431     .driver = {
1432         .name = "mt7623-moore-pinctrl",
1433         .of_match_table = mt7623_pctrl_match,
1434     },
1435 };
1436 
1437 static int __init mtk_pinctrl_init(void)
1438 {
1439     return platform_driver_register(&mtk_pinctrl_driver);
1440 }
1441 arch_initcall(mtk_pinctrl_init);
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