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0009 #include "pinctrl-moore.h"
0010
0011 #define MT7622_PIN(_number, _name) \
0012 MTK_PIN(_number, _name, 1, _number, DRV_GRP0)
0013
0014 static const struct mtk_pin_field_calc mt7622_pin_mode_range[] = {
0015 PIN_FIELD(0, 0, 0x320, 0x10, 16, 4),
0016 PIN_FIELD(1, 4, 0x3a0, 0x10, 16, 4),
0017 PIN_FIELD(5, 5, 0x320, 0x10, 0, 4),
0018 PINS_FIELD(6, 7, 0x300, 0x10, 4, 4),
0019 PIN_FIELD(8, 9, 0x350, 0x10, 20, 4),
0020 PINS_FIELD(10, 13, 0x300, 0x10, 8, 4),
0021 PIN_FIELD(14, 15, 0x320, 0x10, 4, 4),
0022 PIN_FIELD(16, 17, 0x320, 0x10, 20, 4),
0023 PIN_FIELD(18, 21, 0x310, 0x10, 16, 4),
0024 PIN_FIELD(22, 22, 0x380, 0x10, 16, 4),
0025 PINS_FIELD(23, 24, 0x300, 0x10, 24, 4),
0026 PINS_FIELD(25, 36, 0x300, 0x10, 12, 4),
0027 PINS_FIELD(37, 50, 0x300, 0x10, 20, 4),
0028 PIN_FIELD(51, 70, 0x330, 0x10, 4, 4),
0029 PINS_FIELD(71, 72, 0x300, 0x10, 16, 4),
0030 PIN_FIELD(73, 76, 0x310, 0x10, 0, 4),
0031 PIN_FIELD(77, 77, 0x320, 0x10, 28, 4),
0032 PIN_FIELD(78, 78, 0x320, 0x10, 12, 4),
0033 PIN_FIELD(79, 82, 0x3a0, 0x10, 0, 4),
0034 PIN_FIELD(83, 83, 0x350, 0x10, 28, 4),
0035 PIN_FIELD(84, 84, 0x330, 0x10, 0, 4),
0036 PIN_FIELD(85, 90, 0x360, 0x10, 4, 4),
0037 PIN_FIELD(91, 94, 0x390, 0x10, 16, 4),
0038 PIN_FIELD(95, 97, 0x380, 0x10, 20, 4),
0039 PIN_FIELD(98, 101, 0x390, 0x10, 0, 4),
0040 PIN_FIELD(102, 102, 0x360, 0x10, 0, 4),
0041 };
0042
0043 static const struct mtk_pin_field_calc mt7622_pin_dir_range[] = {
0044 PIN_FIELD(0, 102, 0x0, 0x10, 0, 1),
0045 };
0046
0047 static const struct mtk_pin_field_calc mt7622_pin_di_range[] = {
0048 PIN_FIELD(0, 102, 0x200, 0x10, 0, 1),
0049 };
0050
0051 static const struct mtk_pin_field_calc mt7622_pin_do_range[] = {
0052 PIN_FIELD(0, 102, 0x100, 0x10, 0, 1),
0053 };
0054
0055 static const struct mtk_pin_field_calc mt7622_pin_sr_range[] = {
0056 PIN_FIELD(0, 31, 0x910, 0x10, 0, 1),
0057 PIN_FIELD(32, 50, 0xa10, 0x10, 0, 1),
0058 PIN_FIELD(51, 70, 0x810, 0x10, 0, 1),
0059 PIN_FIELD(71, 72, 0xb10, 0x10, 0, 1),
0060 PIN_FIELD(73, 86, 0xb10, 0x10, 4, 1),
0061 PIN_FIELD(87, 90, 0xc10, 0x10, 0, 1),
0062 PIN_FIELD(91, 102, 0xb10, 0x10, 18, 1),
0063 };
0064
0065 static const struct mtk_pin_field_calc mt7622_pin_smt_range[] = {
0066 PIN_FIELD(0, 31, 0x920, 0x10, 0, 1),
0067 PIN_FIELD(32, 50, 0xa20, 0x10, 0, 1),
0068 PIN_FIELD(51, 70, 0x820, 0x10, 0, 1),
0069 PIN_FIELD(71, 72, 0xb20, 0x10, 0, 1),
0070 PIN_FIELD(73, 86, 0xb20, 0x10, 4, 1),
0071 PIN_FIELD(87, 90, 0xc20, 0x10, 0, 1),
0072 PIN_FIELD(91, 102, 0xb20, 0x10, 18, 1),
0073 };
0074
0075 static const struct mtk_pin_field_calc mt7622_pin_pu_range[] = {
0076 PIN_FIELD(0, 31, 0x930, 0x10, 0, 1),
0077 PIN_FIELD(32, 50, 0xa30, 0x10, 0, 1),
0078 PIN_FIELD(51, 70, 0x830, 0x10, 0, 1),
0079 PIN_FIELD(71, 72, 0xb30, 0x10, 0, 1),
0080 PIN_FIELD(73, 86, 0xb30, 0x10, 4, 1),
0081 PIN_FIELD(87, 90, 0xc30, 0x10, 0, 1),
0082 PIN_FIELD(91, 102, 0xb30, 0x10, 18, 1),
0083 };
0084
0085 static const struct mtk_pin_field_calc mt7622_pin_pd_range[] = {
0086 PIN_FIELD(0, 31, 0x940, 0x10, 0, 1),
0087 PIN_FIELD(32, 50, 0xa40, 0x10, 0, 1),
0088 PIN_FIELD(51, 70, 0x840, 0x10, 0, 1),
0089 PIN_FIELD(71, 72, 0xb40, 0x10, 0, 1),
0090 PIN_FIELD(73, 86, 0xb40, 0x10, 4, 1),
0091 PIN_FIELD(87, 90, 0xc40, 0x10, 0, 1),
0092 PIN_FIELD(91, 102, 0xb40, 0x10, 18, 1),
0093 };
0094
0095 static const struct mtk_pin_field_calc mt7622_pin_e4_range[] = {
0096 PIN_FIELD(0, 31, 0x960, 0x10, 0, 1),
0097 PIN_FIELD(32, 50, 0xa60, 0x10, 0, 1),
0098 PIN_FIELD(51, 70, 0x860, 0x10, 0, 1),
0099 PIN_FIELD(71, 72, 0xb60, 0x10, 0, 1),
0100 PIN_FIELD(73, 86, 0xb60, 0x10, 4, 1),
0101 PIN_FIELD(87, 90, 0xc60, 0x10, 0, 1),
0102 PIN_FIELD(91, 102, 0xb60, 0x10, 18, 1),
0103 };
0104
0105 static const struct mtk_pin_field_calc mt7622_pin_e8_range[] = {
0106 PIN_FIELD(0, 31, 0x970, 0x10, 0, 1),
0107 PIN_FIELD(32, 50, 0xa70, 0x10, 0, 1),
0108 PIN_FIELD(51, 70, 0x870, 0x10, 0, 1),
0109 PIN_FIELD(71, 72, 0xb70, 0x10, 0, 1),
0110 PIN_FIELD(73, 86, 0xb70, 0x10, 4, 1),
0111 PIN_FIELD(87, 90, 0xc70, 0x10, 0, 1),
0112 PIN_FIELD(91, 102, 0xb70, 0x10, 18, 1),
0113 };
0114
0115 static const struct mtk_pin_field_calc mt7622_pin_tdsel_range[] = {
0116 PIN_FIELD(0, 31, 0x980, 0x4, 0, 4),
0117 PIN_FIELD(32, 50, 0xa80, 0x4, 0, 4),
0118 PIN_FIELD(51, 70, 0x880, 0x4, 0, 4),
0119 PIN_FIELD(71, 72, 0xb80, 0x4, 0, 4),
0120 PIN_FIELD(73, 86, 0xb80, 0x4, 16, 4),
0121 PIN_FIELD(87, 90, 0xc80, 0x4, 0, 4),
0122 PIN_FIELD(91, 102, 0xb88, 0x4, 8, 4),
0123 };
0124
0125 static const struct mtk_pin_field_calc mt7622_pin_rdsel_range[] = {
0126 PIN_FIELD(0, 31, 0x990, 0x4, 0, 6),
0127 PIN_FIELD(32, 50, 0xa90, 0x4, 0, 6),
0128 PIN_FIELD(51, 58, 0x890, 0x4, 0, 6),
0129 PIN_FIELD(59, 60, 0x894, 0x4, 28, 6),
0130 PIN_FIELD(61, 62, 0x894, 0x4, 16, 6),
0131 PIN_FIELD(63, 66, 0x898, 0x4, 8, 6),
0132 PIN_FIELD(67, 68, 0x89c, 0x4, 12, 6),
0133 PIN_FIELD(69, 70, 0x89c, 0x4, 0, 6),
0134 PIN_FIELD(71, 72, 0xb90, 0x4, 0, 6),
0135 PIN_FIELD(73, 86, 0xb90, 0x4, 24, 6),
0136 PIN_FIELD(87, 90, 0xc90, 0x4, 0, 6),
0137 PIN_FIELD(91, 102, 0xb9c, 0x4, 12, 6),
0138 };
0139
0140 static const struct mtk_pin_reg_calc mt7622_reg_cals[PINCTRL_PIN_REG_MAX] = {
0141 [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7622_pin_mode_range),
0142 [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7622_pin_dir_range),
0143 [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt7622_pin_di_range),
0144 [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt7622_pin_do_range),
0145 [PINCTRL_PIN_REG_SR] = MTK_RANGE(mt7622_pin_sr_range),
0146 [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt7622_pin_smt_range),
0147 [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt7622_pin_pu_range),
0148 [PINCTRL_PIN_REG_PD] = MTK_RANGE(mt7622_pin_pd_range),
0149 [PINCTRL_PIN_REG_E4] = MTK_RANGE(mt7622_pin_e4_range),
0150 [PINCTRL_PIN_REG_E8] = MTK_RANGE(mt7622_pin_e8_range),
0151 [PINCTRL_PIN_REG_TDSEL] = MTK_RANGE(mt7622_pin_tdsel_range),
0152 [PINCTRL_PIN_REG_RDSEL] = MTK_RANGE(mt7622_pin_rdsel_range),
0153 };
0154
0155 static const struct mtk_pin_desc mt7622_pins[] = {
0156 MT7622_PIN(0, "GPIO_A"),
0157 MT7622_PIN(1, "I2S1_IN"),
0158 MT7622_PIN(2, "I2S1_OUT"),
0159 MT7622_PIN(3, "I2S_BCLK"),
0160 MT7622_PIN(4, "I2S_WS"),
0161 MT7622_PIN(5, "I2S_MCLK"),
0162 MT7622_PIN(6, "TXD0"),
0163 MT7622_PIN(7, "RXD0"),
0164 MT7622_PIN(8, "SPI_WP"),
0165 MT7622_PIN(9, "SPI_HOLD"),
0166 MT7622_PIN(10, "SPI_CLK"),
0167 MT7622_PIN(11, "SPI_MOSI"),
0168 MT7622_PIN(12, "SPI_MISO"),
0169 MT7622_PIN(13, "SPI_CS"),
0170 MT7622_PIN(14, "I2C_SDA"),
0171 MT7622_PIN(15, "I2C_SCL"),
0172 MT7622_PIN(16, "I2S2_IN"),
0173 MT7622_PIN(17, "I2S3_IN"),
0174 MT7622_PIN(18, "I2S4_IN"),
0175 MT7622_PIN(19, "I2S2_OUT"),
0176 MT7622_PIN(20, "I2S3_OUT"),
0177 MT7622_PIN(21, "I2S4_OUT"),
0178 MT7622_PIN(22, "GPIO_B"),
0179 MT7622_PIN(23, "MDC"),
0180 MT7622_PIN(24, "MDIO"),
0181 MT7622_PIN(25, "G2_TXD0"),
0182 MT7622_PIN(26, "G2_TXD1"),
0183 MT7622_PIN(27, "G2_TXD2"),
0184 MT7622_PIN(28, "G2_TXD3"),
0185 MT7622_PIN(29, "G2_TXEN"),
0186 MT7622_PIN(30, "G2_TXC"),
0187 MT7622_PIN(31, "G2_RXD0"),
0188 MT7622_PIN(32, "G2_RXD1"),
0189 MT7622_PIN(33, "G2_RXD2"),
0190 MT7622_PIN(34, "G2_RXD3"),
0191 MT7622_PIN(35, "G2_RXDV"),
0192 MT7622_PIN(36, "G2_RXC"),
0193 MT7622_PIN(37, "NCEB"),
0194 MT7622_PIN(38, "NWEB"),
0195 MT7622_PIN(39, "NREB"),
0196 MT7622_PIN(40, "NDL4"),
0197 MT7622_PIN(41, "NDL5"),
0198 MT7622_PIN(42, "NDL6"),
0199 MT7622_PIN(43, "NDL7"),
0200 MT7622_PIN(44, "NRB"),
0201 MT7622_PIN(45, "NCLE"),
0202 MT7622_PIN(46, "NALE"),
0203 MT7622_PIN(47, "NDL0"),
0204 MT7622_PIN(48, "NDL1"),
0205 MT7622_PIN(49, "NDL2"),
0206 MT7622_PIN(50, "NDL3"),
0207 MT7622_PIN(51, "MDI_TP_P0"),
0208 MT7622_PIN(52, "MDI_TN_P0"),
0209 MT7622_PIN(53, "MDI_RP_P0"),
0210 MT7622_PIN(54, "MDI_RN_P0"),
0211 MT7622_PIN(55, "MDI_TP_P1"),
0212 MT7622_PIN(56, "MDI_TN_P1"),
0213 MT7622_PIN(57, "MDI_RP_P1"),
0214 MT7622_PIN(58, "MDI_RN_P1"),
0215 MT7622_PIN(59, "MDI_RP_P2"),
0216 MT7622_PIN(60, "MDI_RN_P2"),
0217 MT7622_PIN(61, "MDI_TP_P2"),
0218 MT7622_PIN(62, "MDI_TN_P2"),
0219 MT7622_PIN(63, "MDI_TP_P3"),
0220 MT7622_PIN(64, "MDI_TN_P3"),
0221 MT7622_PIN(65, "MDI_RP_P3"),
0222 MT7622_PIN(66, "MDI_RN_P3"),
0223 MT7622_PIN(67, "MDI_RP_P4"),
0224 MT7622_PIN(68, "MDI_RN_P4"),
0225 MT7622_PIN(69, "MDI_TP_P4"),
0226 MT7622_PIN(70, "MDI_TN_P4"),
0227 MT7622_PIN(71, "PMIC_SCL"),
0228 MT7622_PIN(72, "PMIC_SDA"),
0229 MT7622_PIN(73, "SPIC1_CLK"),
0230 MT7622_PIN(74, "SPIC1_MOSI"),
0231 MT7622_PIN(75, "SPIC1_MISO"),
0232 MT7622_PIN(76, "SPIC1_CS"),
0233 MT7622_PIN(77, "GPIO_D"),
0234 MT7622_PIN(78, "WATCHDOG"),
0235 MT7622_PIN(79, "RTS3_N"),
0236 MT7622_PIN(80, "CTS3_N"),
0237 MT7622_PIN(81, "TXD3"),
0238 MT7622_PIN(82, "RXD3"),
0239 MT7622_PIN(83, "PERST0_N"),
0240 MT7622_PIN(84, "PERST1_N"),
0241 MT7622_PIN(85, "WLED_N"),
0242 MT7622_PIN(86, "EPHY_LED0_N"),
0243 MT7622_PIN(87, "AUXIN0"),
0244 MT7622_PIN(88, "AUXIN1"),
0245 MT7622_PIN(89, "AUXIN2"),
0246 MT7622_PIN(90, "AUXIN3"),
0247 MT7622_PIN(91, "TXD4"),
0248 MT7622_PIN(92, "RXD4"),
0249 MT7622_PIN(93, "RTS4_N"),
0250 MT7622_PIN(94, "CTS4_N"),
0251 MT7622_PIN(95, "PWM1"),
0252 MT7622_PIN(96, "PWM2"),
0253 MT7622_PIN(97, "PWM3"),
0254 MT7622_PIN(98, "PWM4"),
0255 MT7622_PIN(99, "PWM5"),
0256 MT7622_PIN(100, "PWM6"),
0257 MT7622_PIN(101, "PWM7"),
0258 MT7622_PIN(102, "GPIO_E"),
0259 };
0260
0261
0262
0263
0264
0265
0266
0267 static int mt7622_antsel0_pins[] = { 91, };
0268 static int mt7622_antsel0_funcs[] = { 5, };
0269 static int mt7622_antsel1_pins[] = { 92, };
0270 static int mt7622_antsel1_funcs[] = { 5, };
0271 static int mt7622_antsel2_pins[] = { 93, };
0272 static int mt7622_antsel2_funcs[] = { 5, };
0273 static int mt7622_antsel3_pins[] = { 94, };
0274 static int mt7622_antsel3_funcs[] = { 5, };
0275 static int mt7622_antsel4_pins[] = { 95, };
0276 static int mt7622_antsel4_funcs[] = { 5, };
0277 static int mt7622_antsel5_pins[] = { 96, };
0278 static int mt7622_antsel5_funcs[] = { 5, };
0279 static int mt7622_antsel6_pins[] = { 97, };
0280 static int mt7622_antsel6_funcs[] = { 5, };
0281 static int mt7622_antsel7_pins[] = { 98, };
0282 static int mt7622_antsel7_funcs[] = { 5, };
0283 static int mt7622_antsel8_pins[] = { 99, };
0284 static int mt7622_antsel8_funcs[] = { 5, };
0285 static int mt7622_antsel9_pins[] = { 100, };
0286 static int mt7622_antsel9_funcs[] = { 5, };
0287 static int mt7622_antsel10_pins[] = { 101, };
0288 static int mt7622_antsel10_funcs[] = { 5, };
0289 static int mt7622_antsel11_pins[] = { 102, };
0290 static int mt7622_antsel11_funcs[] = { 5, };
0291 static int mt7622_antsel12_pins[] = { 73, };
0292 static int mt7622_antsel12_funcs[] = { 5, };
0293 static int mt7622_antsel13_pins[] = { 74, };
0294 static int mt7622_antsel13_funcs[] = { 5, };
0295 static int mt7622_antsel14_pins[] = { 75, };
0296 static int mt7622_antsel14_funcs[] = { 5, };
0297 static int mt7622_antsel15_pins[] = { 76, };
0298 static int mt7622_antsel15_funcs[] = { 5, };
0299 static int mt7622_antsel16_pins[] = { 77, };
0300 static int mt7622_antsel16_funcs[] = { 5, };
0301 static int mt7622_antsel17_pins[] = { 22, };
0302 static int mt7622_antsel17_funcs[] = { 5, };
0303 static int mt7622_antsel18_pins[] = { 79, };
0304 static int mt7622_antsel18_funcs[] = { 5, };
0305 static int mt7622_antsel19_pins[] = { 80, };
0306 static int mt7622_antsel19_funcs[] = { 5, };
0307 static int mt7622_antsel20_pins[] = { 81, };
0308 static int mt7622_antsel20_funcs[] = { 5, };
0309 static int mt7622_antsel21_pins[] = { 82, };
0310 static int mt7622_antsel21_funcs[] = { 5, };
0311 static int mt7622_antsel22_pins[] = { 14, };
0312 static int mt7622_antsel22_funcs[] = { 5, };
0313 static int mt7622_antsel23_pins[] = { 15, };
0314 static int mt7622_antsel23_funcs[] = { 5, };
0315 static int mt7622_antsel24_pins[] = { 16, };
0316 static int mt7622_antsel24_funcs[] = { 5, };
0317 static int mt7622_antsel25_pins[] = { 17, };
0318 static int mt7622_antsel25_funcs[] = { 5, };
0319 static int mt7622_antsel26_pins[] = { 18, };
0320 static int mt7622_antsel26_funcs[] = { 5, };
0321 static int mt7622_antsel27_pins[] = { 19, };
0322 static int mt7622_antsel27_funcs[] = { 5, };
0323 static int mt7622_antsel28_pins[] = { 20, };
0324 static int mt7622_antsel28_funcs[] = { 5, };
0325 static int mt7622_antsel29_pins[] = { 21, };
0326 static int mt7622_antsel29_funcs[] = { 5, };
0327
0328
0329 static int mt7622_emmc_pins[] = { 40, 41, 42, 43, 44, 45, 47, 48, 49, 50, };
0330 static int mt7622_emmc_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
0331
0332 static int mt7622_emmc_rst_pins[] = { 37, };
0333 static int mt7622_emmc_rst_funcs[] = { 1, };
0334
0335
0336 static int mt7622_ephy_leds_pins[] = { 86, 91, 92, 93, 94, };
0337 static int mt7622_ephy_leds_funcs[] = { 0, 0, 0, 0, 0, };
0338 static int mt7622_ephy0_led_pins[] = { 86, };
0339 static int mt7622_ephy0_led_funcs[] = { 0, };
0340 static int mt7622_ephy1_led_pins[] = { 91, };
0341 static int mt7622_ephy1_led_funcs[] = { 2, };
0342 static int mt7622_ephy2_led_pins[] = { 92, };
0343 static int mt7622_ephy2_led_funcs[] = { 2, };
0344 static int mt7622_ephy3_led_pins[] = { 93, };
0345 static int mt7622_ephy3_led_funcs[] = { 2, };
0346 static int mt7622_ephy4_led_pins[] = { 94, };
0347 static int mt7622_ephy4_led_funcs[] = { 2, };
0348
0349
0350 static int mt7622_esw_pins[] = { 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
0351 62, 63, 64, 65, 66, 67, 68, 69, 70, };
0352 static int mt7622_esw_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0353 0, 0, 0, 0, 0, 0, 0, 0, 0, };
0354 static int mt7622_esw_p0_p1_pins[] = { 51, 52, 53, 54, 55, 56, 57, 58, };
0355 static int mt7622_esw_p0_p1_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
0356 static int mt7622_esw_p2_p3_p4_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66, 67,
0357 68, 69, 70, };
0358 static int mt7622_esw_p2_p3_p4_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0,
0359 0, 0, 0, };
0360
0361 static int mt7622_rgmii_via_esw_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66,
0362 67, 68, 69, 70, };
0363 static int mt7622_rgmii_via_esw_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0364 0, };
0365
0366
0367 static int mt7622_rgmii_via_gmac1_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66,
0368 67, 68, 69, 70, };
0369 static int mt7622_rgmii_via_gmac1_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
0370 2, };
0371
0372
0373 static int mt7622_rgmii_via_gmac2_pins[] = { 25, 26, 27, 28, 29, 30, 31, 32,
0374 33, 34, 35, 36, };
0375 static int mt7622_rgmii_via_gmac2_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0376 0, };
0377
0378
0379 static int mt7622_i2c0_pins[] = { 14, 15, };
0380 static int mt7622_i2c0_funcs[] = { 0, 0, };
0381 static int mt7622_i2c1_0_pins[] = { 55, 56, };
0382 static int mt7622_i2c1_0_funcs[] = { 0, 0, };
0383 static int mt7622_i2c1_1_pins[] = { 73, 74, };
0384 static int mt7622_i2c1_1_funcs[] = { 3, 3, };
0385 static int mt7622_i2c1_2_pins[] = { 87, 88, };
0386 static int mt7622_i2c1_2_funcs[] = { 0, 0, };
0387 static int mt7622_i2c2_0_pins[] = { 57, 58, };
0388 static int mt7622_i2c2_0_funcs[] = { 0, 0, };
0389 static int mt7622_i2c2_1_pins[] = { 75, 76, };
0390 static int mt7622_i2c2_1_funcs[] = { 3, 3, };
0391 static int mt7622_i2c2_2_pins[] = { 89, 90, };
0392 static int mt7622_i2c2_2_funcs[] = { 0, 0, };
0393
0394
0395 static int mt7622_i2s_in_mclk_bclk_ws_pins[] = { 3, 4, 5, };
0396 static int mt7622_i2s_in_mclk_bclk_ws_funcs[] = { 3, 3, 0, };
0397 static int mt7622_i2s1_in_data_pins[] = { 1, };
0398 static int mt7622_i2s1_in_data_funcs[] = { 0, };
0399 static int mt7622_i2s2_in_data_pins[] = { 16, };
0400 static int mt7622_i2s2_in_data_funcs[] = { 0, };
0401 static int mt7622_i2s3_in_data_pins[] = { 17, };
0402 static int mt7622_i2s3_in_data_funcs[] = { 0, };
0403 static int mt7622_i2s4_in_data_pins[] = { 18, };
0404 static int mt7622_i2s4_in_data_funcs[] = { 0, };
0405 static int mt7622_i2s_out_mclk_bclk_ws_pins[] = { 3, 4, 5, };
0406 static int mt7622_i2s_out_mclk_bclk_ws_funcs[] = { 0, 0, 0, };
0407 static int mt7622_i2s1_out_data_pins[] = { 2, };
0408 static int mt7622_i2s1_out_data_funcs[] = { 0, };
0409 static int mt7622_i2s2_out_data_pins[] = { 19, };
0410 static int mt7622_i2s2_out_data_funcs[] = { 0, };
0411 static int mt7622_i2s3_out_data_pins[] = { 20, };
0412 static int mt7622_i2s3_out_data_funcs[] = { 0, };
0413 static int mt7622_i2s4_out_data_pins[] = { 21, };
0414 static int mt7622_i2s4_out_data_funcs[] = { 0, };
0415
0416
0417 static int mt7622_ir_0_tx_pins[] = { 16, };
0418 static int mt7622_ir_0_tx_funcs[] = { 4, };
0419 static int mt7622_ir_1_tx_pins[] = { 59, };
0420 static int mt7622_ir_1_tx_funcs[] = { 5, };
0421 static int mt7622_ir_2_tx_pins[] = { 99, };
0422 static int mt7622_ir_2_tx_funcs[] = { 3, };
0423 static int mt7622_ir_0_rx_pins[] = { 17, };
0424 static int mt7622_ir_0_rx_funcs[] = { 4, };
0425 static int mt7622_ir_1_rx_pins[] = { 60, };
0426 static int mt7622_ir_1_rx_funcs[] = { 5, };
0427 static int mt7622_ir_2_rx_pins[] = { 100, };
0428 static int mt7622_ir_2_rx_funcs[] = { 3, };
0429
0430
0431 static int mt7622_mdc_mdio_pins[] = { 23, 24, };
0432 static int mt7622_mdc_mdio_funcs[] = { 0, 0, };
0433
0434
0435 static int mt7622_pcie0_0_waken_pins[] = { 14, };
0436 static int mt7622_pcie0_0_waken_funcs[] = { 2, };
0437 static int mt7622_pcie0_0_clkreq_pins[] = { 15, };
0438 static int mt7622_pcie0_0_clkreq_funcs[] = { 2, };
0439 static int mt7622_pcie0_1_waken_pins[] = { 79, };
0440 static int mt7622_pcie0_1_waken_funcs[] = { 4, };
0441 static int mt7622_pcie0_1_clkreq_pins[] = { 80, };
0442 static int mt7622_pcie0_1_clkreq_funcs[] = { 4, };
0443 static int mt7622_pcie1_0_waken_pins[] = { 14, };
0444 static int mt7622_pcie1_0_waken_funcs[] = { 3, };
0445 static int mt7622_pcie1_0_clkreq_pins[] = { 15, };
0446 static int mt7622_pcie1_0_clkreq_funcs[] = { 3, };
0447
0448 static int mt7622_pcie0_pad_perst_pins[] = { 83, };
0449 static int mt7622_pcie0_pad_perst_funcs[] = { 0, };
0450 static int mt7622_pcie1_pad_perst_pins[] = { 84, };
0451 static int mt7622_pcie1_pad_perst_funcs[] = { 0, };
0452
0453
0454 static int mt7622_pmic_bus_pins[] = { 71, 72, };
0455 static int mt7622_pmic_bus_funcs[] = { 0, 0, };
0456
0457
0458 static int mt7622_pnand_pins[] = { 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
0459 48, 49, 50, };
0460 static int mt7622_pnand_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0461 0, };
0462
0463
0464 static int mt7622_pwm_ch1_0_pins[] = { 51, };
0465 static int mt7622_pwm_ch1_0_funcs[] = { 3, };
0466 static int mt7622_pwm_ch1_1_pins[] = { 73, };
0467 static int mt7622_pwm_ch1_1_funcs[] = { 4, };
0468 static int mt7622_pwm_ch1_2_pins[] = { 95, };
0469 static int mt7622_pwm_ch1_2_funcs[] = { 0, };
0470 static int mt7622_pwm_ch2_0_pins[] = { 52, };
0471 static int mt7622_pwm_ch2_0_funcs[] = { 3, };
0472 static int mt7622_pwm_ch2_1_pins[] = { 74, };
0473 static int mt7622_pwm_ch2_1_funcs[] = { 4, };
0474 static int mt7622_pwm_ch2_2_pins[] = { 96, };
0475 static int mt7622_pwm_ch2_2_funcs[] = { 0, };
0476 static int mt7622_pwm_ch3_0_pins[] = { 53, };
0477 static int mt7622_pwm_ch3_0_funcs[] = { 3, };
0478 static int mt7622_pwm_ch3_1_pins[] = { 75, };
0479 static int mt7622_pwm_ch3_1_funcs[] = { 4, };
0480 static int mt7622_pwm_ch3_2_pins[] = { 97, };
0481 static int mt7622_pwm_ch3_2_funcs[] = { 0, };
0482 static int mt7622_pwm_ch4_0_pins[] = { 54, };
0483 static int mt7622_pwm_ch4_0_funcs[] = { 3, };
0484 static int mt7622_pwm_ch4_1_pins[] = { 67, };
0485 static int mt7622_pwm_ch4_1_funcs[] = { 3, };
0486 static int mt7622_pwm_ch4_2_pins[] = { 76, };
0487 static int mt7622_pwm_ch4_2_funcs[] = { 4, };
0488 static int mt7622_pwm_ch4_3_pins[] = { 98, };
0489 static int mt7622_pwm_ch4_3_funcs[] = { 0, };
0490 static int mt7622_pwm_ch5_0_pins[] = { 68, };
0491 static int mt7622_pwm_ch5_0_funcs[] = { 3, };
0492 static int mt7622_pwm_ch5_1_pins[] = { 77, };
0493 static int mt7622_pwm_ch5_1_funcs[] = { 4, };
0494 static int mt7622_pwm_ch5_2_pins[] = { 99, };
0495 static int mt7622_pwm_ch5_2_funcs[] = { 0, };
0496 static int mt7622_pwm_ch6_0_pins[] = { 69, };
0497 static int mt7622_pwm_ch6_0_funcs[] = { 3, };
0498 static int mt7622_pwm_ch6_1_pins[] = { 78, };
0499 static int mt7622_pwm_ch6_1_funcs[] = { 4, };
0500 static int mt7622_pwm_ch6_2_pins[] = { 81, };
0501 static int mt7622_pwm_ch6_2_funcs[] = { 4, };
0502 static int mt7622_pwm_ch6_3_pins[] = { 100, };
0503 static int mt7622_pwm_ch6_3_funcs[] = { 0, };
0504
0505
0506 static int mt7622_sd_0_pins[] = { 16, 17, 18, 19, 20, 21, };
0507 static int mt7622_sd_0_funcs[] = { 2, 2, 2, 2, 2, 2, };
0508 static int mt7622_sd_1_pins[] = { 25, 26, 27, 28, 29, 30, };
0509 static int mt7622_sd_1_funcs[] = { 2, 2, 2, 2, 2, 2, };
0510
0511
0512 static int mt7622_snfi_pins[] = { 8, 9, 10, 11, 12, 13, };
0513 static int mt7622_snfi_funcs[] = { 2, 2, 2, 2, 2, 2, };
0514
0515
0516 static int mt7622_spi_pins[] = { 8, 9, 10, 11, 12, 13 };
0517 static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, };
0518
0519
0520 static int mt7622_spic0_0_pins[] = { 63, 64, 65, 66, };
0521 static int mt7622_spic0_0_funcs[] = { 4, 4, 4, 4, };
0522 static int mt7622_spic0_1_pins[] = { 79, 80, 81, 82, };
0523 static int mt7622_spic0_1_funcs[] = { 3, 3, 3, 3, };
0524 static int mt7622_spic1_0_pins[] = { 67, 68, 69, 70, };
0525 static int mt7622_spic1_0_funcs[] = { 4, 4, 4, 4, };
0526 static int mt7622_spic1_1_pins[] = { 73, 74, 75, 76, };
0527 static int mt7622_spic1_1_funcs[] = { 0, 0, 0, 0, };
0528 static int mt7622_spic2_0_pins[] = { 10, 11, 12, 13, };
0529 static int mt7622_spic2_0_funcs[] = { 0, 0, 0, 0, };
0530 static int mt7622_spic2_0_wp_hold_pins[] = { 8, 9, };
0531 static int mt7622_spic2_0_wp_hold_funcs[] = { 0, 0, };
0532
0533
0534 static int mt7622_tdm_0_out_mclk_bclk_ws_pins[] = { 8, 9, 10, };
0535 static int mt7622_tdm_0_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
0536 static int mt7622_tdm_0_in_mclk_bclk_ws_pins[] = { 11, 12, 13, };
0537 static int mt7622_tdm_0_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
0538 static int mt7622_tdm_0_out_data_pins[] = { 20, };
0539 static int mt7622_tdm_0_out_data_funcs[] = { 3, };
0540 static int mt7622_tdm_0_in_data_pins[] = { 21, };
0541 static int mt7622_tdm_0_in_data_funcs[] = { 3, };
0542 static int mt7622_tdm_1_out_mclk_bclk_ws_pins[] = { 57, 58, 59, };
0543 static int mt7622_tdm_1_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
0544 static int mt7622_tdm_1_in_mclk_bclk_ws_pins[] = { 60, 61, 62, };
0545 static int mt7622_tdm_1_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
0546 static int mt7622_tdm_1_out_data_pins[] = { 55, };
0547 static int mt7622_tdm_1_out_data_funcs[] = { 3, };
0548 static int mt7622_tdm_1_in_data_pins[] = { 56, };
0549 static int mt7622_tdm_1_in_data_funcs[] = { 3, };
0550
0551
0552 static int mt7622_uart0_0_tx_rx_pins[] = { 6, 7, };
0553 static int mt7622_uart0_0_tx_rx_funcs[] = { 0, 0, };
0554 static int mt7622_uart1_0_tx_rx_pins[] = { 55, 56, };
0555 static int mt7622_uart1_0_tx_rx_funcs[] = { 2, 2, };
0556 static int mt7622_uart1_0_rts_cts_pins[] = { 57, 58, };
0557 static int mt7622_uart1_0_rts_cts_funcs[] = { 2, 2, };
0558 static int mt7622_uart1_1_tx_rx_pins[] = { 73, 74, };
0559 static int mt7622_uart1_1_tx_rx_funcs[] = { 2, 2, };
0560 static int mt7622_uart1_1_rts_cts_pins[] = { 75, 76, };
0561 static int mt7622_uart1_1_rts_cts_funcs[] = { 2, 2, };
0562 static int mt7622_uart2_0_tx_rx_pins[] = { 3, 4, };
0563 static int mt7622_uart2_0_tx_rx_funcs[] = { 2, 2, };
0564 static int mt7622_uart2_0_rts_cts_pins[] = { 1, 2, };
0565 static int mt7622_uart2_0_rts_cts_funcs[] = { 2, 2, };
0566 static int mt7622_uart2_1_tx_rx_pins[] = { 51, 52, };
0567 static int mt7622_uart2_1_tx_rx_funcs[] = { 0, 0, };
0568 static int mt7622_uart2_1_rts_cts_pins[] = { 53, 54, };
0569 static int mt7622_uart2_1_rts_cts_funcs[] = { 0, 0, };
0570 static int mt7622_uart2_2_tx_rx_pins[] = { 59, 60, };
0571 static int mt7622_uart2_2_tx_rx_funcs[] = { 4, 4, };
0572 static int mt7622_uart2_2_rts_cts_pins[] = { 61, 62, };
0573 static int mt7622_uart2_2_rts_cts_funcs[] = { 4, 4, };
0574 static int mt7622_uart2_3_tx_rx_pins[] = { 95, 96, };
0575 static int mt7622_uart2_3_tx_rx_funcs[] = { 3, 3, };
0576 static int mt7622_uart3_0_tx_rx_pins[] = { 57, 58, };
0577 static int mt7622_uart3_0_tx_rx_funcs[] = { 5, 5, };
0578 static int mt7622_uart3_1_tx_rx_pins[] = { 81, 82, };
0579 static int mt7622_uart3_1_tx_rx_funcs[] = { 0, 0, };
0580 static int mt7622_uart3_1_rts_cts_pins[] = { 79, 80, };
0581 static int mt7622_uart3_1_rts_cts_funcs[] = { 0, 0, };
0582 static int mt7622_uart4_0_tx_rx_pins[] = { 61, 62, };
0583 static int mt7622_uart4_0_tx_rx_funcs[] = { 5, 5, };
0584 static int mt7622_uart4_1_tx_rx_pins[] = { 91, 92, };
0585 static int mt7622_uart4_1_tx_rx_funcs[] = { 0, 0, };
0586 static int mt7622_uart4_1_rts_cts_pins[] = { 93, 94 };
0587 static int mt7622_uart4_1_rts_cts_funcs[] = { 0, 0, };
0588 static int mt7622_uart4_2_tx_rx_pins[] = { 97, 98, };
0589 static int mt7622_uart4_2_tx_rx_funcs[] = { 2, 2, };
0590 static int mt7622_uart4_2_rts_cts_pins[] = { 95, 96 };
0591 static int mt7622_uart4_2_rts_cts_funcs[] = { 2, 2, };
0592
0593
0594 static int mt7622_watchdog_pins[] = { 78, };
0595 static int mt7622_watchdog_funcs[] = { 0, };
0596
0597
0598 static int mt7622_wled_pins[] = { 85, };
0599 static int mt7622_wled_funcs[] = { 0, };
0600
0601 static const struct group_desc mt7622_groups[] = {
0602 PINCTRL_PIN_GROUP("antsel0", mt7622_antsel0),
0603 PINCTRL_PIN_GROUP("antsel1", mt7622_antsel1),
0604 PINCTRL_PIN_GROUP("antsel2", mt7622_antsel2),
0605 PINCTRL_PIN_GROUP("antsel3", mt7622_antsel3),
0606 PINCTRL_PIN_GROUP("antsel4", mt7622_antsel4),
0607 PINCTRL_PIN_GROUP("antsel5", mt7622_antsel5),
0608 PINCTRL_PIN_GROUP("antsel6", mt7622_antsel6),
0609 PINCTRL_PIN_GROUP("antsel7", mt7622_antsel7),
0610 PINCTRL_PIN_GROUP("antsel8", mt7622_antsel8),
0611 PINCTRL_PIN_GROUP("antsel9", mt7622_antsel9),
0612 PINCTRL_PIN_GROUP("antsel10", mt7622_antsel10),
0613 PINCTRL_PIN_GROUP("antsel11", mt7622_antsel11),
0614 PINCTRL_PIN_GROUP("antsel12", mt7622_antsel12),
0615 PINCTRL_PIN_GROUP("antsel13", mt7622_antsel13),
0616 PINCTRL_PIN_GROUP("antsel14", mt7622_antsel14),
0617 PINCTRL_PIN_GROUP("antsel15", mt7622_antsel15),
0618 PINCTRL_PIN_GROUP("antsel16", mt7622_antsel16),
0619 PINCTRL_PIN_GROUP("antsel17", mt7622_antsel17),
0620 PINCTRL_PIN_GROUP("antsel18", mt7622_antsel18),
0621 PINCTRL_PIN_GROUP("antsel19", mt7622_antsel19),
0622 PINCTRL_PIN_GROUP("antsel20", mt7622_antsel20),
0623 PINCTRL_PIN_GROUP("antsel21", mt7622_antsel21),
0624 PINCTRL_PIN_GROUP("antsel22", mt7622_antsel22),
0625 PINCTRL_PIN_GROUP("antsel23", mt7622_antsel23),
0626 PINCTRL_PIN_GROUP("antsel24", mt7622_antsel24),
0627 PINCTRL_PIN_GROUP("antsel25", mt7622_antsel25),
0628 PINCTRL_PIN_GROUP("antsel26", mt7622_antsel26),
0629 PINCTRL_PIN_GROUP("antsel27", mt7622_antsel27),
0630 PINCTRL_PIN_GROUP("antsel28", mt7622_antsel28),
0631 PINCTRL_PIN_GROUP("antsel29", mt7622_antsel29),
0632 PINCTRL_PIN_GROUP("emmc", mt7622_emmc),
0633 PINCTRL_PIN_GROUP("emmc_rst", mt7622_emmc_rst),
0634 PINCTRL_PIN_GROUP("ephy_leds", mt7622_ephy_leds),
0635 PINCTRL_PIN_GROUP("ephy0_led", mt7622_ephy0_led),
0636 PINCTRL_PIN_GROUP("ephy1_led", mt7622_ephy1_led),
0637 PINCTRL_PIN_GROUP("ephy2_led", mt7622_ephy2_led),
0638 PINCTRL_PIN_GROUP("ephy3_led", mt7622_ephy3_led),
0639 PINCTRL_PIN_GROUP("ephy4_led", mt7622_ephy4_led),
0640 PINCTRL_PIN_GROUP("esw", mt7622_esw),
0641 PINCTRL_PIN_GROUP("esw_p0_p1", mt7622_esw_p0_p1),
0642 PINCTRL_PIN_GROUP("esw_p2_p3_p4", mt7622_esw_p2_p3_p4),
0643 PINCTRL_PIN_GROUP("rgmii_via_esw", mt7622_rgmii_via_esw),
0644 PINCTRL_PIN_GROUP("rgmii_via_gmac1", mt7622_rgmii_via_gmac1),
0645 PINCTRL_PIN_GROUP("rgmii_via_gmac2", mt7622_rgmii_via_gmac2),
0646 PINCTRL_PIN_GROUP("i2c0", mt7622_i2c0),
0647 PINCTRL_PIN_GROUP("i2c1_0", mt7622_i2c1_0),
0648 PINCTRL_PIN_GROUP("i2c1_1", mt7622_i2c1_1),
0649 PINCTRL_PIN_GROUP("i2c1_2", mt7622_i2c1_2),
0650 PINCTRL_PIN_GROUP("i2c2_0", mt7622_i2c2_0),
0651 PINCTRL_PIN_GROUP("i2c2_1", mt7622_i2c2_1),
0652 PINCTRL_PIN_GROUP("i2c2_2", mt7622_i2c2_2),
0653 PINCTRL_PIN_GROUP("i2s_out_mclk_bclk_ws", mt7622_i2s_out_mclk_bclk_ws),
0654 PINCTRL_PIN_GROUP("i2s_in_mclk_bclk_ws", mt7622_i2s_in_mclk_bclk_ws),
0655 PINCTRL_PIN_GROUP("i2s1_in_data", mt7622_i2s1_in_data),
0656 PINCTRL_PIN_GROUP("i2s2_in_data", mt7622_i2s2_in_data),
0657 PINCTRL_PIN_GROUP("i2s3_in_data", mt7622_i2s3_in_data),
0658 PINCTRL_PIN_GROUP("i2s4_in_data", mt7622_i2s4_in_data),
0659 PINCTRL_PIN_GROUP("i2s1_out_data", mt7622_i2s1_out_data),
0660 PINCTRL_PIN_GROUP("i2s2_out_data", mt7622_i2s2_out_data),
0661 PINCTRL_PIN_GROUP("i2s3_out_data", mt7622_i2s3_out_data),
0662 PINCTRL_PIN_GROUP("i2s4_out_data", mt7622_i2s4_out_data),
0663 PINCTRL_PIN_GROUP("ir_0_tx", mt7622_ir_0_tx),
0664 PINCTRL_PIN_GROUP("ir_1_tx", mt7622_ir_1_tx),
0665 PINCTRL_PIN_GROUP("ir_2_tx", mt7622_ir_2_tx),
0666 PINCTRL_PIN_GROUP("ir_0_rx", mt7622_ir_0_rx),
0667 PINCTRL_PIN_GROUP("ir_1_rx", mt7622_ir_1_rx),
0668 PINCTRL_PIN_GROUP("ir_2_rx", mt7622_ir_2_rx),
0669 PINCTRL_PIN_GROUP("mdc_mdio", mt7622_mdc_mdio),
0670 PINCTRL_PIN_GROUP("pcie0_0_waken", mt7622_pcie0_0_waken),
0671 PINCTRL_PIN_GROUP("pcie0_0_clkreq", mt7622_pcie0_0_clkreq),
0672 PINCTRL_PIN_GROUP("pcie0_1_waken", mt7622_pcie0_1_waken),
0673 PINCTRL_PIN_GROUP("pcie0_1_clkreq", mt7622_pcie0_1_clkreq),
0674 PINCTRL_PIN_GROUP("pcie1_0_waken", mt7622_pcie1_0_waken),
0675 PINCTRL_PIN_GROUP("pcie1_0_clkreq", mt7622_pcie1_0_clkreq),
0676 PINCTRL_PIN_GROUP("pcie0_pad_perst", mt7622_pcie0_pad_perst),
0677 PINCTRL_PIN_GROUP("pcie1_pad_perst", mt7622_pcie1_pad_perst),
0678 PINCTRL_PIN_GROUP("par_nand", mt7622_pnand),
0679 PINCTRL_PIN_GROUP("pmic_bus", mt7622_pmic_bus),
0680 PINCTRL_PIN_GROUP("pwm_ch1_0", mt7622_pwm_ch1_0),
0681 PINCTRL_PIN_GROUP("pwm_ch1_1", mt7622_pwm_ch1_1),
0682 PINCTRL_PIN_GROUP("pwm_ch1_2", mt7622_pwm_ch1_2),
0683 PINCTRL_PIN_GROUP("pwm_ch2_0", mt7622_pwm_ch2_0),
0684 PINCTRL_PIN_GROUP("pwm_ch2_1", mt7622_pwm_ch2_1),
0685 PINCTRL_PIN_GROUP("pwm_ch2_2", mt7622_pwm_ch2_2),
0686 PINCTRL_PIN_GROUP("pwm_ch3_0", mt7622_pwm_ch3_0),
0687 PINCTRL_PIN_GROUP("pwm_ch3_1", mt7622_pwm_ch3_1),
0688 PINCTRL_PIN_GROUP("pwm_ch3_2", mt7622_pwm_ch3_2),
0689 PINCTRL_PIN_GROUP("pwm_ch4_0", mt7622_pwm_ch4_0),
0690 PINCTRL_PIN_GROUP("pwm_ch4_1", mt7622_pwm_ch4_1),
0691 PINCTRL_PIN_GROUP("pwm_ch4_2", mt7622_pwm_ch4_2),
0692 PINCTRL_PIN_GROUP("pwm_ch4_3", mt7622_pwm_ch4_3),
0693 PINCTRL_PIN_GROUP("pwm_ch5_0", mt7622_pwm_ch5_0),
0694 PINCTRL_PIN_GROUP("pwm_ch5_1", mt7622_pwm_ch5_1),
0695 PINCTRL_PIN_GROUP("pwm_ch5_2", mt7622_pwm_ch5_2),
0696 PINCTRL_PIN_GROUP("pwm_ch6_0", mt7622_pwm_ch6_0),
0697 PINCTRL_PIN_GROUP("pwm_ch6_1", mt7622_pwm_ch6_1),
0698 PINCTRL_PIN_GROUP("pwm_ch6_2", mt7622_pwm_ch6_2),
0699 PINCTRL_PIN_GROUP("pwm_ch6_3", mt7622_pwm_ch6_3),
0700 PINCTRL_PIN_GROUP("sd_0", mt7622_sd_0),
0701 PINCTRL_PIN_GROUP("sd_1", mt7622_sd_1),
0702 PINCTRL_PIN_GROUP("snfi", mt7622_snfi),
0703 PINCTRL_PIN_GROUP("spi_nor", mt7622_spi),
0704 PINCTRL_PIN_GROUP("spic0_0", mt7622_spic0_0),
0705 PINCTRL_PIN_GROUP("spic0_1", mt7622_spic0_1),
0706 PINCTRL_PIN_GROUP("spic1_0", mt7622_spic1_0),
0707 PINCTRL_PIN_GROUP("spic1_1", mt7622_spic1_1),
0708 PINCTRL_PIN_GROUP("spic2_0", mt7622_spic2_0),
0709 PINCTRL_PIN_GROUP("spic2_0_wp_hold", mt7622_spic2_0_wp_hold),
0710 PINCTRL_PIN_GROUP("tdm_0_out_mclk_bclk_ws",
0711 mt7622_tdm_0_out_mclk_bclk_ws),
0712 PINCTRL_PIN_GROUP("tdm_0_in_mclk_bclk_ws",
0713 mt7622_tdm_0_in_mclk_bclk_ws),
0714 PINCTRL_PIN_GROUP("tdm_0_out_data", mt7622_tdm_0_out_data),
0715 PINCTRL_PIN_GROUP("tdm_0_in_data", mt7622_tdm_0_in_data),
0716 PINCTRL_PIN_GROUP("tdm_1_out_mclk_bclk_ws",
0717 mt7622_tdm_1_out_mclk_bclk_ws),
0718 PINCTRL_PIN_GROUP("tdm_1_in_mclk_bclk_ws",
0719 mt7622_tdm_1_in_mclk_bclk_ws),
0720 PINCTRL_PIN_GROUP("tdm_1_out_data", mt7622_tdm_1_out_data),
0721 PINCTRL_PIN_GROUP("tdm_1_in_data", mt7622_tdm_1_in_data),
0722 PINCTRL_PIN_GROUP("uart0_0_tx_rx", mt7622_uart0_0_tx_rx),
0723 PINCTRL_PIN_GROUP("uart1_0_tx_rx", mt7622_uart1_0_tx_rx),
0724 PINCTRL_PIN_GROUP("uart1_0_rts_cts", mt7622_uart1_0_rts_cts),
0725 PINCTRL_PIN_GROUP("uart1_1_tx_rx", mt7622_uart1_1_tx_rx),
0726 PINCTRL_PIN_GROUP("uart1_1_rts_cts", mt7622_uart1_1_rts_cts),
0727 PINCTRL_PIN_GROUP("uart2_0_tx_rx", mt7622_uart2_0_tx_rx),
0728 PINCTRL_PIN_GROUP("uart2_0_rts_cts", mt7622_uart2_0_rts_cts),
0729 PINCTRL_PIN_GROUP("uart2_1_tx_rx", mt7622_uart2_1_tx_rx),
0730 PINCTRL_PIN_GROUP("uart2_1_rts_cts", mt7622_uart2_1_rts_cts),
0731 PINCTRL_PIN_GROUP("uart2_2_tx_rx", mt7622_uart2_2_tx_rx),
0732 PINCTRL_PIN_GROUP("uart2_2_rts_cts", mt7622_uart2_2_rts_cts),
0733 PINCTRL_PIN_GROUP("uart2_3_tx_rx", mt7622_uart2_3_tx_rx),
0734 PINCTRL_PIN_GROUP("uart3_0_tx_rx", mt7622_uart3_0_tx_rx),
0735 PINCTRL_PIN_GROUP("uart3_1_tx_rx", mt7622_uart3_1_tx_rx),
0736 PINCTRL_PIN_GROUP("uart3_1_rts_cts", mt7622_uart3_1_rts_cts),
0737 PINCTRL_PIN_GROUP("uart4_0_tx_rx", mt7622_uart4_0_tx_rx),
0738 PINCTRL_PIN_GROUP("uart4_1_tx_rx", mt7622_uart4_1_tx_rx),
0739 PINCTRL_PIN_GROUP("uart4_1_rts_cts", mt7622_uart4_1_rts_cts),
0740 PINCTRL_PIN_GROUP("uart4_2_tx_rx", mt7622_uart4_2_tx_rx),
0741 PINCTRL_PIN_GROUP("uart4_2_rts_cts", mt7622_uart4_2_rts_cts),
0742 PINCTRL_PIN_GROUP("watchdog", mt7622_watchdog),
0743 PINCTRL_PIN_GROUP("wled", mt7622_wled),
0744 };
0745
0746
0747
0748
0749 static const char *mt7622_antsel_groups[] = { "antsel0", "antsel1", "antsel2",
0750 "antsel3", "antsel4", "antsel5",
0751 "antsel6", "antsel7", "antsel8",
0752 "antsel9", "antsel10", "antsel11",
0753 "antsel12", "antsel13", "antsel14",
0754 "antsel15", "antsel16", "antsel17",
0755 "antsel18", "antsel19", "antsel20",
0756 "antsel21", "antsel22", "antsel23",
0757 "antsel24", "antsel25", "antsel26",
0758 "antsel27", "antsel28", "antsel29",};
0759 static const char *mt7622_emmc_groups[] = { "emmc", "emmc_rst", };
0760 static const char *mt7622_ethernet_groups[] = { "esw", "esw_p0_p1",
0761 "esw_p2_p3_p4", "mdc_mdio",
0762 "rgmii_via_gmac1",
0763 "rgmii_via_gmac2",
0764 "rgmii_via_esw", };
0765 static const char *mt7622_i2c_groups[] = { "i2c0", "i2c1_0", "i2c1_1",
0766 "i2c1_2", "i2c2_0", "i2c2_1",
0767 "i2c2_2", };
0768 static const char *mt7622_i2s_groups[] = { "i2s_out_mclk_bclk_ws",
0769 "i2s_in_mclk_bclk_ws",
0770 "i2s1_in_data", "i2s2_in_data",
0771 "i2s3_in_data", "i2s4_in_data",
0772 "i2s1_out_data", "i2s2_out_data",
0773 "i2s3_out_data", "i2s4_out_data", };
0774 static const char *mt7622_ir_groups[] = { "ir_0_tx", "ir_1_tx", "ir_2_tx",
0775 "ir_0_rx", "ir_1_rx", "ir_2_rx"};
0776 static const char *mt7622_led_groups[] = { "ephy_leds", "ephy0_led",
0777 "ephy1_led", "ephy2_led",
0778 "ephy3_led", "ephy4_led",
0779 "wled", };
0780 static const char *mt7622_flash_groups[] = { "par_nand", "snfi", "spi_nor"};
0781 static const char *mt7622_pcie_groups[] = { "pcie0_0_waken", "pcie0_0_clkreq",
0782 "pcie0_1_waken", "pcie0_1_clkreq",
0783 "pcie1_0_waken", "pcie1_0_clkreq",
0784 "pcie0_pad_perst",
0785 "pcie1_pad_perst", };
0786 static const char *mt7622_pmic_bus_groups[] = { "pmic_bus", };
0787 static const char *mt7622_pwm_groups[] = { "pwm_ch1_0", "pwm_ch1_1",
0788 "pwm_ch1_2", "pwm_ch2_0",
0789 "pwm_ch2_1", "pwm_ch2_2",
0790 "pwm_ch3_0", "pwm_ch3_1",
0791 "pwm_ch3_2", "pwm_ch4_0",
0792 "pwm_ch4_1", "pwm_ch4_2",
0793 "pwm_ch4_3", "pwm_ch5_0",
0794 "pwm_ch5_1", "pwm_ch5_2",
0795 "pwm_ch6_0", "pwm_ch6_1",
0796 "pwm_ch6_2", "pwm_ch6_3", };
0797 static const char *mt7622_sd_groups[] = { "sd_0", "sd_1", };
0798 static const char *mt7622_spic_groups[] = { "spic0_0", "spic0_1", "spic1_0",
0799 "spic1_1", "spic2_0",
0800 "spic2_0_wp_hold", };
0801 static const char *mt7622_tdm_groups[] = { "tdm_0_out_mclk_bclk_ws",
0802 "tdm_0_in_mclk_bclk_ws",
0803 "tdm_0_out_data",
0804 "tdm_0_in_data",
0805 "tdm_1_out_mclk_bclk_ws",
0806 "tdm_1_in_mclk_bclk_ws",
0807 "tdm_1_out_data",
0808 "tdm_1_in_data", };
0809
0810 static const char *mt7622_uart_groups[] = { "uart0_0_tx_rx",
0811 "uart1_0_tx_rx", "uart1_0_rts_cts",
0812 "uart1_1_tx_rx", "uart1_1_rts_cts",
0813 "uart2_0_tx_rx", "uart2_0_rts_cts",
0814 "uart2_1_tx_rx", "uart2_1_rts_cts",
0815 "uart2_2_tx_rx", "uart2_2_rts_cts",
0816 "uart2_3_tx_rx",
0817 "uart3_0_tx_rx",
0818 "uart3_1_tx_rx", "uart3_1_rts_cts",
0819 "uart4_0_tx_rx",
0820 "uart4_1_tx_rx", "uart4_1_rts_cts",
0821 "uart4_2_tx_rx",
0822 "uart4_2_rts_cts",};
0823 static const char *mt7622_wdt_groups[] = { "watchdog", };
0824
0825 static const struct function_desc mt7622_functions[] = {
0826 {"antsel", mt7622_antsel_groups, ARRAY_SIZE(mt7622_antsel_groups)},
0827 {"emmc", mt7622_emmc_groups, ARRAY_SIZE(mt7622_emmc_groups)},
0828 {"eth", mt7622_ethernet_groups, ARRAY_SIZE(mt7622_ethernet_groups)},
0829 {"i2c", mt7622_i2c_groups, ARRAY_SIZE(mt7622_i2c_groups)},
0830 {"i2s", mt7622_i2s_groups, ARRAY_SIZE(mt7622_i2s_groups)},
0831 {"ir", mt7622_ir_groups, ARRAY_SIZE(mt7622_ir_groups)},
0832 {"led", mt7622_led_groups, ARRAY_SIZE(mt7622_led_groups)},
0833 {"flash", mt7622_flash_groups, ARRAY_SIZE(mt7622_flash_groups)},
0834 {"pcie", mt7622_pcie_groups, ARRAY_SIZE(mt7622_pcie_groups)},
0835 {"pmic", mt7622_pmic_bus_groups, ARRAY_SIZE(mt7622_pmic_bus_groups)},
0836 {"pwm", mt7622_pwm_groups, ARRAY_SIZE(mt7622_pwm_groups)},
0837 {"sd", mt7622_sd_groups, ARRAY_SIZE(mt7622_sd_groups)},
0838 {"spi", mt7622_spic_groups, ARRAY_SIZE(mt7622_spic_groups)},
0839 {"tdm", mt7622_tdm_groups, ARRAY_SIZE(mt7622_tdm_groups)},
0840 {"uart", mt7622_uart_groups, ARRAY_SIZE(mt7622_uart_groups)},
0841 {"watchdog", mt7622_wdt_groups, ARRAY_SIZE(mt7622_wdt_groups)},
0842 };
0843
0844 static const struct mtk_eint_hw mt7622_eint_hw = {
0845 .port_mask = 7,
0846 .ports = 7,
0847 .ap_num = ARRAY_SIZE(mt7622_pins),
0848 .db_cnt = 20,
0849 };
0850
0851 static const struct mtk_pin_soc mt7622_data = {
0852 .reg_cal = mt7622_reg_cals,
0853 .pins = mt7622_pins,
0854 .npins = ARRAY_SIZE(mt7622_pins),
0855 .grps = mt7622_groups,
0856 .ngrps = ARRAY_SIZE(mt7622_groups),
0857 .funcs = mt7622_functions,
0858 .nfuncs = ARRAY_SIZE(mt7622_functions),
0859 .eint_hw = &mt7622_eint_hw,
0860 .gpio_m = 1,
0861 .ies_present = false,
0862 .base_names = mtk_default_register_base_names,
0863 .nbase_names = ARRAY_SIZE(mtk_default_register_base_names),
0864 .bias_disable_set = mtk_pinconf_bias_disable_set,
0865 .bias_disable_get = mtk_pinconf_bias_disable_get,
0866 .bias_set = mtk_pinconf_bias_set,
0867 .bias_get = mtk_pinconf_bias_get,
0868 .drive_set = mtk_pinconf_drive_set,
0869 .drive_get = mtk_pinconf_drive_get,
0870 };
0871
0872 static const struct of_device_id mt7622_pinctrl_of_match[] = {
0873 { .compatible = "mediatek,mt7622-pinctrl", },
0874 { }
0875 };
0876
0877 static int mt7622_pinctrl_probe(struct platform_device *pdev)
0878 {
0879 return mtk_moore_pinctrl_probe(pdev, &mt7622_data);
0880 }
0881
0882 static struct platform_driver mt7622_pinctrl_driver = {
0883 .driver = {
0884 .name = "mt7622-pinctrl",
0885 .of_match_table = mt7622_pinctrl_of_match,
0886 },
0887 .probe = mt7622_pinctrl_probe,
0888 };
0889
0890 static int __init mt7622_pinctrl_init(void)
0891 {
0892 return platform_driver_register(&mt7622_pinctrl_driver);
0893 }
0894 arch_initcall(mt7622_pinctrl_init);
