pinctrl/mediatek/pinctrl-mt6797.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Based on pinctrl-mt6765.c
0004  *
0005  * Copyright (C) 2018 MediaTek Inc.
0006  *
0007  * Author: ZH Chen <zh.chen@mediatek.com>
0008  *
0009  * Copyright (C) Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
0010  *
0011  */
0012
0013 #include "pinctrl-mtk-mt6797.h"
0014 #include "pinctrl-paris.h"
0015
0016 /*
0017  * MT6797 have multiple bases to program pin configuration listed as the below:
0018  * gpio:0x10005000, iocfg[l]:0x10002000, iocfg[b]:0x10002400,
0019  * iocfg[r]:0x10002800, iocfg[t]:0x10002C00.
0020  * _i_base could be used to indicate what base the pin should be mapped into.
0021  */
0022
0023 static const struct mtk_pin_field_calc mt6797_pin_mode_range[] = {
0024     PIN_FIELD(0, 261, 0x300, 0x10, 0, 4),
0025 };
0026
0027 static const struct mtk_pin_field_calc mt6797_pin_dir_range[] = {
0028     PIN_FIELD(0, 261, 0x0, 0x10, 0, 1),
0029 };
0030
0031 static const struct mtk_pin_field_calc mt6797_pin_di_range[] = {
0032     PIN_FIELD(0, 261, 0x200, 0x10, 0, 1),
0033 };
0034
0035 static const struct mtk_pin_field_calc mt6797_pin_do_range[] = {
0036     PIN_FIELD(0, 261, 0x100, 0x10, 0, 1),
0037 };
0038
0039 static const struct mtk_pin_reg_calc mt6797_reg_cals[PINCTRL_PIN_REG_MAX] = {
0040     [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6797_pin_mode_range),
0041     [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6797_pin_dir_range),
0042     [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6797_pin_di_range),
0043     [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6797_pin_do_range),
0044 };
0045
0046 static const char * const mt6797_pinctrl_register_base_names[] = {
0047     "gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt",
0048 };
0049
0050 static const struct mtk_pin_soc mt6797_data = {
0051     .reg_cal = mt6797_reg_cals,
0052     .pins = mtk_pins_mt6797,
0053     .npins = ARRAY_SIZE(mtk_pins_mt6797),
0054     .ngrps = ARRAY_SIZE(mtk_pins_mt6797),
0055     .gpio_m = 0,
0056     .base_names = mt6797_pinctrl_register_base_names,
0057     .nbase_names = ARRAY_SIZE(mt6797_pinctrl_register_base_names),
0058 };
0059
0060 static const struct of_device_id mt6797_pinctrl_of_match[] = {
0061     { .compatible = "mediatek,mt6797-pinctrl", .data = &mt6797_data },
0062     { }
0063 };
0064
0065 static struct platform_driver mt6797_pinctrl_driver = {
0066     .driver = {
0067         .name = "mt6797-pinctrl",
0068         .of_match_table = mt6797_pinctrl_of_match,
0069     },
0070     .probe = mtk_paris_pinctrl_probe,
0071 };
0072
0073 static int __init mt6797_pinctrl_init(void)
0074 {
0075     return platform_driver_register(&mt6797_pinctrl_driver);
0076 }
0077 arch_initcall(mt6797_pinctrl_init);