pinctrl/mediatek/pinctrl-mt2712.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2018 MediaTek Inc.
0004  * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>
0005  *
0006  */
0007
0008 #include <linux/module.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/of.h>
0011 #include <linux/of_device.h>
0012 #include <linux/pinctrl/pinctrl.h>
0013 #include <linux/regmap.h>
0014 #include <linux/pinctrl/pinconf-generic.h>
0015 #include <dt-bindings/pinctrl/mt65xx.h>
0016
0017 #include "pinctrl-mtk-common.h"
0018 #include "pinctrl-mtk-mt2712.h"
0019
0020 static const struct mtk_pin_spec_pupd_set_samereg mt2712_spec_pupd[] = {
0021     MTK_PIN_PUPD_SPEC_SR(18, 0xe50, 2, 1, 0),
0022     MTK_PIN_PUPD_SPEC_SR(19, 0xe60, 12, 11, 10),
0023     MTK_PIN_PUPD_SPEC_SR(20, 0xe50, 5, 4, 3),
0024     MTK_PIN_PUPD_SPEC_SR(21, 0xe60, 15, 14, 13),
0025     MTK_PIN_PUPD_SPEC_SR(22, 0xe50, 8, 7, 6),
0026     MTK_PIN_PUPD_SPEC_SR(23, 0xe70, 2, 1, 0),
0027
0028     MTK_PIN_PUPD_SPEC_SR(30, 0xf30, 2, 1, 0),
0029     MTK_PIN_PUPD_SPEC_SR(31, 0xf30, 6, 5, 4),
0030     MTK_PIN_PUPD_SPEC_SR(32, 0xf30, 10, 9, 8),
0031     MTK_PIN_PUPD_SPEC_SR(33, 0xf30, 14, 13, 12),
0032     MTK_PIN_PUPD_SPEC_SR(34, 0xf40, 2, 1, 0),
0033     MTK_PIN_PUPD_SPEC_SR(35, 0xf40, 6, 5, 4),
0034     MTK_PIN_PUPD_SPEC_SR(36, 0xf40, 10, 9, 8),
0035     MTK_PIN_PUPD_SPEC_SR(37, 0xc40, 2, 1, 0),
0036     MTK_PIN_PUPD_SPEC_SR(38, 0xc60, 2, 1, 0),
0037     MTK_PIN_PUPD_SPEC_SR(39, 0xc60, 2, 1, 0),
0038     MTK_PIN_PUPD_SPEC_SR(40, 0xc60, 2, 1, 0),
0039     MTK_PIN_PUPD_SPEC_SR(41, 0xc60, 2, 1, 0),
0040     MTK_PIN_PUPD_SPEC_SR(42, 0xc60, 2, 1, 0),
0041     MTK_PIN_PUPD_SPEC_SR(43, 0xc60, 2, 1, 0),
0042     MTK_PIN_PUPD_SPEC_SR(44, 0xc60, 2, 1, 0),
0043     MTK_PIN_PUPD_SPEC_SR(45, 0xc60, 2, 1, 0),
0044     MTK_PIN_PUPD_SPEC_SR(46, 0xc50, 2, 1, 0),
0045     MTK_PIN_PUPD_SPEC_SR(47, 0xda0, 2, 1, 0),
0046     MTK_PIN_PUPD_SPEC_SR(48, 0xd90, 2, 1, 0),
0047     MTK_PIN_PUPD_SPEC_SR(49, 0xdf0, 14, 13, 12),
0048     MTK_PIN_PUPD_SPEC_SR(50, 0xdf0, 10, 9, 8),
0049     MTK_PIN_PUPD_SPEC_SR(51, 0xdf0, 6, 5, 4),
0050     MTK_PIN_PUPD_SPEC_SR(52, 0xdf0, 2, 1, 0),
0051     MTK_PIN_PUPD_SPEC_SR(53, 0xd50, 2, 1, 0),
0052     MTK_PIN_PUPD_SPEC_SR(54, 0xd80, 2, 1, 0),
0053     MTK_PIN_PUPD_SPEC_SR(55, 0xe00, 2, 1, 0),
0054     MTK_PIN_PUPD_SPEC_SR(56, 0xd40, 2, 1, 0),
0055
0056     MTK_PIN_PUPD_SPEC_SR(63, 0xc80, 2, 1, 0),
0057     MTK_PIN_PUPD_SPEC_SR(64, 0xdb0, 14, 13, 12),
0058     MTK_PIN_PUPD_SPEC_SR(65, 0xdb0, 6, 5, 4),
0059     MTK_PIN_PUPD_SPEC_SR(66, 0xdb0, 10, 9, 8),
0060     MTK_PIN_PUPD_SPEC_SR(67, 0xcd0, 2, 1, 0),
0061     MTK_PIN_PUPD_SPEC_SR(68, 0xdb0, 2, 1, 0),
0062     MTK_PIN_PUPD_SPEC_SR(69, 0xc90, 2, 1, 0),
0063     MTK_PIN_PUPD_SPEC_SR(70, 0xcc0, 2, 1, 0),
0064
0065     MTK_PIN_PUPD_SPEC_SR(89, 0xce0, 2, 1, 0),
0066     MTK_PIN_PUPD_SPEC_SR(90, 0xdd0, 14, 13, 12),
0067     MTK_PIN_PUPD_SPEC_SR(91, 0xdd0, 10, 9, 8),
0068     MTK_PIN_PUPD_SPEC_SR(92, 0xdd0, 6, 5, 4),
0069     MTK_PIN_PUPD_SPEC_SR(93, 0xdd0, 2, 1, 0),
0070     MTK_PIN_PUPD_SPEC_SR(94, 0xd20, 2, 1, 0),
0071     MTK_PIN_PUPD_SPEC_SR(95, 0xcf0, 2, 1, 0),
0072     MTK_PIN_PUPD_SPEC_SR(96, 0xd30, 2, 1, 0),
0073
0074     MTK_PIN_PUPD_SPEC_SR(135, 0xe50, 11, 10, 9),
0075     MTK_PIN_PUPD_SPEC_SR(136, 0xe50, 14, 13, 12),
0076     MTK_PIN_PUPD_SPEC_SR(137, 0xe70, 5, 4, 3),
0077     MTK_PIN_PUPD_SPEC_SR(138, 0xe70, 8, 7, 6),
0078     MTK_PIN_PUPD_SPEC_SR(139, 0xe70, 11, 10, 9),
0079     MTK_PIN_PUPD_SPEC_SR(140, 0xe70, 14, 13, 12),
0080     MTK_PIN_PUPD_SPEC_SR(141, 0xe60, 2, 1, 0),
0081     MTK_PIN_PUPD_SPEC_SR(142, 0xe60, 5, 4, 3)
0082 };
0083
0084 static const struct mtk_pin_ies_smt_set mt2712_smt_set[] = {
0085     MTK_PIN_IES_SMT_SPEC(0, 3, 0x900, 2),
0086     MTK_PIN_IES_SMT_SPEC(4, 7, 0x900, 0),
0087     MTK_PIN_IES_SMT_SPEC(8, 11, 0x900, 1),
0088     MTK_PIN_IES_SMT_SPEC(12, 12, 0x8d0, 6),
0089     MTK_PIN_IES_SMT_SPEC(13, 13, 0x8d0, 7),
0090     MTK_PIN_IES_SMT_SPEC(14, 14, 0x8d0, 6),
0091     MTK_PIN_IES_SMT_SPEC(15, 15, 0x8d0, 7),
0092     MTK_PIN_IES_SMT_SPEC(18, 23, 0x8d0, 1),
0093     MTK_PIN_IES_SMT_SPEC(24, 25, 0x8d0, 2),
0094     MTK_PIN_IES_SMT_SPEC(26, 26, 0x8d0, 3),
0095     MTK_PIN_IES_SMT_SPEC(27, 27, 0x8d0, 4),
0096     MTK_PIN_IES_SMT_SPEC(28, 29, 0x8d0, 3),
0097     MTK_PIN_IES_SMT_SPEC(30, 36, 0xf50, 13),
0098     MTK_PIN_IES_SMT_SPEC(37, 37, 0xc40, 13),
0099     MTK_PIN_IES_SMT_SPEC(38, 45, 0xc60, 13),
0100     MTK_PIN_IES_SMT_SPEC(46, 46, 0xc50, 13),
0101     MTK_PIN_IES_SMT_SPEC(47, 47, 0xda0, 13),
0102     MTK_PIN_IES_SMT_SPEC(48, 48, 0xd90, 13),
0103     MTK_PIN_IES_SMT_SPEC(49, 52, 0xd60, 13),
0104     MTK_PIN_IES_SMT_SPEC(53, 53, 0xd50, 13),
0105     MTK_PIN_IES_SMT_SPEC(54, 54, 0xd80, 13),
0106     MTK_PIN_IES_SMT_SPEC(55, 55, 0xe00, 13),
0107     MTK_PIN_IES_SMT_SPEC(56, 56, 0xd40, 13),
0108     MTK_PIN_IES_SMT_SPEC(57, 62, 0x900, 3),
0109     MTK_PIN_IES_SMT_SPEC(63, 63, 0xc80, 13),
0110     MTK_PIN_IES_SMT_SPEC(64, 66, 0xca0, 13),
0111     MTK_PIN_IES_SMT_SPEC(67, 67, 0xc80, 13),
0112     MTK_PIN_IES_SMT_SPEC(68, 68, 0xca0, 13),
0113     MTK_PIN_IES_SMT_SPEC(69, 69, 0xc90, 13),
0114     MTK_PIN_IES_SMT_SPEC(70, 70, 0xc80, 13),
0115     MTK_PIN_IES_SMT_SPEC(71, 74, 0x8d0, 8),
0116     MTK_PIN_IES_SMT_SPEC(75, 77, 0x8d0, 9),
0117     MTK_PIN_IES_SMT_SPEC(78, 81, 0x8d0, 10),
0118     MTK_PIN_IES_SMT_SPEC(82, 88, 0x8d0, 9),
0119     MTK_PIN_IES_SMT_SPEC(89, 89, 0xce0, 13),
0120     MTK_PIN_IES_SMT_SPEC(90, 93, 0xd00, 13),
0121     MTK_PIN_IES_SMT_SPEC(94, 94, 0xce0, 13),
0122     MTK_PIN_IES_SMT_SPEC(95, 96, 0xcf0, 13),
0123     MTK_PIN_IES_SMT_SPEC(97, 100, 0x8d0, 11),
0124     MTK_PIN_IES_SMT_SPEC(101, 104, 0x8d0, 12),
0125     MTK_PIN_IES_SMT_SPEC(105, 105, 0x8d0, 13),
0126     MTK_PIN_IES_SMT_SPEC(106, 106, 0x8d0, 14),
0127     MTK_PIN_IES_SMT_SPEC(107, 107, 0x8d0, 15),
0128     MTK_PIN_IES_SMT_SPEC(108, 108, 0x8e0, 0),
0129     MTK_PIN_IES_SMT_SPEC(109, 109, 0x8e0, 1),
0130     MTK_PIN_IES_SMT_SPEC(110, 110, 0x8e0, 2),
0131     MTK_PIN_IES_SMT_SPEC(111, 111, 0x8d0, 13),
0132     MTK_PIN_IES_SMT_SPEC(112, 112, 0x8d0, 14),
0133     MTK_PIN_IES_SMT_SPEC(113, 113, 0x8d0, 15),
0134     MTK_PIN_IES_SMT_SPEC(114, 114, 0x8e0, 0),
0135     MTK_PIN_IES_SMT_SPEC(115, 115, 0x8e0, 1),
0136     MTK_PIN_IES_SMT_SPEC(116, 116, 0x8e0, 2),
0137     MTK_PIN_IES_SMT_SPEC(117, 117, 0x8e0, 3),
0138     MTK_PIN_IES_SMT_SPEC(118, 118, 0x8e0, 4),
0139     MTK_PIN_IES_SMT_SPEC(119, 119, 0x8e0, 5),
0140     MTK_PIN_IES_SMT_SPEC(120, 120, 0x8e0, 3),
0141     MTK_PIN_IES_SMT_SPEC(121, 121, 0x8e0, 4),
0142     MTK_PIN_IES_SMT_SPEC(122, 122, 0x8e0, 5),
0143     MTK_PIN_IES_SMT_SPEC(123, 126, 0x8e0, 6),
0144     MTK_PIN_IES_SMT_SPEC(127, 130, 0x8e0, 7),
0145     MTK_PIN_IES_SMT_SPEC(131, 134, 0x8e0, 8),
0146     MTK_PIN_IES_SMT_SPEC(135, 142, 0x8d0, 1),
0147     MTK_PIN_IES_SMT_SPEC(143, 147, 0x8e0, 9),
0148     MTK_PIN_IES_SMT_SPEC(148, 152, 0x8e0, 10),
0149     MTK_PIN_IES_SMT_SPEC(153, 156, 0x8e0, 11),
0150     MTK_PIN_IES_SMT_SPEC(157, 160, 0x8e0, 12),
0151     MTK_PIN_IES_SMT_SPEC(161, 164, 0x8e0, 13),
0152     MTK_PIN_IES_SMT_SPEC(165, 168, 0x8e0, 14),
0153     MTK_PIN_IES_SMT_SPEC(169, 170, 0x8e0, 15),
0154     MTK_PIN_IES_SMT_SPEC(171, 172, 0x8f0, 0),
0155     MTK_PIN_IES_SMT_SPEC(173, 173, 0x8f0, 1),
0156     MTK_PIN_IES_SMT_SPEC(174, 175, 0x8f0, 2),
0157     MTK_PIN_IES_SMT_SPEC(176, 176, 0x8f0, 1),
0158     MTK_PIN_IES_SMT_SPEC(177, 177, 0x8f0, 3),
0159     MTK_PIN_IES_SMT_SPEC(178, 178, 0x8f0, 4),
0160     MTK_PIN_IES_SMT_SPEC(179, 179, 0x8f0, 3),
0161     MTK_PIN_IES_SMT_SPEC(180, 180, 0x8f0, 4),
0162     MTK_PIN_IES_SMT_SPEC(181, 181, 0x8f0, 5),
0163     MTK_PIN_IES_SMT_SPEC(182, 182, 0x8f0, 6),
0164     MTK_PIN_IES_SMT_SPEC(183, 183, 0x8f0, 5),
0165     MTK_PIN_IES_SMT_SPEC(184, 184, 0x8f0, 6),
0166     MTK_PIN_IES_SMT_SPEC(185, 186, 0x8f0, 7),
0167     MTK_PIN_IES_SMT_SPEC(187, 187, 0x8f0, 8),
0168     MTK_PIN_IES_SMT_SPEC(188, 188, 0x8f0, 9),
0169     MTK_PIN_IES_SMT_SPEC(189, 189, 0x8f0, 8),
0170     MTK_PIN_IES_SMT_SPEC(190, 190, 0x8f0, 9),
0171     MTK_PIN_IES_SMT_SPEC(191, 191, 0x8f0, 10),
0172     MTK_PIN_IES_SMT_SPEC(192, 192, 0x8f0, 11),
0173     MTK_PIN_IES_SMT_SPEC(193, 194, 0x8f0, 10),
0174     MTK_PIN_IES_SMT_SPEC(195, 195, 0x8f0, 11),
0175     MTK_PIN_IES_SMT_SPEC(196, 199, 0x8f0, 12),
0176     MTK_PIN_IES_SMT_SPEC(200, 203, 0x8f0, 13),
0177     MTK_PIN_IES_SMT_SPEC(204, 206, 0x8f0, 14),
0178     MTK_PIN_IES_SMT_SPEC(207, 209, 0x8f0, 15)
0179 };
0180
0181 static const struct mtk_pin_ies_smt_set mt2712_ies_set[] = {
0182     MTK_PIN_IES_SMT_SPEC(0, 3, 0x8c0, 2),
0183     MTK_PIN_IES_SMT_SPEC(4, 7, 0x8c0, 0),
0184     MTK_PIN_IES_SMT_SPEC(8, 9, 0x8c0, 1),
0185     MTK_PIN_IES_SMT_SPEC(10, 11, 0x8c0, 4),
0186     MTK_PIN_IES_SMT_SPEC(12, 12, 0x890, 6),
0187     MTK_PIN_IES_SMT_SPEC(13, 13, 0x890, 7),
0188     MTK_PIN_IES_SMT_SPEC(14, 14, 0x890, 6),
0189     MTK_PIN_IES_SMT_SPEC(15, 15, 0x890, 7),
0190     MTK_PIN_IES_SMT_SPEC(18, 23, 0x890, 1),
0191     MTK_PIN_IES_SMT_SPEC(24, 25, 0x890, 2),
0192     MTK_PIN_IES_SMT_SPEC(26, 26, 0x890, 3),
0193     MTK_PIN_IES_SMT_SPEC(27, 27, 0x890, 4),
0194     MTK_PIN_IES_SMT_SPEC(28, 29, 0x890, 3),
0195     MTK_PIN_IES_SMT_SPEC(30, 36, 0xf50, 14),
0196     MTK_PIN_IES_SMT_SPEC(37, 37, 0xc40, 14),
0197     MTK_PIN_IES_SMT_SPEC(38, 45, 0xc60, 14),
0198     MTK_PIN_IES_SMT_SPEC(46, 46, 0xc50, 14),
0199     MTK_PIN_IES_SMT_SPEC(47, 47, 0xda0, 14),
0200     MTK_PIN_IES_SMT_SPEC(48, 48, 0xd90, 14),
0201     MTK_PIN_IES_SMT_SPEC(49, 52, 0xd60, 14),
0202     MTK_PIN_IES_SMT_SPEC(53, 53, 0xd50, 14),
0203     MTK_PIN_IES_SMT_SPEC(54, 54, 0xd80, 14),
0204     MTK_PIN_IES_SMT_SPEC(55, 55, 0xe00, 14),
0205     MTK_PIN_IES_SMT_SPEC(56, 56, 0xd40, 14),
0206     MTK_PIN_IES_SMT_SPEC(57, 62, 0x8c0, 3),
0207     MTK_PIN_IES_SMT_SPEC(63, 63, 0xc80, 14),
0208     MTK_PIN_IES_SMT_SPEC(64, 66, 0xca0, 14),
0209     MTK_PIN_IES_SMT_SPEC(67, 68, 0xc80, 14),
0210     MTK_PIN_IES_SMT_SPEC(69, 69, 0xc90, 14),
0211     MTK_PIN_IES_SMT_SPEC(70, 70, 0xc80, 14),
0212     MTK_PIN_IES_SMT_SPEC(71, 74, 0x890, 8),
0213     MTK_PIN_IES_SMT_SPEC(75, 77, 0x890, 9),
0214     MTK_PIN_IES_SMT_SPEC(78, 81, 0x890, 10),
0215     MTK_PIN_IES_SMT_SPEC(82, 88, 0x890, 9),
0216     MTK_PIN_IES_SMT_SPEC(89, 89, 0xce0, 14),
0217     MTK_PIN_IES_SMT_SPEC(90, 93, 0xd00, 14),
0218     MTK_PIN_IES_SMT_SPEC(94, 94, 0xce0, 14),
0219     MTK_PIN_IES_SMT_SPEC(95, 96, 0xcf0, 14),
0220     MTK_PIN_IES_SMT_SPEC(97, 100, 0x890, 11),
0221     MTK_PIN_IES_SMT_SPEC(101, 104, 0x890, 12),
0222     MTK_PIN_IES_SMT_SPEC(105, 105, 0x890, 13),
0223     MTK_PIN_IES_SMT_SPEC(106, 106, 0x890, 14),
0224     MTK_PIN_IES_SMT_SPEC(107, 107, 0x890, 15),
0225     MTK_PIN_IES_SMT_SPEC(108, 108, 0x8a0, 0),
0226     MTK_PIN_IES_SMT_SPEC(109, 109, 0x8a0, 1),
0227     MTK_PIN_IES_SMT_SPEC(110, 110, 0x8a0, 2),
0228     MTK_PIN_IES_SMT_SPEC(111, 111, 0x890, 13),
0229     MTK_PIN_IES_SMT_SPEC(112, 112, 0x890, 14),
0230     MTK_PIN_IES_SMT_SPEC(113, 113, 0x890, 15),
0231     MTK_PIN_IES_SMT_SPEC(114, 114, 0x8a0, 0),
0232     MTK_PIN_IES_SMT_SPEC(115, 115, 0x8a0, 1),
0233     MTK_PIN_IES_SMT_SPEC(116, 116, 0x8a0, 2),
0234     MTK_PIN_IES_SMT_SPEC(117, 117, 0x8a0, 3),
0235     MTK_PIN_IES_SMT_SPEC(118, 118, 0x8a0, 4),
0236     MTK_PIN_IES_SMT_SPEC(119, 119, 0x8a0, 5),
0237     MTK_PIN_IES_SMT_SPEC(120, 120, 0x8a0, 3),
0238     MTK_PIN_IES_SMT_SPEC(121, 121, 0x8a0, 4),
0239     MTK_PIN_IES_SMT_SPEC(122, 122, 0x8a0, 5),
0240     MTK_PIN_IES_SMT_SPEC(123, 126, 0x8a0, 6),
0241     MTK_PIN_IES_SMT_SPEC(127, 130, 0x8a0, 7),
0242     MTK_PIN_IES_SMT_SPEC(131, 135, 0x8a0, 8),
0243     MTK_PIN_IES_SMT_SPEC(136, 142, 0x890, 1),
0244     MTK_PIN_IES_SMT_SPEC(143, 147, 0x8a0, 9),
0245     MTK_PIN_IES_SMT_SPEC(148, 152, 0x8a0, 10),
0246     MTK_PIN_IES_SMT_SPEC(153, 156, 0x8a0, 11),
0247     MTK_PIN_IES_SMT_SPEC(157, 160, 0x8a0, 12),
0248     MTK_PIN_IES_SMT_SPEC(161, 164, 0x8a0, 13),
0249     MTK_PIN_IES_SMT_SPEC(165, 168, 0x8a0, 14),
0250     MTK_PIN_IES_SMT_SPEC(169, 170, 0x8a0, 15),
0251     MTK_PIN_IES_SMT_SPEC(171, 172, 0x8b0, 0),
0252     MTK_PIN_IES_SMT_SPEC(173, 173, 0x8b0, 1),
0253     MTK_PIN_IES_SMT_SPEC(174, 175, 0x8b0, 2),
0254     MTK_PIN_IES_SMT_SPEC(176, 176, 0x8b0, 1),
0255     MTK_PIN_IES_SMT_SPEC(177, 177, 0x8b0, 3),
0256     MTK_PIN_IES_SMT_SPEC(178, 178, 0x8b0, 4),
0257     MTK_PIN_IES_SMT_SPEC(179, 179, 0x8b0, 3),
0258     MTK_PIN_IES_SMT_SPEC(180, 180, 0x8b0, 4),
0259     MTK_PIN_IES_SMT_SPEC(181, 181, 0x8b0, 5),
0260     MTK_PIN_IES_SMT_SPEC(182, 182, 0x8b0, 6),
0261     MTK_PIN_IES_SMT_SPEC(183, 183, 0x8b0, 5),
0262     MTK_PIN_IES_SMT_SPEC(184, 184, 0x8b0, 6),
0263     MTK_PIN_IES_SMT_SPEC(185, 186, 0x8b0, 7),
0264     MTK_PIN_IES_SMT_SPEC(187, 187, 0x8b0, 8),
0265     MTK_PIN_IES_SMT_SPEC(188, 188, 0x8b0, 9),
0266     MTK_PIN_IES_SMT_SPEC(189, 189, 0x8b0, 8),
0267     MTK_PIN_IES_SMT_SPEC(190, 190, 0x8b0, 9),
0268     MTK_PIN_IES_SMT_SPEC(191, 191, 0x8b0, 10),
0269     MTK_PIN_IES_SMT_SPEC(192, 192, 0x8b0, 11),
0270     MTK_PIN_IES_SMT_SPEC(193, 194, 0x8b0, 10),
0271     MTK_PIN_IES_SMT_SPEC(195, 195, 0x8b0, 11),
0272     MTK_PIN_IES_SMT_SPEC(196, 199, 0x8b0, 12),
0273     MTK_PIN_IES_SMT_SPEC(200, 203, 0x8b0, 13),
0274     MTK_PIN_IES_SMT_SPEC(204, 206, 0x8b0, 14),
0275     MTK_PIN_IES_SMT_SPEC(207, 209, 0x8b0, 15)
0276 };
0277
0278 static const struct mtk_drv_group_desc mt2712_drv_grp[] =  {
0279     /* 0E4E8SR 4/8/12/16 */
0280     MTK_DRV_GRP(4, 16, 1, 2, 4),
0281     /* 0E2E4SR  2/4/6/8 */
0282     MTK_DRV_GRP(2, 8, 1, 2, 2),
0283     /* E8E4E2  2/4/6/8/10/12/14/16 */
0284     MTK_DRV_GRP(2, 16, 0, 2, 2)
0285 };
0286
0287 static const struct mtk_pin_drv_grp mt2712_pin_drv[] = {
0288     MTK_PIN_DRV_GRP(0, 0xc10, 4, 0),
0289     MTK_PIN_DRV_GRP(1, 0xc10, 4, 0),
0290     MTK_PIN_DRV_GRP(2, 0xc10, 4, 0),
0291     MTK_PIN_DRV_GRP(3, 0xc10, 4, 0),
0292
0293     MTK_PIN_DRV_GRP(4, 0xc00, 12, 0),
0294     MTK_PIN_DRV_GRP(5, 0xc00, 12, 0),
0295     MTK_PIN_DRV_GRP(6, 0xc00, 12, 0),
0296     MTK_PIN_DRV_GRP(7, 0xc00, 12, 0),
0297
0298     MTK_PIN_DRV_GRP(8, 0xc10, 0, 0),
0299     MTK_PIN_DRV_GRP(9, 0xc10, 0, 0),
0300     MTK_PIN_DRV_GRP(10, 0xc10, 0, 0),
0301     MTK_PIN_DRV_GRP(11, 0xc10, 0, 0),
0302
0303     MTK_PIN_DRV_GRP(12, 0xb60, 0, 0),
0304
0305     MTK_PIN_DRV_GRP(13, 0xb60, 4, 0),
0306
0307     MTK_PIN_DRV_GRP(14, 0xb60, 0, 0),
0308
0309     MTK_PIN_DRV_GRP(15, 0xb60, 4, 0),
0310
0311     MTK_PIN_DRV_GRP(18, 0xb40, 0, 1),
0312     MTK_PIN_DRV_GRP(19, 0xb40, 0, 1),
0313     MTK_PIN_DRV_GRP(20, 0xb40, 0, 1),
0314     MTK_PIN_DRV_GRP(21, 0xb40, 0, 1),
0315     MTK_PIN_DRV_GRP(22, 0xb40, 0, 1),
0316     MTK_PIN_DRV_GRP(23, 0xb40, 0, 1),
0317
0318     MTK_PIN_DRV_GRP(24, 0xb40, 4, 0),
0319
0320     MTK_PIN_DRV_GRP(25, 0xb40, 8, 0),
0321
0322     MTK_PIN_DRV_GRP(26, 0xb40, 12, 0),
0323
0324     MTK_PIN_DRV_GRP(27, 0xb50, 0, 0),
0325
0326     MTK_PIN_DRV_GRP(28, 0xb40, 12, 0),
0327     MTK_PIN_DRV_GRP(29, 0xb40, 12, 0),
0328
0329     MTK_PIN_DRV_GRP(30, 0xf50, 8, 2),
0330     MTK_PIN_DRV_GRP(31, 0xf50, 8, 2),
0331     MTK_PIN_DRV_GRP(32, 0xf50, 8, 2),
0332     MTK_PIN_DRV_GRP(33, 0xf50, 8, 2),
0333     MTK_PIN_DRV_GRP(34, 0xf50, 8, 2),
0334     MTK_PIN_DRV_GRP(35, 0xf50, 8, 2),
0335     MTK_PIN_DRV_GRP(36, 0xf50, 8, 2),
0336
0337     MTK_PIN_DRV_GRP(37, 0xc40, 8, 2),
0338
0339     MTK_PIN_DRV_GRP(38, 0xc60, 8, 2),
0340     MTK_PIN_DRV_GRP(39, 0xc60, 8, 2),
0341     MTK_PIN_DRV_GRP(40, 0xc60, 8, 2),
0342     MTK_PIN_DRV_GRP(41, 0xc60, 8, 2),
0343     MTK_PIN_DRV_GRP(42, 0xc60, 8, 2),
0344     MTK_PIN_DRV_GRP(43, 0xc60, 8, 2),
0345     MTK_PIN_DRV_GRP(44, 0xc60, 8, 2),
0346     MTK_PIN_DRV_GRP(45, 0xc60, 8, 2),
0347
0348     MTK_PIN_DRV_GRP(46, 0xc50, 8, 2),
0349
0350     MTK_PIN_DRV_GRP(47, 0xda0, 8, 2),
0351
0352     MTK_PIN_DRV_GRP(48, 0xd90, 8, 2),
0353
0354     MTK_PIN_DRV_GRP(49, 0xd60, 8, 2),
0355     MTK_PIN_DRV_GRP(50, 0xd60, 8, 2),
0356     MTK_PIN_DRV_GRP(51, 0xd60, 8, 2),
0357     MTK_PIN_DRV_GRP(52, 0xd60, 8, 2),
0358
0359     MTK_PIN_DRV_GRP(53, 0xd50, 8, 2),
0360
0361     MTK_PIN_DRV_GRP(54, 0xd80, 8, 2),
0362
0363     MTK_PIN_DRV_GRP(55, 0xe00, 8, 2),
0364
0365     MTK_PIN_DRV_GRP(56, 0xd40, 8, 2),
0366
0367     MTK_PIN_DRV_GRP(63, 0xc80, 8, 2),
0368
0369     MTK_PIN_DRV_GRP(64, 0xca0, 8, 2),
0370     MTK_PIN_DRV_GRP(65, 0xca0, 8, 2),
0371     MTK_PIN_DRV_GRP(66, 0xca0, 8, 2),
0372
0373     MTK_PIN_DRV_GRP(67, 0xcd0, 8, 2),
0374
0375     MTK_PIN_DRV_GRP(68, 0xca0, 8, 2),
0376
0377     MTK_PIN_DRV_GRP(69, 0xc90, 8, 2),
0378
0379     MTK_PIN_DRV_GRP(70, 0xcc0, 8, 2),
0380
0381     MTK_PIN_DRV_GRP(71, 0xb60, 8, 1),
0382     MTK_PIN_DRV_GRP(72, 0xb60, 8, 1),
0383     MTK_PIN_DRV_GRP(73, 0xb60, 8, 1),
0384     MTK_PIN_DRV_GRP(74, 0xb60, 8, 1),
0385
0386     MTK_PIN_DRV_GRP(75, 0xb60, 12, 1),
0387     MTK_PIN_DRV_GRP(76, 0xb60, 12, 1),
0388     MTK_PIN_DRV_GRP(77, 0xb60, 12, 1),
0389
0390     MTK_PIN_DRV_GRP(78, 0xb70, 0, 1),
0391     MTK_PIN_DRV_GRP(79, 0xb70, 0, 1),
0392     MTK_PIN_DRV_GRP(80, 0xb70, 0, 1),
0393     MTK_PIN_DRV_GRP(81, 0xb70, 0, 1),
0394
0395     MTK_PIN_DRV_GRP(82, 0xb60, 12, 1),
0396     MTK_PIN_DRV_GRP(83, 0xb60, 12, 1),
0397     MTK_PIN_DRV_GRP(84, 0xb60, 12, 1),
0398     MTK_PIN_DRV_GRP(85, 0xb60, 12, 1),
0399     MTK_PIN_DRV_GRP(86, 0xb60, 12, 1),
0400     MTK_PIN_DRV_GRP(87, 0xb60, 12, 1),
0401     MTK_PIN_DRV_GRP(88, 0xb60, 12, 1),
0402
0403     MTK_PIN_DRV_GRP(89, 0xce0, 8, 2),
0404
0405     MTK_PIN_DRV_GRP(90, 0xd00, 8, 2),
0406     MTK_PIN_DRV_GRP(91, 0xd00, 8, 2),
0407     MTK_PIN_DRV_GRP(92, 0xd00, 8, 2),
0408     MTK_PIN_DRV_GRP(93, 0xd00, 8, 2),
0409
0410     MTK_PIN_DRV_GRP(94, 0xd20, 8, 2),
0411
0412     MTK_PIN_DRV_GRP(95, 0xcf0, 8, 2),
0413
0414     MTK_PIN_DRV_GRP(96, 0xd30, 8, 2),
0415
0416     MTK_PIN_DRV_GRP(97, 0xb70, 4, 0),
0417     MTK_PIN_DRV_GRP(98, 0xb70, 4, 0),
0418     MTK_PIN_DRV_GRP(99, 0xb70, 4, 0),
0419     MTK_PIN_DRV_GRP(100, 0xb70, 4, 0),
0420
0421     MTK_PIN_DRV_GRP(101, 0xb70, 8, 0),
0422     MTK_PIN_DRV_GRP(102, 0xb70, 8, 0),
0423     MTK_PIN_DRV_GRP(103, 0xb70, 8, 0),
0424     MTK_PIN_DRV_GRP(104, 0xb70, 8, 0),
0425
0426     MTK_PIN_DRV_GRP(135, 0xb40, 0, 1),
0427     MTK_PIN_DRV_GRP(136, 0xb40, 0, 1),
0428     MTK_PIN_DRV_GRP(137, 0xb40, 0, 1),
0429     MTK_PIN_DRV_GRP(138, 0xb40, 0, 1),
0430     MTK_PIN_DRV_GRP(139, 0xb40, 0, 1),
0431     MTK_PIN_DRV_GRP(140, 0xb40, 0, 1),
0432     MTK_PIN_DRV_GRP(141, 0xb40, 0, 1),
0433     MTK_PIN_DRV_GRP(142, 0xb40, 0, 1),
0434
0435     MTK_PIN_DRV_GRP(143, 0xba0, 12, 0),
0436     MTK_PIN_DRV_GRP(144, 0xba0, 12, 0),
0437     MTK_PIN_DRV_GRP(145, 0xba0, 12, 0),
0438     MTK_PIN_DRV_GRP(146, 0xba0, 12, 0),
0439     MTK_PIN_DRV_GRP(147, 0xba0, 12, 0),
0440
0441     MTK_PIN_DRV_GRP(148, 0xbb0, 0, 0),
0442     MTK_PIN_DRV_GRP(149, 0xbb0, 0, 0),
0443     MTK_PIN_DRV_GRP(150, 0xbb0, 0, 0),
0444     MTK_PIN_DRV_GRP(151, 0xbb0, 0, 0),
0445     MTK_PIN_DRV_GRP(152, 0xbb0, 0, 0),
0446
0447     MTK_PIN_DRV_GRP(153, 0xbb0, 4, 0),
0448     MTK_PIN_DRV_GRP(154, 0xbb0, 4, 0),
0449     MTK_PIN_DRV_GRP(155, 0xbb0, 4, 0),
0450     MTK_PIN_DRV_GRP(156, 0xbb0, 4, 0),
0451
0452     MTK_PIN_DRV_GRP(157, 0xbb0, 8, 0),
0453     MTK_PIN_DRV_GRP(158, 0xbb0, 8, 0),
0454     MTK_PIN_DRV_GRP(159, 0xbb0, 8, 0),
0455     MTK_PIN_DRV_GRP(160, 0xbb0, 8, 0),
0456
0457     MTK_PIN_DRV_GRP(161, 0xbb0, 12, 0),
0458     MTK_PIN_DRV_GRP(162, 0xbb0, 12, 0),
0459     MTK_PIN_DRV_GRP(163, 0xbb0, 12, 0),
0460     MTK_PIN_DRV_GRP(164, 0xbb0, 12, 0),
0461
0462     MTK_PIN_DRV_GRP(165, 0xbc0, 0, 0),
0463     MTK_PIN_DRV_GRP(166, 0xbc0, 0, 0),
0464     MTK_PIN_DRV_GRP(167, 0xbc0, 0, 0),
0465     MTK_PIN_DRV_GRP(168, 0xbc0, 0, 0),
0466
0467     MTK_PIN_DRV_GRP(169, 0xbc0, 4, 0),
0468     MTK_PIN_DRV_GRP(170, 0xbc0, 4, 0),
0469
0470     MTK_PIN_DRV_GRP(171, 0xbc0, 8, 0),
0471     MTK_PIN_DRV_GRP(172, 0xbc0, 8, 0),
0472
0473     MTK_PIN_DRV_GRP(173, 0xbc0, 12, 0),
0474
0475     MTK_PIN_DRV_GRP(174, 0xbd0, 0, 0),
0476     MTK_PIN_DRV_GRP(175, 0xbd0, 0, 0),
0477
0478     MTK_PIN_DRV_GRP(176, 0xbc0, 12, 0),
0479
0480     MTK_PIN_DRV_GRP(177, 0xbd0, 4, 0),
0481
0482     MTK_PIN_DRV_GRP(178, 0xbd0, 8, 0),
0483
0484     MTK_PIN_DRV_GRP(179, 0xbd0, 4, 0),
0485
0486     MTK_PIN_DRV_GRP(180, 0xbd0, 8, 0),
0487
0488     MTK_PIN_DRV_GRP(181, 0xbd0, 12, 0),
0489
0490     MTK_PIN_DRV_GRP(182, 0xbe0, 0, 0),
0491
0492     MTK_PIN_DRV_GRP(183, 0xbd0, 12, 0),
0493
0494     MTK_PIN_DRV_GRP(184, 0xbe0, 0, 0),
0495
0496     MTK_PIN_DRV_GRP(185, 0xbe0, 4, 0),
0497
0498     MTK_PIN_DRV_GRP(186, 0xbe0, 8, 0),
0499
0500     MTK_PIN_DRV_GRP(187, 0xbe0, 12, 0),
0501
0502     MTK_PIN_DRV_GRP(188, 0xbf0, 0, 0),
0503
0504     MTK_PIN_DRV_GRP(189, 0xbe0, 12, 0),
0505
0506     MTK_PIN_DRV_GRP(190, 0xbf0, 0, 0),
0507
0508     MTK_PIN_DRV_GRP(191, 0xbf0, 4, 0),
0509
0510     MTK_PIN_DRV_GRP(192, 0xbf0, 8, 0),
0511
0512     MTK_PIN_DRV_GRP(193, 0xbf0, 4, 0),
0513     MTK_PIN_DRV_GRP(194, 0xbf0, 4, 0),
0514
0515     MTK_PIN_DRV_GRP(195, 0xbf0, 8, 0),
0516
0517     MTK_PIN_DRV_GRP(196, 0xbf0, 12, 0),
0518     MTK_PIN_DRV_GRP(197, 0xbf0, 12, 0),
0519     MTK_PIN_DRV_GRP(198, 0xbf0, 12, 0),
0520     MTK_PIN_DRV_GRP(199, 0xbf0, 12, 0),
0521
0522     MTK_PIN_DRV_GRP(200, 0xc00, 0, 0),
0523     MTK_PIN_DRV_GRP(201, 0xc00, 0, 0),
0524     MTK_PIN_DRV_GRP(202, 0xc00, 0, 0),
0525     MTK_PIN_DRV_GRP(203, 0xc00, 0, 0),
0526
0527     MTK_PIN_DRV_GRP(204, 0xc00, 4, 0),
0528     MTK_PIN_DRV_GRP(205, 0xc00, 4, 0),
0529     MTK_PIN_DRV_GRP(206, 0xc00, 4, 0),
0530
0531     MTK_PIN_DRV_GRP(207, 0xc00, 8, 0),
0532     MTK_PIN_DRV_GRP(208, 0xc00, 8, 0),
0533     MTK_PIN_DRV_GRP(209, 0xc00, 8, 0),
0534 };
0535
0536 static const struct mtk_pinctrl_devdata mt2712_pinctrl_data = {
0537     .pins = mtk_pins_mt2712,
0538     .npins = ARRAY_SIZE(mtk_pins_mt2712),
0539     .grp_desc = mt2712_drv_grp,
0540     .n_grp_cls = ARRAY_SIZE(mt2712_drv_grp),
0541     .pin_drv_grp = mt2712_pin_drv,
0542     .n_pin_drv_grps = ARRAY_SIZE(mt2712_pin_drv),
0543     .spec_ies = mt2712_ies_set,
0544     .n_spec_ies = ARRAY_SIZE(mt2712_ies_set),
0545     .spec_pupd = mt2712_spec_pupd,
0546     .n_spec_pupd = ARRAY_SIZE(mt2712_spec_pupd),
0547     .spec_smt = mt2712_smt_set,
0548     .n_spec_smt = ARRAY_SIZE(mt2712_smt_set),
0549     .spec_pull_set = mtk_pctrl_spec_pull_set_samereg,
0550     .spec_ies_smt_set = mtk_pconf_spec_set_ies_smt_range,
0551     .dir_offset = 0x0000,
0552     .pullen_offset = 0x0100,
0553     .pullsel_offset = 0x0200,
0554     .dout_offset = 0x0300,
0555     .din_offset = 0x0400,
0556     .pinmux_offset = 0x0500,
0557     .type1_start = 210,
0558     .type1_end = 210,
0559     .port_shf = 4,
0560     .port_mask = 0xf,
0561     .port_align = 4,
0562     .mode_mask = 0xf,
0563     .mode_per_reg = 5,
0564     .mode_shf = 4,
0565     .eint_hw = {
0566         .port_mask = 0xf,
0567         .ports     = 8,
0568         .ap_num    = 229,
0569         .db_cnt    = 40,
0570     },
0571 };
0572
0573 static const struct of_device_id mt2712_pctrl_match[] = {
0574     { .compatible = "mediatek,mt2712-pinctrl", .data = &mt2712_pinctrl_data },
0575     { }
0576 };
0577 MODULE_DEVICE_TABLE(of, mt2712_pctrl_match);
0578
0579 static struct platform_driver mtk_pinctrl_driver = {
0580     .probe = mtk_pctrl_common_probe,
0581     .driver = {
0582         .name = "mediatek-mt2712-pinctrl",
0583         .of_match_table = mt2712_pctrl_match,
0584         .pm = &mtk_eint_pm_ops,
0585     },
0586 };
0587
0588 static int __init mtk_pinctrl_init(void)
0589 {
0590     return platform_driver_register(&mtk_pinctrl_driver);
0591 }
0592
0593 arch_initcall(mtk_pinctrl_init);