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0011 #include <linux/gpio/driver.h>
0012 #include "pinctrl-moore.h"
0013
0014 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
0015
0016
0017 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
0018 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
0019 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
0020 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
0021
0022 static const struct pinconf_generic_params mtk_custom_bindings[] = {
0023 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0},
0024 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0},
0025 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
0026 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
0027 };
0028
0029 #ifdef CONFIG_DEBUG_FS
0030 static const struct pin_config_item mtk_conf_items[] = {
0031 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
0032 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
0033 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
0034 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
0035 };
0036 #endif
0037
0038 static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
0039 unsigned int selector, unsigned int group)
0040 {
0041 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0042 struct function_desc *func;
0043 struct group_desc *grp;
0044 int i;
0045
0046 func = pinmux_generic_get_function(pctldev, selector);
0047 if (!func)
0048 return -EINVAL;
0049
0050 grp = pinctrl_generic_get_group(pctldev, group);
0051 if (!grp)
0052 return -EINVAL;
0053
0054 dev_dbg(pctldev->dev, "enable function %s group %s\n",
0055 func->name, grp->name);
0056
0057 for (i = 0; i < grp->num_pins; i++) {
0058 const struct mtk_pin_desc *desc;
0059 int *pin_modes = grp->data;
0060 int pin = grp->pins[i];
0061
0062 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0063 if (!desc->name)
0064 return -ENOTSUPP;
0065
0066 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
0067 pin_modes[i]);
0068 }
0069
0070 return 0;
0071 }
0072
0073 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
0074 struct pinctrl_gpio_range *range,
0075 unsigned int pin)
0076 {
0077 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0078 const struct mtk_pin_desc *desc;
0079
0080 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0081 if (!desc->name)
0082 return -ENOTSUPP;
0083
0084 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
0085 hw->soc->gpio_m);
0086 }
0087
0088 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
0089 struct pinctrl_gpio_range *range,
0090 unsigned int pin, bool input)
0091 {
0092 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0093 const struct mtk_pin_desc *desc;
0094
0095 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0096 if (!desc->name)
0097 return -ENOTSUPP;
0098
0099
0100 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
0101 }
0102
0103 static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
0104 unsigned int pin, unsigned long *config)
0105 {
0106 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0107 u32 param = pinconf_to_config_param(*config);
0108 int val, val2, err, reg, ret = 1;
0109 const struct mtk_pin_desc *desc;
0110
0111 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0112 if (!desc->name)
0113 return -ENOTSUPP;
0114
0115 switch (param) {
0116 case PIN_CONFIG_BIAS_DISABLE:
0117 if (hw->soc->bias_disable_get) {
0118 err = hw->soc->bias_disable_get(hw, desc, &ret);
0119 if (err)
0120 return err;
0121 } else {
0122 return -ENOTSUPP;
0123 }
0124 break;
0125 case PIN_CONFIG_BIAS_PULL_UP:
0126 if (hw->soc->bias_get) {
0127 err = hw->soc->bias_get(hw, desc, 1, &ret);
0128 if (err)
0129 return err;
0130 } else {
0131 return -ENOTSUPP;
0132 }
0133 break;
0134 case PIN_CONFIG_BIAS_PULL_DOWN:
0135 if (hw->soc->bias_get) {
0136 err = hw->soc->bias_get(hw, desc, 0, &ret);
0137 if (err)
0138 return err;
0139 } else {
0140 return -ENOTSUPP;
0141 }
0142 break;
0143 case PIN_CONFIG_SLEW_RATE:
0144 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val);
0145 if (err)
0146 return err;
0147
0148 if (!val)
0149 return -EINVAL;
0150
0151 break;
0152 case PIN_CONFIG_INPUT_ENABLE:
0153 case PIN_CONFIG_OUTPUT_ENABLE:
0154 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
0155 if (err)
0156 return err;
0157
0158
0159 if ((val && param == PIN_CONFIG_INPUT_ENABLE) ||
0160 (!val && param == PIN_CONFIG_OUTPUT_ENABLE))
0161 return -EINVAL;
0162
0163 break;
0164 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0165 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
0166 if (err)
0167 return err;
0168
0169 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2);
0170 if (err)
0171 return err;
0172
0173 if (val || !val2)
0174 return -EINVAL;
0175
0176 break;
0177 case PIN_CONFIG_DRIVE_STRENGTH:
0178 if (hw->soc->drive_get) {
0179 err = hw->soc->drive_get(hw, desc, &ret);
0180 if (err)
0181 return err;
0182 } else {
0183 err = -ENOTSUPP;
0184 }
0185 break;
0186 case MTK_PIN_CONFIG_TDSEL:
0187 case MTK_PIN_CONFIG_RDSEL:
0188 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
0189 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
0190
0191 err = mtk_hw_get_value(hw, desc, reg, &val);
0192 if (err)
0193 return err;
0194
0195 ret = val;
0196
0197 break;
0198 case MTK_PIN_CONFIG_PU_ADV:
0199 case MTK_PIN_CONFIG_PD_ADV:
0200 if (hw->soc->adv_pull_get) {
0201 bool pullup;
0202
0203 pullup = param == MTK_PIN_CONFIG_PU_ADV;
0204 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
0205 if (err)
0206 return err;
0207 } else {
0208 return -ENOTSUPP;
0209 }
0210 break;
0211 default:
0212 return -ENOTSUPP;
0213 }
0214
0215 *config = pinconf_to_config_packed(param, ret);
0216
0217 return 0;
0218 }
0219
0220 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
0221 unsigned long *configs, unsigned int num_configs)
0222 {
0223 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
0224 const struct mtk_pin_desc *desc;
0225 u32 reg, param, arg;
0226 int cfg, err = 0;
0227
0228 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
0229 if (!desc->name)
0230 return -ENOTSUPP;
0231
0232 for (cfg = 0; cfg < num_configs; cfg++) {
0233 param = pinconf_to_config_param(configs[cfg]);
0234 arg = pinconf_to_config_argument(configs[cfg]);
0235
0236 switch (param) {
0237 case PIN_CONFIG_BIAS_DISABLE:
0238 if (hw->soc->bias_disable_set) {
0239 err = hw->soc->bias_disable_set(hw, desc);
0240 if (err)
0241 return err;
0242 } else {
0243 return -ENOTSUPP;
0244 }
0245 break;
0246 case PIN_CONFIG_BIAS_PULL_UP:
0247 if (hw->soc->bias_set) {
0248 err = hw->soc->bias_set(hw, desc, 1);
0249 if (err)
0250 return err;
0251 } else {
0252 return -ENOTSUPP;
0253 }
0254 break;
0255 case PIN_CONFIG_BIAS_PULL_DOWN:
0256 if (hw->soc->bias_set) {
0257 err = hw->soc->bias_set(hw, desc, 0);
0258 if (err)
0259 return err;
0260 } else {
0261 return -ENOTSUPP;
0262 }
0263 break;
0264 case PIN_CONFIG_OUTPUT_ENABLE:
0265 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
0266 MTK_DISABLE);
0267 if (err)
0268 goto err;
0269
0270 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
0271 MTK_OUTPUT);
0272 if (err)
0273 goto err;
0274 break;
0275 case PIN_CONFIG_INPUT_ENABLE:
0276
0277 if (hw->soc->ies_present) {
0278 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES,
0279 MTK_ENABLE);
0280 }
0281
0282 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
0283 MTK_INPUT);
0284 if (err)
0285 goto err;
0286 break;
0287 case PIN_CONFIG_SLEW_RATE:
0288 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR,
0289 arg);
0290 if (err)
0291 goto err;
0292
0293 break;
0294 case PIN_CONFIG_OUTPUT:
0295 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
0296 MTK_OUTPUT);
0297 if (err)
0298 goto err;
0299
0300 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
0301 arg);
0302 if (err)
0303 goto err;
0304 break;
0305 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0306
0307
0308
0309 arg = arg ? 2 : 1;
0310 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
0311 arg & 1);
0312 if (err)
0313 goto err;
0314
0315 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
0316 !!(arg & 2));
0317 if (err)
0318 goto err;
0319 break;
0320 case PIN_CONFIG_DRIVE_STRENGTH:
0321 if (hw->soc->drive_set) {
0322 err = hw->soc->drive_set(hw, desc, arg);
0323 if (err)
0324 return err;
0325 } else {
0326 err = -ENOTSUPP;
0327 }
0328 break;
0329 case MTK_PIN_CONFIG_TDSEL:
0330 case MTK_PIN_CONFIG_RDSEL:
0331 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
0332 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
0333
0334 err = mtk_hw_set_value(hw, desc, reg, arg);
0335 if (err)
0336 goto err;
0337 break;
0338 case MTK_PIN_CONFIG_PU_ADV:
0339 case MTK_PIN_CONFIG_PD_ADV:
0340 if (hw->soc->adv_pull_set) {
0341 bool pullup;
0342
0343 pullup = param == MTK_PIN_CONFIG_PU_ADV;
0344 err = hw->soc->adv_pull_set(hw, desc, pullup,
0345 arg);
0346 if (err)
0347 return err;
0348 } else {
0349 return -ENOTSUPP;
0350 }
0351 break;
0352 default:
0353 err = -ENOTSUPP;
0354 }
0355 }
0356 err:
0357 return err;
0358 }
0359
0360 static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev,
0361 unsigned int group, unsigned long *config)
0362 {
0363 const unsigned int *pins;
0364 unsigned int i, npins, old = 0;
0365 int ret;
0366
0367 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
0368 if (ret)
0369 return ret;
0370
0371 for (i = 0; i < npins; i++) {
0372 if (mtk_pinconf_get(pctldev, pins[i], config))
0373 return -ENOTSUPP;
0374
0375
0376 if (i && old != *config)
0377 return -ENOTSUPP;
0378
0379 old = *config;
0380 }
0381
0382 return 0;
0383 }
0384
0385 static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev,
0386 unsigned int group, unsigned long *configs,
0387 unsigned int num_configs)
0388 {
0389 const unsigned int *pins;
0390 unsigned int i, npins;
0391 int ret;
0392
0393 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
0394 if (ret)
0395 return ret;
0396
0397 for (i = 0; i < npins; i++) {
0398 ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs);
0399 if (ret)
0400 return ret;
0401 }
0402
0403 return 0;
0404 }
0405
0406 static const struct pinctrl_ops mtk_pctlops = {
0407 .get_groups_count = pinctrl_generic_get_group_count,
0408 .get_group_name = pinctrl_generic_get_group_name,
0409 .get_group_pins = pinctrl_generic_get_group_pins,
0410 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
0411 .dt_free_map = pinconf_generic_dt_free_map,
0412 };
0413
0414 static const struct pinmux_ops mtk_pmxops = {
0415 .get_functions_count = pinmux_generic_get_function_count,
0416 .get_function_name = pinmux_generic_get_function_name,
0417 .get_function_groups = pinmux_generic_get_function_groups,
0418 .set_mux = mtk_pinmux_set_mux,
0419 .gpio_request_enable = mtk_pinmux_gpio_request_enable,
0420 .gpio_set_direction = mtk_pinmux_gpio_set_direction,
0421 .strict = true,
0422 };
0423
0424 static const struct pinconf_ops mtk_confops = {
0425 .is_generic = true,
0426 .pin_config_get = mtk_pinconf_get,
0427 .pin_config_set = mtk_pinconf_set,
0428 .pin_config_group_get = mtk_pinconf_group_get,
0429 .pin_config_group_set = mtk_pinconf_group_set,
0430 .pin_config_config_dbg_show = pinconf_generic_dump_config,
0431 };
0432
0433 static struct pinctrl_desc mtk_desc = {
0434 .name = PINCTRL_PINCTRL_DEV,
0435 .pctlops = &mtk_pctlops,
0436 .pmxops = &mtk_pmxops,
0437 .confops = &mtk_confops,
0438 .owner = THIS_MODULE,
0439 };
0440
0441 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
0442 {
0443 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0444 const struct mtk_pin_desc *desc;
0445 int value, err;
0446
0447 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
0448 if (!desc->name)
0449 return -ENOTSUPP;
0450
0451 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
0452 if (err)
0453 return err;
0454
0455 return !!value;
0456 }
0457
0458 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
0459 {
0460 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0461 const struct mtk_pin_desc *desc;
0462
0463 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
0464 if (!desc->name) {
0465 dev_err(hw->dev, "Failed to set gpio %d\n", gpio);
0466 return;
0467 }
0468
0469 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
0470 }
0471
0472 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
0473 {
0474 return pinctrl_gpio_direction_input(chip->base + gpio);
0475 }
0476
0477 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
0478 int value)
0479 {
0480 mtk_gpio_set(chip, gpio, value);
0481
0482 return pinctrl_gpio_direction_output(chip->base + gpio);
0483 }
0484
0485 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
0486 {
0487 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0488 const struct mtk_pin_desc *desc;
0489
0490 if (!hw->eint)
0491 return -ENOTSUPP;
0492
0493 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
0494
0495 if (desc->eint.eint_n == (u16)EINT_NA)
0496 return -ENOTSUPP;
0497
0498 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
0499 }
0500
0501 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
0502 unsigned long config)
0503 {
0504 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
0505 const struct mtk_pin_desc *desc;
0506 u32 debounce;
0507
0508 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
0509 if (!desc->name)
0510 return -ENOTSUPP;
0511
0512 if (!hw->eint ||
0513 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
0514 desc->eint.eint_n == (u16)EINT_NA)
0515 return -ENOTSUPP;
0516
0517 debounce = pinconf_to_config_argument(config);
0518
0519 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
0520 }
0521
0522 static int mtk_build_gpiochip(struct mtk_pinctrl *hw)
0523 {
0524 struct gpio_chip *chip = &hw->chip;
0525 int ret;
0526
0527 chip->label = PINCTRL_PINCTRL_DEV;
0528 chip->parent = hw->dev;
0529 chip->request = gpiochip_generic_request;
0530 chip->free = gpiochip_generic_free;
0531 chip->direction_input = mtk_gpio_direction_input;
0532 chip->direction_output = mtk_gpio_direction_output;
0533 chip->get = mtk_gpio_get;
0534 chip->set = mtk_gpio_set;
0535 chip->to_irq = mtk_gpio_to_irq;
0536 chip->set_config = mtk_gpio_set_config;
0537 chip->base = -1;
0538 chip->ngpio = hw->soc->npins;
0539 chip->of_gpio_n_cells = 2;
0540
0541 ret = gpiochip_add_data(chip, hw);
0542 if (ret < 0)
0543 return ret;
0544
0545
0546
0547
0548
0549
0550
0551
0552 if (!of_find_property(hw->dev->of_node, "gpio-ranges", NULL)) {
0553 ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0,
0554 chip->ngpio);
0555 if (ret < 0) {
0556 gpiochip_remove(chip);
0557 return ret;
0558 }
0559 }
0560
0561 return 0;
0562 }
0563
0564 static int mtk_build_groups(struct mtk_pinctrl *hw)
0565 {
0566 int err, i;
0567
0568 for (i = 0; i < hw->soc->ngrps; i++) {
0569 const struct group_desc *group = hw->soc->grps + i;
0570
0571 err = pinctrl_generic_add_group(hw->pctrl, group->name,
0572 group->pins, group->num_pins,
0573 group->data);
0574 if (err < 0) {
0575 dev_err(hw->dev, "Failed to register group %s\n",
0576 group->name);
0577 return err;
0578 }
0579 }
0580
0581 return 0;
0582 }
0583
0584 static int mtk_build_functions(struct mtk_pinctrl *hw)
0585 {
0586 int i, err;
0587
0588 for (i = 0; i < hw->soc->nfuncs ; i++) {
0589 const struct function_desc *func = hw->soc->funcs + i;
0590
0591 err = pinmux_generic_add_function(hw->pctrl, func->name,
0592 func->group_names,
0593 func->num_group_names,
0594 func->data);
0595 if (err < 0) {
0596 dev_err(hw->dev, "Failed to register function %s\n",
0597 func->name);
0598 return err;
0599 }
0600 }
0601
0602 return 0;
0603 }
0604
0605 int mtk_moore_pinctrl_probe(struct platform_device *pdev,
0606 const struct mtk_pin_soc *soc)
0607 {
0608 struct device *dev = &pdev->dev;
0609 struct pinctrl_pin_desc *pins;
0610 struct mtk_pinctrl *hw;
0611 int err, i;
0612
0613 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
0614 if (!hw)
0615 return -ENOMEM;
0616
0617 hw->soc = soc;
0618 hw->dev = &pdev->dev;
0619
0620 if (!hw->soc->nbase_names)
0621 return dev_err_probe(dev, -EINVAL,
0622 "SoC should be assigned at least one register base\n");
0623
0624 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
0625 sizeof(*hw->base), GFP_KERNEL);
0626 if (!hw->base)
0627 return -ENOMEM;
0628
0629 for (i = 0; i < hw->soc->nbase_names; i++) {
0630 hw->base[i] = devm_platform_ioremap_resource_byname(pdev,
0631 hw->soc->base_names[i]);
0632 if (IS_ERR(hw->base[i]))
0633 return PTR_ERR(hw->base[i]);
0634 }
0635
0636 hw->nbase = hw->soc->nbase_names;
0637
0638 spin_lock_init(&hw->lock);
0639
0640
0641 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
0642 GFP_KERNEL);
0643 if (!pins)
0644 return -ENOMEM;
0645
0646 for (i = 0; i < hw->soc->npins; i++) {
0647 pins[i].number = hw->soc->pins[i].number;
0648 pins[i].name = hw->soc->pins[i].name;
0649 }
0650
0651
0652 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
0653 mtk_desc.npins = hw->soc->npins;
0654 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
0655 mtk_desc.custom_params = mtk_custom_bindings;
0656 #ifdef CONFIG_DEBUG_FS
0657 mtk_desc.custom_conf_items = mtk_conf_items;
0658 #endif
0659
0660 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
0661 &hw->pctrl);
0662 if (err)
0663 return err;
0664
0665
0666 err = mtk_build_groups(hw);
0667 if (err)
0668 return dev_err_probe(dev, err, "Failed to build groups\n");
0669
0670
0671 err = mtk_build_functions(hw);
0672 if (err)
0673 return dev_err_probe(dev, err, "Failed to build functions\n");
0674
0675
0676
0677
0678 err = pinctrl_enable(hw->pctrl);
0679 if (err)
0680 return err;
0681
0682 err = mtk_build_eint(hw, pdev);
0683 if (err)
0684 dev_warn(&pdev->dev,
0685 "Failed to add EINT, but pinctrl still can work\n");
0686
0687
0688 err = mtk_build_gpiochip(hw);
0689 if (err)
0690 return dev_err_probe(dev, err, "Failed to add gpio_chip\n");
0691
0692 platform_set_drvdata(pdev, hw);
0693
0694 return 0;
0695 }