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0010 #include <linux/acpi.h>
0011 #include <linux/module.h>
0012 #include <linux/platform_device.h>
0013
0014 #include <linux/pinctrl/pinctrl.h>
0015
0016 #include "pinctrl-intel.h"
0017
0018 #define ICL_PAD_OWN 0x020
0019 #define ICL_PADCFGLOCK 0x080
0020 #define ICL_HOSTSW_OWN 0x0b0
0021 #define ICL_GPI_IS 0x100
0022 #define ICL_LP_GPI_IE 0x110
0023 #define ICL_N_GPI_IE 0x120
0024
0025 #define ICL_GPP(r, s, e, g) \
0026 { \
0027 .reg_num = (r), \
0028 .base = (s), \
0029 .size = ((e) - (s) + 1), \
0030 .gpio_base = (g), \
0031 }
0032
0033 #define ICL_COMMUNITY(b, s, e, ie, g) \
0034 { \
0035 .barno = (b), \
0036 .padown_offset = ICL_PAD_OWN, \
0037 .padcfglock_offset = ICL_PADCFGLOCK, \
0038 .hostown_offset = ICL_HOSTSW_OWN, \
0039 .is_offset = ICL_GPI_IS, \
0040 .ie_offset = (ie), \
0041 .pin_base = (s), \
0042 .npins = ((e) - (s) + 1), \
0043 .gpps = (g), \
0044 .ngpps = ARRAY_SIZE(g), \
0045 }
0046
0047 #define ICL_LP_COMMUNITY(b, s, e, g) \
0048 ICL_COMMUNITY(b, s, e, ICL_LP_GPI_IE, g)
0049
0050 #define ICL_N_COMMUNITY(b, s, e, g) \
0051 ICL_COMMUNITY(b, s, e, ICL_N_GPI_IE, g)
0052
0053
0054 static const struct pinctrl_pin_desc icllp_pins[] = {
0055
0056 PINCTRL_PIN(0, "SD3_CMD"),
0057 PINCTRL_PIN(1, "SD3_D0"),
0058 PINCTRL_PIN(2, "SD3_D1"),
0059 PINCTRL_PIN(3, "SD3_D2"),
0060 PINCTRL_PIN(4, "SD3_D3"),
0061 PINCTRL_PIN(5, "SD3_CDB"),
0062 PINCTRL_PIN(6, "SD3_CLK"),
0063 PINCTRL_PIN(7, "SD3_WP"),
0064
0065 PINCTRL_PIN(8, "CORE_VID_0"),
0066 PINCTRL_PIN(9, "CORE_VID_1"),
0067 PINCTRL_PIN(10, "VRALERTB"),
0068 PINCTRL_PIN(11, "CPU_GP_2"),
0069 PINCTRL_PIN(12, "CPU_GP_3"),
0070 PINCTRL_PIN(13, "ISH_I2C0_SDA"),
0071 PINCTRL_PIN(14, "ISH_I2C0_SCL"),
0072 PINCTRL_PIN(15, "ISH_I2C1_SDA"),
0073 PINCTRL_PIN(16, "ISH_I2C1_SCL"),
0074 PINCTRL_PIN(17, "I2C5_SDA"),
0075 PINCTRL_PIN(18, "I2C5_SCL"),
0076 PINCTRL_PIN(19, "PMCALERTB"),
0077 PINCTRL_PIN(20, "SLP_S0B"),
0078 PINCTRL_PIN(21, "PLTRSTB"),
0079 PINCTRL_PIN(22, "SPKR"),
0080 PINCTRL_PIN(23, "GSPI0_CS0B"),
0081 PINCTRL_PIN(24, "GSPI0_CLK"),
0082 PINCTRL_PIN(25, "GSPI0_MISO"),
0083 PINCTRL_PIN(26, "GSPI0_MOSI"),
0084 PINCTRL_PIN(27, "GSPI1_CS0B"),
0085 PINCTRL_PIN(28, "GSPI1_CLK"),
0086 PINCTRL_PIN(29, "GSPI1_MISO"),
0087 PINCTRL_PIN(30, "GSPI1_MOSI"),
0088 PINCTRL_PIN(31, "SML1ALERTB"),
0089 PINCTRL_PIN(32, "GSPI0_CLK_LOOPBK"),
0090 PINCTRL_PIN(33, "GSPI1_CLK_LOOPBK"),
0091
0092 PINCTRL_PIN(34, "ESPI_IO_0"),
0093 PINCTRL_PIN(35, "ESPI_IO_1"),
0094 PINCTRL_PIN(36, "ESPI_IO_2"),
0095 PINCTRL_PIN(37, "ESPI_IO_3"),
0096 PINCTRL_PIN(38, "ESPI_CSB"),
0097 PINCTRL_PIN(39, "ESPI_CLK"),
0098 PINCTRL_PIN(40, "ESPI_RESETB"),
0099 PINCTRL_PIN(41, "I2S2_SCLK"),
0100 PINCTRL_PIN(42, "I2S2_SFRM"),
0101 PINCTRL_PIN(43, "I2S2_TXD"),
0102 PINCTRL_PIN(44, "I2S2_RXD"),
0103 PINCTRL_PIN(45, "SATA_DEVSLP_2"),
0104 PINCTRL_PIN(46, "SATAXPCIE_1"),
0105 PINCTRL_PIN(47, "SATAXPCIE_2"),
0106 PINCTRL_PIN(48, "USB2_OCB_1"),
0107 PINCTRL_PIN(49, "USB2_OCB_2"),
0108 PINCTRL_PIN(50, "USB2_OCB_3"),
0109 PINCTRL_PIN(51, "DDSP_HPD_C"),
0110 PINCTRL_PIN(52, "DDSP_HPD_B"),
0111 PINCTRL_PIN(53, "DDSP_HPD_1"),
0112 PINCTRL_PIN(54, "DDSP_HPD_2"),
0113 PINCTRL_PIN(55, "I2S5_TXD"),
0114 PINCTRL_PIN(56, "I2S5_RXD"),
0115 PINCTRL_PIN(57, "I2S1_SCLK"),
0116 PINCTRL_PIN(58, "ESPI_CLK_LOOPBK"),
0117
0118 PINCTRL_PIN(59, "SD_1P8_SEL"),
0119 PINCTRL_PIN(60, "SD_PWR_EN_B"),
0120 PINCTRL_PIN(61, "GPPC_H_2"),
0121 PINCTRL_PIN(62, "SX_EXIT_HOLDOFFB"),
0122 PINCTRL_PIN(63, "I2C2_SDA"),
0123 PINCTRL_PIN(64, "I2C2_SCL"),
0124 PINCTRL_PIN(65, "I2C3_SDA"),
0125 PINCTRL_PIN(66, "I2C3_SCL"),
0126 PINCTRL_PIN(67, "I2C4_SDA"),
0127 PINCTRL_PIN(68, "I2C4_SCL"),
0128 PINCTRL_PIN(69, "SRCCLKREQB_4"),
0129 PINCTRL_PIN(70, "SRCCLKREQB_5"),
0130 PINCTRL_PIN(71, "M2_SKT2_CFG_0"),
0131 PINCTRL_PIN(72, "M2_SKT2_CFG_1"),
0132 PINCTRL_PIN(73, "M2_SKT2_CFG_2"),
0133 PINCTRL_PIN(74, "M2_SKT2_CFG_3"),
0134 PINCTRL_PIN(75, "DDPB_CTRLCLK"),
0135 PINCTRL_PIN(76, "DDPB_CTRLDATA"),
0136 PINCTRL_PIN(77, "CPU_VCCIO_PWR_GATEB"),
0137 PINCTRL_PIN(78, "TIME_SYNC_0"),
0138 PINCTRL_PIN(79, "IMGCLKOUT_1"),
0139 PINCTRL_PIN(80, "IMGCLKOUT_2"),
0140 PINCTRL_PIN(81, "IMGCLKOUT_3"),
0141 PINCTRL_PIN(82, "IMGCLKOUT_4"),
0142
0143 PINCTRL_PIN(83, "ISH_GP_0"),
0144 PINCTRL_PIN(84, "ISH_GP_1"),
0145 PINCTRL_PIN(85, "ISH_GP_2"),
0146 PINCTRL_PIN(86, "ISH_GP_3"),
0147 PINCTRL_PIN(87, "IMGCLKOUT_0"),
0148 PINCTRL_PIN(88, "SRCCLKREQB_0"),
0149 PINCTRL_PIN(89, "SRCCLKREQB_1"),
0150 PINCTRL_PIN(90, "SRCCLKREQB_2"),
0151 PINCTRL_PIN(91, "SRCCLKREQB_3"),
0152 PINCTRL_PIN(92, "ISH_SPI_CSB"),
0153 PINCTRL_PIN(93, "ISH_SPI_CLK"),
0154 PINCTRL_PIN(94, "ISH_SPI_MISO"),
0155 PINCTRL_PIN(95, "ISH_SPI_MOSI"),
0156 PINCTRL_PIN(96, "ISH_UART0_RXD"),
0157 PINCTRL_PIN(97, "ISH_UART0_TXD"),
0158 PINCTRL_PIN(98, "ISH_UART0_RTSB"),
0159 PINCTRL_PIN(99, "ISH_UART0_CTSB"),
0160 PINCTRL_PIN(100, "ISH_GP_4"),
0161 PINCTRL_PIN(101, "ISH_GP_5"),
0162 PINCTRL_PIN(102, "I2S_MCLK"),
0163 PINCTRL_PIN(103, "GSPI2_CLK_LOOPBK"),
0164
0165 PINCTRL_PIN(104, "CNV_BRI_DT"),
0166 PINCTRL_PIN(105, "CNV_BRI_RSP"),
0167 PINCTRL_PIN(106, "CNV_RGI_DT"),
0168 PINCTRL_PIN(107, "CNV_RGI_RSP"),
0169 PINCTRL_PIN(108, "CNV_RF_RESET_B"),
0170 PINCTRL_PIN(109, "EMMC_HIP_MON"),
0171 PINCTRL_PIN(110, "CNV_PA_BLANKING"),
0172 PINCTRL_PIN(111, "EMMC_CMD"),
0173 PINCTRL_PIN(112, "EMMC_DATA0"),
0174 PINCTRL_PIN(113, "EMMC_DATA1"),
0175 PINCTRL_PIN(114, "EMMC_DATA2"),
0176 PINCTRL_PIN(115, "EMMC_DATA3"),
0177 PINCTRL_PIN(116, "EMMC_DATA4"),
0178 PINCTRL_PIN(117, "EMMC_DATA5"),
0179 PINCTRL_PIN(118, "EMMC_DATA6"),
0180 PINCTRL_PIN(119, "EMMC_DATA7"),
0181 PINCTRL_PIN(120, "EMMC_RCLK"),
0182 PINCTRL_PIN(121, "EMMC_CLK"),
0183 PINCTRL_PIN(122, "EMMC_RESETB"),
0184 PINCTRL_PIN(123, "A4WP_PRESENT"),
0185
0186 PINCTRL_PIN(124, "CNV_BTEN"),
0187 PINCTRL_PIN(125, "CNV_WCEN"),
0188 PINCTRL_PIN(126, "CNV_BT_HOST_WAKEB"),
0189 PINCTRL_PIN(127, "CNV_BT_IF_SELECT"),
0190 PINCTRL_PIN(128, "vCNV_BT_UART_TXD"),
0191 PINCTRL_PIN(129, "vCNV_BT_UART_RXD"),
0192 PINCTRL_PIN(130, "vCNV_BT_UART_CTS_B"),
0193 PINCTRL_PIN(131, "vCNV_BT_UART_RTS_B"),
0194 PINCTRL_PIN(132, "vCNV_MFUART1_TXD"),
0195 PINCTRL_PIN(133, "vCNV_MFUART1_RXD"),
0196 PINCTRL_PIN(134, "vCNV_MFUART1_CTS_B"),
0197 PINCTRL_PIN(135, "vCNV_MFUART1_RTS_B"),
0198 PINCTRL_PIN(136, "vUART0_TXD"),
0199 PINCTRL_PIN(137, "vUART0_RXD"),
0200 PINCTRL_PIN(138, "vUART0_CTS_B"),
0201 PINCTRL_PIN(139, "vUART0_RTS_B"),
0202 PINCTRL_PIN(140, "vISH_UART0_TXD"),
0203 PINCTRL_PIN(141, "vISH_UART0_RXD"),
0204 PINCTRL_PIN(142, "vISH_UART0_CTS_B"),
0205 PINCTRL_PIN(143, "vISH_UART0_RTS_B"),
0206 PINCTRL_PIN(144, "vCNV_BT_I2S_BCLK"),
0207 PINCTRL_PIN(145, "vCNV_BT_I2S_WS_SYNC"),
0208 PINCTRL_PIN(146, "vCNV_BT_I2S_SDO"),
0209 PINCTRL_PIN(147, "vCNV_BT_I2S_SDI"),
0210 PINCTRL_PIN(148, "vI2S2_SCLK"),
0211 PINCTRL_PIN(149, "vI2S2_SFRM"),
0212 PINCTRL_PIN(150, "vI2S2_TXD"),
0213 PINCTRL_PIN(151, "vI2S2_RXD"),
0214 PINCTRL_PIN(152, "vSD3_CD_B"),
0215
0216 PINCTRL_PIN(153, "SMBCLK"),
0217 PINCTRL_PIN(154, "SMBDATA"),
0218 PINCTRL_PIN(155, "SMBALERTB"),
0219 PINCTRL_PIN(156, "SML0CLK"),
0220 PINCTRL_PIN(157, "SML0DATA"),
0221 PINCTRL_PIN(158, "SML0ALERTB"),
0222 PINCTRL_PIN(159, "SML1CLK"),
0223 PINCTRL_PIN(160, "SML1DATA"),
0224 PINCTRL_PIN(161, "UART0_RXD"),
0225 PINCTRL_PIN(162, "UART0_TXD"),
0226 PINCTRL_PIN(163, "UART0_RTSB"),
0227 PINCTRL_PIN(164, "UART0_CTSB"),
0228 PINCTRL_PIN(165, "UART1_RXD"),
0229 PINCTRL_PIN(166, "UART1_TXD"),
0230 PINCTRL_PIN(167, "UART1_RTSB"),
0231 PINCTRL_PIN(168, "UART1_CTSB"),
0232 PINCTRL_PIN(169, "I2C0_SDA"),
0233 PINCTRL_PIN(170, "I2C0_SCL"),
0234 PINCTRL_PIN(171, "I2C1_SDA"),
0235 PINCTRL_PIN(172, "I2C1_SCL"),
0236 PINCTRL_PIN(173, "UART2_RXD"),
0237 PINCTRL_PIN(174, "UART2_TXD"),
0238 PINCTRL_PIN(175, "UART2_RTSB"),
0239 PINCTRL_PIN(176, "UART2_CTSB"),
0240
0241 PINCTRL_PIN(177, "L_BKLTEN"),
0242 PINCTRL_PIN(178, "L_BKLTCTL"),
0243 PINCTRL_PIN(179, "L_VDDEN"),
0244 PINCTRL_PIN(180, "SYS_PWROK"),
0245 PINCTRL_PIN(181, "SYS_RESETB"),
0246 PINCTRL_PIN(182, "MLK_RSTB"),
0247
0248 PINCTRL_PIN(183, "SATAXPCIE_0"),
0249 PINCTRL_PIN(184, "SPI1_IO_2"),
0250 PINCTRL_PIN(185, "SPI1_IO_3"),
0251 PINCTRL_PIN(186, "CPU_GP_0"),
0252 PINCTRL_PIN(187, "SATA_DEVSLP_0"),
0253 PINCTRL_PIN(188, "SATA_DEVSLP_1"),
0254 PINCTRL_PIN(189, "GPPC_E_6"),
0255 PINCTRL_PIN(190, "CPU_GP_1"),
0256 PINCTRL_PIN(191, "SATA_LEDB"),
0257 PINCTRL_PIN(192, "USB2_OCB_0"),
0258 PINCTRL_PIN(193, "SPI1_CSB"),
0259 PINCTRL_PIN(194, "SPI1_CLK"),
0260 PINCTRL_PIN(195, "SPI1_MISO_IO_1"),
0261 PINCTRL_PIN(196, "SPI1_MOSI_IO_0"),
0262 PINCTRL_PIN(197, "DDSP_HPD_A"),
0263 PINCTRL_PIN(198, "ISH_GP_6"),
0264 PINCTRL_PIN(199, "ISH_GP_7"),
0265 PINCTRL_PIN(200, "DISP_MISC_4"),
0266 PINCTRL_PIN(201, "DDP1_CTRLCLK"),
0267 PINCTRL_PIN(202, "DDP1_CTRLDATA"),
0268 PINCTRL_PIN(203, "DDP2_CTRLCLK"),
0269 PINCTRL_PIN(204, "DDP2_CTRLDATA"),
0270 PINCTRL_PIN(205, "DDPA_CTRLCLK"),
0271 PINCTRL_PIN(206, "DDPA_CTRLDATA"),
0272
0273 PINCTRL_PIN(207, "JTAG_TDO"),
0274 PINCTRL_PIN(208, "JTAGX"),
0275 PINCTRL_PIN(209, "PRDYB"),
0276 PINCTRL_PIN(210, "PREQB"),
0277 PINCTRL_PIN(211, "CPU_TRSTB"),
0278 PINCTRL_PIN(212, "JTAG_TDI"),
0279 PINCTRL_PIN(213, "JTAG_TMS"),
0280 PINCTRL_PIN(214, "JTAG_TCK"),
0281 PINCTRL_PIN(215, "ITP_PMODE"),
0282
0283 PINCTRL_PIN(216, "HDA_BCLK"),
0284 PINCTRL_PIN(217, "HDA_SYNC"),
0285 PINCTRL_PIN(218, "HDA_SDO"),
0286 PINCTRL_PIN(219, "HDA_SDI_0"),
0287 PINCTRL_PIN(220, "HDA_RSTB"),
0288 PINCTRL_PIN(221, "HDA_SDI_1"),
0289 PINCTRL_PIN(222, "I2S1_TXD"),
0290 PINCTRL_PIN(223, "I2S1_RXD"),
0291
0292 PINCTRL_PIN(224, "SNDW1_CLK"),
0293 PINCTRL_PIN(225, "SNDW1_DATA"),
0294 PINCTRL_PIN(226, "SNDW2_CLK"),
0295 PINCTRL_PIN(227, "SNDW2_DATA"),
0296 PINCTRL_PIN(228, "SNDW3_CLK"),
0297 PINCTRL_PIN(229, "SNDW3_DATA"),
0298 PINCTRL_PIN(230, "SNDW4_CLK"),
0299 PINCTRL_PIN(231, "SNDW4_DATA"),
0300
0301 PINCTRL_PIN(232, "SPI0_IO_2"),
0302 PINCTRL_PIN(233, "SPI0_IO_3"),
0303 PINCTRL_PIN(234, "SPI0_MOSI_IO_0"),
0304 PINCTRL_PIN(235, "SPI0_MISO_IO_1"),
0305 PINCTRL_PIN(236, "SPI0_TPM_CSB"),
0306 PINCTRL_PIN(237, "SPI0_FLASH_0_CSB"),
0307 PINCTRL_PIN(238, "SPI0_FLASH_1_CSB"),
0308 PINCTRL_PIN(239, "SPI0_CLK"),
0309 PINCTRL_PIN(240, "SPI0_CLK_LOOPBK"),
0310 };
0311
0312 static const struct intel_padgroup icllp_community0_gpps[] = {
0313 ICL_GPP(0, 0, 7, 0),
0314 ICL_GPP(1, 8, 33, 32),
0315 ICL_GPP(2, 34, 58, 64),
0316 };
0317
0318 static const struct intel_padgroup icllp_community1_gpps[] = {
0319 ICL_GPP(0, 59, 82, 96),
0320 ICL_GPP(1, 83, 103, 128),
0321 ICL_GPP(2, 104, 123, 160),
0322 ICL_GPP(3, 124, 152, 192),
0323 };
0324
0325 static const struct intel_padgroup icllp_community4_gpps[] = {
0326 ICL_GPP(0, 153, 176, 224),
0327 ICL_GPP(1, 177, 182, INTEL_GPIO_BASE_NOMAP),
0328 ICL_GPP(2, 183, 206, 256),
0329 ICL_GPP(3, 207, 215, INTEL_GPIO_BASE_NOMAP),
0330 };
0331
0332 static const struct intel_padgroup icllp_community5_gpps[] = {
0333 ICL_GPP(0, 216, 223, 288),
0334 ICL_GPP(1, 224, 231, 320),
0335 ICL_GPP(2, 232, 240, INTEL_GPIO_BASE_NOMAP),
0336 };
0337
0338 static const struct intel_community icllp_communities[] = {
0339 ICL_LP_COMMUNITY(0, 0, 58, icllp_community0_gpps),
0340 ICL_LP_COMMUNITY(1, 59, 152, icllp_community1_gpps),
0341 ICL_LP_COMMUNITY(2, 153, 215, icllp_community4_gpps),
0342 ICL_LP_COMMUNITY(3, 216, 240, icllp_community5_gpps),
0343 };
0344
0345 static const unsigned int icllp_spi0_pins[] = { 22, 23, 24, 25, 26 };
0346 static const unsigned int icllp_spi0_modes[] = { 3, 1, 1, 1, 1 };
0347 static const unsigned int icllp_spi1_pins[] = { 27, 28, 29, 30, 31 };
0348 static const unsigned int icllp_spi1_modes[] = { 1, 1, 1, 1, 3 };
0349 static const unsigned int icllp_spi2_pins[] = { 92, 93, 94, 95, 98 };
0350 static const unsigned int icllp_spi2_modes[] = { 3, 3, 3, 3, 2 };
0351
0352 static const unsigned int icllp_i2c0_pins[] = { 169, 170 };
0353 static const unsigned int icllp_i2c1_pins[] = { 171, 172 };
0354 static const unsigned int icllp_i2c2_pins[] = { 63, 64 };
0355 static const unsigned int icllp_i2c3_pins[] = { 65, 66 };
0356 static const unsigned int icllp_i2c4_pins[] = { 67, 68 };
0357
0358 static const unsigned int icllp_uart0_pins[] = { 161, 162, 163, 164 };
0359 static const unsigned int icllp_uart1_pins[] = { 165, 166, 167, 168 };
0360 static const unsigned int icllp_uart2_pins[] = { 173, 174, 175, 176 };
0361
0362 static const struct intel_pingroup icllp_groups[] = {
0363 PIN_GROUP("spi0_grp", icllp_spi0_pins, icllp_spi0_modes),
0364 PIN_GROUP("spi1_grp", icllp_spi1_pins, icllp_spi1_modes),
0365 PIN_GROUP("spi2_grp", icllp_spi2_pins, icllp_spi2_modes),
0366 PIN_GROUP("i2c0_grp", icllp_i2c0_pins, 1),
0367 PIN_GROUP("i2c1_grp", icllp_i2c1_pins, 1),
0368 PIN_GROUP("i2c2_grp", icllp_i2c2_pins, 1),
0369 PIN_GROUP("i2c3_grp", icllp_i2c3_pins, 1),
0370 PIN_GROUP("i2c4_grp", icllp_i2c4_pins, 1),
0371 PIN_GROUP("uart0_grp", icllp_uart0_pins, 1),
0372 PIN_GROUP("uart1_grp", icllp_uart1_pins, 1),
0373 PIN_GROUP("uart2_grp", icllp_uart2_pins, 1),
0374 };
0375
0376 static const char * const icllp_spi0_groups[] = { "spi0_grp" };
0377 static const char * const icllp_spi1_groups[] = { "spi1_grp" };
0378 static const char * const icllp_spi2_groups[] = { "spi2_grp" };
0379 static const char * const icllp_i2c0_groups[] = { "i2c0_grp" };
0380 static const char * const icllp_i2c1_groups[] = { "i2c1_grp" };
0381 static const char * const icllp_i2c2_groups[] = { "i2c2_grp" };
0382 static const char * const icllp_i2c3_groups[] = { "i2c3_grp" };
0383 static const char * const icllp_i2c4_groups[] = { "i2c4_grp" };
0384 static const char * const icllp_uart0_groups[] = { "uart0_grp" };
0385 static const char * const icllp_uart1_groups[] = { "uart1_grp" };
0386 static const char * const icllp_uart2_groups[] = { "uart2_grp" };
0387
0388 static const struct intel_function icllp_functions[] = {
0389 FUNCTION("spi0", icllp_spi0_groups),
0390 FUNCTION("spi1", icllp_spi1_groups),
0391 FUNCTION("spi2", icllp_spi2_groups),
0392 FUNCTION("i2c0", icllp_i2c0_groups),
0393 FUNCTION("i2c1", icllp_i2c1_groups),
0394 FUNCTION("i2c2", icllp_i2c2_groups),
0395 FUNCTION("i2c3", icllp_i2c3_groups),
0396 FUNCTION("i2c4", icllp_i2c4_groups),
0397 FUNCTION("uart0", icllp_uart0_groups),
0398 FUNCTION("uart1", icllp_uart1_groups),
0399 FUNCTION("uart2", icllp_uart2_groups),
0400 };
0401
0402 static const struct intel_pinctrl_soc_data icllp_soc_data = {
0403 .pins = icllp_pins,
0404 .npins = ARRAY_SIZE(icllp_pins),
0405 .groups = icllp_groups,
0406 .ngroups = ARRAY_SIZE(icllp_groups),
0407 .functions = icllp_functions,
0408 .nfunctions = ARRAY_SIZE(icllp_functions),
0409 .communities = icllp_communities,
0410 .ncommunities = ARRAY_SIZE(icllp_communities),
0411 };
0412
0413
0414 static const struct pinctrl_pin_desc icln_pins[] = {
0415
0416 PINCTRL_PIN(0, "SPI0_IO_2"),
0417 PINCTRL_PIN(1, "SPI0_IO_3"),
0418 PINCTRL_PIN(2, "SPI0_MOSI_IO_0"),
0419 PINCTRL_PIN(3, "SPI0_MISO_IO_1"),
0420 PINCTRL_PIN(4, "SPI0_TPM_CSB"),
0421 PINCTRL_PIN(5, "SPI0_FLASH_0_CSB"),
0422 PINCTRL_PIN(6, "SPI0_FLASH_1_CSB"),
0423 PINCTRL_PIN(7, "SPI0_CLK"),
0424 PINCTRL_PIN(8, "SPI0_CLK_LOOPBK"),
0425
0426 PINCTRL_PIN(9, "CORE_VID_0"),
0427 PINCTRL_PIN(10, "CORE_VID_1"),
0428 PINCTRL_PIN(11, "VRALERTB"),
0429 PINCTRL_PIN(12, "CPU_GP_2"),
0430 PINCTRL_PIN(13, "CPU_GP_3"),
0431 PINCTRL_PIN(14, "SRCCLKREQB_0"),
0432 PINCTRL_PIN(15, "SRCCLKREQB_1"),
0433 PINCTRL_PIN(16, "SRCCLKREQB_2"),
0434 PINCTRL_PIN(17, "SRCCLKREQB_3"),
0435 PINCTRL_PIN(18, "SRCCLKREQB_4"),
0436 PINCTRL_PIN(19, "SRCCLKREQB_5"),
0437 PINCTRL_PIN(20, "EXT_PWR_GATEB"),
0438 PINCTRL_PIN(21, "SLP_S0B"),
0439 PINCTRL_PIN(22, "PLTRSTB"),
0440 PINCTRL_PIN(23, "SPKR_GSPI0_CS1B"),
0441 PINCTRL_PIN(24, "GSPI0_CS0B"),
0442 PINCTRL_PIN(25, "GSPI0_CLK"),
0443 PINCTRL_PIN(26, "GSPI0_MISO_TBT_LSX3_A"),
0444 PINCTRL_PIN(27, "GSPI0_MOSI_TBT_LSX3_B"),
0445 PINCTRL_PIN(28, "GSPI1_CS0B"),
0446 PINCTRL_PIN(29, "GSPI1_CLK_NFC_CLK"),
0447 PINCTRL_PIN(30, "GSPI1_MISO_NFC_CLKREQ"),
0448 PINCTRL_PIN(31, "GSPI1_MOSI"),
0449 PINCTRL_PIN(32, "GSPI1_CS1B"),
0450 PINCTRL_PIN(33, "GSPI0_CLK_LOOPBK"),
0451 PINCTRL_PIN(34, "GSPI1_CLK_LOOPBK"),
0452
0453 PINCTRL_PIN(35, "ESPI_IO_0"),
0454 PINCTRL_PIN(36, "ESPI_IO_1"),
0455 PINCTRL_PIN(37, "ESPI_IO_2"),
0456 PINCTRL_PIN(38, "ESPI_IO_3"),
0457 PINCTRL_PIN(39, "ESPI_CSB"),
0458 PINCTRL_PIN(40, "ESPI_CLK"),
0459 PINCTRL_PIN(41, "ESPI_RESETB"),
0460 PINCTRL_PIN(42, "SMBCLK"),
0461 PINCTRL_PIN(43, "SMBDATA"),
0462 PINCTRL_PIN(44, "SMBALERTB"),
0463 PINCTRL_PIN(45, "CPU_GP_0"),
0464 PINCTRL_PIN(46, "CPU_GP_1"),
0465 PINCTRL_PIN(47, "USB2_OCB_1"),
0466 PINCTRL_PIN(48, "USB2_OCB_2"),
0467 PINCTRL_PIN(49, "USB2_OCB_3"),
0468 PINCTRL_PIN(50, "DDSP_HPD_A_TIME_SYNC_0"),
0469 PINCTRL_PIN(51, "DDSP_HPD_B_TIME_SYNC_1"),
0470 PINCTRL_PIN(52, "DDSP_HPD_C"),
0471 PINCTRL_PIN(53, "USB2_OCB_0"),
0472 PINCTRL_PIN(54, "PCHHOTB"),
0473 PINCTRL_PIN(55, "ESPI_CLK_LOOPBK"),
0474
0475 PINCTRL_PIN(56, "SNDW1_CLK"),
0476 PINCTRL_PIN(57, "SNDW1_DATA"),
0477 PINCTRL_PIN(58, "SNDW2_CLK"),
0478 PINCTRL_PIN(59, "SNDW2_DATA"),
0479 PINCTRL_PIN(60, "SNDW3_CLK_DMIC_CLK_1"),
0480 PINCTRL_PIN(61, "SNDW3_DATA_DMIC_DATA_1"),
0481 PINCTRL_PIN(62, "SNDW4_CLK_DMIC_CLK_0"),
0482 PINCTRL_PIN(63, "SNDW4_DATA_DMIC_DATA_0"),
0483
0484 PINCTRL_PIN(64, "HDA_BCLK"),
0485 PINCTRL_PIN(65, "HDA_SYNC"),
0486 PINCTRL_PIN(66, "HDA_SDO"),
0487 PINCTRL_PIN(67, "HDA_SDI_0"),
0488 PINCTRL_PIN(68, "HDA_RSTB"),
0489 PINCTRL_PIN(69, "HDA_SDI_1_I2S1_RXD"),
0490 PINCTRL_PIN(70, "I2S1_SFRM"),
0491 PINCTRL_PIN(71, "I2S1_TXD"),
0492
0493 PINCTRL_PIN(72, "GPPC_H_0"),
0494 PINCTRL_PIN(73, "CNV_RF_RESET_B"),
0495 PINCTRL_PIN(74, "MODEM_CLKREQ"),
0496 PINCTRL_PIN(75, "SX_EXIT_HOLDOFFB"),
0497 PINCTRL_PIN(76, "I2C2_SDA"),
0498 PINCTRL_PIN(77, "I2C2_SCL"),
0499 PINCTRL_PIN(78, "I2C3_SDA"),
0500 PINCTRL_PIN(79, "I2C3_SCL"),
0501 PINCTRL_PIN(80, "I2C4_SDA"),
0502 PINCTRL_PIN(81, "I2C4_SCL"),
0503 PINCTRL_PIN(82, "CPU_VCCIO_PWR_GATEB"),
0504 PINCTRL_PIN(83, "I2S2_SCLK"),
0505 PINCTRL_PIN(84, "CNV_RF_RESET_B"),
0506 PINCTRL_PIN(85, "MODEM_CLKREQ"),
0507 PINCTRL_PIN(86, "I2S2_RXD"),
0508 PINCTRL_PIN(87, "I2S1_SCLK"),
0509 PINCTRL_PIN(88, "GPPC_H_16"),
0510 PINCTRL_PIN(89, "GPPC_H_17"),
0511 PINCTRL_PIN(90, "GPPC_H_18"),
0512 PINCTRL_PIN(91, "GPPC_H_19"),
0513 PINCTRL_PIN(92, "GPPC_H_20"),
0514 PINCTRL_PIN(93, "GPPC_H_21"),
0515 PINCTRL_PIN(94, "GPPC_H_22"),
0516 PINCTRL_PIN(95, "GPPC_H_23"),
0517
0518 PINCTRL_PIN(96, "SPI1_CSB_BK_0_SBK_0"),
0519 PINCTRL_PIN(97, "SPI1_CLK_BK_1_SBK_1"),
0520 PINCTRL_PIN(98, "SPI1_MISO_IO_1_BK_2_SBK_2"),
0521 PINCTRL_PIN(99, "SPI1_MOSI_IO_0_BK_3_SBK_3"),
0522 PINCTRL_PIN(100, "ISH_I2C0_SDA"),
0523 PINCTRL_PIN(101, "ISH_I2C0_SCL"),
0524 PINCTRL_PIN(102, "ISH_I2C1_SDA"),
0525 PINCTRL_PIN(103, "ISH_I2C1_SCL"),
0526 PINCTRL_PIN(104, "ISH_SPI_CSB_GSPI2_CS0B_TBT_LSX4_A"),
0527 PINCTRL_PIN(105, "ISH_SPI_CLK_GSPI2_CLK_TBT_LSX4_B"),
0528 PINCTRL_PIN(106, "ISH_SPI_MISO_GSPI2_MISO_TBT_LSX5_A"),
0529 PINCTRL_PIN(107, "ISH_SPI_MOSI_GSPI2_MOSI_TBT_LSX5_B"),
0530 PINCTRL_PIN(108, "ISH_UART0_RXD_I2C4B_SDA"),
0531 PINCTRL_PIN(109, "ISH_UART0_TXD_I2C4B_SCL"),
0532 PINCTRL_PIN(110, "ISH_UART0_RTSB_GSPI2_CS1B"),
0533 PINCTRL_PIN(111, "ISH_UART0_CTSB_CNV_WCEN"),
0534 PINCTRL_PIN(112, "SPI1_IO_2"),
0535 PINCTRL_PIN(113, "SPI1_IO_3"),
0536 PINCTRL_PIN(114, "I2S_MCLK"),
0537 PINCTRL_PIN(115, "CNV_MFUART2_RXD"),
0538 PINCTRL_PIN(116, "CNV_MFUART2_TXD"),
0539 PINCTRL_PIN(117, "CNV_PA_BLANKING"),
0540 PINCTRL_PIN(118, "I2C5_SDA_ISH_I2C2_SDA"),
0541 PINCTRL_PIN(119, "I2C5_SCL_ISH_I2C2_SCL"),
0542 PINCTRL_PIN(120, "GSPI2_CLK_LOOPBK"),
0543 PINCTRL_PIN(121, "SPI1_CLK_LOOPBK"),
0544
0545 PINCTRL_PIN(122, "CNV_BTEN"),
0546 PINCTRL_PIN(123, "CNV_WCEN"),
0547 PINCTRL_PIN(124, "CNV_BT_HOST_WAKEB"),
0548 PINCTRL_PIN(125, "CNV_BT_IF_SELECT"),
0549 PINCTRL_PIN(126, "vCNV_BT_UART_TXD"),
0550 PINCTRL_PIN(127, "vCNV_BT_UART_RXD"),
0551 PINCTRL_PIN(128, "vCNV_BT_UART_CTS_B"),
0552 PINCTRL_PIN(129, "vCNV_BT_UART_RTS_B"),
0553 PINCTRL_PIN(130, "vCNV_MFUART1_TXD"),
0554 PINCTRL_PIN(131, "vCNV_MFUART1_RXD"),
0555 PINCTRL_PIN(132, "vCNV_MFUART1_CTS_B"),
0556 PINCTRL_PIN(133, "vCNV_MFUART1_RTS_B"),
0557 PINCTRL_PIN(134, "vUART0_TXD"),
0558 PINCTRL_PIN(135, "vUART0_RXD"),
0559 PINCTRL_PIN(136, "vUART0_CTS_B"),
0560 PINCTRL_PIN(137, "vUART0_RTS_B"),
0561 PINCTRL_PIN(138, "vISH_UART0_TXD"),
0562 PINCTRL_PIN(139, "vISH_UART0_RXD"),
0563 PINCTRL_PIN(140, "vISH_UART0_CTS_B"),
0564 PINCTRL_PIN(141, "vISH_UART0_RTS_B"),
0565 PINCTRL_PIN(142, "vCNV_BT_I2S_BCLK"),
0566 PINCTRL_PIN(143, "vCNV_BT_I2S_WS_SYNC"),
0567 PINCTRL_PIN(144, "vCNV_BT_I2S_SDO"),
0568 PINCTRL_PIN(145, "vCNV_BT_I2S_SDI"),
0569 PINCTRL_PIN(146, "vI2S2_SCLK"),
0570 PINCTRL_PIN(147, "vI2S2_SFRM"),
0571 PINCTRL_PIN(148, "vI2S2_TXD"),
0572 PINCTRL_PIN(149, "vI2S2_RXD"),
0573 PINCTRL_PIN(150, "vSD3_CD_B"),
0574
0575 PINCTRL_PIN(151, "GPPC_C_0"),
0576 PINCTRL_PIN(152, "GPPC_C_1"),
0577 PINCTRL_PIN(153, "GPPC_C_2"),
0578 PINCTRL_PIN(154, "GPPC_C_3"),
0579 PINCTRL_PIN(155, "GPPC_C_4"),
0580 PINCTRL_PIN(156, "GPPC_C_5"),
0581 PINCTRL_PIN(157, "SUSWARNB_SUSPWRDNACK"),
0582 PINCTRL_PIN(158, "SUSACKB"),
0583 PINCTRL_PIN(159, "UART0_RXD"),
0584 PINCTRL_PIN(160, "UART0_TXD"),
0585 PINCTRL_PIN(161, "UART0_RTSB"),
0586 PINCTRL_PIN(162, "UART0_CTSB"),
0587 PINCTRL_PIN(163, "UART1_RXD_ISH_UART1_RXD"),
0588 PINCTRL_PIN(164, "UART1_TXD_ISH_UART1_TXD"),
0589 PINCTRL_PIN(165, "UART1_RTSB_ISH_UART1_RTSB"),
0590 PINCTRL_PIN(166, "UART1_CTSB_ISH_UART1_CTSB"),
0591 PINCTRL_PIN(167, "I2C0_SDA"),
0592 PINCTRL_PIN(168, "I2C0_SCL"),
0593 PINCTRL_PIN(169, "I2C1_SDA"),
0594 PINCTRL_PIN(170, "I2C1_SCL"),
0595 PINCTRL_PIN(171, "UART2_RXD_CNV_MFUART0_RXD"),
0596 PINCTRL_PIN(172, "UART2_TXD_CNV_MFUART0_TXD"),
0597 PINCTRL_PIN(173, "UART2_RTSB_CNV_MFUART0_RTS_B"),
0598 PINCTRL_PIN(174, "UART2_CTSB_CNV_MFUART0_CTS_B"),
0599
0600 PINCTRL_PIN(175, "L_BKLTEN"),
0601 PINCTRL_PIN(176, "L_BKLTCTL"),
0602 PINCTRL_PIN(177, "L_VDDEN"),
0603 PINCTRL_PIN(178, "SYS_PWROK"),
0604 PINCTRL_PIN(179, "SYS_RESETB"),
0605 PINCTRL_PIN(180, "MLK_RSTB"),
0606
0607 PINCTRL_PIN(181, "ISH_GP_0_IMGCLKOUT_0"),
0608 PINCTRL_PIN(182, "ISH_GP_1"),
0609 PINCTRL_PIN(183, "IMGCLKOUT_1"),
0610 PINCTRL_PIN(184, "ISH_GP_2_SATA_DEVSLP_0"),
0611 PINCTRL_PIN(185, "IMGCLKOUT_2"),
0612 PINCTRL_PIN(186, "SATA_LEDB_SPI1_CS1B"),
0613 PINCTRL_PIN(187, "IMGCLKOUT_3"),
0614 PINCTRL_PIN(188, "ISH_GP_3_SATA_DEVSLP_1"),
0615 PINCTRL_PIN(189, "FIVR_DIGPB_0"),
0616 PINCTRL_PIN(190, "SML0CLK"),
0617 PINCTRL_PIN(191, "SML0DATA"),
0618 PINCTRL_PIN(192, "BSSB_LS3_RX"),
0619 PINCTRL_PIN(193, "BSSB_LS3_TX"),
0620 PINCTRL_PIN(194, "BSSB_LS0_RX"),
0621 PINCTRL_PIN(195, "BSSB_LS0_TX"),
0622 PINCTRL_PIN(196, "BSSB_LS1_RX"),
0623 PINCTRL_PIN(197, "BSSB_LS1_TX"),
0624 PINCTRL_PIN(198, "BSSB_LS2_RX"),
0625 PINCTRL_PIN(199, "BSSB_LS2_TX"),
0626 PINCTRL_PIN(200, "FIVR_DIGPB_1"),
0627 PINCTRL_PIN(201, "CNV_BRI_DT"),
0628 PINCTRL_PIN(202, "CNV_BRI_RSP"),
0629 PINCTRL_PIN(203, "CNV_RGI_DT"),
0630 PINCTRL_PIN(204, "CNV_RGI_RSP"),
0631
0632 PINCTRL_PIN(205, "SD3_CMD"),
0633 PINCTRL_PIN(206, "SD3_D0"),
0634 PINCTRL_PIN(207, "SD3_D1"),
0635 PINCTRL_PIN(208, "SD3_D2"),
0636 PINCTRL_PIN(209, "SD3_D3"),
0637 PINCTRL_PIN(210, "SD3_CDB"),
0638 PINCTRL_PIN(211, "SD3_CLK"),
0639 PINCTRL_PIN(212, "SD3_WP"),
0640 };
0641
0642 static const struct intel_padgroup icln_community0_gpps[] = {
0643 ICL_GPP(0, 0, 8, INTEL_GPIO_BASE_NOMAP),
0644 ICL_GPP(1, 9, 34, 32),
0645 ICL_GPP(2, 35, 55, 64),
0646 ICL_GPP(3, 56, 63, 96),
0647 ICL_GPP(4, 64, 71, 128),
0648 };
0649
0650 static const struct intel_padgroup icln_community1_gpps[] = {
0651 ICL_GPP(0, 72, 95, 160),
0652 ICL_GPP(1, 96, 121, 192),
0653 ICL_GPP(2, 122, 150, 224),
0654 ICL_GPP(3, 151, 174, 256),
0655 };
0656
0657 static const struct intel_padgroup icln_community4_gpps[] = {
0658 ICL_GPP(0, 175, 180, INTEL_GPIO_BASE_NOMAP),
0659 ICL_GPP(1, 181, 204, 288),
0660 };
0661
0662 static const struct intel_padgroup icln_community5_gpps[] = {
0663 ICL_GPP(0, 205, 212, INTEL_GPIO_BASE_ZERO),
0664 };
0665
0666 static const struct intel_community icln_communities[] = {
0667 ICL_N_COMMUNITY(0, 0, 71, icln_community0_gpps),
0668 ICL_N_COMMUNITY(1, 72, 174, icln_community1_gpps),
0669 ICL_N_COMMUNITY(2, 175, 204, icln_community4_gpps),
0670 ICL_N_COMMUNITY(3, 205, 212, icln_community5_gpps),
0671 };
0672
0673 static const struct intel_pinctrl_soc_data icln_soc_data = {
0674 .pins = icln_pins,
0675 .npins = ARRAY_SIZE(icln_pins),
0676 .communities = icln_communities,
0677 .ncommunities = ARRAY_SIZE(icln_communities),
0678 };
0679
0680 static INTEL_PINCTRL_PM_OPS(icl_pinctrl_pm_ops);
0681
0682 static const struct acpi_device_id icl_pinctrl_acpi_match[] = {
0683 { "INT3455", (kernel_ulong_t)&icllp_soc_data },
0684 { "INT34C3", (kernel_ulong_t)&icln_soc_data },
0685 { }
0686 };
0687 MODULE_DEVICE_TABLE(acpi, icl_pinctrl_acpi_match);
0688
0689 static struct platform_driver icl_pinctrl_driver = {
0690 .probe = intel_pinctrl_probe_by_hid,
0691 .driver = {
0692 .name = "icelake-pinctrl",
0693 .acpi_match_table = icl_pinctrl_acpi_match,
0694 .pm = &icl_pinctrl_pm_ops,
0695 },
0696 };
0697
0698 module_platform_driver(icl_pinctrl_driver);
0699
0700 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
0701 MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
0702 MODULE_DESCRIPTION("Intel Ice Lake PCH pinctrl/GPIO driver");
0703 MODULE_LICENSE("GPL v2");
