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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright 2021 NXP
0004  */
0005 
0006 #include <linux/err.h>
0007 #include <linux/init.h>
0008 #include <linux/io.h>
0009 #include <linux/module.h>
0010 #include <linux/of.h>
0011 #include <linux/of_device.h>
0012 #include <linux/pinctrl/pinctrl.h>
0013 
0014 #include "pinctrl-imx.h"
0015 
0016 enum imx93_pads {
0017     IMX93_IOMUXC_DAP_TDI = 0,
0018     IMX93_IOMUXC_DAP_TMS_SWDIO = 1,
0019     IMX93_IOMUXC_DAP_TCLK_SWCLK = 2,
0020     IMX93_IOMUXC_DAP_TDO_TRACESWO = 3,
0021     IMX93_IOMUXC_GPIO_IO00 = 4,
0022     IMX93_IOMUXC_GPIO_IO01 = 5,
0023     IMX93_IOMUXC_GPIO_IO02 = 6,
0024     IMX93_IOMUXC_GPIO_IO03 = 7,
0025     IMX93_IOMUXC_GPIO_IO04 = 8,
0026     IMX93_IOMUXC_GPIO_IO05 = 9,
0027     IMX93_IOMUXC_GPIO_IO06 = 10,
0028     IMX93_IOMUXC_GPIO_IO07 = 11,
0029     IMX93_IOMUXC_GPIO_IO08 = 12,
0030     IMX93_IOMUXC_GPIO_IO09 = 13,
0031     IMX93_IOMUXC_GPIO_IO10 = 14,
0032     IMX93_IOMUXC_GPIO_IO11 = 15,
0033     IMX93_IOMUXC_GPIO_IO12 = 16,
0034     IMX93_IOMUXC_GPIO_IO13 = 17,
0035     IMX93_IOMUXC_GPIO_IO14 = 18,
0036     IMX93_IOMUXC_GPIO_IO15 = 19,
0037     IMX93_IOMUXC_GPIO_IO16 = 20,
0038     IMX93_IOMUXC_GPIO_IO17 = 21,
0039     IMX93_IOMUXC_GPIO_IO18 = 22,
0040     IMX93_IOMUXC_GPIO_IO19 = 23,
0041     IMX93_IOMUXC_GPIO_IO20 = 24,
0042     IMX93_IOMUXC_GPIO_IO21 = 25,
0043     IMX93_IOMUXC_GPIO_IO22 = 26,
0044     IMX93_IOMUXC_GPIO_IO23 = 27,
0045     IMX93_IOMUXC_GPIO_IO24 = 28,
0046     IMX93_IOMUXC_GPIO_IO25 = 29,
0047     IMX93_IOMUXC_GPIO_IO26 = 30,
0048     IMX93_IOMUXC_GPIO_IO27 = 31,
0049     IMX93_IOMUXC_GPIO_IO28 = 32,
0050     IMX93_IOMUXC_GPIO_IO29 = 33,
0051     IMX93_IOMUXC_CCM_CLKO1 = 34,
0052     IMX93_IOMUXC_CCM_CLKO2 = 35,
0053     IMX93_IOMUXC_CCM_CLKO3 = 36,
0054     IMX93_IOMUXC_CCM_CLKO4 = 37,
0055     IMX93_IOMUXC_ENET1_MDC = 38,
0056     IMX93_IOMUXC_ENET1_MDIO = 39,
0057     IMX93_IOMUXC_ENET1_TD3 = 40,
0058     IMX93_IOMUXC_ENET1_TD2 = 41,
0059     IMX93_IOMUXC_ENET1_TD1 = 42,
0060     IMX93_IOMUXC_ENET1_TD0 = 43,
0061     IMX93_IOMUXC_ENET1_TX_CTL = 44,
0062     IMX93_IOMUXC_ENET1_TXC = 45,
0063     IMX93_IOMUXC_ENET1_RX_CTL = 46,
0064     IMX93_IOMUXC_ENET1_RXC = 47,
0065     IMX93_IOMUXC_ENET1_RD0 = 48,
0066     IMX93_IOMUXC_ENET1_RD1 = 49,
0067     IMX93_IOMUXC_ENET1_RD2 = 50,
0068     IMX93_IOMUXC_ENET1_RD3 = 51,
0069     IMX93_IOMUXC_ENET2_MDC = 52,
0070     IMX93_IOMUXC_ENET2_MDIO = 53,
0071     IMX93_IOMUXC_ENET2_TD3 = 54,
0072     IMX93_IOMUXC_ENET2_TD2 = 55,
0073     IMX93_IOMUXC_ENET2_TD1 = 56,
0074     IMX93_IOMUXC_ENET2_TD0 = 57,
0075     IMX93_IOMUXC_ENET2_TX_CTL = 58,
0076     IMX93_IOMUXC_ENET2_TXC = 59,
0077     IMX93_IOMUXC_ENET2_RX_CTL = 60,
0078     IMX93_IOMUXC_ENET2_RXC = 61,
0079     IMX93_IOMUXC_ENET2_RD0 = 62,
0080     IMX93_IOMUXC_ENET2_RD1 = 63,
0081     IMX93_IOMUXC_ENET2_RD2 = 64,
0082     IMX93_IOMUXC_ENET2_RD3 = 65,
0083     IMX93_IOMUXC_SD1_CLK = 66,
0084     IMX93_IOMUXC_SD1_CMD = 67,
0085     IMX93_IOMUXC_SD1_DATA0 = 68,
0086     IMX93_IOMUXC_SD1_DATA1 = 69,
0087     IMX93_IOMUXC_SD1_DATA2 = 70,
0088     IMX93_IOMUXC_SD1_DATA3 = 71,
0089     IMX93_IOMUXC_SD1_DATA4 = 72,
0090     IMX93_IOMUXC_SD1_DATA5 = 73,
0091     IMX93_IOMUXC_SD1_DATA6 = 74,
0092     IMX93_IOMUXC_SD1_DATA7 = 75,
0093     IMX93_IOMUXC_SD1_STROBE = 76,
0094     IMX93_IOMUXC_SD2_VSELECT = 77,
0095     IMX93_IOMUXC_SD3_CLK = 78,
0096     IMX93_IOMUXC_SD3_CMD = 79,
0097     IMX93_IOMUXC_SD3_DATA0 = 80,
0098     IMX93_IOMUXC_SD3_DATA1 = 81,
0099     IMX93_IOMUXC_SD3_DATA2 = 82,
0100     IMX93_IOMUXC_SD3_DATA3 = 83,
0101     IMX93_IOMUXC_SD2_CD_B = 84,
0102     IMX93_IOMUXC_SD2_CLK = 85,
0103     IMX93_IOMUXC_SD2_CMD = 86,
0104     IMX93_IOMUXC_SD2_DATA0 = 87,
0105     IMX93_IOMUXC_SD2_DATA1 = 88,
0106     IMX93_IOMUXC_SD2_DATA2 = 89,
0107     IMX93_IOMUXC_SD2_DATA3 = 90,
0108     IMX93_IOMUXC_SD2_RESET_B = 91,
0109     IMX93_IOMUXC_I2C1_SCL = 92,
0110     IMX93_IOMUXC_I2C1_SDA = 93,
0111     IMX93_IOMUXC_I2C2_SCL = 94,
0112     IMX93_IOMUXC_I2C2_SDA = 95,
0113     IMX93_IOMUXC_UART1_RXD = 96,
0114     IMX93_IOMUXC_UART1_TXD = 97,
0115     IMX93_IOMUXC_UART2_RXD = 98,
0116     IMX93_IOMUXC_UART2_TXD = 99,
0117     IMX93_IOMUXC_PDM_CLK = 100,
0118     IMX93_IOMUXC_PDM_BIT_STREAM0 = 101,
0119     IMX93_IOMUXC_PDM_BIT_STREAM1 = 102,
0120     IMX93_IOMUXC_SAI1_TXFS = 103,
0121     IMX93_IOMUXC_SAI1_TXC = 104,
0122     IMX93_IOMUXC_SAI1_TXD0 = 105,
0123     IMX93_IOMUXC_SAI1_RXD0 = 106,
0124     IMX93_IOMUXC_WDOG_ANY  = 107,
0125 };
0126 
0127 /* Pad names for the pinmux subsystem */
0128 static const struct pinctrl_pin_desc imx93_pinctrl_pads[] = {
0129     IMX_PINCTRL_PIN(IMX93_IOMUXC_DAP_TDI),
0130     IMX_PINCTRL_PIN(IMX93_IOMUXC_DAP_TMS_SWDIO),
0131     IMX_PINCTRL_PIN(IMX93_IOMUXC_DAP_TCLK_SWCLK),
0132     IMX_PINCTRL_PIN(IMX93_IOMUXC_DAP_TDO_TRACESWO),
0133     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO00),
0134     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO01),
0135     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO02),
0136     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO03),
0137     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO04),
0138     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO05),
0139     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO06),
0140     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO07),
0141     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO08),
0142     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO09),
0143     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO10),
0144     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO11),
0145     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO12),
0146     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO13),
0147     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO14),
0148     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO15),
0149     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO16),
0150     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO17),
0151     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO18),
0152     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO19),
0153     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO20),
0154     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO21),
0155     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO22),
0156     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO23),
0157     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO24),
0158     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO25),
0159     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO26),
0160     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO27),
0161     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO28),
0162     IMX_PINCTRL_PIN(IMX93_IOMUXC_GPIO_IO29),
0163     IMX_PINCTRL_PIN(IMX93_IOMUXC_CCM_CLKO1),
0164     IMX_PINCTRL_PIN(IMX93_IOMUXC_CCM_CLKO2),
0165     IMX_PINCTRL_PIN(IMX93_IOMUXC_CCM_CLKO3),
0166     IMX_PINCTRL_PIN(IMX93_IOMUXC_CCM_CLKO4),
0167     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_MDC),
0168     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_MDIO),
0169     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_TD3),
0170     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_TD2),
0171     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_TD1),
0172     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_TD0),
0173     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_TX_CTL),
0174     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_TXC),
0175     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_RX_CTL),
0176     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_RXC),
0177     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_RD0),
0178     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_RD1),
0179     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_RD2),
0180     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET1_RD3),
0181     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_MDC),
0182     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_MDIO),
0183     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_TD3),
0184     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_TD2),
0185     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_TD1),
0186     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_TD0),
0187     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_TX_CTL),
0188     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_TXC),
0189     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_RX_CTL),
0190     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_RXC),
0191     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_RD0),
0192     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_RD1),
0193     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_RD2),
0194     IMX_PINCTRL_PIN(IMX93_IOMUXC_ENET2_RD3),
0195     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_CLK),
0196     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_CMD),
0197     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_DATA0),
0198     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_DATA1),
0199     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_DATA2),
0200     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_DATA3),
0201     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_DATA4),
0202     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_DATA5),
0203     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_DATA6),
0204     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_DATA7),
0205     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD1_STROBE),
0206     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_VSELECT),
0207     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD3_CLK),
0208     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD3_CMD),
0209     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD3_DATA0),
0210     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD3_DATA1),
0211     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD3_DATA2),
0212     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD3_DATA3),
0213     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_CD_B),
0214     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_CLK),
0215     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_CMD),
0216     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_DATA0),
0217     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_DATA1),
0218     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_DATA2),
0219     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_DATA3),
0220     IMX_PINCTRL_PIN(IMX93_IOMUXC_SD2_RESET_B),
0221     IMX_PINCTRL_PIN(IMX93_IOMUXC_I2C1_SCL),
0222     IMX_PINCTRL_PIN(IMX93_IOMUXC_I2C1_SDA),
0223     IMX_PINCTRL_PIN(IMX93_IOMUXC_I2C2_SCL),
0224     IMX_PINCTRL_PIN(IMX93_IOMUXC_I2C2_SDA),
0225     IMX_PINCTRL_PIN(IMX93_IOMUXC_UART1_RXD),
0226     IMX_PINCTRL_PIN(IMX93_IOMUXC_UART1_TXD),
0227     IMX_PINCTRL_PIN(IMX93_IOMUXC_UART2_RXD),
0228     IMX_PINCTRL_PIN(IMX93_IOMUXC_UART2_TXD),
0229     IMX_PINCTRL_PIN(IMX93_IOMUXC_PDM_CLK),
0230     IMX_PINCTRL_PIN(IMX93_IOMUXC_PDM_BIT_STREAM0),
0231     IMX_PINCTRL_PIN(IMX93_IOMUXC_PDM_BIT_STREAM1),
0232     IMX_PINCTRL_PIN(IMX93_IOMUXC_SAI1_TXFS),
0233     IMX_PINCTRL_PIN(IMX93_IOMUXC_SAI1_TXC),
0234     IMX_PINCTRL_PIN(IMX93_IOMUXC_SAI1_TXD0),
0235     IMX_PINCTRL_PIN(IMX93_IOMUXC_SAI1_RXD0),
0236     IMX_PINCTRL_PIN(IMX93_IOMUXC_WDOG_ANY),
0237 };
0238 
0239 static const struct imx_pinctrl_soc_info imx93_pinctrl_info = {
0240     .pins = imx93_pinctrl_pads,
0241     .npins = ARRAY_SIZE(imx93_pinctrl_pads),
0242     .flags = ZERO_OFFSET_VALID,
0243     .gpr_compatible = "fsl,imx93-iomuxc-gpr",
0244 };
0245 
0246 static const struct of_device_id imx93_pinctrl_of_match[] = {
0247     { .compatible = "fsl,imx93-iomuxc", },
0248     { /* sentinel */ }
0249 };
0250 MODULE_DEVICE_TABLE(of, imx93_pinctrl_of_match);
0251 
0252 static int imx93_pinctrl_probe(struct platform_device *pdev)
0253 {
0254     return imx_pinctrl_probe(pdev, &imx93_pinctrl_info);
0255 }
0256 
0257 static struct platform_driver imx93_pinctrl_driver = {
0258     .driver = {
0259         .name = "imx93-pinctrl",
0260         .of_match_table = imx93_pinctrl_of_match,
0261         .suppress_bind_attrs = true,
0262     },
0263     .probe = imx93_pinctrl_probe,
0264 };
0265 
0266 static int __init imx93_pinctrl_init(void)
0267 {
0268     return platform_driver_register(&imx93_pinctrl_driver);
0269 }
0270 arch_initcall(imx93_pinctrl_init);
0271 
0272 MODULE_AUTHOR("Bai Ping <ping.bai@nxp.com>");
0273 MODULE_DESCRIPTION("NXP i.MX93 pinctrl driver");
0274 MODULE_LICENSE("GPL v2");
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