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0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Freescale imx6ul pinctrl driver
0004 //
0005 // Author: Anson Huang <Anson.Huang@freescale.com>
0006 // Copyright (C) 2015 Freescale Semiconductor, Inc.
0007 
0008 #include <linux/err.h>
0009 #include <linux/init.h>
0010 #include <linux/io.h>
0011 #include <linux/of.h>
0012 #include <linux/of_device.h>
0013 #include <linux/pinctrl/pinctrl.h>
0014 
0015 #include "pinctrl-imx.h"
0016 
0017 enum imx6ul_pads {
0018     MX6UL_PAD_RESERVE0 = 0,
0019     MX6UL_PAD_RESERVE1 = 1,
0020     MX6UL_PAD_RESERVE2 = 2,
0021     MX6UL_PAD_RESERVE3 = 3,
0022     MX6UL_PAD_RESERVE4 = 4,
0023     MX6UL_PAD_RESERVE5 = 5,
0024     MX6UL_PAD_RESERVE6 = 6,
0025     MX6UL_PAD_RESERVE7 = 7,
0026     MX6UL_PAD_RESERVE8 = 8,
0027     MX6UL_PAD_RESERVE9 = 9,
0028     MX6UL_PAD_RESERVE10 = 10,
0029     MX6UL_PAD_SNVS_TAMPER4 = 11,
0030     MX6UL_PAD_RESERVE12 = 12,
0031     MX6UL_PAD_RESERVE13 = 13,
0032     MX6UL_PAD_RESERVE14 = 14,
0033     MX6UL_PAD_RESERVE15 = 15,
0034     MX6UL_PAD_RESERVE16 = 16,
0035     MX6UL_PAD_JTAG_MOD = 17,
0036     MX6UL_PAD_JTAG_TMS = 18,
0037     MX6UL_PAD_JTAG_TDO = 19,
0038     MX6UL_PAD_JTAG_TDI = 20,
0039     MX6UL_PAD_JTAG_TCK = 21,
0040     MX6UL_PAD_JTAG_TRST_B = 22,
0041     MX6UL_PAD_GPIO1_IO00 = 23,
0042     MX6UL_PAD_GPIO1_IO01 = 24,
0043     MX6UL_PAD_GPIO1_IO02 = 25,
0044     MX6UL_PAD_GPIO1_IO03 = 26,
0045     MX6UL_PAD_GPIO1_IO04 = 27,
0046     MX6UL_PAD_GPIO1_IO05 = 28,
0047     MX6UL_PAD_GPIO1_IO06 = 29,
0048     MX6UL_PAD_GPIO1_IO07 = 30,
0049     MX6UL_PAD_GPIO1_IO08 = 31,
0050     MX6UL_PAD_GPIO1_IO09 = 32,
0051     MX6UL_PAD_UART1_TX_DATA = 33,
0052     MX6UL_PAD_UART1_RX_DATA = 34,
0053     MX6UL_PAD_UART1_CTS_B = 35,
0054     MX6UL_PAD_UART1_RTS_B = 36,
0055     MX6UL_PAD_UART2_TX_DATA = 37,
0056     MX6UL_PAD_UART2_RX_DATA = 38,
0057     MX6UL_PAD_UART2_CTS_B = 39,
0058     MX6UL_PAD_UART2_RTS_B = 40,
0059     MX6UL_PAD_UART3_TX_DATA = 41,
0060     MX6UL_PAD_UART3_RX_DATA = 42,
0061     MX6UL_PAD_UART3_CTS_B = 43,
0062     MX6UL_PAD_UART3_RTS_B = 44,
0063     MX6UL_PAD_UART4_TX_DATA = 45,
0064     MX6UL_PAD_UART4_RX_DATA = 46,
0065     MX6UL_PAD_UART5_TX_DATA = 47,
0066     MX6UL_PAD_UART5_RX_DATA = 48,
0067     MX6UL_PAD_ENET1_RX_DATA0 = 49,
0068     MX6UL_PAD_ENET1_RX_DATA1 = 50,
0069     MX6UL_PAD_ENET1_RX_EN = 51,
0070     MX6UL_PAD_ENET1_TX_DATA0 = 52,
0071     MX6UL_PAD_ENET1_TX_DATA1 = 53,
0072     MX6UL_PAD_ENET1_TX_EN = 54,
0073     MX6UL_PAD_ENET1_TX_CLK = 55,
0074     MX6UL_PAD_ENET1_RX_ER = 56,
0075     MX6UL_PAD_ENET2_RX_DATA0 = 57,
0076     MX6UL_PAD_ENET2_RX_DATA1 = 58,
0077     MX6UL_PAD_ENET2_RX_EN = 59,
0078     MX6UL_PAD_ENET2_TX_DATA0 = 60,
0079     MX6UL_PAD_ENET2_TX_DATA1 = 61,
0080     MX6UL_PAD_ENET2_TX_EN = 62,
0081     MX6UL_PAD_ENET2_TX_CLK = 63,
0082     MX6UL_PAD_ENET2_RX_ER = 64,
0083     MX6UL_PAD_LCD_CLK = 65,
0084     MX6UL_PAD_LCD_ENABLE = 66,
0085     MX6UL_PAD_LCD_HSYNC = 67,
0086     MX6UL_PAD_LCD_VSYNC = 68,
0087     MX6UL_PAD_LCD_RESET = 69,
0088     MX6UL_PAD_LCD_DATA00 = 70,
0089     MX6UL_PAD_LCD_DATA01 = 71,
0090     MX6UL_PAD_LCD_DATA02 = 72,
0091     MX6UL_PAD_LCD_DATA03 = 73,
0092     MX6UL_PAD_LCD_DATA04 = 74,
0093     MX6UL_PAD_LCD_DATA05 = 75,
0094     MX6UL_PAD_LCD_DATA06 = 76,
0095     MX6UL_PAD_LCD_DATA07 = 77,
0096     MX6UL_PAD_LCD_DATA08 = 78,
0097     MX6UL_PAD_LCD_DATA09 = 79,
0098     MX6UL_PAD_LCD_DATA10 = 80,
0099     MX6UL_PAD_LCD_DATA11 = 81,
0100     MX6UL_PAD_LCD_DATA12 = 82,
0101     MX6UL_PAD_LCD_DATA13 = 83,
0102     MX6UL_PAD_LCD_DATA14 = 84,
0103     MX6UL_PAD_LCD_DATA15 = 85,
0104     MX6UL_PAD_LCD_DATA16 = 86,
0105     MX6UL_PAD_LCD_DATA17 = 87,
0106     MX6UL_PAD_LCD_DATA18 = 88,
0107     MX6UL_PAD_LCD_DATA19 = 89,
0108     MX6UL_PAD_LCD_DATA20 = 90,
0109     MX6UL_PAD_LCD_DATA21 = 91,
0110     MX6UL_PAD_LCD_DATA22 = 92,
0111     MX6UL_PAD_LCD_DATA23 = 93,
0112     MX6UL_PAD_NAND_RE_B = 94,
0113     MX6UL_PAD_NAND_WE_B = 95,
0114     MX6UL_PAD_NAND_DATA00 = 96,
0115     MX6UL_PAD_NAND_DATA01 = 97,
0116     MX6UL_PAD_NAND_DATA02 = 98,
0117     MX6UL_PAD_NAND_DATA03 = 99,
0118     MX6UL_PAD_NAND_DATA04 = 100,
0119     MX6UL_PAD_NAND_DATA05 = 101,
0120     MX6UL_PAD_NAND_DATA06 = 102,
0121     MX6UL_PAD_NAND_DATA07 = 103,
0122     MX6UL_PAD_NAND_ALE = 104,
0123     MX6UL_PAD_NAND_WP_B = 105,
0124     MX6UL_PAD_NAND_READY_B = 106,
0125     MX6UL_PAD_NAND_CE0_B = 107,
0126     MX6UL_PAD_NAND_CE1_B = 108,
0127     MX6UL_PAD_NAND_CLE = 109,
0128     MX6UL_PAD_NAND_DQS = 110,
0129     MX6UL_PAD_SD1_CMD = 111,
0130     MX6UL_PAD_SD1_CLK = 112,
0131     MX6UL_PAD_SD1_DATA0 = 113,
0132     MX6UL_PAD_SD1_DATA1 = 114,
0133     MX6UL_PAD_SD1_DATA2 = 115,
0134     MX6UL_PAD_SD1_DATA3 = 116,
0135     MX6UL_PAD_CSI_MCLK = 117,
0136     MX6UL_PAD_CSI_PIXCLK = 118,
0137     MX6UL_PAD_CSI_VSYNC = 119,
0138     MX6UL_PAD_CSI_HSYNC = 120,
0139     MX6UL_PAD_CSI_DATA00 = 121,
0140     MX6UL_PAD_CSI_DATA01 = 122,
0141     MX6UL_PAD_CSI_DATA02 = 123,
0142     MX6UL_PAD_CSI_DATA03 = 124,
0143     MX6UL_PAD_CSI_DATA04 = 125,
0144     MX6UL_PAD_CSI_DATA05 = 126,
0145     MX6UL_PAD_CSI_DATA06 = 127,
0146     MX6UL_PAD_CSI_DATA07 = 128,
0147 };
0148 
0149 enum imx6ull_lpsr_pads {
0150     MX6ULL_PAD_BOOT_MODE0 = 0,
0151     MX6ULL_PAD_BOOT_MODE1 = 1,
0152     MX6ULL_PAD_SNVS_TAMPER0 = 2,
0153     MX6ULL_PAD_SNVS_TAMPER1 = 3,
0154     MX6ULL_PAD_SNVS_TAMPER2 = 4,
0155     MX6ULL_PAD_SNVS_TAMPER3 = 5,
0156     MX6ULL_PAD_SNVS_TAMPER4 = 6,
0157     MX6ULL_PAD_SNVS_TAMPER5 = 7,
0158     MX6ULL_PAD_SNVS_TAMPER6 = 8,
0159     MX6ULL_PAD_SNVS_TAMPER7 = 9,
0160     MX6ULL_PAD_SNVS_TAMPER8 = 10,
0161     MX6ULL_PAD_SNVS_TAMPER9 = 11,
0162 };
0163 
0164 /* Pad names for the pinmux subsystem */
0165 static const struct pinctrl_pin_desc imx6ul_pinctrl_pads[] = {
0166     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE0),
0167     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE1),
0168     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE2),
0169     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE3),
0170     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE4),
0171     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE5),
0172     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE6),
0173     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE7),
0174     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE8),
0175     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE9),
0176     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE10),
0177     IMX_PINCTRL_PIN(MX6UL_PAD_SNVS_TAMPER4),
0178     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE12),
0179     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE13),
0180     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE14),
0181     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE15),
0182     IMX_PINCTRL_PIN(MX6UL_PAD_RESERVE16),
0183     IMX_PINCTRL_PIN(MX6UL_PAD_JTAG_MOD),
0184     IMX_PINCTRL_PIN(MX6UL_PAD_JTAG_TMS),
0185     IMX_PINCTRL_PIN(MX6UL_PAD_JTAG_TDO),
0186     IMX_PINCTRL_PIN(MX6UL_PAD_JTAG_TDI),
0187     IMX_PINCTRL_PIN(MX6UL_PAD_JTAG_TCK),
0188     IMX_PINCTRL_PIN(MX6UL_PAD_JTAG_TRST_B),
0189     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO00),
0190     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO01),
0191     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO02),
0192     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO03),
0193     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO04),
0194     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO05),
0195     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO06),
0196     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO07),
0197     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO08),
0198     IMX_PINCTRL_PIN(MX6UL_PAD_GPIO1_IO09),
0199     IMX_PINCTRL_PIN(MX6UL_PAD_UART1_TX_DATA),
0200     IMX_PINCTRL_PIN(MX6UL_PAD_UART1_RX_DATA),
0201     IMX_PINCTRL_PIN(MX6UL_PAD_UART1_CTS_B),
0202     IMX_PINCTRL_PIN(MX6UL_PAD_UART1_RTS_B),
0203     IMX_PINCTRL_PIN(MX6UL_PAD_UART2_TX_DATA),
0204     IMX_PINCTRL_PIN(MX6UL_PAD_UART2_RX_DATA),
0205     IMX_PINCTRL_PIN(MX6UL_PAD_UART2_CTS_B),
0206     IMX_PINCTRL_PIN(MX6UL_PAD_UART2_RTS_B),
0207     IMX_PINCTRL_PIN(MX6UL_PAD_UART3_TX_DATA),
0208     IMX_PINCTRL_PIN(MX6UL_PAD_UART3_RX_DATA),
0209     IMX_PINCTRL_PIN(MX6UL_PAD_UART3_CTS_B),
0210     IMX_PINCTRL_PIN(MX6UL_PAD_UART3_RTS_B),
0211     IMX_PINCTRL_PIN(MX6UL_PAD_UART4_TX_DATA),
0212     IMX_PINCTRL_PIN(MX6UL_PAD_UART4_RX_DATA),
0213     IMX_PINCTRL_PIN(MX6UL_PAD_UART5_TX_DATA),
0214     IMX_PINCTRL_PIN(MX6UL_PAD_UART5_RX_DATA),
0215     IMX_PINCTRL_PIN(MX6UL_PAD_ENET1_RX_DATA0),
0216     IMX_PINCTRL_PIN(MX6UL_PAD_ENET1_RX_DATA1),
0217     IMX_PINCTRL_PIN(MX6UL_PAD_ENET1_RX_EN),
0218     IMX_PINCTRL_PIN(MX6UL_PAD_ENET1_TX_DATA0),
0219     IMX_PINCTRL_PIN(MX6UL_PAD_ENET1_TX_DATA1),
0220     IMX_PINCTRL_PIN(MX6UL_PAD_ENET1_TX_EN),
0221     IMX_PINCTRL_PIN(MX6UL_PAD_ENET1_TX_CLK),
0222     IMX_PINCTRL_PIN(MX6UL_PAD_ENET1_RX_ER),
0223     IMX_PINCTRL_PIN(MX6UL_PAD_ENET2_RX_DATA0),
0224     IMX_PINCTRL_PIN(MX6UL_PAD_ENET2_RX_DATA1),
0225     IMX_PINCTRL_PIN(MX6UL_PAD_ENET2_RX_EN),
0226     IMX_PINCTRL_PIN(MX6UL_PAD_ENET2_TX_DATA0),
0227     IMX_PINCTRL_PIN(MX6UL_PAD_ENET2_TX_DATA1),
0228     IMX_PINCTRL_PIN(MX6UL_PAD_ENET2_TX_EN),
0229     IMX_PINCTRL_PIN(MX6UL_PAD_ENET2_TX_CLK),
0230     IMX_PINCTRL_PIN(MX6UL_PAD_ENET2_RX_ER),
0231     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_CLK),
0232     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_ENABLE),
0233     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_HSYNC),
0234     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_VSYNC),
0235     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_RESET),
0236     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA00),
0237     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA01),
0238     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA02),
0239     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA03),
0240     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA04),
0241     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA05),
0242     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA06),
0243     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA07),
0244     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA08),
0245     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA09),
0246     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA10),
0247     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA11),
0248     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA12),
0249     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA13),
0250     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA14),
0251     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA15),
0252     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA16),
0253     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA17),
0254     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA18),
0255     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA19),
0256     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA20),
0257     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA21),
0258     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA22),
0259     IMX_PINCTRL_PIN(MX6UL_PAD_LCD_DATA23),
0260     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_RE_B),
0261     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_WE_B),
0262     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DATA00),
0263     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DATA01),
0264     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DATA02),
0265     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DATA03),
0266     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DATA04),
0267     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DATA05),
0268     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DATA06),
0269     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DATA07),
0270     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_ALE),
0271     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_WP_B),
0272     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_READY_B),
0273     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_CE0_B),
0274     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_CE1_B),
0275     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_CLE),
0276     IMX_PINCTRL_PIN(MX6UL_PAD_NAND_DQS),
0277     IMX_PINCTRL_PIN(MX6UL_PAD_SD1_CMD),
0278     IMX_PINCTRL_PIN(MX6UL_PAD_SD1_CLK),
0279     IMX_PINCTRL_PIN(MX6UL_PAD_SD1_DATA0),
0280     IMX_PINCTRL_PIN(MX6UL_PAD_SD1_DATA1),
0281     IMX_PINCTRL_PIN(MX6UL_PAD_SD1_DATA2),
0282     IMX_PINCTRL_PIN(MX6UL_PAD_SD1_DATA3),
0283     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_MCLK),
0284     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_PIXCLK),
0285     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_VSYNC),
0286     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_HSYNC),
0287     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_DATA00),
0288     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_DATA01),
0289     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_DATA02),
0290     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_DATA03),
0291     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_DATA04),
0292     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_DATA05),
0293     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_DATA06),
0294     IMX_PINCTRL_PIN(MX6UL_PAD_CSI_DATA07),
0295 };
0296 
0297 /* pad for i.MX6ULL lpsr pinmux */
0298 static const struct pinctrl_pin_desc imx6ull_snvs_pinctrl_pads[] = {
0299     IMX_PINCTRL_PIN(MX6ULL_PAD_BOOT_MODE0),
0300     IMX_PINCTRL_PIN(MX6ULL_PAD_BOOT_MODE1),
0301     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER0),
0302     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER1),
0303     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER2),
0304     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER3),
0305     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER4),
0306     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER5),
0307     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER6),
0308     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER7),
0309     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER8),
0310     IMX_PINCTRL_PIN(MX6ULL_PAD_SNVS_TAMPER9),
0311 };
0312 
0313 static const struct imx_pinctrl_soc_info imx6ul_pinctrl_info = {
0314     .pins = imx6ul_pinctrl_pads,
0315     .npins = ARRAY_SIZE(imx6ul_pinctrl_pads),
0316     .gpr_compatible = "fsl,imx6ul-iomuxc-gpr",
0317 };
0318 
0319 static const struct imx_pinctrl_soc_info imx6ull_snvs_pinctrl_info = {
0320     .pins = imx6ull_snvs_pinctrl_pads,
0321     .npins = ARRAY_SIZE(imx6ull_snvs_pinctrl_pads),
0322     .flags = ZERO_OFFSET_VALID,
0323 };
0324 
0325 static const struct of_device_id imx6ul_pinctrl_of_match[] = {
0326     { .compatible = "fsl,imx6ul-iomuxc", .data = &imx6ul_pinctrl_info, },
0327     { .compatible = "fsl,imx6ull-iomuxc-snvs", .data = &imx6ull_snvs_pinctrl_info, },
0328     { /* sentinel */ }
0329 };
0330 
0331 static int imx6ul_pinctrl_probe(struct platform_device *pdev)
0332 {
0333     const struct imx_pinctrl_soc_info *pinctrl_info;
0334 
0335     pinctrl_info = of_device_get_match_data(&pdev->dev);
0336     if (!pinctrl_info)
0337         return -ENODEV;
0338 
0339     return imx_pinctrl_probe(pdev, pinctrl_info);
0340 }
0341 
0342 static struct platform_driver imx6ul_pinctrl_driver = {
0343     .driver = {
0344         .name = "imx6ul-pinctrl",
0345         .of_match_table = imx6ul_pinctrl_of_match,
0346         .suppress_bind_attrs = true,
0347     },
0348     .probe = imx6ul_pinctrl_probe,
0349 };
0350 
0351 static int __init imx6ul_pinctrl_init(void)
0352 {
0353     return platform_driver_register(&imx6ul_pinctrl_driver);
0354 }
0355 arch_initcall(imx6ul_pinctrl_init);
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