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0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // i.MX1 pinctrl driver based on imx pinmux core
0004 //
0005 // Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
0006 
0007 #include <linux/init.h>
0008 #include <linux/of.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/pinctrl/pinctrl.h>
0011 
0012 #include "pinctrl-imx1.h"
0013 
0014 #define PAD_ID(port, pin)   ((port) * 32 + (pin))
0015 #define PA  0
0016 #define PB  1
0017 #define PC  2
0018 #define PD  3
0019 
0020 enum imx1_pads {
0021     MX1_PAD_A24     = PAD_ID(PA, 0),
0022     MX1_PAD_TIN     = PAD_ID(PA, 1),
0023     MX1_PAD_PWMO        = PAD_ID(PA, 2),
0024     MX1_PAD_CSI_MCLK    = PAD_ID(PA, 3),
0025     MX1_PAD_CSI_D0      = PAD_ID(PA, 4),
0026     MX1_PAD_CSI_D1      = PAD_ID(PA, 5),
0027     MX1_PAD_CSI_D2      = PAD_ID(PA, 6),
0028     MX1_PAD_CSI_D3      = PAD_ID(PA, 7),
0029     MX1_PAD_CSI_D4      = PAD_ID(PA, 8),
0030     MX1_PAD_CSI_D5      = PAD_ID(PA, 9),
0031     MX1_PAD_CSI_D6      = PAD_ID(PA, 10),
0032     MX1_PAD_CSI_D7      = PAD_ID(PA, 11),
0033     MX1_PAD_CSI_VSYNC   = PAD_ID(PA, 12),
0034     MX1_PAD_CSI_HSYNC   = PAD_ID(PA, 13),
0035     MX1_PAD_CSI_PIXCLK  = PAD_ID(PA, 14),
0036     MX1_PAD_I2C_SDA     = PAD_ID(PA, 15),
0037     MX1_PAD_I2C_SCL     = PAD_ID(PA, 16),
0038     MX1_PAD_DTACK       = PAD_ID(PA, 17),
0039     MX1_PAD_BCLK        = PAD_ID(PA, 18),
0040     MX1_PAD_LBA     = PAD_ID(PA, 19),
0041     MX1_PAD_ECB     = PAD_ID(PA, 20),
0042     MX1_PAD_A0      = PAD_ID(PA, 21),
0043     MX1_PAD_CS4     = PAD_ID(PA, 22),
0044     MX1_PAD_CS5     = PAD_ID(PA, 23),
0045     MX1_PAD_A16     = PAD_ID(PA, 24),
0046     MX1_PAD_A17     = PAD_ID(PA, 25),
0047     MX1_PAD_A18     = PAD_ID(PA, 26),
0048     MX1_PAD_A19     = PAD_ID(PA, 27),
0049     MX1_PAD_A20     = PAD_ID(PA, 28),
0050     MX1_PAD_A21     = PAD_ID(PA, 29),
0051     MX1_PAD_A22     = PAD_ID(PA, 30),
0052     MX1_PAD_A23     = PAD_ID(PA, 31),
0053     MX1_PAD_SD_DAT0     = PAD_ID(PB, 8),
0054     MX1_PAD_SD_DAT1     = PAD_ID(PB, 9),
0055     MX1_PAD_SD_DAT2     = PAD_ID(PB, 10),
0056     MX1_PAD_SD_DAT3     = PAD_ID(PB, 11),
0057     MX1_PAD_SD_SCLK     = PAD_ID(PB, 12),
0058     MX1_PAD_SD_CMD      = PAD_ID(PB, 13),
0059     MX1_PAD_SIM_SVEN    = PAD_ID(PB, 14),
0060     MX1_PAD_SIM_PD      = PAD_ID(PB, 15),
0061     MX1_PAD_SIM_TX      = PAD_ID(PB, 16),
0062     MX1_PAD_SIM_RX      = PAD_ID(PB, 17),
0063     MX1_PAD_SIM_RST     = PAD_ID(PB, 18),
0064     MX1_PAD_SIM_CLK     = PAD_ID(PB, 19),
0065     MX1_PAD_USBD_AFE    = PAD_ID(PB, 20),
0066     MX1_PAD_USBD_OE     = PAD_ID(PB, 21),
0067     MX1_PAD_USBD_RCV    = PAD_ID(PB, 22),
0068     MX1_PAD_USBD_SUSPND = PAD_ID(PB, 23),
0069     MX1_PAD_USBD_VP     = PAD_ID(PB, 24),
0070     MX1_PAD_USBD_VM     = PAD_ID(PB, 25),
0071     MX1_PAD_USBD_VPO    = PAD_ID(PB, 26),
0072     MX1_PAD_USBD_VMO    = PAD_ID(PB, 27),
0073     MX1_PAD_UART2_CTS   = PAD_ID(PB, 28),
0074     MX1_PAD_UART2_RTS   = PAD_ID(PB, 29),
0075     MX1_PAD_UART2_TXD   = PAD_ID(PB, 30),
0076     MX1_PAD_UART2_RXD   = PAD_ID(PB, 31),
0077     MX1_PAD_SSI_RXFS    = PAD_ID(PC, 3),
0078     MX1_PAD_SSI_RXCLK   = PAD_ID(PC, 4),
0079     MX1_PAD_SSI_RXDAT   = PAD_ID(PC, 5),
0080     MX1_PAD_SSI_TXDAT   = PAD_ID(PC, 6),
0081     MX1_PAD_SSI_TXFS    = PAD_ID(PC, 7),
0082     MX1_PAD_SSI_TXCLK   = PAD_ID(PC, 8),
0083     MX1_PAD_UART1_CTS   = PAD_ID(PC, 9),
0084     MX1_PAD_UART1_RTS   = PAD_ID(PC, 10),
0085     MX1_PAD_UART1_TXD   = PAD_ID(PC, 11),
0086     MX1_PAD_UART1_RXD   = PAD_ID(PC, 12),
0087     MX1_PAD_SPI1_RDY    = PAD_ID(PC, 13),
0088     MX1_PAD_SPI1_SCLK   = PAD_ID(PC, 14),
0089     MX1_PAD_SPI1_SS     = PAD_ID(PC, 15),
0090     MX1_PAD_SPI1_MISO   = PAD_ID(PC, 16),
0091     MX1_PAD_SPI1_MOSI   = PAD_ID(PC, 17),
0092     MX1_PAD_BT13        = PAD_ID(PC, 19),
0093     MX1_PAD_BT12        = PAD_ID(PC, 20),
0094     MX1_PAD_BT11        = PAD_ID(PC, 21),
0095     MX1_PAD_BT10        = PAD_ID(PC, 22),
0096     MX1_PAD_BT9     = PAD_ID(PC, 23),
0097     MX1_PAD_BT8     = PAD_ID(PC, 24),
0098     MX1_PAD_BT7     = PAD_ID(PC, 25),
0099     MX1_PAD_BT6     = PAD_ID(PC, 26),
0100     MX1_PAD_BT5     = PAD_ID(PC, 27),
0101     MX1_PAD_BT4     = PAD_ID(PC, 28),
0102     MX1_PAD_BT3     = PAD_ID(PC, 29),
0103     MX1_PAD_BT2     = PAD_ID(PC, 30),
0104     MX1_PAD_BT1     = PAD_ID(PC, 31),
0105     MX1_PAD_LSCLK       = PAD_ID(PD, 6),
0106     MX1_PAD_REV     = PAD_ID(PD, 7),
0107     MX1_PAD_CLS     = PAD_ID(PD, 8),
0108     MX1_PAD_PS      = PAD_ID(PD, 9),
0109     MX1_PAD_SPL_SPR     = PAD_ID(PD, 10),
0110     MX1_PAD_CONTRAST    = PAD_ID(PD, 11),
0111     MX1_PAD_ACD_OE      = PAD_ID(PD, 12),
0112     MX1_PAD_LP_HSYNC    = PAD_ID(PD, 13),
0113     MX1_PAD_FLM_VSYNC   = PAD_ID(PD, 14),
0114     MX1_PAD_LD0     = PAD_ID(PD, 15),
0115     MX1_PAD_LD1     = PAD_ID(PD, 16),
0116     MX1_PAD_LD2     = PAD_ID(PD, 17),
0117     MX1_PAD_LD3     = PAD_ID(PD, 18),
0118     MX1_PAD_LD4     = PAD_ID(PD, 19),
0119     MX1_PAD_LD5     = PAD_ID(PD, 20),
0120     MX1_PAD_LD6     = PAD_ID(PD, 21),
0121     MX1_PAD_LD7     = PAD_ID(PD, 22),
0122     MX1_PAD_LD8     = PAD_ID(PD, 23),
0123     MX1_PAD_LD9     = PAD_ID(PD, 24),
0124     MX1_PAD_LD10        = PAD_ID(PD, 25),
0125     MX1_PAD_LD11        = PAD_ID(PD, 26),
0126     MX1_PAD_LD12        = PAD_ID(PD, 27),
0127     MX1_PAD_LD13        = PAD_ID(PD, 28),
0128     MX1_PAD_LD14        = PAD_ID(PD, 29),
0129     MX1_PAD_LD15        = PAD_ID(PD, 30),
0130     MX1_PAD_TMR2OUT     = PAD_ID(PD, 31),
0131 };
0132 
0133 /* Pad names for the pinmux subsystem */
0134 static const struct pinctrl_pin_desc imx1_pinctrl_pads[] = {
0135     IMX_PINCTRL_PIN(MX1_PAD_A24),
0136     IMX_PINCTRL_PIN(MX1_PAD_TIN),
0137     IMX_PINCTRL_PIN(MX1_PAD_PWMO),
0138     IMX_PINCTRL_PIN(MX1_PAD_CSI_MCLK),
0139     IMX_PINCTRL_PIN(MX1_PAD_CSI_D0),
0140     IMX_PINCTRL_PIN(MX1_PAD_CSI_D1),
0141     IMX_PINCTRL_PIN(MX1_PAD_CSI_D2),
0142     IMX_PINCTRL_PIN(MX1_PAD_CSI_D3),
0143     IMX_PINCTRL_PIN(MX1_PAD_CSI_D4),
0144     IMX_PINCTRL_PIN(MX1_PAD_CSI_D5),
0145     IMX_PINCTRL_PIN(MX1_PAD_CSI_D6),
0146     IMX_PINCTRL_PIN(MX1_PAD_CSI_D7),
0147     IMX_PINCTRL_PIN(MX1_PAD_CSI_VSYNC),
0148     IMX_PINCTRL_PIN(MX1_PAD_CSI_HSYNC),
0149     IMX_PINCTRL_PIN(MX1_PAD_CSI_PIXCLK),
0150     IMX_PINCTRL_PIN(MX1_PAD_I2C_SDA),
0151     IMX_PINCTRL_PIN(MX1_PAD_I2C_SCL),
0152     IMX_PINCTRL_PIN(MX1_PAD_DTACK),
0153     IMX_PINCTRL_PIN(MX1_PAD_BCLK),
0154     IMX_PINCTRL_PIN(MX1_PAD_LBA),
0155     IMX_PINCTRL_PIN(MX1_PAD_ECB),
0156     IMX_PINCTRL_PIN(MX1_PAD_A0),
0157     IMX_PINCTRL_PIN(MX1_PAD_CS4),
0158     IMX_PINCTRL_PIN(MX1_PAD_CS5),
0159     IMX_PINCTRL_PIN(MX1_PAD_A16),
0160     IMX_PINCTRL_PIN(MX1_PAD_A17),
0161     IMX_PINCTRL_PIN(MX1_PAD_A18),
0162     IMX_PINCTRL_PIN(MX1_PAD_A19),
0163     IMX_PINCTRL_PIN(MX1_PAD_A20),
0164     IMX_PINCTRL_PIN(MX1_PAD_A21),
0165     IMX_PINCTRL_PIN(MX1_PAD_A22),
0166     IMX_PINCTRL_PIN(MX1_PAD_A23),
0167     IMX_PINCTRL_PIN(MX1_PAD_SD_DAT0),
0168     IMX_PINCTRL_PIN(MX1_PAD_SD_DAT1),
0169     IMX_PINCTRL_PIN(MX1_PAD_SD_DAT2),
0170     IMX_PINCTRL_PIN(MX1_PAD_SD_DAT3),
0171     IMX_PINCTRL_PIN(MX1_PAD_SD_SCLK),
0172     IMX_PINCTRL_PIN(MX1_PAD_SD_CMD),
0173     IMX_PINCTRL_PIN(MX1_PAD_SIM_SVEN),
0174     IMX_PINCTRL_PIN(MX1_PAD_SIM_PD),
0175     IMX_PINCTRL_PIN(MX1_PAD_SIM_TX),
0176     IMX_PINCTRL_PIN(MX1_PAD_SIM_RX),
0177     IMX_PINCTRL_PIN(MX1_PAD_SIM_CLK),
0178     IMX_PINCTRL_PIN(MX1_PAD_USBD_AFE),
0179     IMX_PINCTRL_PIN(MX1_PAD_USBD_OE),
0180     IMX_PINCTRL_PIN(MX1_PAD_USBD_RCV),
0181     IMX_PINCTRL_PIN(MX1_PAD_USBD_SUSPND),
0182     IMX_PINCTRL_PIN(MX1_PAD_USBD_VP),
0183     IMX_PINCTRL_PIN(MX1_PAD_USBD_VM),
0184     IMX_PINCTRL_PIN(MX1_PAD_USBD_VPO),
0185     IMX_PINCTRL_PIN(MX1_PAD_USBD_VMO),
0186     IMX_PINCTRL_PIN(MX1_PAD_UART2_CTS),
0187     IMX_PINCTRL_PIN(MX1_PAD_UART2_RTS),
0188     IMX_PINCTRL_PIN(MX1_PAD_UART2_TXD),
0189     IMX_PINCTRL_PIN(MX1_PAD_UART2_RXD),
0190     IMX_PINCTRL_PIN(MX1_PAD_SSI_RXFS),
0191     IMX_PINCTRL_PIN(MX1_PAD_SSI_RXCLK),
0192     IMX_PINCTRL_PIN(MX1_PAD_SSI_RXDAT),
0193     IMX_PINCTRL_PIN(MX1_PAD_SSI_TXDAT),
0194     IMX_PINCTRL_PIN(MX1_PAD_SSI_TXFS),
0195     IMX_PINCTRL_PIN(MX1_PAD_SSI_TXCLK),
0196     IMX_PINCTRL_PIN(MX1_PAD_UART1_CTS),
0197     IMX_PINCTRL_PIN(MX1_PAD_UART1_RTS),
0198     IMX_PINCTRL_PIN(MX1_PAD_UART1_TXD),
0199     IMX_PINCTRL_PIN(MX1_PAD_UART1_RXD),
0200     IMX_PINCTRL_PIN(MX1_PAD_SPI1_RDY),
0201     IMX_PINCTRL_PIN(MX1_PAD_SPI1_SCLK),
0202     IMX_PINCTRL_PIN(MX1_PAD_SPI1_SS),
0203     IMX_PINCTRL_PIN(MX1_PAD_SPI1_MISO),
0204     IMX_PINCTRL_PIN(MX1_PAD_SPI1_MOSI),
0205     IMX_PINCTRL_PIN(MX1_PAD_BT13),
0206     IMX_PINCTRL_PIN(MX1_PAD_BT12),
0207     IMX_PINCTRL_PIN(MX1_PAD_BT11),
0208     IMX_PINCTRL_PIN(MX1_PAD_BT10),
0209     IMX_PINCTRL_PIN(MX1_PAD_BT9),
0210     IMX_PINCTRL_PIN(MX1_PAD_BT8),
0211     IMX_PINCTRL_PIN(MX1_PAD_BT7),
0212     IMX_PINCTRL_PIN(MX1_PAD_BT6),
0213     IMX_PINCTRL_PIN(MX1_PAD_BT5),
0214     IMX_PINCTRL_PIN(MX1_PAD_BT4),
0215     IMX_PINCTRL_PIN(MX1_PAD_BT3),
0216     IMX_PINCTRL_PIN(MX1_PAD_BT2),
0217     IMX_PINCTRL_PIN(MX1_PAD_BT1),
0218     IMX_PINCTRL_PIN(MX1_PAD_LSCLK),
0219     IMX_PINCTRL_PIN(MX1_PAD_REV),
0220     IMX_PINCTRL_PIN(MX1_PAD_CLS),
0221     IMX_PINCTRL_PIN(MX1_PAD_PS),
0222     IMX_PINCTRL_PIN(MX1_PAD_SPL_SPR),
0223     IMX_PINCTRL_PIN(MX1_PAD_CONTRAST),
0224     IMX_PINCTRL_PIN(MX1_PAD_ACD_OE),
0225     IMX_PINCTRL_PIN(MX1_PAD_LP_HSYNC),
0226     IMX_PINCTRL_PIN(MX1_PAD_FLM_VSYNC),
0227     IMX_PINCTRL_PIN(MX1_PAD_LD0),
0228     IMX_PINCTRL_PIN(MX1_PAD_LD1),
0229     IMX_PINCTRL_PIN(MX1_PAD_LD2),
0230     IMX_PINCTRL_PIN(MX1_PAD_LD3),
0231     IMX_PINCTRL_PIN(MX1_PAD_LD4),
0232     IMX_PINCTRL_PIN(MX1_PAD_LD5),
0233     IMX_PINCTRL_PIN(MX1_PAD_LD6),
0234     IMX_PINCTRL_PIN(MX1_PAD_LD7),
0235     IMX_PINCTRL_PIN(MX1_PAD_LD8),
0236     IMX_PINCTRL_PIN(MX1_PAD_LD9),
0237     IMX_PINCTRL_PIN(MX1_PAD_LD10),
0238     IMX_PINCTRL_PIN(MX1_PAD_LD11),
0239     IMX_PINCTRL_PIN(MX1_PAD_LD12),
0240     IMX_PINCTRL_PIN(MX1_PAD_LD13),
0241     IMX_PINCTRL_PIN(MX1_PAD_LD14),
0242     IMX_PINCTRL_PIN(MX1_PAD_LD15),
0243     IMX_PINCTRL_PIN(MX1_PAD_TMR2OUT),
0244 };
0245 
0246 static struct imx1_pinctrl_soc_info imx1_pinctrl_info = {
0247     .pins   = imx1_pinctrl_pads,
0248     .npins  = ARRAY_SIZE(imx1_pinctrl_pads),
0249 };
0250 
0251 static int __init imx1_pinctrl_probe(struct platform_device *pdev)
0252 {
0253     return imx1_pinctrl_core_probe(pdev, &imx1_pinctrl_info);
0254 }
0255 
0256 static const struct of_device_id imx1_pinctrl_of_match[] = {
0257     { .compatible = "fsl,imx1-iomuxc", },
0258     { }
0259 };
0260 
0261 static struct platform_driver imx1_pinctrl_driver = {
0262     .driver = {
0263         .name       = "imx1-pinctrl",
0264         .of_match_table = imx1_pinctrl_of_match,
0265         .suppress_bind_attrs = true,
0266     },
0267 };
0268 builtin_platform_driver_probe(imx1_pinctrl_driver, imx1_pinctrl_probe);
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