pinctrl/cirrus/pinctrl-cs47l92.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Pinctrl for Cirrus Logic CS47L92
0004  *
0005  * Copyright (C) 2018-2019 Cirrus Logic, Inc. and
0006  *                         Cirrus Logic International Semiconductor Ltd.
0007  */
0008
0009 #include <linux/err.h>
0010 #include <linux/mfd/madera/core.h>
0011
0012 #include "pinctrl-madera.h"
0013
0014 /*
0015  * The alt func groups are the most commonly used functions we place these at
0016  * the lower function indexes for convenience, and the less commonly used gpio
0017  * functions at higher indexes.
0018  *
0019  * To stay consistent with the datasheet the function names are the same as
0020  * the group names for that function's pins
0021  *
0022  * Note - all 1 less than in datasheet because these are zero-indexed
0023  */
0024 static const unsigned int cs47l92_spk1_pins[] = { 2, 3 };
0025 static const unsigned int cs47l92_aif1_pins[] = { 4, 5, 6, 7 };
0026 static const unsigned int cs47l92_aif2_pins[] = { 8, 9, 10, 11 };
0027 static const unsigned int cs47l92_aif3_pins[] = { 12, 13, 14, 15 };
0028
0029 static const struct madera_pin_groups cs47l92_pin_groups[] = {
0030     { "aif1", cs47l92_aif1_pins, ARRAY_SIZE(cs47l92_aif1_pins) },
0031     { "aif2", cs47l92_aif2_pins, ARRAY_SIZE(cs47l92_aif2_pins) },
0032     { "aif3", cs47l92_aif3_pins, ARRAY_SIZE(cs47l92_aif3_pins) },
0033     { "pdmspk1", cs47l92_spk1_pins, ARRAY_SIZE(cs47l92_spk1_pins) },
0034 };
0035
0036 const struct madera_pin_chip cs47l92_pin_chip = {
0037     .n_pins = CS47L92_NUM_GPIOS,
0038     .pin_groups = cs47l92_pin_groups,
0039     .n_pin_groups = ARRAY_SIZE(cs47l92_pin_groups),
0040 };