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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Pinctrl for Cirrus Logic CS47L35
0004  *
0005  * Copyright (C) 2016-2017 Cirrus Logic
0006  */
0007 
0008 #include <linux/err.h>
0009 #include <linux/mfd/madera/core.h>
0010 
0011 #include "pinctrl-madera.h"
0012 
0013 /*
0014  * The alt func groups are the most commonly used functions we place these at
0015  * the lower function indexes for convenience, and the less commonly used gpio
0016  * functions at higher indexes.
0017  *
0018  * To stay consistent with the datasheet the function names are the same as
0019  * the group names for that function's pins
0020  *
0021  * Note - all 1 less than in datasheet because these are zero-indexed
0022  */
0023 static const unsigned int cs47l35_aif3_pins[] = { 0, 1, 2, 3 };
0024 static const unsigned int cs47l35_spk_pins[] = { 4, 5 };
0025 static const unsigned int cs47l35_aif1_pins[] = { 7, 8, 9, 10 };
0026 static const unsigned int cs47l35_aif2_pins[] = { 11, 12, 13, 14 };
0027 static const unsigned int cs47l35_mif1_pins[] = { 6, 15 };
0028 
0029 static const struct madera_pin_groups cs47l35_pin_groups[] = {
0030     { "aif1", cs47l35_aif1_pins, ARRAY_SIZE(cs47l35_aif1_pins) },
0031     { "aif2", cs47l35_aif2_pins, ARRAY_SIZE(cs47l35_aif2_pins) },
0032     { "aif3", cs47l35_aif3_pins, ARRAY_SIZE(cs47l35_aif3_pins) },
0033     { "mif1", cs47l35_mif1_pins, ARRAY_SIZE(cs47l35_mif1_pins) },
0034     { "pdmspk1", cs47l35_spk_pins, ARRAY_SIZE(cs47l35_spk_pins) },
0035 };
0036 
0037 const struct madera_pin_chip cs47l35_pin_chip = {
0038     .n_pins = CS47L35_NUM_GPIOS,
0039     .pin_groups = cs47l35_pin_groups,
0040     .n_pin_groups = ARRAY_SIZE(cs47l35_pin_groups),
0041 };