pinctrl/bcm/pinctrl-ns.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2018 Rafał Miłecki <rafal@milecki.pl>
0004  */
0005
0006 #include <linux/err.h>
0007 #include <linux/io.h>
0008 #include <linux/module.h>
0009 #include <linux/of.h>
0010 #include <linux/of_device.h>
0011 #include <linux/pinctrl/pinconf-generic.h>
0012 #include <linux/pinctrl/pinctrl.h>
0013 #include <linux/pinctrl/pinmux.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/slab.h>
0016
0017 #include "../core.h"
0018 #include "../pinmux.h"
0019
0020 #define FLAG_BCM4708        BIT(1)
0021 #define FLAG_BCM4709        BIT(2)
0022 #define FLAG_BCM53012       BIT(3)
0023
0024 struct ns_pinctrl {
0025     struct device *dev;
0026     unsigned int chipset_flag;
0027     struct pinctrl_dev *pctldev;
0028     void __iomem *base;
0029
0030     struct pinctrl_desc pctldesc;
0031 };
0032
0033 /*
0034  * Pins
0035  */
0036
0037 static const struct pinctrl_pin_desc ns_pinctrl_pins[] = {
0038     { 0, "spi_clk", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0039     { 1, "spi_ss", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0040     { 2, "spi_mosi", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0041     { 3, "spi_miso", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0042     { 4, "i2c_scl", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0043     { 5, "i2c_sda", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0044     { 6, "mdc", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
0045     { 7, "mdio", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
0046     { 8, "pwm0", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0047     { 9, "pwm1", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0048     { 10, "pwm2", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0049     { 11, "pwm3", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0050     { 12, "uart1_rx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0051     { 13, "uart1_tx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0052     { 14, "uart1_cts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0053     { 15, "uart1_rts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
0054     { 16, "uart2_rx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
0055     { 17, "uart2_tx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
0056 /* TODO { ??, "xtal_out", (void *)(FLAG_BCM4709) }, */
0057     { 22, "sdio_pwr", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
0058     { 23, "sdio_en_1p8v", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
0059 };
0060
0061 /*
0062  * Groups
0063  */
0064
0065 struct ns_pinctrl_group {
0066     const char *name;
0067     unsigned int *pins;
0068     const unsigned int num_pins;
0069     unsigned int chipsets;
0070 };
0071
0072 static unsigned int spi_pins[] = { 0, 1, 2, 3 };
0073 static unsigned int i2c_pins[] = { 4, 5 };
0074 static unsigned int mdio_pins[] = { 6, 7 };
0075 static unsigned int pwm0_pins[] = { 8 };
0076 static unsigned int pwm1_pins[] = { 9 };
0077 static unsigned int pwm2_pins[] = { 10 };
0078 static unsigned int pwm3_pins[] = { 11 };
0079 static unsigned int uart1_pins[] = { 12, 13, 14, 15 };
0080 static unsigned int uart2_pins[] = { 16, 17 };
0081 static unsigned int sdio_pwr_pins[] = { 22 };
0082 static unsigned int sdio_1p8v_pins[] = { 23 };
0083
0084 #define NS_GROUP(_name, _pins, _chipsets)       \
0085 {                           \
0086     .name = _name,                  \
0087     .pins = _pins,                  \
0088     .num_pins = ARRAY_SIZE(_pins),          \
0089     .chipsets = _chipsets,              \
0090 }
0091
0092 static const struct ns_pinctrl_group ns_pinctrl_groups[] = {
0093     NS_GROUP("spi_grp", spi_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0094     NS_GROUP("i2c_grp", i2c_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0095     NS_GROUP("mdio_grp", mdio_pins, FLAG_BCM4709 | FLAG_BCM53012),
0096     NS_GROUP("pwm0_grp", pwm0_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0097     NS_GROUP("pwm1_grp", pwm1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0098     NS_GROUP("pwm2_grp", pwm2_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0099     NS_GROUP("pwm3_grp", pwm3_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0100     NS_GROUP("uart1_grp", uart1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0101     NS_GROUP("uart2_grp", uart2_pins, FLAG_BCM4709 | FLAG_BCM53012),
0102     NS_GROUP("sdio_pwr_grp", sdio_pwr_pins, FLAG_BCM4709 | FLAG_BCM53012),
0103     NS_GROUP("sdio_1p8v_grp", sdio_1p8v_pins, FLAG_BCM4709 | FLAG_BCM53012),
0104 };
0105
0106 /*
0107  * Functions
0108  */
0109
0110 struct ns_pinctrl_function {
0111     const char *name;
0112     const char * const *groups;
0113     const unsigned int num_groups;
0114     unsigned int chipsets;
0115 };
0116
0117 static const char * const spi_groups[] = { "spi_grp" };
0118 static const char * const i2c_groups[] = { "i2c_grp" };
0119 static const char * const mdio_groups[] = { "mdio_grp" };
0120 static const char * const pwm_groups[] = { "pwm0_grp", "pwm1_grp", "pwm2_grp",
0121                        "pwm3_grp" };
0122 static const char * const uart1_groups[] = { "uart1_grp" };
0123 static const char * const uart2_groups[] = { "uart2_grp" };
0124 static const char * const sdio_groups[] = { "sdio_pwr_grp", "sdio_1p8v_grp" };
0125
0126 #define NS_FUNCTION(_name, _groups, _chipsets)      \
0127 {                           \
0128     .name = _name,                  \
0129     .groups = _groups,              \
0130     .num_groups = ARRAY_SIZE(_groups),      \
0131     .chipsets = _chipsets,              \
0132 }
0133
0134 static const struct ns_pinctrl_function ns_pinctrl_functions[] = {
0135     NS_FUNCTION("spi", spi_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0136     NS_FUNCTION("i2c", i2c_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0137     NS_FUNCTION("mdio", mdio_groups, FLAG_BCM4709 | FLAG_BCM53012),
0138     NS_FUNCTION("pwm", pwm_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0139     NS_FUNCTION("uart1", uart1_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
0140     NS_FUNCTION("uart2", uart2_groups, FLAG_BCM4709 | FLAG_BCM53012),
0141     NS_FUNCTION("sdio", sdio_groups, FLAG_BCM4709 | FLAG_BCM53012),
0142 };
0143
0144 /*
0145  * Groups code
0146  */
0147
0148 static const struct pinctrl_ops ns_pinctrl_ops = {
0149     .get_groups_count = pinctrl_generic_get_group_count,
0150     .get_group_name = pinctrl_generic_get_group_name,
0151     .get_group_pins = pinctrl_generic_get_group_pins,
0152     .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
0153     .dt_free_map = pinconf_generic_dt_free_map,
0154 };
0155
0156 /*
0157  * Functions code
0158  */
0159
0160 static int ns_pinctrl_set_mux(struct pinctrl_dev *pctrl_dev,
0161                   unsigned int func_select,
0162                   unsigned int group_selector)
0163 {
0164     struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
0165     struct group_desc *group;
0166     u32 unset = 0;
0167     u32 tmp;
0168     int i;
0169
0170     group = pinctrl_generic_get_group(pctrl_dev, group_selector);
0171     if (!group)
0172         return -EINVAL;
0173
0174     for (i = 0; i < group->num_pins; i++)
0175         unset |= BIT(group->pins[i]);
0176
0177     tmp = readl(ns_pinctrl->base);
0178     tmp &= ~unset;
0179     writel(tmp, ns_pinctrl->base);
0180
0181     return 0;
0182 }
0183
0184 static const struct pinmux_ops ns_pinctrl_pmxops = {
0185     .get_functions_count = pinmux_generic_get_function_count,
0186     .get_function_name = pinmux_generic_get_function_name,
0187     .get_function_groups = pinmux_generic_get_function_groups,
0188     .set_mux = ns_pinctrl_set_mux,
0189 };
0190
0191 /*
0192  * Controller code
0193  */
0194
0195 static struct pinctrl_desc ns_pinctrl_desc = {
0196     .name = "pinctrl-ns",
0197     .pctlops = &ns_pinctrl_ops,
0198     .pmxops = &ns_pinctrl_pmxops,
0199 };
0200
0201 static const struct of_device_id ns_pinctrl_of_match_table[] = {
0202     { .compatible = "brcm,bcm4708-pinmux", .data = (void *)FLAG_BCM4708, },
0203     { .compatible = "brcm,bcm4709-pinmux", .data = (void *)FLAG_BCM4709, },
0204     { .compatible = "brcm,bcm53012-pinmux", .data = (void *)FLAG_BCM53012, },
0205     { }
0206 };
0207
0208 static int ns_pinctrl_probe(struct platform_device *pdev)
0209 {
0210     struct device *dev = &pdev->dev;
0211     const struct of_device_id *of_id;
0212     struct ns_pinctrl *ns_pinctrl;
0213     struct pinctrl_desc *pctldesc;
0214     struct pinctrl_pin_desc *pin;
0215     struct resource *res;
0216     int i;
0217
0218     ns_pinctrl = devm_kzalloc(dev, sizeof(*ns_pinctrl), GFP_KERNEL);
0219     if (!ns_pinctrl)
0220         return -ENOMEM;
0221     pctldesc = &ns_pinctrl->pctldesc;
0222     platform_set_drvdata(pdev, ns_pinctrl);
0223
0224     /* Set basic properties */
0225
0226     ns_pinctrl->dev = dev;
0227
0228     of_id = of_match_device(ns_pinctrl_of_match_table, dev);
0229     if (!of_id)
0230         return -EINVAL;
0231     ns_pinctrl->chipset_flag = (uintptr_t)of_id->data;
0232
0233     res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
0234                        "cru_gpio_control");
0235     ns_pinctrl->base = devm_ioremap_resource(dev, res);
0236     if (IS_ERR(ns_pinctrl->base)) {
0237         dev_err(dev, "Failed to map pinctrl regs\n");
0238         return PTR_ERR(ns_pinctrl->base);
0239     }
0240
0241     memcpy(pctldesc, &ns_pinctrl_desc, sizeof(*pctldesc));
0242
0243     /* Set pinctrl properties */
0244
0245     pctldesc->pins = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_pins),
0246                       sizeof(struct pinctrl_pin_desc),
0247                       GFP_KERNEL);
0248     if (!pctldesc->pins)
0249         return -ENOMEM;
0250     for (i = 0, pin = (struct pinctrl_pin_desc *)&pctldesc->pins[0];
0251          i < ARRAY_SIZE(ns_pinctrl_pins); i++) {
0252         const struct pinctrl_pin_desc *src = &ns_pinctrl_pins[i];
0253         unsigned int chipsets = (uintptr_t)src->drv_data;
0254
0255         if (chipsets & ns_pinctrl->chipset_flag) {
0256             memcpy(pin++, src, sizeof(*src));
0257             pctldesc->npins++;
0258         }
0259     }
0260
0261     /* Register */
0262
0263     ns_pinctrl->pctldev = devm_pinctrl_register(dev, pctldesc, ns_pinctrl);
0264     if (IS_ERR(ns_pinctrl->pctldev)) {
0265         dev_err(dev, "Failed to register pinctrl\n");
0266         return PTR_ERR(ns_pinctrl->pctldev);
0267     }
0268
0269     for (i = 0; i < ARRAY_SIZE(ns_pinctrl_groups); i++) {
0270         const struct ns_pinctrl_group *group = &ns_pinctrl_groups[i];
0271
0272         if (!(group->chipsets & ns_pinctrl->chipset_flag))
0273             continue;
0274
0275         pinctrl_generic_add_group(ns_pinctrl->pctldev, group->name,
0276                       group->pins, group->num_pins, NULL);
0277     }
0278
0279     for (i = 0; i < ARRAY_SIZE(ns_pinctrl_functions); i++) {
0280         const struct ns_pinctrl_function *function = &ns_pinctrl_functions[i];
0281
0282         if (!(function->chipsets & ns_pinctrl->chipset_flag))
0283             continue;
0284
0285         pinmux_generic_add_function(ns_pinctrl->pctldev, function->name,
0286                         function->groups,
0287                         function->num_groups, NULL);
0288     }
0289
0290     return 0;
0291 }
0292
0293 static struct platform_driver ns_pinctrl_driver = {
0294     .probe = ns_pinctrl_probe,
0295     .driver = {
0296         .name = "ns-pinmux",
0297         .of_match_table = ns_pinctrl_of_match_table,
0298     },
0299 };
0300
0301 module_platform_driver(ns_pinctrl_driver);
0302
0303 MODULE_AUTHOR("Rafał Miłecki");
0304 MODULE_LICENSE("GPL v2");
0305 MODULE_DEVICE_TABLE(of, ns_pinctrl_of_match_table);