pinctrl/bcm/pinctrl-bcm6368.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Driver for BCM6368 GPIO unit (pinctrl + GPIO)
0004  *
0005  * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
0006  * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
0007  */
0008
0009 #include <linux/bits.h>
0010 #include <linux/gpio/driver.h>
0011 #include <linux/kernel.h>
0012 #include <linux/of.h>
0013 #include <linux/pinctrl/pinmux.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/regmap.h>
0016
0017 #include "../pinctrl-utils.h"
0018
0019 #include "pinctrl-bcm63xx.h"
0020
0021 #define BCM6368_NUM_GPIOS   38
0022
0023 #define BCM6368_MODE_REG    0x18
0024 #define BCM6368_BASEMODE_REG    0x38
0025 #define  BCM6368_BASEMODE_MASK  0x7
0026 #define  BCM6368_BASEMODE_GPIO  0x0
0027 #define  BCM6368_BASEMODE_UART1 0x1
0028
0029 struct bcm6368_pingroup {
0030     const char *name;
0031     const unsigned * const pins;
0032     const unsigned num_pins;
0033 };
0034
0035 struct bcm6368_function {
0036     const char *name;
0037     const char * const *groups;
0038     const unsigned num_groups;
0039
0040     unsigned dir_out:16;
0041     unsigned basemode:3;
0042 };
0043
0044 struct bcm6368_priv {
0045     struct regmap_field *overlays;
0046 };
0047
0048 #define BCM6368_BASEMODE_PIN(a, b)      \
0049     {                   \
0050         .number = a,            \
0051         .name = b,          \
0052         .drv_data = (void *)true    \
0053     }
0054
0055 static const struct pinctrl_pin_desc bcm6368_pins[] = {
0056     PINCTRL_PIN(0, "gpio0"),
0057     PINCTRL_PIN(1, "gpio1"),
0058     PINCTRL_PIN(2, "gpio2"),
0059     PINCTRL_PIN(3, "gpio3"),
0060     PINCTRL_PIN(4, "gpio4"),
0061     PINCTRL_PIN(5, "gpio5"),
0062     PINCTRL_PIN(6, "gpio6"),
0063     PINCTRL_PIN(7, "gpio7"),
0064     PINCTRL_PIN(8, "gpio8"),
0065     PINCTRL_PIN(9, "gpio9"),
0066     PINCTRL_PIN(10, "gpio10"),
0067     PINCTRL_PIN(11, "gpio11"),
0068     PINCTRL_PIN(12, "gpio12"),
0069     PINCTRL_PIN(13, "gpio13"),
0070     PINCTRL_PIN(14, "gpio14"),
0071     PINCTRL_PIN(15, "gpio15"),
0072     PINCTRL_PIN(16, "gpio16"),
0073     PINCTRL_PIN(17, "gpio17"),
0074     PINCTRL_PIN(18, "gpio18"),
0075     PINCTRL_PIN(19, "gpio19"),
0076     PINCTRL_PIN(20, "gpio20"),
0077     PINCTRL_PIN(21, "gpio21"),
0078     PINCTRL_PIN(22, "gpio22"),
0079     PINCTRL_PIN(23, "gpio23"),
0080     PINCTRL_PIN(24, "gpio24"),
0081     PINCTRL_PIN(25, "gpio25"),
0082     PINCTRL_PIN(26, "gpio26"),
0083     PINCTRL_PIN(27, "gpio27"),
0084     PINCTRL_PIN(28, "gpio28"),
0085     PINCTRL_PIN(29, "gpio29"),
0086     BCM6368_BASEMODE_PIN(30, "gpio30"),
0087     BCM6368_BASEMODE_PIN(31, "gpio31"),
0088     BCM6368_BASEMODE_PIN(32, "gpio32"),
0089     BCM6368_BASEMODE_PIN(33, "gpio33"),
0090     PINCTRL_PIN(34, "gpio34"),
0091     PINCTRL_PIN(35, "gpio35"),
0092     PINCTRL_PIN(36, "gpio36"),
0093     PINCTRL_PIN(37, "gpio37"),
0094 };
0095
0096 static unsigned gpio0_pins[] = { 0 };
0097 static unsigned gpio1_pins[] = { 1 };
0098 static unsigned gpio2_pins[] = { 2 };
0099 static unsigned gpio3_pins[] = { 3 };
0100 static unsigned gpio4_pins[] = { 4 };
0101 static unsigned gpio5_pins[] = { 5 };
0102 static unsigned gpio6_pins[] = { 6 };
0103 static unsigned gpio7_pins[] = { 7 };
0104 static unsigned gpio8_pins[] = { 8 };
0105 static unsigned gpio9_pins[] = { 9 };
0106 static unsigned gpio10_pins[] = { 10 };
0107 static unsigned gpio11_pins[] = { 11 };
0108 static unsigned gpio12_pins[] = { 12 };
0109 static unsigned gpio13_pins[] = { 13 };
0110 static unsigned gpio14_pins[] = { 14 };
0111 static unsigned gpio15_pins[] = { 15 };
0112 static unsigned gpio16_pins[] = { 16 };
0113 static unsigned gpio17_pins[] = { 17 };
0114 static unsigned gpio18_pins[] = { 18 };
0115 static unsigned gpio19_pins[] = { 19 };
0116 static unsigned gpio20_pins[] = { 20 };
0117 static unsigned gpio21_pins[] = { 21 };
0118 static unsigned gpio22_pins[] = { 22 };
0119 static unsigned gpio23_pins[] = { 23 };
0120 static unsigned gpio24_pins[] = { 24 };
0121 static unsigned gpio25_pins[] = { 25 };
0122 static unsigned gpio26_pins[] = { 26 };
0123 static unsigned gpio27_pins[] = { 27 };
0124 static unsigned gpio28_pins[] = { 28 };
0125 static unsigned gpio29_pins[] = { 29 };
0126 static unsigned gpio30_pins[] = { 30 };
0127 static unsigned gpio31_pins[] = { 31 };
0128 static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
0129
0130 #define BCM6368_GROUP(n)                \
0131     {                       \
0132         .name = #n,             \
0133         .pins = n##_pins,           \
0134         .num_pins = ARRAY_SIZE(n##_pins),   \
0135     }
0136
0137 static struct bcm6368_pingroup bcm6368_groups[] = {
0138     BCM6368_GROUP(gpio0),
0139     BCM6368_GROUP(gpio1),
0140     BCM6368_GROUP(gpio2),
0141     BCM6368_GROUP(gpio3),
0142     BCM6368_GROUP(gpio4),
0143     BCM6368_GROUP(gpio5),
0144     BCM6368_GROUP(gpio6),
0145     BCM6368_GROUP(gpio7),
0146     BCM6368_GROUP(gpio8),
0147     BCM6368_GROUP(gpio9),
0148     BCM6368_GROUP(gpio10),
0149     BCM6368_GROUP(gpio11),
0150     BCM6368_GROUP(gpio12),
0151     BCM6368_GROUP(gpio13),
0152     BCM6368_GROUP(gpio14),
0153     BCM6368_GROUP(gpio15),
0154     BCM6368_GROUP(gpio16),
0155     BCM6368_GROUP(gpio17),
0156     BCM6368_GROUP(gpio18),
0157     BCM6368_GROUP(gpio19),
0158     BCM6368_GROUP(gpio20),
0159     BCM6368_GROUP(gpio21),
0160     BCM6368_GROUP(gpio22),
0161     BCM6368_GROUP(gpio23),
0162     BCM6368_GROUP(gpio24),
0163     BCM6368_GROUP(gpio25),
0164     BCM6368_GROUP(gpio26),
0165     BCM6368_GROUP(gpio27),
0166     BCM6368_GROUP(gpio28),
0167     BCM6368_GROUP(gpio29),
0168     BCM6368_GROUP(gpio30),
0169     BCM6368_GROUP(gpio31),
0170     BCM6368_GROUP(uart1_grp),
0171 };
0172
0173 static const char * const analog_afe_0_groups[] = {
0174     "gpio0",
0175 };
0176
0177 static const char * const analog_afe_1_groups[] = {
0178     "gpio1",
0179 };
0180
0181 static const char * const sys_irq_groups[] = {
0182     "gpio2",
0183 };
0184
0185 static const char * const serial_led_data_groups[] = {
0186     "gpio3",
0187 };
0188
0189 static const char * const serial_led_clk_groups[] = {
0190     "gpio4",
0191 };
0192
0193 static const char * const inet_led_groups[] = {
0194     "gpio5",
0195 };
0196
0197 static const char * const ephy0_led_groups[] = {
0198     "gpio6",
0199 };
0200
0201 static const char * const ephy1_led_groups[] = {
0202     "gpio7",
0203 };
0204
0205 static const char * const ephy2_led_groups[] = {
0206     "gpio8",
0207 };
0208
0209 static const char * const ephy3_led_groups[] = {
0210     "gpio9",
0211 };
0212
0213 static const char * const robosw_led_data_groups[] = {
0214     "gpio10",
0215 };
0216
0217 static const char * const robosw_led_clk_groups[] = {
0218     "gpio11",
0219 };
0220
0221 static const char * const robosw_led0_groups[] = {
0222     "gpio12",
0223 };
0224
0225 static const char * const robosw_led1_groups[] = {
0226     "gpio13",
0227 };
0228
0229 static const char * const usb_device_led_groups[] = {
0230     "gpio14",
0231 };
0232
0233 static const char * const pci_req1_groups[] = {
0234     "gpio16",
0235 };
0236
0237 static const char * const pci_gnt1_groups[] = {
0238     "gpio17",
0239 };
0240
0241 static const char * const pci_intb_groups[] = {
0242     "gpio18",
0243 };
0244
0245 static const char * const pci_req0_groups[] = {
0246     "gpio19",
0247 };
0248
0249 static const char * const pci_gnt0_groups[] = {
0250     "gpio20",
0251 };
0252
0253 static const char * const pcmcia_cd1_groups[] = {
0254     "gpio22",
0255 };
0256
0257 static const char * const pcmcia_cd2_groups[] = {
0258     "gpio23",
0259 };
0260
0261 static const char * const pcmcia_vs1_groups[] = {
0262     "gpio24",
0263 };
0264
0265 static const char * const pcmcia_vs2_groups[] = {
0266     "gpio25",
0267 };
0268
0269 static const char * const ebi_cs2_groups[] = {
0270     "gpio26",
0271 };
0272
0273 static const char * const ebi_cs3_groups[] = {
0274     "gpio27",
0275 };
0276
0277 static const char * const spi_cs2_groups[] = {
0278     "gpio28",
0279 };
0280
0281 static const char * const spi_cs3_groups[] = {
0282     "gpio29",
0283 };
0284
0285 static const char * const spi_cs4_groups[] = {
0286     "gpio30",
0287 };
0288
0289 static const char * const spi_cs5_groups[] = {
0290     "gpio31",
0291 };
0292
0293 static const char * const uart1_groups[] = {
0294     "uart1_grp",
0295 };
0296
0297 #define BCM6368_FUN(n, out)             \
0298     {                       \
0299         .name = #n,             \
0300         .groups = n##_groups,           \
0301         .num_groups = ARRAY_SIZE(n##_groups),   \
0302         .dir_out = out,             \
0303     }
0304
0305 #define BCM6368_BASEMODE_FUN(n, val, out)       \
0306     {                       \
0307         .name = #n,             \
0308         .groups = n##_groups,           \
0309         .num_groups = ARRAY_SIZE(n##_groups),   \
0310         .basemode = BCM6368_BASEMODE_##val, \
0311         .dir_out = out,             \
0312     }
0313
0314 static const struct bcm6368_function bcm6368_funcs[] = {
0315     BCM6368_FUN(analog_afe_0, 1),
0316     BCM6368_FUN(analog_afe_1, 1),
0317     BCM6368_FUN(sys_irq, 1),
0318     BCM6368_FUN(serial_led_data, 1),
0319     BCM6368_FUN(serial_led_clk, 1),
0320     BCM6368_FUN(inet_led, 1),
0321     BCM6368_FUN(ephy0_led, 1),
0322     BCM6368_FUN(ephy1_led, 1),
0323     BCM6368_FUN(ephy2_led, 1),
0324     BCM6368_FUN(ephy3_led, 1),
0325     BCM6368_FUN(robosw_led_data, 1),
0326     BCM6368_FUN(robosw_led_clk, 1),
0327     BCM6368_FUN(robosw_led0, 1),
0328     BCM6368_FUN(robosw_led1, 1),
0329     BCM6368_FUN(usb_device_led, 1),
0330     BCM6368_FUN(pci_req1, 0),
0331     BCM6368_FUN(pci_gnt1, 0),
0332     BCM6368_FUN(pci_intb, 0),
0333     BCM6368_FUN(pci_req0, 0),
0334     BCM6368_FUN(pci_gnt0, 0),
0335     BCM6368_FUN(pcmcia_cd1, 0),
0336     BCM6368_FUN(pcmcia_cd2, 0),
0337     BCM6368_FUN(pcmcia_vs1, 0),
0338     BCM6368_FUN(pcmcia_vs2, 0),
0339     BCM6368_FUN(ebi_cs2, 1),
0340     BCM6368_FUN(ebi_cs3, 1),
0341     BCM6368_FUN(spi_cs2, 1),
0342     BCM6368_FUN(spi_cs3, 1),
0343     BCM6368_FUN(spi_cs4, 1),
0344     BCM6368_FUN(spi_cs5, 1),
0345     BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
0346 };
0347
0348 static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
0349 {
0350     return ARRAY_SIZE(bcm6368_groups);
0351 }
0352
0353 static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
0354                           unsigned group)
0355 {
0356     return bcm6368_groups[group].name;
0357 }
0358
0359 static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
0360                       unsigned group, const unsigned **pins,
0361                       unsigned *num_pins)
0362 {
0363     *pins = bcm6368_groups[group].pins;
0364     *num_pins = bcm6368_groups[group].num_pins;
0365
0366     return 0;
0367 }
0368
0369 static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
0370 {
0371     return ARRAY_SIZE(bcm6368_funcs);
0372 }
0373
0374 static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
0375                          unsigned selector)
0376 {
0377     return bcm6368_funcs[selector].name;
0378 }
0379
0380 static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
0381                       unsigned selector,
0382                       const char * const **groups,
0383                       unsigned * const num_groups)
0384 {
0385     *groups = bcm6368_funcs[selector].groups;
0386     *num_groups = bcm6368_funcs[selector].num_groups;
0387
0388     return 0;
0389 }
0390
0391 static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
0392                    unsigned selector, unsigned group)
0393 {
0394     struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
0395     struct bcm6368_priv *priv = pc->driver_data;
0396     const struct bcm6368_pingroup *pg = &bcm6368_groups[group];
0397     const struct bcm6368_function *fun = &bcm6368_funcs[selector];
0398     int i, pin;
0399
0400     if (fun->basemode) {
0401         unsigned int mask = 0;
0402
0403         for (i = 0; i < pg->num_pins; i++) {
0404             pin = pg->pins[i];
0405             if (pin < BCM63XX_BANK_GPIOS)
0406                 mask |= BIT(pin);
0407         }
0408
0409         regmap_update_bits(pc->regs, BCM6368_MODE_REG, mask, 0);
0410         regmap_field_write(priv->overlays, fun->basemode);
0411     } else {
0412         pin = pg->pins[0];
0413
0414         if (bcm6368_pins[pin].drv_data)
0415             regmap_field_write(priv->overlays,
0416                        BCM6368_BASEMODE_GPIO);
0417
0418         regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(pin),
0419                    BIT(pin));
0420     }
0421
0422     for (pin = 0; pin < pg->num_pins; pin++) {
0423         struct pinctrl_gpio_range *range;
0424         int hw_gpio = bcm6368_pins[pin].number;
0425
0426         range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio);
0427         if (range) {
0428             struct gpio_chip *gc = range->gc;
0429
0430             if (fun->dir_out & BIT(pin))
0431                 gc->direction_output(gc, hw_gpio, 0);
0432             else
0433                 gc->direction_input(gc, hw_gpio);
0434         }
0435     }
0436
0437     return 0;
0438 }
0439
0440 static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
0441                        struct pinctrl_gpio_range *range,
0442                        unsigned offset)
0443 {
0444     struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
0445     struct bcm6368_priv *priv = pc->driver_data;
0446
0447     if (offset >= BCM63XX_BANK_GPIOS && !bcm6368_pins[offset].drv_data)
0448         return 0;
0449
0450     /* disable all functions using this pin */
0451     if (offset < BCM63XX_BANK_GPIOS)
0452         regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(offset), 0);
0453
0454     if (bcm6368_pins[offset].drv_data)
0455         regmap_field_write(priv->overlays, BCM6368_BASEMODE_GPIO);
0456
0457     return 0;
0458 }
0459
0460 static const struct pinctrl_ops bcm6368_pctl_ops = {
0461     .dt_free_map = pinctrl_utils_free_map,
0462     .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
0463     .get_group_name = bcm6368_pinctrl_get_group_name,
0464     .get_group_pins = bcm6368_pinctrl_get_group_pins,
0465     .get_groups_count = bcm6368_pinctrl_get_group_count,
0466 };
0467
0468 static const struct pinmux_ops bcm6368_pmx_ops = {
0469     .get_function_groups = bcm6368_pinctrl_get_groups,
0470     .get_function_name = bcm6368_pinctrl_get_func_name,
0471     .get_functions_count = bcm6368_pinctrl_get_func_count,
0472     .gpio_request_enable = bcm6368_gpio_request_enable,
0473     .set_mux = bcm6368_pinctrl_set_mux,
0474     .strict = true,
0475 };
0476
0477 static const struct bcm63xx_pinctrl_soc bcm6368_soc = {
0478     .ngpios = BCM6368_NUM_GPIOS,
0479     .npins = ARRAY_SIZE(bcm6368_pins),
0480     .pctl_ops = &bcm6368_pctl_ops,
0481     .pins = bcm6368_pins,
0482     .pmx_ops = &bcm6368_pmx_ops,
0483 };
0484
0485 static int bcm6368_pinctrl_probe(struct platform_device *pdev)
0486 {
0487     struct reg_field overlays = REG_FIELD(BCM6368_BASEMODE_REG, 0, 15);
0488     struct device *dev = &pdev->dev;
0489     struct bcm63xx_pinctrl *pc;
0490     struct bcm6368_priv *priv;
0491     int err;
0492
0493     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0494     if (!priv)
0495         return -ENOMEM;
0496
0497     err = bcm63xx_pinctrl_probe(pdev, &bcm6368_soc, (void *) priv);
0498     if (err)
0499         return err;
0500
0501     pc = platform_get_drvdata(pdev);
0502
0503     priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays);
0504     if (IS_ERR(priv->overlays))
0505         return PTR_ERR(priv->overlays);
0506
0507     return 0;
0508 }
0509
0510 static const struct of_device_id bcm6368_pinctrl_match[] = {
0511     { .compatible = "brcm,bcm6368-pinctrl", },
0512     { /* sentinel */ }
0513 };
0514
0515 static struct platform_driver bcm6368_pinctrl_driver = {
0516     .probe = bcm6368_pinctrl_probe,
0517     .driver = {
0518         .name = "bcm6368-pinctrl",
0519         .of_match_table = bcm6368_pinctrl_match,
0520     },
0521 };
0522
0523 builtin_platform_driver(bcm6368_pinctrl_driver);