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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Driver for BCM6358 GPIO unit (pinctrl + GPIO)
0004  *
0005  * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
0006  * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
0007  */
0008 
0009 #include <linux/bits.h>
0010 #include <linux/gpio/driver.h>
0011 #include <linux/kernel.h>
0012 #include <linux/of.h>
0013 #include <linux/pinctrl/pinmux.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/regmap.h>
0016 
0017 #include "../pinctrl-utils.h"
0018 
0019 #include "pinctrl-bcm63xx.h"
0020 
0021 #define BCM6358_NUM_GPIOS       40
0022 
0023 #define BCM6358_MODE_REG        0x18
0024 #define  BCM6358_MODE_MUX_NONE      0
0025 #define  BCM6358_MODE_MUX_EBI_CS    BIT(5)
0026 #define  BCM6358_MODE_MUX_UART1     BIT(6)
0027 #define  BCM6358_MODE_MUX_SPI_CS    BIT(7)
0028 #define  BCM6358_MODE_MUX_ASYNC_MODEM   BIT(8)
0029 #define  BCM6358_MODE_MUX_LEGACY_LED    BIT(9)
0030 #define  BCM6358_MODE_MUX_SERIAL_LED    BIT(10)
0031 #define  BCM6358_MODE_MUX_LED       BIT(11)
0032 #define  BCM6358_MODE_MUX_UTOPIA    BIT(12)
0033 #define  BCM6358_MODE_MUX_CLKRST    BIT(13)
0034 #define  BCM6358_MODE_MUX_PWM_SYN_CLK   BIT(14)
0035 #define  BCM6358_MODE_MUX_SYS_IRQ   BIT(15)
0036 
0037 struct bcm6358_pingroup {
0038     const char *name;
0039     const unsigned * const pins;
0040     const unsigned num_pins;
0041 
0042     const uint16_t mode_val;
0043 
0044     /* non-GPIO function muxes require the gpio direction to be set */
0045     const uint16_t direction;
0046 };
0047 
0048 struct bcm6358_function {
0049     const char *name;
0050     const char * const *groups;
0051     const unsigned num_groups;
0052 };
0053 
0054 struct bcm6358_priv {
0055     struct regmap_field *overlays;
0056 };
0057 
0058 #define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3)        \
0059     {                           \
0060         .number = a,                    \
0061         .name = b,                  \
0062         .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 |  \
0063                      BCM6358_MODE_MUX_##bit2 |  \
0064                      BCM6358_MODE_MUX_##bit3),  \
0065     }
0066 
0067 static const struct pinctrl_pin_desc bcm6358_pins[] = {
0068     BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
0069     BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
0070     BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
0071     BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
0072     PINCTRL_PIN(4, "gpio4"),
0073     BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
0074     BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
0075     BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
0076     BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
0077     BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
0078     BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
0079     BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
0080     BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
0081     BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
0082     BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
0083     BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
0084     PINCTRL_PIN(16, "gpio16"),
0085     PINCTRL_PIN(17, "gpio17"),
0086     PINCTRL_PIN(18, "gpio18"),
0087     PINCTRL_PIN(19, "gpio19"),
0088     PINCTRL_PIN(20, "gpio20"),
0089     PINCTRL_PIN(21, "gpio21"),
0090     BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
0091     BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
0092     BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
0093     BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
0094     BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
0095     BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
0096     BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
0097     BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
0098     BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
0099     BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
0100     BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
0101     BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
0102     PINCTRL_PIN(34, "gpio34"),
0103     PINCTRL_PIN(35, "gpio35"),
0104     PINCTRL_PIN(36, "gpio36"),
0105     PINCTRL_PIN(37, "gpio37"),
0106     PINCTRL_PIN(38, "gpio38"),
0107     PINCTRL_PIN(39, "gpio39"),
0108 };
0109 
0110 static unsigned ebi_cs_grp_pins[] = { 30, 31 };
0111 
0112 static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
0113 
0114 static unsigned spi_cs_grp_pins[] = { 32, 33 };
0115 
0116 static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
0117 
0118 static unsigned serial_led_grp_pins[] = { 6, 7 };
0119 
0120 static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
0121 
0122 static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
0123 
0124 static unsigned utopia_grp_pins[] = {
0125     12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
0126 };
0127 
0128 static unsigned pwm_syn_clk_grp_pins[] = { 8 };
0129 
0130 static unsigned sys_irq_grp_pins[] = { 5 };
0131 
0132 #define BCM6358_GPIO_MUX_GROUP(n, bit, dir)         \
0133     {                           \
0134         .name = #n,                 \
0135         .pins = n##_pins,               \
0136         .num_pins = ARRAY_SIZE(n##_pins),       \
0137         .mode_val = BCM6358_MODE_MUX_##bit,     \
0138         .direction = dir,               \
0139     }
0140 
0141 static const struct bcm6358_pingroup bcm6358_groups[] = {
0142     BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
0143     BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
0144     BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
0145     BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
0146     BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
0147     BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
0148     BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
0149     BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
0150     BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
0151     BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
0152 };
0153 
0154 static const char * const ebi_cs_groups[] = {
0155     "ebi_cs_grp"
0156 };
0157 
0158 static const char * const uart1_groups[] = {
0159     "uart1_grp"
0160 };
0161 
0162 static const char * const spi_cs_2_3_groups[] = {
0163     "spi_cs_2_3_grp"
0164 };
0165 
0166 static const char * const async_modem_groups[] = {
0167     "async_modem_grp"
0168 };
0169 
0170 static const char * const legacy_led_groups[] = {
0171     "legacy_led_grp",
0172 };
0173 
0174 static const char * const serial_led_groups[] = {
0175     "serial_led_grp",
0176 };
0177 
0178 static const char * const led_groups[] = {
0179     "led_grp",
0180 };
0181 
0182 static const char * const clkrst_groups[] = {
0183     "clkrst_grp",
0184 };
0185 
0186 static const char * const pwm_syn_clk_groups[] = {
0187     "pwm_syn_clk_grp",
0188 };
0189 
0190 static const char * const sys_irq_groups[] = {
0191     "sys_irq_grp",
0192 };
0193 
0194 #define BCM6358_FUN(n)                  \
0195     {                       \
0196         .name = #n,             \
0197         .groups = n##_groups,           \
0198         .num_groups = ARRAY_SIZE(n##_groups),   \
0199     }
0200 
0201 static const struct bcm6358_function bcm6358_funcs[] = {
0202     BCM6358_FUN(ebi_cs),
0203     BCM6358_FUN(uart1),
0204     BCM6358_FUN(spi_cs_2_3),
0205     BCM6358_FUN(async_modem),
0206     BCM6358_FUN(legacy_led),
0207     BCM6358_FUN(serial_led),
0208     BCM6358_FUN(led),
0209     BCM6358_FUN(clkrst),
0210     BCM6358_FUN(pwm_syn_clk),
0211     BCM6358_FUN(sys_irq),
0212 };
0213 
0214 static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
0215 {
0216     return ARRAY_SIZE(bcm6358_groups);
0217 }
0218 
0219 static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
0220                           unsigned group)
0221 {
0222     return bcm6358_groups[group].name;
0223 }
0224 
0225 static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
0226                       unsigned group, const unsigned **pins,
0227                       unsigned *num_pins)
0228 {
0229     *pins = bcm6358_groups[group].pins;
0230     *num_pins = bcm6358_groups[group].num_pins;
0231 
0232     return 0;
0233 }
0234 
0235 static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
0236 {
0237     return ARRAY_SIZE(bcm6358_funcs);
0238 }
0239 
0240 static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
0241                          unsigned selector)
0242 {
0243     return bcm6358_funcs[selector].name;
0244 }
0245 
0246 static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
0247                       unsigned selector,
0248                       const char * const **groups,
0249                       unsigned * const num_groups)
0250 {
0251     *groups = bcm6358_funcs[selector].groups;
0252     *num_groups = bcm6358_funcs[selector].num_groups;
0253 
0254     return 0;
0255 }
0256 
0257 static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
0258                    unsigned selector, unsigned group)
0259 {
0260     struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
0261     struct bcm6358_priv *priv = pc->driver_data;
0262     const struct bcm6358_pingroup *pg = &bcm6358_groups[group];
0263     unsigned int val = pg->mode_val;
0264     unsigned int mask = val;
0265     unsigned pin;
0266 
0267     for (pin = 0; pin < pg->num_pins; pin++)
0268         mask |= (unsigned long)bcm6358_pins[pin].drv_data;
0269 
0270     regmap_field_update_bits(priv->overlays, mask, val);
0271 
0272     for (pin = 0; pin < pg->num_pins; pin++) {
0273         struct pinctrl_gpio_range *range;
0274         unsigned int hw_gpio = bcm6358_pins[pin].number;
0275 
0276         range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio);
0277         if (range) {
0278             struct gpio_chip *gc = range->gc;
0279 
0280             if (pg->direction & BIT(pin))
0281                 gc->direction_output(gc, hw_gpio, 0);
0282             else
0283                 gc->direction_input(gc, hw_gpio);
0284         }
0285     }
0286 
0287     return 0;
0288 }
0289 
0290 static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
0291                        struct pinctrl_gpio_range *range,
0292                        unsigned offset)
0293 {
0294     struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
0295     struct bcm6358_priv *priv = pc->driver_data;
0296     unsigned int mask;
0297 
0298     mask = (unsigned long) bcm6358_pins[offset].drv_data;
0299     if (!mask)
0300         return 0;
0301 
0302     /* disable all functions using this pin */
0303     return regmap_field_update_bits(priv->overlays, mask, 0);
0304 }
0305 
0306 static const struct pinctrl_ops bcm6358_pctl_ops = {
0307     .dt_free_map = pinctrl_utils_free_map,
0308     .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
0309     .get_group_name = bcm6358_pinctrl_get_group_name,
0310     .get_group_pins = bcm6358_pinctrl_get_group_pins,
0311     .get_groups_count = bcm6358_pinctrl_get_group_count,
0312 };
0313 
0314 static const struct pinmux_ops bcm6358_pmx_ops = {
0315     .get_function_groups = bcm6358_pinctrl_get_groups,
0316     .get_function_name = bcm6358_pinctrl_get_func_name,
0317     .get_functions_count = bcm6358_pinctrl_get_func_count,
0318     .gpio_request_enable = bcm6358_gpio_request_enable,
0319     .set_mux = bcm6358_pinctrl_set_mux,
0320     .strict = true,
0321 };
0322 
0323 static const struct bcm63xx_pinctrl_soc bcm6358_soc = {
0324     .ngpios = BCM6358_NUM_GPIOS,
0325     .npins = ARRAY_SIZE(bcm6358_pins),
0326     .pctl_ops = &bcm6358_pctl_ops,
0327     .pins = bcm6358_pins,
0328     .pmx_ops = &bcm6358_pmx_ops,
0329 };
0330 
0331 static int bcm6358_pinctrl_probe(struct platform_device *pdev)
0332 {
0333     struct reg_field overlays = REG_FIELD(BCM6358_MODE_REG, 0, 15);
0334     struct device *dev = &pdev->dev;
0335     struct bcm63xx_pinctrl *pc;
0336     struct bcm6358_priv *priv;
0337     int err;
0338 
0339     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0340     if (!priv)
0341         return -ENOMEM;
0342 
0343     err = bcm63xx_pinctrl_probe(pdev, &bcm6358_soc, (void *) priv);
0344     if (err)
0345         return err;
0346 
0347     pc = platform_get_drvdata(pdev);
0348 
0349     priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays);
0350     if (IS_ERR(priv->overlays))
0351         return PTR_ERR(priv->overlays);
0352 
0353     return 0;
0354 }
0355 
0356 static const struct of_device_id bcm6358_pinctrl_match[] = {
0357     { .compatible = "brcm,bcm6358-pinctrl", },
0358     { /* sentinel */ }
0359 };
0360 
0361 static struct platform_driver bcm6358_pinctrl_driver = {
0362     .probe = bcm6358_pinctrl_probe,
0363     .driver = {
0364         .name = "bcm6358-pinctrl",
0365         .of_match_table = bcm6358_pinctrl_match,
0366     },
0367 };
0368 
0369 builtin_platform_driver(bcm6358_pinctrl_driver);