pinctrl/aspeed/pinctrl-aspeed.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (C) 2016 IBM Corp.
0004  */
0005
0006 #ifndef PINCTRL_ASPEED
0007 #define PINCTRL_ASPEED
0008
0009 #include <linux/pinctrl/pinctrl.h>
0010 #include <linux/pinctrl/pinmux.h>
0011 #include <linux/pinctrl/pinconf.h>
0012 #include <linux/pinctrl/pinconf-generic.h>
0013 #include <linux/regmap.h>
0014
0015 #include "pinmux-aspeed.h"
0016
0017 /**
0018  * @param The pinconf parameter type
0019  * @pins The pin range this config struct covers, [low, high]
0020  * @reg The register housing the configuration bits
0021  * @mask The mask to select the bits of interest in @reg
0022  */
0023 struct aspeed_pin_config {
0024     enum pin_config_param param;
0025     unsigned int pins[2];
0026     unsigned int reg;
0027     u32 mask;
0028 };
0029
0030 #define ASPEED_PINCTRL_PIN(name_) \
0031     [name_] = { \
0032         .number = name_, \
0033         .name = #name_, \
0034         .drv_data = (void *) &(PIN_SYM(name_)) \
0035     }
0036
0037 #define ASPEED_SB_PINCONF(param_, pin0_, pin1_, reg_, bit_) { \
0038     .param = param_, \
0039     .pins = {pin0_, pin1_}, \
0040     .reg = reg_, \
0041     .mask = BIT_MASK(bit_) \
0042 }
0043
0044 #define ASPEED_PULL_DOWN_PINCONF(pin_, reg_, bit_) \
0045     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, pin_, pin_, reg_, bit_), \
0046     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   pin_, pin_, reg_, bit_)
0047
0048 #define ASPEED_PULL_UP_PINCONF(pin_, reg_, bit_) \
0049     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_UP, pin_, pin_, reg_, bit_), \
0050     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, pin_, pin_, reg_, bit_)
0051 /*
0052  * Aspeed pin configuration description.
0053  *
0054  * @param: pinconf configuration parameter
0055  * @arg: The supported argument for @param, or -1 if any value is supported
0056  * @val: The register value to write to configure @arg for @param
0057  * @mask: The bitfield mask for @val
0058  *
0059  * The map is to be used in conjunction with the configuration array supplied
0060  * by the driver implementation.
0061  */
0062 struct aspeed_pin_config_map {
0063     enum pin_config_param param;
0064     s32 arg;
0065     u32 val;
0066     u32 mask;
0067 };
0068
0069 struct aspeed_pinctrl_data {
0070     struct regmap *scu;
0071
0072     const struct pinctrl_pin_desc *pins;
0073     const unsigned int npins;
0074
0075     const struct aspeed_pin_config *configs;
0076     const unsigned int nconfigs;
0077
0078     struct aspeed_pinmux_data pinmux;
0079
0080     const struct aspeed_pin_config_map *confmaps;
0081     const unsigned int nconfmaps;
0082 };
0083
0084 /* Aspeed pinctrl helpers */
0085 int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev);
0086 const char *aspeed_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
0087         unsigned int group);
0088 int aspeed_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
0089         unsigned int group, const unsigned int **pins,
0090         unsigned int *npins);
0091 void aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
0092         struct seq_file *s, unsigned int offset);
0093 int aspeed_pinmux_get_fn_count(struct pinctrl_dev *pctldev);
0094 const char *aspeed_pinmux_get_fn_name(struct pinctrl_dev *pctldev,
0095         unsigned int function);
0096 int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev,
0097         unsigned int function, const char * const **groups,
0098         unsigned int * const num_groups);
0099 int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
0100         unsigned int group);
0101 int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
0102         struct pinctrl_gpio_range *range,
0103         unsigned int offset);
0104 int aspeed_pinctrl_probe(struct platform_device *pdev,
0105         struct pinctrl_desc *pdesc,
0106         struct aspeed_pinctrl_data *pdata);
0107 int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
0108         unsigned long *config);
0109 int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
0110         unsigned long *configs, unsigned int num_configs);
0111 int aspeed_pin_config_group_get(struct pinctrl_dev *pctldev,
0112         unsigned int selector,
0113         unsigned long *config);
0114 int aspeed_pin_config_group_set(struct pinctrl_dev *pctldev,
0115         unsigned int selector,
0116         unsigned long *configs,
0117         unsigned int num_configs);
0118
0119 #endif /* PINCTRL_ASPEED */