pinctrl/aspeed/pinctrl-aspeed-g6.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /* Copyright (C) 2019 IBM Corp. */
0003 #include <linux/bitops.h>
0004 #include <linux/init.h>
0005 #include <linux/io.h>
0006 #include <linux/kernel.h>
0007 #include <linux/mfd/syscon.h>
0008 #include <linux/mutex.h>
0009 #include <linux/of.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/pinctrl/pinctrl.h>
0012 #include <linux/pinctrl/pinmux.h>
0013 #include <linux/string.h>
0014 #include <linux/types.h>
0015
0016 #include "../core.h"
0017 #include "../pinctrl-utils.h"
0018 #include "pinctrl-aspeed.h"
0019
0020 #define SCU400      0x400 /* Multi-function Pin Control #1  */
0021 #define SCU404      0x404 /* Multi-function Pin Control #2  */
0022 #define SCU40C      0x40C /* Multi-function Pin Control #3  */
0023 #define SCU410      0x410 /* Multi-function Pin Control #4  */
0024 #define SCU414      0x414 /* Multi-function Pin Control #5  */
0025 #define SCU418      0x418 /* Multi-function Pin Control #6  */
0026 #define SCU41C      0x41C /* Multi-function Pin Control #7  */
0027 #define SCU430      0x430 /* Multi-function Pin Control #8  */
0028 #define SCU434      0x434 /* Multi-function Pin Control #9  */
0029 #define SCU438      0x438 /* Multi-function Pin Control #10 */
0030 #define SCU440      0x440 /* USB Multi-function Pin Control #12 */
0031 #define SCU450      0x450 /* Multi-function Pin Control #14 */
0032 #define SCU454      0x454 /* Multi-function Pin Control #15 */
0033 #define SCU458      0x458 /* Multi-function Pin Control #16 */
0034 #define SCU4B0      0x4B0 /* Multi-function Pin Control #17 */
0035 #define SCU4B4      0x4B4 /* Multi-function Pin Control #18 */
0036 #define SCU4B8      0x4B8 /* Multi-function Pin Control #19 */
0037 #define SCU4BC      0x4BC /* Multi-function Pin Control #20 */
0038 #define SCU4D4      0x4D4 /* Multi-function Pin Control #22 */
0039 #define SCU4D8      0x4D8 /* Multi-function Pin Control #23 */
0040 #define SCU500      0x500 /* Hardware Strap 1 */
0041 #define SCU510      0x510 /* Hardware Strap 2 */
0042 #define SCU610      0x610 /* Disable GPIO Internal Pull-Down #0 */
0043 #define SCU614      0x614 /* Disable GPIO Internal Pull-Down #1 */
0044 #define SCU618      0x618 /* Disable GPIO Internal Pull-Down #2 */
0045 #define SCU61C      0x61c /* Disable GPIO Internal Pull-Down #3 */
0046 #define SCU620      0x620 /* Disable GPIO Internal Pull-Down #4 */
0047 #define SCU634      0x634 /* Disable GPIO Internal Pull-Down #5 */
0048 #define SCU638      0x638 /* Disable GPIO Internal Pull-Down #6 */
0049 #define SCU690      0x690 /* Multi-function Pin Control #24 */
0050 #define SCU694      0x694 /* Multi-function Pin Control #25 */
0051 #define SCU69C      0x69C /* Multi-function Pin Control #27 */
0052 #define SCU6D0      0x6D0 /* Multi-function Pin Control #29 */
0053 #define SCUC20      0xC20 /* PCIE configuration Setting Control */
0054
0055 #define ASPEED_G6_NR_PINS 256
0056
0057 #define M24 0
0058 SIG_EXPR_LIST_DECL_SESG(M24, MDC3, MDIO3, SIG_DESC_SET(SCU410, 0));
0059 SIG_EXPR_LIST_DECL_SESG(M24, SCL11, I2C11, SIG_DESC_SET(SCU4B0, 0));
0060 PIN_DECL_2(M24, GPIOA0, MDC3, SCL11);
0061
0062 #define M25 1
0063 SIG_EXPR_LIST_DECL_SESG(M25, MDIO3, MDIO3, SIG_DESC_SET(SCU410, 1));
0064 SIG_EXPR_LIST_DECL_SESG(M25, SDA11, I2C11, SIG_DESC_SET(SCU4B0, 1));
0065 PIN_DECL_2(M25, GPIOA1, MDIO3, SDA11);
0066
0067 FUNC_GROUP_DECL(MDIO3, M24, M25);
0068 FUNC_GROUP_DECL(I2C11, M24, M25);
0069
0070 #define L26 2
0071 SIG_EXPR_LIST_DECL_SESG(L26, MDC4, MDIO4, SIG_DESC_SET(SCU410, 2));
0072 SIG_EXPR_LIST_DECL_SESG(L26, SCL12, I2C12, SIG_DESC_SET(SCU4B0, 2));
0073 PIN_DECL_2(L26, GPIOA2, MDC4, SCL12);
0074
0075 #define K24 3
0076 SIG_EXPR_LIST_DECL_SESG(K24, MDIO4, MDIO4, SIG_DESC_SET(SCU410, 3));
0077 SIG_EXPR_LIST_DECL_SESG(K24, SDA12, I2C12, SIG_DESC_SET(SCU4B0, 3));
0078 PIN_DECL_2(K24, GPIOA3, MDIO4, SDA12);
0079
0080 FUNC_GROUP_DECL(MDIO4, L26, K24);
0081 FUNC_GROUP_DECL(I2C12, L26, K24);
0082
0083 #define K26 4
0084 SIG_EXPR_LIST_DECL_SESG(K26, MACLINK1, MACLINK1, SIG_DESC_SET(SCU410, 4));
0085 SIG_EXPR_LIST_DECL_SESG(K26, SCL13, I2C13, SIG_DESC_SET(SCU4B0, 4));
0086 SIG_EXPR_LIST_DECL_SESG(K26, SGPS2CK, SGPS2, SIG_DESC_SET(SCU690, 4));
0087 SIG_EXPR_LIST_DECL_SESG(K26, SGPM2CLK, SGPM2, SIG_DESC_SET(SCU6D0, 4));
0088 PIN_DECL_4(K26, GPIOA4, MACLINK1, SCL13, SGPS2CK, SGPM2CLK);
0089 FUNC_GROUP_DECL(MACLINK1, K26);
0090
0091 #define L24 5
0092 SIG_EXPR_LIST_DECL_SESG(L24, MACLINK2, MACLINK2, SIG_DESC_SET(SCU410, 5));
0093 SIG_EXPR_LIST_DECL_SESG(L24, SDA13, I2C13, SIG_DESC_SET(SCU4B0, 5));
0094 SIG_EXPR_LIST_DECL_SESG(L24, SGPS2LD, SGPS2, SIG_DESC_SET(SCU690, 5));
0095 SIG_EXPR_LIST_DECL_SESG(L24, SGPM2LD, SGPM2, SIG_DESC_SET(SCU6D0, 5));
0096 PIN_DECL_4(L24, GPIOA5, MACLINK2, SDA13, SGPS2LD, SGPM2LD);
0097 FUNC_GROUP_DECL(MACLINK2, L24);
0098
0099 FUNC_GROUP_DECL(I2C13, K26, L24);
0100
0101 #define L23 6
0102 SIG_EXPR_LIST_DECL_SESG(L23, MACLINK3, MACLINK3, SIG_DESC_SET(SCU410, 6));
0103 SIG_EXPR_LIST_DECL_SESG(L23, SCL14, I2C14, SIG_DESC_SET(SCU4B0, 6));
0104 SIG_EXPR_LIST_DECL_SESG(L23, SGPS2O, SGPS2, SIG_DESC_SET(SCU690, 6));
0105 SIG_EXPR_LIST_DECL_SESG(L23, SGPM2O, SGPM2, SIG_DESC_SET(SCU6D0, 6));
0106 PIN_DECL_4(L23, GPIOA6, MACLINK3, SCL14, SGPS2O, SGPM2O);
0107 FUNC_GROUP_DECL(MACLINK3, L23);
0108
0109 #define K25 7
0110 SIG_EXPR_LIST_DECL_SESG(K25, MACLINK4, MACLINK4, SIG_DESC_SET(SCU410, 7));
0111 SIG_EXPR_LIST_DECL_SESG(K25, SDA14, I2C14, SIG_DESC_SET(SCU4B0, 7));
0112 SIG_EXPR_LIST_DECL_SESG(K25, SGPS2I, SGPS2, SIG_DESC_SET(SCU690, 7));
0113 SIG_EXPR_LIST_DECL_SESG(K25, SGPM2I, SGPM2, SIG_DESC_SET(SCU6D0, 7));
0114 PIN_DECL_4(K25, GPIOA7, MACLINK4, SDA14, SGPS2I, SGPM2I);
0115 FUNC_GROUP_DECL(MACLINK4, K25);
0116
0117 FUNC_GROUP_DECL(I2C14, L23, K25);
0118 FUNC_GROUP_DECL(SGPM2, K26, L24, L23, K25);
0119 FUNC_GROUP_DECL(SGPS2, K26, L24, L23, K25);
0120
0121 #define J26 8
0122 SIG_EXPR_LIST_DECL_SESG(J26, SALT1, SALT1, SIG_DESC_SET(SCU410, 8));
0123 SIG_EXPR_LIST_DECL_SESG(J26, LHAD0, LPCHC, SIG_DESC_SET(SCU4B0, 8));
0124 PIN_DECL_2(J26, GPIOB0, SALT1, LHAD0);
0125 FUNC_GROUP_DECL(SALT1, J26);
0126
0127 #define K23 9
0128 SIG_EXPR_LIST_DECL_SESG(K23, SALT2, SALT2, SIG_DESC_SET(SCU410, 9));
0129 SIG_EXPR_LIST_DECL_SESG(K23, LHAD1, LPCHC, SIG_DESC_SET(SCU4B0, 9));
0130 PIN_DECL_2(K23, GPIOB1, SALT2, LHAD1);
0131 FUNC_GROUP_DECL(SALT2, K23);
0132
0133 #define H26 10
0134 SIG_EXPR_LIST_DECL_SESG(H26, SALT3, SALT3, SIG_DESC_SET(SCU410, 10));
0135 SIG_EXPR_LIST_DECL_SESG(H26, LHAD2, LPCHC, SIG_DESC_SET(SCU4B0, 10));
0136 PIN_DECL_2(H26, GPIOB2, SALT3, LHAD2);
0137 FUNC_GROUP_DECL(SALT3, H26);
0138
0139 #define J25 11
0140 SIG_EXPR_LIST_DECL_SESG(J25, SALT4, SALT4, SIG_DESC_SET(SCU410, 11));
0141 SIG_EXPR_LIST_DECL_SESG(J25, LHAD3, LPCHC, SIG_DESC_SET(SCU4B0, 11));
0142 PIN_DECL_2(J25, GPIOB3, SALT4, LHAD3);
0143 FUNC_GROUP_DECL(SALT4, J25);
0144
0145 #define J23 12
0146 SIG_EXPR_LIST_DECL_SESG(J23, MDC2, MDIO2, SIG_DESC_SET(SCU410, 12));
0147 SIG_EXPR_LIST_DECL_SESG(J23, LHCLK, LPCHC, SIG_DESC_SET(SCU4B0, 12));
0148 PIN_DECL_2(J23, GPIOB4, MDC2, LHCLK);
0149
0150 #define G26 13
0151 SIG_EXPR_LIST_DECL_SESG(G26, MDIO2, MDIO2, SIG_DESC_SET(SCU410, 13));
0152 SIG_EXPR_LIST_DECL_SESG(G26, LHFRAME, LPCHC, SIG_DESC_SET(SCU4B0, 13));
0153 PIN_DECL_2(G26, GPIOB5, MDIO2, LHFRAME);
0154
0155 FUNC_GROUP_DECL(MDIO2, J23, G26);
0156
0157 #define H25 14
0158 SIG_EXPR_LIST_DECL_SESG(H25, TXD4, TXD4, SIG_DESC_SET(SCU410, 14));
0159 SIG_EXPR_LIST_DECL_SESG(H25, LHSIRQ, LHSIRQ, SIG_DESC_SET(SCU4B0, 14));
0160 PIN_DECL_2(H25, GPIOB6, TXD4, LHSIRQ);
0161 FUNC_GROUP_DECL(TXD4, H25);
0162 FUNC_GROUP_DECL(LHSIRQ, H25);
0163
0164 #define J24 15
0165 SIG_EXPR_LIST_DECL_SESG(J24, RXD4, RXD4, SIG_DESC_SET(SCU410, 15));
0166 SIG_EXPR_LIST_DECL_SESG(J24, LHRST, LPCHC, SIG_DESC_SET(SCU4B0, 15));
0167 PIN_DECL_2(J24, GPIOB7, RXD4, LHRST);
0168 FUNC_GROUP_DECL(RXD4, J24);
0169
0170 FUNC_GROUP_DECL(LPCHC, J26, K23, H26, J25, J23, G26, H25, J24);
0171
0172 #define H24 16
0173 SIG_EXPR_LIST_DECL_SESG(H24, RGMII3TXCK, RGMII3, SIG_DESC_SET(SCU410, 16),
0174               SIG_DESC_SET(SCU510, 0));
0175 SIG_EXPR_LIST_DECL_SESG(H24, RMII3RCLKO, RMII3, SIG_DESC_SET(SCU410, 16),
0176               SIG_DESC_CLEAR(SCU510, 0));
0177 PIN_DECL_2(H24, GPIOC0, RGMII3TXCK, RMII3RCLKO);
0178
0179 #define J22 17
0180 SIG_EXPR_LIST_DECL_SESG(J22, RGMII3TXCTL, RGMII3, SIG_DESC_SET(SCU410, 17),
0181               SIG_DESC_SET(SCU510, 0));
0182 SIG_EXPR_LIST_DECL_SESG(J22, RMII3TXEN, RMII3, SIG_DESC_SET(SCU410, 17),
0183               SIG_DESC_CLEAR(SCU510, 0));
0184 PIN_DECL_2(J22, GPIOC1, RGMII3TXCTL, RMII3TXEN);
0185
0186 #define H22 18
0187 SIG_EXPR_LIST_DECL_SESG(H22, RGMII3TXD0, RGMII3, SIG_DESC_SET(SCU410, 18),
0188               SIG_DESC_SET(SCU510, 0));
0189 SIG_EXPR_LIST_DECL_SESG(H22, RMII3TXD0, RMII3, SIG_DESC_SET(SCU410, 18),
0190               SIG_DESC_CLEAR(SCU510, 0));
0191 PIN_DECL_2(H22, GPIOC2, RGMII3TXD0, RMII3TXD0);
0192
0193 #define H23 19
0194 SIG_EXPR_LIST_DECL_SESG(H23, RGMII3TXD1, RGMII3, SIG_DESC_SET(SCU410, 19),
0195               SIG_DESC_SET(SCU510, 0));
0196 SIG_EXPR_LIST_DECL_SESG(H23, RMII3TXD1, RMII3, SIG_DESC_SET(SCU410, 19),
0197               SIG_DESC_CLEAR(SCU510, 0));
0198 PIN_DECL_2(H23, GPIOC3, RGMII3TXD1, RMII3TXD1);
0199
0200 #define G22 20
0201 SIG_EXPR_LIST_DECL_SESG(G22, RGMII3TXD2, RGMII3, SIG_DESC_SET(SCU410, 20),
0202               SIG_DESC_SET(SCU510, 0));
0203 PIN_DECL_1(G22, GPIOC4, RGMII3TXD2);
0204
0205 #define F22 21
0206 SIG_EXPR_LIST_DECL_SESG(F22, RGMII3TXD3, RGMII3, SIG_DESC_SET(SCU410, 21),
0207               SIG_DESC_SET(SCU510, 0));
0208 PIN_DECL_1(F22, GPIOC5, RGMII3TXD3);
0209
0210 #define G23 22
0211 SIG_EXPR_LIST_DECL_SESG(G23, RGMII3RXCK, RGMII3, SIG_DESC_SET(SCU410, 22),
0212               SIG_DESC_SET(SCU510, 0));
0213 SIG_EXPR_LIST_DECL_SESG(G23, RMII3RCLKI, RMII3, SIG_DESC_SET(SCU410, 22),
0214               SIG_DESC_CLEAR(SCU510, 0));
0215 PIN_DECL_2(G23, GPIOC6, RGMII3RXCK, RMII3RCLKI);
0216
0217 #define G24 23
0218 SIG_EXPR_LIST_DECL_SESG(G24, RGMII3RXCTL, RGMII3, SIG_DESC_SET(SCU410, 23),
0219               SIG_DESC_SET(SCU510, 0));
0220 PIN_DECL_1(G24, GPIOC7, RGMII3RXCTL);
0221
0222 #define F23 24
0223 SIG_EXPR_LIST_DECL_SESG(F23, RGMII3RXD0, RGMII3, SIG_DESC_SET(SCU410, 24),
0224               SIG_DESC_SET(SCU510, 0));
0225 SIG_EXPR_LIST_DECL_SESG(F23, RMII3RXD0, RMII3, SIG_DESC_SET(SCU410, 24),
0226               SIG_DESC_CLEAR(SCU510, 0));
0227 PIN_DECL_2(F23, GPIOD0, RGMII3RXD0, RMII3RXD0);
0228
0229 #define F26 25
0230 SIG_EXPR_LIST_DECL_SESG(F26, RGMII3RXD1, RGMII3, SIG_DESC_SET(SCU410, 25),
0231               SIG_DESC_SET(SCU510, 0));
0232 SIG_EXPR_LIST_DECL_SESG(F26, RMII3RXD1, RMII3, SIG_DESC_SET(SCU410, 25),
0233               SIG_DESC_CLEAR(SCU510, 0));
0234 PIN_DECL_2(F26, GPIOD1, RGMII3RXD1, RMII3RXD1);
0235
0236 #define F25 26
0237 SIG_EXPR_LIST_DECL_SESG(F25, RGMII3RXD2, RGMII3, SIG_DESC_SET(SCU410, 26),
0238               SIG_DESC_SET(SCU510, 0));
0239 SIG_EXPR_LIST_DECL_SESG(F25, RMII3CRSDV, RMII3, SIG_DESC_SET(SCU410, 26),
0240               SIG_DESC_CLEAR(SCU510, 0));
0241 PIN_DECL_2(F25, GPIOD2, RGMII3RXD2, RMII3CRSDV);
0242
0243 #define E26 27
0244 SIG_EXPR_LIST_DECL_SESG(E26, RGMII3RXD3, RGMII3, SIG_DESC_SET(SCU410, 27),
0245               SIG_DESC_SET(SCU510, 0));
0246 SIG_EXPR_LIST_DECL_SESG(E26, RMII3RXER, RMII3, SIG_DESC_SET(SCU410, 27),
0247               SIG_DESC_CLEAR(SCU510, 0));
0248 PIN_DECL_2(E26, GPIOD3, RGMII3RXD3, RMII3RXER);
0249
0250 FUNC_GROUP_DECL(RGMII3, H24, J22, H22, H23, G22, F22, G23, G24, F23, F26, F25,
0251         E26);
0252 FUNC_GROUP_DECL(RMII3, H24, J22, H22, H23, G23, F23, F26, F25, E26);
0253
0254 #define F24 28
0255 SIG_EXPR_LIST_DECL_SESG(F24, NCTS3, NCTS3, SIG_DESC_SET(SCU410, 28));
0256 SIG_EXPR_LIST_DECL_SESG(F24, RGMII4TXCK, RGMII4, SIG_DESC_SET(SCU4B0, 28),
0257               SIG_DESC_SET(SCU510, 1));
0258 SIG_EXPR_LIST_DECL_SESG(F24, RMII4RCLKO, RMII4, SIG_DESC_SET(SCU4B0, 28),
0259               SIG_DESC_CLEAR(SCU510, 1));
0260 PIN_DECL_3(F24, GPIOD4, NCTS3, RGMII4TXCK, RMII4RCLKO);
0261 FUNC_GROUP_DECL(NCTS3, F24);
0262
0263 #define E23 29
0264 SIG_EXPR_LIST_DECL_SESG(E23, NDCD3, NDCD3, SIG_DESC_SET(SCU410, 29));
0265 SIG_EXPR_LIST_DECL_SESG(E23, RGMII4TXCTL, RGMII4, SIG_DESC_SET(SCU4B0, 29),
0266               SIG_DESC_SET(SCU510, 1));
0267 SIG_EXPR_LIST_DECL_SESG(E23, RMII4TXEN, RMII4, SIG_DESC_SET(SCU4B0, 29),
0268               SIG_DESC_CLEAR(SCU510, 1));
0269 PIN_DECL_3(E23, GPIOD5, NDCD3, RGMII4TXCTL, RMII4TXEN);
0270 FUNC_GROUP_DECL(NDCD3, E23);
0271
0272 #define E24 30
0273 SIG_EXPR_LIST_DECL_SESG(E24, NDSR3, NDSR3, SIG_DESC_SET(SCU410, 30));
0274 SIG_EXPR_LIST_DECL_SESG(E24, RGMII4TXD0, RGMII4, SIG_DESC_SET(SCU4B0, 30),
0275               SIG_DESC_SET(SCU510, 1));
0276 SIG_EXPR_LIST_DECL_SESG(E24, RMII4TXD0, RMII4, SIG_DESC_SET(SCU4B0, 30),
0277               SIG_DESC_CLEAR(SCU510, 1));
0278 PIN_DECL_3(E24, GPIOD6, NDSR3, RGMII4TXD0, RMII4TXD0);
0279 FUNC_GROUP_DECL(NDSR3, E24);
0280
0281 #define E25 31
0282 SIG_EXPR_LIST_DECL_SESG(E25, NRI3, NRI3, SIG_DESC_SET(SCU410, 31));
0283 SIG_EXPR_LIST_DECL_SESG(E25, RGMII4TXD1, RGMII4, SIG_DESC_SET(SCU4B0, 31),
0284               SIG_DESC_SET(SCU510, 1));
0285 SIG_EXPR_LIST_DECL_SESG(E25, RMII4TXD1, RMII4, SIG_DESC_SET(SCU4B0, 31),
0286               SIG_DESC_CLEAR(SCU510, 1));
0287 PIN_DECL_3(E25, GPIOD7, NRI3, RGMII4TXD1, RMII4TXD1);
0288 FUNC_GROUP_DECL(NRI3, E25);
0289
0290 #define D26 32
0291 SIG_EXPR_LIST_DECL_SESG(D26, NDTR3, NDTR3, SIG_DESC_SET(SCU414, 0));
0292 SIG_EXPR_LIST_DECL_SESG(D26, RGMII4TXD2, RGMII4, SIG_DESC_SET(SCU4B4, 0),
0293               SIG_DESC_SET(SCU510, 1));
0294 PIN_DECL_2(D26, GPIOE0, NDTR3, RGMII4TXD2);
0295 FUNC_GROUP_DECL(NDTR3, D26);
0296
0297 #define D24 33
0298 SIG_EXPR_LIST_DECL_SESG(D24, NRTS3, NRTS3, SIG_DESC_SET(SCU414, 1));
0299 SIG_EXPR_LIST_DECL_SESG(D24, RGMII4TXD3, RGMII4, SIG_DESC_SET(SCU4B4, 1),
0300               SIG_DESC_SET(SCU510, 1));
0301 PIN_DECL_2(D24, GPIOE1, NRTS3, RGMII4TXD3);
0302 FUNC_GROUP_DECL(NRTS3, D24);
0303
0304 #define C25 34
0305 SIG_EXPR_LIST_DECL_SESG(C25, NCTS4, NCTS4, SIG_DESC_SET(SCU414, 2));
0306 SIG_EXPR_LIST_DECL_SESG(C25, RGMII4RXCK, RGMII4, SIG_DESC_SET(SCU4B4, 2),
0307               SIG_DESC_SET(SCU510, 1));
0308 SIG_EXPR_LIST_DECL_SESG(C25, RMII4RCLKI, RMII4, SIG_DESC_SET(SCU4B4, 2),
0309               SIG_DESC_CLEAR(SCU510, 1));
0310 PIN_DECL_3(C25, GPIOE2, NCTS4, RGMII4RXCK, RMII4RCLKI);
0311 FUNC_GROUP_DECL(NCTS4, C25);
0312
0313 #define C26 35
0314 SIG_EXPR_LIST_DECL_SESG(C26, NDCD4, NDCD4, SIG_DESC_SET(SCU414, 3));
0315 SIG_EXPR_LIST_DECL_SESG(C26, RGMII4RXCTL, RGMII4, SIG_DESC_SET(SCU4B4, 3),
0316               SIG_DESC_SET(SCU510, 1));
0317 PIN_DECL_2(C26, GPIOE3, NDCD4, RGMII4RXCTL);
0318 FUNC_GROUP_DECL(NDCD4, C26);
0319
0320 #define C24 36
0321 SIG_EXPR_LIST_DECL_SESG(C24, NDSR4, NDSR4, SIG_DESC_SET(SCU414, 4));
0322 SIG_EXPR_LIST_DECL_SESG(C24, RGMII4RXD0, RGMII4, SIG_DESC_SET(SCU4B4, 4),
0323               SIG_DESC_SET(SCU510, 1));
0324 SIG_EXPR_LIST_DECL_SESG(C24, RMII4RXD0, RMII4, SIG_DESC_SET(SCU4B4, 4),
0325               SIG_DESC_CLEAR(SCU510, 1));
0326 PIN_DECL_3(C24, GPIOE4, NDSR4, RGMII4RXD0, RMII4RXD0);
0327 FUNC_GROUP_DECL(NDSR4, C24);
0328
0329 #define B26 37
0330 SIG_EXPR_LIST_DECL_SESG(B26, NRI4, NRI4, SIG_DESC_SET(SCU414, 5));
0331 SIG_EXPR_LIST_DECL_SESG(B26, RGMII4RXD1, RGMII4, SIG_DESC_SET(SCU4B4, 5),
0332               SIG_DESC_SET(SCU510, 1));
0333 SIG_EXPR_LIST_DECL_SESG(B26, RMII4RXD1, RMII4, SIG_DESC_SET(SCU4B4, 5),
0334               SIG_DESC_CLEAR(SCU510, 1));
0335 PIN_DECL_3(B26, GPIOE5, NRI4, RGMII4RXD1, RMII4RXD1);
0336 FUNC_GROUP_DECL(NRI4, B26);
0337
0338 #define B25 38
0339 SIG_EXPR_LIST_DECL_SESG(B25, NDTR4, NDTR4, SIG_DESC_SET(SCU414, 6));
0340 SIG_EXPR_LIST_DECL_SESG(B25, RGMII4RXD2, RGMII4, SIG_DESC_SET(SCU4B4, 6),
0341               SIG_DESC_SET(SCU510, 1));
0342 SIG_EXPR_LIST_DECL_SESG(B25, RMII4CRSDV, RMII4, SIG_DESC_SET(SCU4B4, 6),
0343               SIG_DESC_CLEAR(SCU510, 1));
0344 PIN_DECL_3(B25, GPIOE6, NDTR4, RGMII4RXD2, RMII4CRSDV);
0345 FUNC_GROUP_DECL(NDTR4, B25);
0346
0347 #define B24 39
0348 SIG_EXPR_LIST_DECL_SESG(B24, NRTS4, NRTS4, SIG_DESC_SET(SCU414, 7));
0349 SIG_EXPR_LIST_DECL_SESG(B24, RGMII4RXD3, RGMII4, SIG_DESC_SET(SCU4B4, 7),
0350               SIG_DESC_SET(SCU510, 1));
0351 SIG_EXPR_LIST_DECL_SESG(B24, RMII4RXER, RMII4, SIG_DESC_SET(SCU4B4, 7),
0352               SIG_DESC_CLEAR(SCU510, 1));
0353 PIN_DECL_3(B24, GPIOE7, NRTS4, RGMII4RXD3, RMII4RXER);
0354 FUNC_GROUP_DECL(NRTS4, B24);
0355
0356 FUNC_GROUP_DECL(RGMII4, F24, E23, E24, E25, D26, D24, C25, C26, C24, B26, B25,
0357         B24);
0358 FUNC_GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);
0359
0360 #define D22 40
0361 SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8));
0362 SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU4B4, 8));
0363 PIN_DECL_2(D22, GPIOF0, SD1CLK, PWM8);
0364 GROUP_DECL(PWM8G0, D22);
0365
0366 #define E22 41
0367 SIG_EXPR_LIST_DECL_SESG(E22, SD1CMD, SD1, SIG_DESC_SET(SCU414, 9));
0368 SIG_EXPR_LIST_DECL_SEMG(E22, PWM9, PWM9G0, PWM9, SIG_DESC_SET(SCU4B4, 9));
0369 PIN_DECL_2(E22, GPIOF1, SD1CMD, PWM9);
0370 GROUP_DECL(PWM9G0, E22);
0371
0372 #define D23 42
0373 SIG_EXPR_LIST_DECL_SESG(D23, SD1DAT0, SD1, SIG_DESC_SET(SCU414, 10));
0374 SIG_EXPR_LIST_DECL_SEMG(D23, PWM10, PWM10G0, PWM10, SIG_DESC_SET(SCU4B4, 10));
0375 PIN_DECL_2(D23, GPIOF2, SD1DAT0, PWM10);
0376 GROUP_DECL(PWM10G0, D23);
0377
0378 #define C23 43
0379 SIG_EXPR_LIST_DECL_SESG(C23, SD1DAT1, SD1, SIG_DESC_SET(SCU414, 11));
0380 SIG_EXPR_LIST_DECL_SEMG(C23, PWM11, PWM11G0, PWM11, SIG_DESC_SET(SCU4B4, 11));
0381 PIN_DECL_2(C23, GPIOF3, SD1DAT1, PWM11);
0382 GROUP_DECL(PWM11G0, C23);
0383
0384 #define C22 44
0385 SIG_EXPR_LIST_DECL_SESG(C22, SD1DAT2, SD1, SIG_DESC_SET(SCU414, 12));
0386 SIG_EXPR_LIST_DECL_SEMG(C22, PWM12, PWM12G0, PWM12, SIG_DESC_SET(SCU4B4, 12));
0387 PIN_DECL_2(C22, GPIOF4, SD1DAT2, PWM12);
0388 GROUP_DECL(PWM12G0, C22);
0389
0390 #define A25 45
0391 SIG_EXPR_LIST_DECL_SESG(A25, SD1DAT3, SD1, SIG_DESC_SET(SCU414, 13));
0392 SIG_EXPR_LIST_DECL_SEMG(A25, PWM13, PWM13G0, PWM13, SIG_DESC_SET(SCU4B4, 13));
0393 PIN_DECL_2(A25, GPIOF5, SD1DAT3, PWM13);
0394 GROUP_DECL(PWM13G0, A25);
0395
0396 #define A24 46
0397 SIG_EXPR_LIST_DECL_SESG(A24, SD1CD, SD1, SIG_DESC_SET(SCU414, 14));
0398 SIG_EXPR_LIST_DECL_SEMG(A24, PWM14, PWM14G0, PWM14, SIG_DESC_SET(SCU4B4, 14));
0399 PIN_DECL_2(A24, GPIOF6, SD1CD, PWM14);
0400 GROUP_DECL(PWM14G0, A24);
0401
0402 #define A23 47
0403 SIG_EXPR_LIST_DECL_SESG(A23, SD1WP, SD1, SIG_DESC_SET(SCU414, 15));
0404 SIG_EXPR_LIST_DECL_SEMG(A23, PWM15, PWM15G0, PWM15, SIG_DESC_SET(SCU4B4, 15));
0405 PIN_DECL_2(A23, GPIOF7, SD1WP, PWM15);
0406 GROUP_DECL(PWM15G0, A23);
0407
0408 FUNC_GROUP_DECL(SD1, D22, E22, D23, C23, C22, A25, A24, A23);
0409
0410 #define E21 48
0411 SIG_EXPR_LIST_DECL_SESG(E21, TXD6, UART6, SIG_DESC_SET(SCU414, 16));
0412 SIG_EXPR_LIST_DECL_SESG(E21, SD2CLK, SD2, SIG_DESC_SET(SCU4B4, 16),
0413               SIG_DESC_SET(SCU450, 1));
0414 SIG_EXPR_LIST_DECL_SEMG(E21, SALT9, SALT9G0, SALT9, SIG_DESC_SET(SCU694, 16));
0415 PIN_DECL_3(E21, GPIOG0, TXD6, SD2CLK, SALT9);
0416 GROUP_DECL(SALT9G0, E21);
0417
0418 #define B22 49
0419 SIG_EXPR_LIST_DECL_SESG(B22, RXD6, UART6, SIG_DESC_SET(SCU414, 17));
0420 SIG_EXPR_LIST_DECL_SESG(B22, SD2CMD, SD2, SIG_DESC_SET(SCU4B4, 17),
0421               SIG_DESC_SET(SCU450, 1));
0422 SIG_EXPR_LIST_DECL_SEMG(B22, SALT10, SALT10G0, SALT10,
0423             SIG_DESC_SET(SCU694, 17));
0424 PIN_DECL_3(B22, GPIOG1, RXD6, SD2CMD, SALT10);
0425 GROUP_DECL(SALT10G0, B22);
0426
0427 FUNC_GROUP_DECL(UART6, E21, B22);
0428
0429 #define C21 50
0430 SIG_EXPR_LIST_DECL_SESG(C21, TXD7, UART7, SIG_DESC_SET(SCU414, 18));
0431 SIG_EXPR_LIST_DECL_SESG(C21, SD2DAT0, SD2, SIG_DESC_SET(SCU4B4, 18),
0432               SIG_DESC_SET(SCU450, 1));
0433 SIG_EXPR_LIST_DECL_SEMG(C21, SALT11, SALT11G0, SALT11,
0434             SIG_DESC_SET(SCU694, 18));
0435 PIN_DECL_3(C21, GPIOG2, TXD7, SD2DAT0, SALT11);
0436 GROUP_DECL(SALT11G0, C21);
0437
0438 #define A22 51
0439 SIG_EXPR_LIST_DECL_SESG(A22, RXD7, UART7, SIG_DESC_SET(SCU414, 19));
0440 SIG_EXPR_LIST_DECL_SESG(A22, SD2DAT1, SD2, SIG_DESC_SET(SCU4B4, 19),
0441               SIG_DESC_SET(SCU450, 1));
0442 SIG_EXPR_LIST_DECL_SEMG(A22, SALT12, SALT12G0, SALT12,
0443             SIG_DESC_SET(SCU694, 19));
0444 PIN_DECL_3(A22, GPIOG3, RXD7, SD2DAT1, SALT12);
0445 GROUP_DECL(SALT12G0, A22);
0446
0447 FUNC_GROUP_DECL(UART7, C21, A22);
0448
0449 #define A21 52
0450 SIG_EXPR_LIST_DECL_SESG(A21, TXD8, UART8, SIG_DESC_SET(SCU414, 20));
0451 SIG_EXPR_LIST_DECL_SESG(A21, SD2DAT2, SD2, SIG_DESC_SET(SCU4B4, 20),
0452               SIG_DESC_SET(SCU450, 1));
0453 SIG_EXPR_LIST_DECL_SEMG(A21, SALT13, SALT13G0, SALT13,
0454             SIG_DESC_SET(SCU694, 20));
0455 PIN_DECL_3(A21, GPIOG4, TXD8, SD2DAT2, SALT13);
0456 GROUP_DECL(SALT13G0, A21);
0457
0458 #define E20 53
0459 SIG_EXPR_LIST_DECL_SESG(E20, RXD8, UART8, SIG_DESC_SET(SCU414, 21));
0460 SIG_EXPR_LIST_DECL_SESG(E20, SD2DAT3, SD2, SIG_DESC_SET(SCU4B4, 21),
0461               SIG_DESC_SET(SCU450, 1));
0462 SIG_EXPR_LIST_DECL_SEMG(E20, SALT14, SALT14G0, SALT14,
0463             SIG_DESC_SET(SCU694, 21));
0464 PIN_DECL_3(E20, GPIOG5, RXD8, SD2DAT3, SALT14);
0465 GROUP_DECL(SALT14G0, E20);
0466
0467 FUNC_GROUP_DECL(UART8, A21, E20);
0468
0469 #define D21 54
0470 SIG_EXPR_LIST_DECL_SESG(D21, TXD9, UART9, SIG_DESC_SET(SCU414, 22));
0471 SIG_EXPR_LIST_DECL_SESG(D21, SD2CD, SD2, SIG_DESC_SET(SCU4B4, 22),
0472               SIG_DESC_SET(SCU450, 1));
0473 SIG_EXPR_LIST_DECL_SEMG(D21, SALT15, SALT15G0, SALT15,
0474             SIG_DESC_SET(SCU694, 22));
0475 PIN_DECL_3(D21, GPIOG6, TXD9, SD2CD, SALT15);
0476 GROUP_DECL(SALT15G0, D21);
0477
0478 #define B21 55
0479 SIG_EXPR_LIST_DECL_SESG(B21, RXD9, UART9, SIG_DESC_SET(SCU414, 23));
0480 SIG_EXPR_LIST_DECL_SESG(B21, SD2WP, SD2, SIG_DESC_SET(SCU4B4, 23),
0481             SIG_DESC_SET(SCU450, 1));
0482 SIG_EXPR_LIST_DECL_SEMG(B21, SALT16, SALT16G0, SALT16,
0483             SIG_DESC_SET(SCU694, 23));
0484 PIN_DECL_3(B21, GPIOG7, RXD9, SD2WP, SALT16);
0485 GROUP_DECL(SALT16G0, B21);
0486
0487 FUNC_GROUP_DECL(UART9, D21, B21);
0488
0489 FUNC_GROUP_DECL(SD2, E21, B22, C21, A22, A21, E20, D21, B21);
0490
0491 #define A18 56
0492 SIG_EXPR_LIST_DECL_SESG(A18, SGPM1CLK, SGPM1, SIG_DESC_SET(SCU414, 24));
0493 PIN_DECL_1(A18, GPIOH0, SGPM1CLK);
0494
0495 #define B18 57
0496 SIG_EXPR_LIST_DECL_SESG(B18, SGPM1LD, SGPM1, SIG_DESC_SET(SCU414, 25));
0497 PIN_DECL_1(B18, GPIOH1, SGPM1LD);
0498
0499 #define C18 58
0500 SIG_EXPR_LIST_DECL_SESG(C18, SGPM1O, SGPM1, SIG_DESC_SET(SCU414, 26));
0501 PIN_DECL_1(C18, GPIOH2, SGPM1O);
0502
0503 #define A17 59
0504 SIG_EXPR_LIST_DECL_SESG(A17, SGPM1I, SGPM1, SIG_DESC_SET(SCU414, 27));
0505 PIN_DECL_1(A17, GPIOH3, SGPM1I);
0506
0507 FUNC_GROUP_DECL(SGPM1, A18, B18, C18, A17);
0508
0509 #define D18 60
0510 SIG_EXPR_LIST_DECL_SESG(D18, SGPS1CK, SGPS1, SIG_DESC_SET(SCU414, 28));
0511 SIG_EXPR_LIST_DECL_SESG(D18, SCL15, I2C15, SIG_DESC_SET(SCU4B4, 28));
0512 PIN_DECL_2(D18, GPIOH4, SGPS1CK, SCL15);
0513
0514 #define B17 61
0515 SIG_EXPR_LIST_DECL_SESG(B17, SGPS1LD, SGPS1, SIG_DESC_SET(SCU414, 29));
0516 SIG_EXPR_LIST_DECL_SESG(B17, SDA15, I2C15, SIG_DESC_SET(SCU4B4, 29));
0517 PIN_DECL_2(B17, GPIOH5, SGPS1LD, SDA15);
0518
0519 FUNC_GROUP_DECL(I2C15, D18, B17);
0520
0521 #define C17 62
0522 SIG_EXPR_LIST_DECL_SESG(C17, SGPS1O, SGPS1, SIG_DESC_SET(SCU414, 30));
0523 SIG_EXPR_LIST_DECL_SESG(C17, SCL16, I2C16, SIG_DESC_SET(SCU4B4, 30));
0524 PIN_DECL_2(C17, GPIOH6, SGPS1O, SCL16);
0525
0526 #define E18 63
0527 SIG_EXPR_LIST_DECL_SESG(E18, SGPS1I, SGPS1, SIG_DESC_SET(SCU414, 31));
0528 SIG_EXPR_LIST_DECL_SESG(E18, SDA16, I2C16, SIG_DESC_SET(SCU4B4, 31));
0529 PIN_DECL_2(E18, GPIOH7, SGPS1I, SDA16);
0530
0531 FUNC_GROUP_DECL(I2C16, C17, E18);
0532 FUNC_GROUP_DECL(SGPS1, D18, B17, C17, E18);
0533
0534 #define D17 64
0535 SIG_EXPR_LIST_DECL_SESG(D17, MTRSTN, JTAGM, SIG_DESC_SET(SCU418, 0));
0536 SIG_EXPR_LIST_DECL_SEMG(D17, TXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 0));
0537 PIN_DECL_2(D17, GPIOI0, MTRSTN, TXD12);
0538
0539 #define A16 65
0540 SIG_EXPR_LIST_DECL_SESG(A16, MTDI, JTAGM, SIG_DESC_SET(SCU418, 1));
0541 SIG_EXPR_LIST_DECL_SEMG(A16, RXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 1));
0542 PIN_DECL_2(A16, GPIOI1, MTDI, RXD12);
0543
0544 GROUP_DECL(UART12G0, D17, A16);
0545
0546 #define E17 66
0547 SIG_EXPR_LIST_DECL_SESG(E17, MTCK, JTAGM, SIG_DESC_SET(SCU418, 2));
0548 SIG_EXPR_LIST_DECL_SEMG(E17, TXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 2));
0549 PIN_DECL_2(E17, GPIOI2, MTCK, TXD13);
0550
0551 #define D16 67
0552 SIG_EXPR_LIST_DECL_SESG(D16, MTMS, JTAGM, SIG_DESC_SET(SCU418, 3));
0553 SIG_EXPR_LIST_DECL_SEMG(D16, RXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 3));
0554 PIN_DECL_2(D16, GPIOI3, MTMS, RXD13);
0555
0556 GROUP_DECL(UART13G0, E17, D16);
0557
0558 #define C16 68
0559 SIG_EXPR_LIST_DECL_SESG(C16, MTDO, JTAGM, SIG_DESC_SET(SCU418, 4));
0560 PIN_DECL_1(C16, GPIOI4, MTDO);
0561
0562 FUNC_GROUP_DECL(JTAGM, D17, A16, E17, D16, C16);
0563
0564 #define E16 69
0565 SIG_EXPR_LIST_DECL_SESG(E16, SIOPBO, SIOPBO, SIG_DESC_SET(SCU418, 5));
0566 PIN_DECL_1(E16, GPIOI5, SIOPBO);
0567 FUNC_GROUP_DECL(SIOPBO, E16);
0568
0569 #define B16 70
0570 SIG_EXPR_LIST_DECL_SESG(B16, SIOPBI, SIOPBI, SIG_DESC_SET(SCU418, 6));
0571 PIN_DECL_1(B16, GPIOI6, SIOPBI);
0572 FUNC_GROUP_DECL(SIOPBI, B16);
0573
0574 #define A15 71
0575 SIG_EXPR_LIST_DECL_SESG(A15, BMCINT, BMCINT, SIG_DESC_SET(SCU418, 7));
0576 SIG_EXPR_LIST_DECL_SESG(A15, SIOSCI, SIOSCI, SIG_DESC_SET(SCU4B8, 7));
0577 PIN_DECL_2(A15, GPIOI7, BMCINT, SIOSCI);
0578 FUNC_GROUP_DECL(BMCINT, A15);
0579 FUNC_GROUP_DECL(SIOSCI, A15);
0580
0581 #define B20 72
0582 SIG_EXPR_LIST_DECL_SEMG(B20, I3C3SCL, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 8));
0583 SIG_EXPR_LIST_DECL_SESG(B20, SCL1, I2C1, SIG_DESC_SET(SCU4B8, 8));
0584 PIN_DECL_2(B20, GPIOJ0, I3C3SCL, SCL1);
0585
0586 #define A20 73
0587 SIG_EXPR_LIST_DECL_SEMG(A20, I3C3SDA, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 9));
0588 SIG_EXPR_LIST_DECL_SESG(A20, SDA1, I2C1, SIG_DESC_SET(SCU4B8, 9));
0589 PIN_DECL_2(A20, GPIOJ1, I3C3SDA, SDA1);
0590
0591 GROUP_DECL(HVI3C3, B20, A20);
0592 FUNC_GROUP_DECL(I2C1, B20, A20);
0593
0594 #define E19 74
0595 SIG_EXPR_LIST_DECL_SEMG(E19, I3C4SCL, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 10));
0596 SIG_EXPR_LIST_DECL_SESG(E19, SCL2, I2C2, SIG_DESC_SET(SCU4B8, 10));
0597 PIN_DECL_2(E19, GPIOJ2, I3C4SCL, SCL2);
0598
0599 #define D20 75
0600 SIG_EXPR_LIST_DECL_SEMG(D20, I3C4SDA, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 11));
0601 SIG_EXPR_LIST_DECL_SESG(D20, SDA2, I2C2, SIG_DESC_SET(SCU4B8, 11));
0602 PIN_DECL_2(D20, GPIOJ3, I3C4SDA, SDA2);
0603
0604 GROUP_DECL(HVI3C4, E19, D20);
0605 FUNC_GROUP_DECL(I2C2, E19, D20);
0606
0607 #define C19 76
0608 SIG_EXPR_LIST_DECL_SESG(C19, I3C5SCL, I3C5, SIG_DESC_SET(SCU418, 12));
0609 SIG_EXPR_LIST_DECL_SESG(C19, SCL3, I2C3, SIG_DESC_SET(SCU4B8, 12));
0610 PIN_DECL_2(C19, GPIOJ4, I3C5SCL, SCL3);
0611
0612 #define A19 77
0613 SIG_EXPR_LIST_DECL_SESG(A19, I3C5SDA, I3C5, SIG_DESC_SET(SCU418, 13));
0614 SIG_EXPR_LIST_DECL_SESG(A19, SDA3, I2C3, SIG_DESC_SET(SCU4B8, 13));
0615 PIN_DECL_2(A19, GPIOJ5, I3C5SDA, SDA3);
0616
0617 FUNC_GROUP_DECL(I3C5, C19, A19);
0618 FUNC_GROUP_DECL(I2C3, C19, A19);
0619
0620 #define C20 78
0621 SIG_EXPR_LIST_DECL_SESG(C20, I3C6SCL, I3C6, SIG_DESC_SET(SCU418, 14));
0622 SIG_EXPR_LIST_DECL_SESG(C20, SCL4, I2C4, SIG_DESC_SET(SCU4B8, 14));
0623 PIN_DECL_2(C20, GPIOJ6, I3C6SCL, SCL4);
0624
0625 #define D19 79
0626 SIG_EXPR_LIST_DECL_SESG(D19, I3C6SDA, I3C6, SIG_DESC_SET(SCU418, 15));
0627 SIG_EXPR_LIST_DECL_SESG(D19, SDA4, I2C4, SIG_DESC_SET(SCU4B8, 15));
0628 PIN_DECL_2(D19, GPIOJ7, I3C6SDA, SDA4);
0629
0630 FUNC_GROUP_DECL(I3C6, C20, D19);
0631 FUNC_GROUP_DECL(I2C4, C20, D19);
0632
0633 #define A11 80
0634 SIG_EXPR_LIST_DECL_SESG(A11, SCL5, I2C5, SIG_DESC_SET(SCU418, 16));
0635 PIN_DECL_1(A11, GPIOK0, SCL5);
0636
0637 #define C11 81
0638 SIG_EXPR_LIST_DECL_SESG(C11, SDA5, I2C5, SIG_DESC_SET(SCU418, 17));
0639 PIN_DECL_1(C11, GPIOK1, SDA5);
0640
0641 FUNC_GROUP_DECL(I2C5, A11, C11);
0642
0643 #define D12 82
0644 SIG_EXPR_LIST_DECL_SESG(D12, SCL6, I2C6, SIG_DESC_SET(SCU418, 18));
0645 PIN_DECL_1(D12, GPIOK2, SCL6);
0646
0647 #define E13 83
0648 SIG_EXPR_LIST_DECL_SESG(E13, SDA6, I2C6, SIG_DESC_SET(SCU418, 19));
0649 PIN_DECL_1(E13, GPIOK3, SDA6);
0650
0651 FUNC_GROUP_DECL(I2C6, D12, E13);
0652
0653 #define D11 84
0654 SIG_EXPR_LIST_DECL_SESG(D11, SCL7, I2C7, SIG_DESC_SET(SCU418, 20));
0655 PIN_DECL_1(D11, GPIOK4, SCL7);
0656
0657 #define E11 85
0658 SIG_EXPR_LIST_DECL_SESG(E11, SDA7, I2C7, SIG_DESC_SET(SCU418, 21));
0659 PIN_DECL_1(E11, GPIOK5, SDA7);
0660
0661 FUNC_GROUP_DECL(I2C7, D11, E11);
0662
0663 #define F13 86
0664 SIG_EXPR_LIST_DECL_SESG(F13, SCL8, I2C8, SIG_DESC_SET(SCU418, 22));
0665 PIN_DECL_1(F13, GPIOK6, SCL8);
0666
0667 #define E12 87
0668 SIG_EXPR_LIST_DECL_SESG(E12, SDA8, I2C8, SIG_DESC_SET(SCU418, 23));
0669 PIN_DECL_1(E12, GPIOK7, SDA8);
0670
0671 FUNC_GROUP_DECL(I2C8, F13, E12);
0672
0673 #define D15 88
0674 SIG_EXPR_LIST_DECL_SESG(D15, SCL9, I2C9, SIG_DESC_SET(SCU418, 24));
0675 PIN_DECL_1(D15, GPIOL0, SCL9);
0676
0677 #define A14 89
0678 SIG_EXPR_LIST_DECL_SESG(A14, SDA9, I2C9, SIG_DESC_SET(SCU418, 25));
0679 PIN_DECL_1(A14, GPIOL1, SDA9);
0680
0681 FUNC_GROUP_DECL(I2C9, D15, A14);
0682
0683 #define E15 90
0684 SIG_EXPR_LIST_DECL_SESG(E15, SCL10, I2C10, SIG_DESC_SET(SCU418, 26));
0685 PIN_DECL_1(E15, GPIOL2, SCL10);
0686
0687 #define A13 91
0688 SIG_EXPR_LIST_DECL_SESG(A13, SDA10, I2C10, SIG_DESC_SET(SCU418, 27));
0689 PIN_DECL_1(A13, GPIOL3, SDA10);
0690
0691 FUNC_GROUP_DECL(I2C10, E15, A13);
0692
0693 #define C15 92
0694 SSSF_PIN_DECL(C15, GPIOL4, TXD3, SIG_DESC_SET(SCU418, 28));
0695
0696 #define F15 93
0697 SSSF_PIN_DECL(F15, GPIOL5, RXD3, SIG_DESC_SET(SCU418, 29));
0698
0699 #define B14 94
0700 SSSF_PIN_DECL(B14, GPIOL6, VGAHS, SIG_DESC_SET(SCU418, 30));
0701
0702 #define C14 95
0703 SSSF_PIN_DECL(C14, GPIOL7, VGAVS, SIG_DESC_SET(SCU418, 31));
0704
0705 #define D14 96
0706 SSSF_PIN_DECL(D14, GPIOM0, NCTS1, SIG_DESC_SET(SCU41C, 0));
0707
0708 #define B13 97
0709 SSSF_PIN_DECL(B13, GPIOM1, NDCD1, SIG_DESC_SET(SCU41C, 1));
0710
0711 #define A12 98
0712 SSSF_PIN_DECL(A12, GPIOM2, NDSR1, SIG_DESC_SET(SCU41C, 2));
0713
0714 #define E14 99
0715 SSSF_PIN_DECL(E14, GPIOM3, NRI1, SIG_DESC_SET(SCU41C, 3));
0716
0717 #define B12 100
0718 SSSF_PIN_DECL(B12, GPIOM4, NDTR1, SIG_DESC_SET(SCU41C, 4));
0719
0720 #define C12 101
0721 SSSF_PIN_DECL(C12, GPIOM5, NRTS1, SIG_DESC_SET(SCU41C, 5));
0722
0723 #define C13 102
0724 SSSF_PIN_DECL(C13, GPIOM6, TXD1, SIG_DESC_SET(SCU41C, 6));
0725
0726 #define D13 103
0727 SSSF_PIN_DECL(D13, GPIOM7, RXD1, SIG_DESC_SET(SCU41C, 7));
0728
0729 #define P25 104
0730 SSSF_PIN_DECL(P25, GPION0, NCTS2, SIG_DESC_SET(SCU41C, 8));
0731
0732 #define N23 105
0733 SSSF_PIN_DECL(N23, GPION1, NDCD2, SIG_DESC_SET(SCU41C, 9));
0734
0735 #define N25 106
0736 SSSF_PIN_DECL(N25, GPION2, NDSR2, SIG_DESC_SET(SCU41C, 10));
0737
0738 #define N24 107
0739 SSSF_PIN_DECL(N24, GPION3, NRI2, SIG_DESC_SET(SCU41C, 11));
0740
0741 #define P26 108
0742 SSSF_PIN_DECL(P26, GPION4, NDTR2, SIG_DESC_SET(SCU41C, 12));
0743
0744 #define M23 109
0745 SSSF_PIN_DECL(M23, GPION5, NRTS2, SIG_DESC_SET(SCU41C, 13));
0746
0747 #define N26 110
0748 SSSF_PIN_DECL(N26, GPION6, TXD2, SIG_DESC_SET(SCU41C, 14));
0749
0750 #define M26 111
0751 SSSF_PIN_DECL(M26, GPION7, RXD2, SIG_DESC_SET(SCU41C, 15));
0752
0753 #define AD26 112
0754 SSSF_PIN_DECL(AD26, GPIOO0, PWM0, SIG_DESC_SET(SCU41C, 16));
0755
0756 #define AD22 113
0757 SSSF_PIN_DECL(AD22, GPIOO1, PWM1, SIG_DESC_SET(SCU41C, 17));
0758
0759 #define AD23 114
0760 SSSF_PIN_DECL(AD23, GPIOO2, PWM2, SIG_DESC_SET(SCU41C, 18));
0761
0762 #define AD24 115
0763 SSSF_PIN_DECL(AD24, GPIOO3, PWM3, SIG_DESC_SET(SCU41C, 19));
0764
0765 #define AD25 116
0766 SSSF_PIN_DECL(AD25, GPIOO4, PWM4, SIG_DESC_SET(SCU41C, 20));
0767
0768 #define AC22 117
0769 SSSF_PIN_DECL(AC22, GPIOO5, PWM5, SIG_DESC_SET(SCU41C, 21));
0770
0771 #define AC24 118
0772 SSSF_PIN_DECL(AC24, GPIOO6, PWM6, SIG_DESC_SET(SCU41C, 22));
0773
0774 #define AC23 119
0775 SSSF_PIN_DECL(AC23, GPIOO7, PWM7, SIG_DESC_SET(SCU41C, 23));
0776
0777 #define AB22 120
0778 SIG_EXPR_LIST_DECL_SEMG(AB22, PWM8, PWM8G1, PWM8, SIG_DESC_SET(SCU41C, 24));
0779 SIG_EXPR_LIST_DECL_SESG(AB22, THRUIN0, THRU0, SIG_DESC_SET(SCU4BC, 24));
0780 PIN_DECL_2(AB22, GPIOP0, PWM8, THRUIN0);
0781 GROUP_DECL(PWM8G1, AB22);
0782 FUNC_DECL_2(PWM8, PWM8G0, PWM8G1);
0783
0784 #define W24 121
0785 SIG_EXPR_LIST_DECL_SEMG(W24, PWM9, PWM9G1, PWM9, SIG_DESC_SET(SCU41C, 25));
0786 SIG_EXPR_LIST_DECL_SESG(W24, THRUOUT0, THRU0, SIG_DESC_SET(SCU4BC, 25));
0787 PIN_DECL_2(W24, GPIOP1, PWM9, THRUOUT0);
0788
0789 FUNC_GROUP_DECL(THRU0, AB22, W24);
0790
0791 GROUP_DECL(PWM9G1, W24);
0792 FUNC_DECL_2(PWM9, PWM9G0, PWM9G1);
0793
0794 #define AA23 122
0795 SIG_EXPR_LIST_DECL_SEMG(AA23, PWM10, PWM10G1, PWM10, SIG_DESC_SET(SCU41C, 26));
0796 SIG_EXPR_LIST_DECL_SESG(AA23, THRUIN1, THRU1, SIG_DESC_SET(SCU4BC, 26));
0797 PIN_DECL_2(AA23, GPIOP2, PWM10, THRUIN1);
0798 GROUP_DECL(PWM10G1, AA23);
0799 FUNC_DECL_2(PWM10, PWM10G0, PWM10G1);
0800
0801 #define AA24 123
0802 SIG_EXPR_LIST_DECL_SEMG(AA24, PWM11, PWM11G1, PWM11, SIG_DESC_SET(SCU41C, 27));
0803 SIG_EXPR_LIST_DECL_SESG(AA24, THRUOUT1, THRU1, SIG_DESC_SET(SCU4BC, 27));
0804 PIN_DECL_2(AA24, GPIOP3, PWM11, THRUOUT1);
0805 GROUP_DECL(PWM11G1, AA24);
0806 FUNC_DECL_2(PWM11, PWM11G0, PWM11G1);
0807
0808 FUNC_GROUP_DECL(THRU1, AA23, AA24);
0809
0810 #define W23 124
0811 SIG_EXPR_LIST_DECL_SEMG(W23, PWM12, PWM12G1, PWM12, SIG_DESC_SET(SCU41C, 28));
0812 SIG_EXPR_LIST_DECL_SESG(W23, THRUIN2, THRU2, SIG_DESC_SET(SCU4BC, 28));
0813 PIN_DECL_2(W23, GPIOP4, PWM12, THRUIN2);
0814 GROUP_DECL(PWM12G1, W23);
0815 FUNC_DECL_2(PWM12, PWM12G0, PWM12G1);
0816
0817 #define AB23 125
0818 SIG_EXPR_LIST_DECL_SEMG(AB23, PWM13, PWM13G1, PWM13, SIG_DESC_SET(SCU41C, 29));
0819 SIG_EXPR_LIST_DECL_SESG(AB23, THRUOUT2, THRU2, SIG_DESC_SET(SCU4BC, 29));
0820 PIN_DECL_2(AB23, GPIOP5, PWM13, THRUOUT2);
0821 GROUP_DECL(PWM13G1, AB23);
0822 FUNC_DECL_2(PWM13, PWM13G0, PWM13G1);
0823
0824 FUNC_GROUP_DECL(THRU2, W23, AB23);
0825
0826 #define AB24 126
0827 SIG_EXPR_LIST_DECL_SEMG(AB24, PWM14, PWM14G1, PWM14, SIG_DESC_SET(SCU41C, 30));
0828 SIG_EXPR_LIST_DECL_SESG(AB24, THRUIN3, THRU3, SIG_DESC_SET(SCU4BC, 30));
0829 PIN_DECL_2(AB24, GPIOP6, PWM14, THRUIN3);
0830 GROUP_DECL(PWM14G1, AB24);
0831 FUNC_DECL_2(PWM14, PWM14G0, PWM14G1);
0832
0833 #define Y23 127
0834 SIG_EXPR_LIST_DECL_SEMG(Y23, PWM15, PWM15G1, PWM15, SIG_DESC_SET(SCU41C, 31));
0835 SIG_EXPR_LIST_DECL_SESG(Y23, THRUOUT3, THRU3, SIG_DESC_SET(SCU4BC, 31));
0836 SIG_EXPR_LIST_DECL_SESG(Y23, HEARTBEAT, HEARTBEAT, SIG_DESC_SET(SCU69C, 31));
0837 PIN_DECL_3(Y23, GPIOP7, PWM15, THRUOUT3, HEARTBEAT);
0838 GROUP_DECL(PWM15G1, Y23);
0839 FUNC_DECL_2(PWM15, PWM15G0, PWM15G1);
0840
0841 FUNC_GROUP_DECL(THRU3, AB24, Y23);
0842 FUNC_GROUP_DECL(HEARTBEAT, Y23);
0843
0844 #define AA25 128
0845 SSSF_PIN_DECL(AA25, GPIOQ0, TACH0, SIG_DESC_SET(SCU430, 0));
0846
0847 #define AB25 129
0848 SSSF_PIN_DECL(AB25, GPIOQ1, TACH1, SIG_DESC_SET(SCU430, 1));
0849
0850 #define Y24 130
0851 SSSF_PIN_DECL(Y24, GPIOQ2, TACH2, SIG_DESC_SET(SCU430, 2));
0852
0853 #define AB26 131
0854 SSSF_PIN_DECL(AB26, GPIOQ3, TACH3, SIG_DESC_SET(SCU430, 3));
0855
0856 #define Y26 132
0857 SSSF_PIN_DECL(Y26, GPIOQ4, TACH4, SIG_DESC_SET(SCU430, 4));
0858
0859 #define AC26 133
0860 SSSF_PIN_DECL(AC26, GPIOQ5, TACH5, SIG_DESC_SET(SCU430, 5));
0861
0862 #define Y25 134
0863 SSSF_PIN_DECL(Y25, GPIOQ6, TACH6, SIG_DESC_SET(SCU430, 6));
0864
0865 #define AA26 135
0866 SSSF_PIN_DECL(AA26, GPIOQ7, TACH7, SIG_DESC_SET(SCU430, 7));
0867
0868 #define V25 136
0869 SSSF_PIN_DECL(V25, GPIOR0, TACH8, SIG_DESC_SET(SCU430, 8));
0870
0871 #define U24 137
0872 SSSF_PIN_DECL(U24, GPIOR1, TACH9, SIG_DESC_SET(SCU430, 9));
0873
0874 #define V24 138
0875 SSSF_PIN_DECL(V24, GPIOR2, TACH10, SIG_DESC_SET(SCU430, 10));
0876
0877 #define V26 139
0878 SSSF_PIN_DECL(V26, GPIOR3, TACH11, SIG_DESC_SET(SCU430, 11));
0879
0880 #define U25 140
0881 SSSF_PIN_DECL(U25, GPIOR4, TACH12, SIG_DESC_SET(SCU430, 12));
0882
0883 #define T23 141
0884 SSSF_PIN_DECL(T23, GPIOR5, TACH13, SIG_DESC_SET(SCU430, 13));
0885
0886 #define W26 142
0887 SSSF_PIN_DECL(W26, GPIOR6, TACH14, SIG_DESC_SET(SCU430, 14));
0888
0889 #define U26 143
0890 SSSF_PIN_DECL(U26, GPIOR7, TACH15, SIG_DESC_SET(SCU430, 15));
0891
0892 #define R23 144
0893 SIG_EXPR_LIST_DECL_SESG(R23, MDC1, MDIO1, SIG_DESC_SET(SCU430, 16));
0894 PIN_DECL_1(R23, GPIOS0, MDC1);
0895
0896 #define T25 145
0897 SIG_EXPR_LIST_DECL_SESG(T25, MDIO1, MDIO1, SIG_DESC_SET(SCU430, 17));
0898 PIN_DECL_1(T25, GPIOS1, MDIO1);
0899
0900 FUNC_GROUP_DECL(MDIO1, R23, T25);
0901
0902 #define T26 146
0903 SSSF_PIN_DECL(T26, GPIOS2, PEWAKE, SIG_DESC_SET(SCU430, 18));
0904
0905 #define R24 147
0906 SSSF_PIN_DECL(R24, GPIOS3, OSCCLK, SIG_DESC_SET(SCU430, 19));
0907
0908 #define R26 148
0909 SIG_EXPR_LIST_DECL_SESG(R26, TXD10, UART10, SIG_DESC_SET(SCU430, 20));
0910 PIN_DECL_1(R26, GPIOS4, TXD10);
0911
0912 #define P24 149
0913 SIG_EXPR_LIST_DECL_SESG(P24, RXD10, UART10, SIG_DESC_SET(SCU430, 21));
0914 PIN_DECL_1(P24, GPIOS5, RXD10);
0915
0916 FUNC_GROUP_DECL(UART10, R26, P24);
0917
0918 #define P23 150
0919 SIG_EXPR_LIST_DECL_SESG(P23, TXD11, UART11, SIG_DESC_SET(SCU430, 22));
0920 PIN_DECL_1(P23, GPIOS6, TXD11);
0921
0922 #define T24 151
0923 SIG_EXPR_LIST_DECL_SESG(T24, RXD11, UART11, SIG_DESC_SET(SCU430, 23));
0924 PIN_DECL_1(T24, GPIOS7, RXD11);
0925
0926 FUNC_GROUP_DECL(UART11, P23, T24);
0927
0928 #define AD20 152
0929 SIG_EXPR_LIST_DECL_SESG(AD20, GPIT0, GPIT0, SIG_DESC_SET(SCU430, 24));
0930 SIG_EXPR_LIST_DECL_SESG(AD20, ADC0, ADC0);
0931 PIN_DECL_(AD20, SIG_EXPR_LIST_PTR(AD20, GPIT0), SIG_EXPR_LIST_PTR(AD20, ADC0));
0932 FUNC_GROUP_DECL(GPIT0, AD20);
0933 FUNC_GROUP_DECL(ADC0, AD20);
0934
0935 #define AC18 153
0936 SIG_EXPR_LIST_DECL_SESG(AC18, GPIT1, GPIT1, SIG_DESC_SET(SCU430, 25));
0937 SIG_EXPR_LIST_DECL_SESG(AC18, ADC1, ADC1);
0938 PIN_DECL_(AC18, SIG_EXPR_LIST_PTR(AC18, GPIT1), SIG_EXPR_LIST_PTR(AC18, ADC1));
0939 FUNC_GROUP_DECL(GPIT1, AC18);
0940 FUNC_GROUP_DECL(ADC1, AC18);
0941
0942 #define AE19 154
0943 SIG_EXPR_LIST_DECL_SESG(AE19, GPIT2, GPIT2, SIG_DESC_SET(SCU430, 26));
0944 SIG_EXPR_LIST_DECL_SESG(AE19, ADC2, ADC2);
0945 PIN_DECL_(AE19, SIG_EXPR_LIST_PTR(AE19, GPIT2), SIG_EXPR_LIST_PTR(AE19, ADC2));
0946 FUNC_GROUP_DECL(GPIT2, AE19);
0947 FUNC_GROUP_DECL(ADC2, AE19);
0948
0949 #define AD19 155
0950 SIG_EXPR_LIST_DECL_SESG(AD19, GPIT3, GPIT3, SIG_DESC_SET(SCU430, 27));
0951 SIG_EXPR_LIST_DECL_SESG(AD19, ADC3, ADC3);
0952 PIN_DECL_(AD19, SIG_EXPR_LIST_PTR(AD19, GPIT3), SIG_EXPR_LIST_PTR(AD19, ADC3));
0953 FUNC_GROUP_DECL(GPIT3, AD19);
0954 FUNC_GROUP_DECL(ADC3, AD19);
0955
0956 #define AC19 156
0957 SIG_EXPR_LIST_DECL_SESG(AC19, GPIT4, GPIT4, SIG_DESC_SET(SCU430, 28));
0958 SIG_EXPR_LIST_DECL_SESG(AC19, ADC4, ADC4);
0959 PIN_DECL_(AC19, SIG_EXPR_LIST_PTR(AC19, GPIT4), SIG_EXPR_LIST_PTR(AC19, ADC4));
0960 FUNC_GROUP_DECL(GPIT4, AC19);
0961 FUNC_GROUP_DECL(ADC4, AC19);
0962
0963 #define AB19 157
0964 SIG_EXPR_LIST_DECL_SESG(AB19, GPIT5, GPIT5, SIG_DESC_SET(SCU430, 29));
0965 SIG_EXPR_LIST_DECL_SESG(AB19, ADC5, ADC5);
0966 PIN_DECL_(AB19, SIG_EXPR_LIST_PTR(AB19, GPIT5), SIG_EXPR_LIST_PTR(AB19, ADC5));
0967 FUNC_GROUP_DECL(GPIT5, AB19);
0968 FUNC_GROUP_DECL(ADC5, AB19);
0969
0970 #define AB18 158
0971 SIG_EXPR_LIST_DECL_SESG(AB18, GPIT6, GPIT6, SIG_DESC_SET(SCU430, 30));
0972 SIG_EXPR_LIST_DECL_SESG(AB18, ADC6, ADC6);
0973 PIN_DECL_(AB18, SIG_EXPR_LIST_PTR(AB18, GPIT6), SIG_EXPR_LIST_PTR(AB18, ADC6));
0974 FUNC_GROUP_DECL(GPIT6, AB18);
0975 FUNC_GROUP_DECL(ADC6, AB18);
0976
0977 #define AE18 159
0978 SIG_EXPR_LIST_DECL_SESG(AE18, GPIT7, GPIT7, SIG_DESC_SET(SCU430, 31));
0979 SIG_EXPR_LIST_DECL_SESG(AE18, ADC7, ADC7);
0980 PIN_DECL_(AE18, SIG_EXPR_LIST_PTR(AE18, GPIT7), SIG_EXPR_LIST_PTR(AE18, ADC7));
0981 FUNC_GROUP_DECL(GPIT7, AE18);
0982 FUNC_GROUP_DECL(ADC7, AE18);
0983
0984 #define AB16 160
0985 SIG_EXPR_LIST_DECL_SEMG(AB16, SALT9, SALT9G1, SALT9, SIG_DESC_SET(SCU434, 0),
0986             SIG_DESC_CLEAR(SCU694, 16));
0987 SIG_EXPR_LIST_DECL_SESG(AB16, GPIU0, GPIU0, SIG_DESC_SET(SCU434, 0),
0988             SIG_DESC_SET(SCU694, 16));
0989 SIG_EXPR_LIST_DECL_SESG(AB16, ADC8, ADC8);
0990 PIN_DECL_(AB16, SIG_EXPR_LIST_PTR(AB16, SALT9), SIG_EXPR_LIST_PTR(AB16, GPIU0),
0991       SIG_EXPR_LIST_PTR(AB16, ADC8));
0992 GROUP_DECL(SALT9G1, AB16);
0993 FUNC_DECL_2(SALT9, SALT9G0, SALT9G1);
0994 FUNC_GROUP_DECL(GPIU0, AB16);
0995 FUNC_GROUP_DECL(ADC8, AB16);
0996
0997 #define AA17 161
0998 SIG_EXPR_LIST_DECL_SEMG(AA17, SALT10, SALT10G1, SALT10, SIG_DESC_SET(SCU434, 1),
0999             SIG_DESC_CLEAR(SCU694, 17));
1000 SIG_EXPR_LIST_DECL_SESG(AA17, GPIU1, GPIU1, SIG_DESC_SET(SCU434, 1),
1001             SIG_DESC_SET(SCU694, 17));
1002 SIG_EXPR_LIST_DECL_SESG(AA17, ADC9, ADC9);
1003 PIN_DECL_(AA17, SIG_EXPR_LIST_PTR(AA17, SALT10), SIG_EXPR_LIST_PTR(AA17, GPIU1),
1004       SIG_EXPR_LIST_PTR(AA17, ADC9));
1005 GROUP_DECL(SALT10G1, AA17);
1006 FUNC_DECL_2(SALT10, SALT10G0, SALT10G1);
1007 FUNC_GROUP_DECL(GPIU1, AA17);
1008 FUNC_GROUP_DECL(ADC9, AA17);
1009
1010 #define AB17 162
1011 SIG_EXPR_LIST_DECL_SEMG(AB17, SALT11, SALT11G1, SALT11, SIG_DESC_SET(SCU434, 2),
1012             SIG_DESC_CLEAR(SCU694, 18));
1013 SIG_EXPR_LIST_DECL_SESG(AB17, GPIU2, GPIU2, SIG_DESC_SET(SCU434, 2),
1014             SIG_DESC_SET(SCU694, 18));
1015 SIG_EXPR_LIST_DECL_SESG(AB17, ADC10, ADC10);
1016 PIN_DECL_(AB17, SIG_EXPR_LIST_PTR(AB17, SALT11), SIG_EXPR_LIST_PTR(AB17, GPIU2),
1017       SIG_EXPR_LIST_PTR(AB17, ADC10));
1018 GROUP_DECL(SALT11G1, AB17);
1019 FUNC_DECL_2(SALT11, SALT11G0, SALT11G1);
1020 FUNC_GROUP_DECL(GPIU2, AB17);
1021 FUNC_GROUP_DECL(ADC10, AB17);
1022
1023 #define AE16 163
1024 SIG_EXPR_LIST_DECL_SEMG(AE16, SALT12, SALT12G1, SALT12, SIG_DESC_SET(SCU434, 3),
1025             SIG_DESC_CLEAR(SCU694, 19));
1026 SIG_EXPR_LIST_DECL_SESG(AE16, GPIU3, GPIU3, SIG_DESC_SET(SCU434, 3),
1027             SIG_DESC_SET(SCU694, 19));
1028 SIG_EXPR_LIST_DECL_SESG(AE16, ADC11, ADC11);
1029 PIN_DECL_(AE16, SIG_EXPR_LIST_PTR(AE16, SALT12), SIG_EXPR_LIST_PTR(AE16, GPIU3),
1030       SIG_EXPR_LIST_PTR(AE16, ADC11));
1031 GROUP_DECL(SALT12G1, AE16);
1032 FUNC_DECL_2(SALT12, SALT12G0, SALT12G1);
1033 FUNC_GROUP_DECL(GPIU3, AE16);
1034 FUNC_GROUP_DECL(ADC11, AE16);
1035
1036 #define AC16 164
1037 SIG_EXPR_LIST_DECL_SEMG(AC16, SALT13, SALT13G1, SALT13, SIG_DESC_SET(SCU434, 4),
1038             SIG_DESC_CLEAR(SCU694, 20));
1039 SIG_EXPR_LIST_DECL_SESG(AC16, GPIU4, GPIU4, SIG_DESC_SET(SCU434, 4),
1040             SIG_DESC_SET(SCU694, 20));
1041 SIG_EXPR_LIST_DECL_SESG(AC16, ADC12, ADC12);
1042 PIN_DECL_(AC16, SIG_EXPR_LIST_PTR(AC16, SALT13), SIG_EXPR_LIST_PTR(AC16, GPIU4),
1043       SIG_EXPR_LIST_PTR(AC16, ADC12));
1044 GROUP_DECL(SALT13G1, AC16);
1045 FUNC_DECL_2(SALT13, SALT13G0, SALT13G1);
1046 FUNC_GROUP_DECL(GPIU4, AC16);
1047 FUNC_GROUP_DECL(ADC12, AC16);
1048
1049 #define AA16 165
1050 SIG_EXPR_LIST_DECL_SEMG(AA16, SALT14, SALT14G1, SALT14, SIG_DESC_SET(SCU434, 5),
1051             SIG_DESC_CLEAR(SCU694, 21));
1052 SIG_EXPR_LIST_DECL_SESG(AA16, GPIU5, GPIU5, SIG_DESC_SET(SCU434, 5),
1053             SIG_DESC_SET(SCU694, 21));
1054 SIG_EXPR_LIST_DECL_SESG(AA16, ADC13, ADC13);
1055 PIN_DECL_(AA16, SIG_EXPR_LIST_PTR(AA16, SALT14), SIG_EXPR_LIST_PTR(AA16, GPIU5),
1056       SIG_EXPR_LIST_PTR(AA16, ADC13));
1057 GROUP_DECL(SALT14G1, AA16);
1058 FUNC_DECL_2(SALT14, SALT14G0, SALT14G1);
1059 FUNC_GROUP_DECL(GPIU5, AA16);
1060 FUNC_GROUP_DECL(ADC13, AA16);
1061
1062 #define AD16 166
1063 SIG_EXPR_LIST_DECL_SEMG(AD16, SALT15, SALT15G1, SALT15, SIG_DESC_SET(SCU434, 6),
1064             SIG_DESC_CLEAR(SCU694, 22));
1065 SIG_EXPR_LIST_DECL_SESG(AD16, GPIU6, GPIU6, SIG_DESC_SET(SCU434, 6),
1066             SIG_DESC_SET(SCU694, 22));
1067 SIG_EXPR_LIST_DECL_SESG(AD16, ADC14, ADC14);
1068 PIN_DECL_(AD16, SIG_EXPR_LIST_PTR(AD16, SALT15), SIG_EXPR_LIST_PTR(AD16, GPIU6),
1069       SIG_EXPR_LIST_PTR(AD16, ADC14));
1070 GROUP_DECL(SALT15G1, AD16);
1071 FUNC_DECL_2(SALT15, SALT15G0, SALT15G1);
1072 FUNC_GROUP_DECL(GPIU6, AD16);
1073 FUNC_GROUP_DECL(ADC14, AD16);
1074
1075 #define AC17 167
1076 SIG_EXPR_LIST_DECL_SEMG(AC17, SALT16, SALT16G1, SALT16, SIG_DESC_SET(SCU434, 7),
1077             SIG_DESC_CLEAR(SCU694, 23));
1078 SIG_EXPR_LIST_DECL_SESG(AC17, GPIU7, GPIU7, SIG_DESC_SET(SCU434, 7),
1079             SIG_DESC_SET(SCU694, 23));
1080 SIG_EXPR_LIST_DECL_SESG(AC17, ADC15, ADC15);
1081 PIN_DECL_(AC17, SIG_EXPR_LIST_PTR(AC17, SALT16), SIG_EXPR_LIST_PTR(AC17, GPIU7),
1082       SIG_EXPR_LIST_PTR(AC17, ADC15));
1083 GROUP_DECL(SALT16G1, AC17);
1084 FUNC_DECL_2(SALT16, SALT16G0, SALT16G1);
1085 FUNC_GROUP_DECL(GPIU7, AC17);
1086 FUNC_GROUP_DECL(ADC15, AC17);
1087
1088 #define AB15 168
1089 SSSF_PIN_DECL(AB15, GPIOV0, SIOS3, SIG_DESC_SET(SCU434, 8));
1090
1091 #define AF14 169
1092 SSSF_PIN_DECL(AF14, GPIOV1, SIOS5, SIG_DESC_SET(SCU434, 9));
1093
1094 #define AD14 170
1095 SSSF_PIN_DECL(AD14, GPIOV2, SIOPWREQ, SIG_DESC_SET(SCU434, 10));
1096
1097 #define AC15 171
1098 SSSF_PIN_DECL(AC15, GPIOV3, SIOONCTRL, SIG_DESC_SET(SCU434, 11));
1099
1100 #define AE15 172
1101 SSSF_PIN_DECL(AE15, GPIOV4, SIOPWRGD, SIG_DESC_SET(SCU434, 12));
1102
1103 #define AE14 173
1104 SIG_EXPR_LIST_DECL_SESG(AE14, LPCPD, LPCPD, SIG_DESC_SET(SCU434, 13));
1105 SIG_EXPR_LIST_DECL_SESG(AE14, LHPD, LHPD, SIG_DESC_SET(SCU4D4, 13));
1106 PIN_DECL_2(AE14, GPIOV5, LPCPD, LHPD);
1107 FUNC_GROUP_DECL(LPCPD, AE14);
1108 FUNC_GROUP_DECL(LHPD, AE14);
1109
1110 #define AD15 174
1111 SSSF_PIN_DECL(AD15, GPIOV6, LPCPME, SIG_DESC_SET(SCU434, 14));
1112
1113 #define AF15 175
1114 SSSF_PIN_DECL(AF15, GPIOV7, LPCSMI, SIG_DESC_SET(SCU434, 15));
1115
1116 #define AB7 176
1117 SIG_EXPR_LIST_DECL_SESG(AB7, LAD0, LPC, SIG_DESC_SET(SCU434, 16),
1118               SIG_DESC_SET(SCU510, 6));
1119 SIG_EXPR_LIST_DECL_SESG(AB7, ESPID0, ESPI, SIG_DESC_SET(SCU434, 16));
1120 PIN_DECL_2(AB7, GPIOW0, LAD0, ESPID0);
1121
1122 #define AB8 177
1123 SIG_EXPR_LIST_DECL_SESG(AB8, LAD1, LPC, SIG_DESC_SET(SCU434, 17),
1124               SIG_DESC_SET(SCU510, 6));
1125 SIG_EXPR_LIST_DECL_SESG(AB8, ESPID1, ESPI, SIG_DESC_SET(SCU434, 17));
1126 PIN_DECL_2(AB8, GPIOW1, LAD1, ESPID1);
1127
1128 #define AC8 178
1129 SIG_EXPR_LIST_DECL_SESG(AC8, LAD2, LPC, SIG_DESC_SET(SCU434, 18),
1130               SIG_DESC_SET(SCU510, 6));
1131 SIG_EXPR_LIST_DECL_SESG(AC8, ESPID2, ESPI, SIG_DESC_SET(SCU434, 18));
1132 PIN_DECL_2(AC8, GPIOW2, LAD2, ESPID2);
1133
1134 #define AC7 179
1135 SIG_EXPR_LIST_DECL_SESG(AC7, LAD3, LPC, SIG_DESC_SET(SCU434, 19),
1136               SIG_DESC_SET(SCU510, 6));
1137 SIG_EXPR_LIST_DECL_SESG(AC7, ESPID3, ESPI, SIG_DESC_SET(SCU434, 19));
1138 PIN_DECL_2(AC7, GPIOW3, LAD3, ESPID3);
1139
1140 #define AE7 180
1141 SIG_EXPR_LIST_DECL_SESG(AE7, LCLK, LPC, SIG_DESC_SET(SCU434, 20),
1142               SIG_DESC_SET(SCU510, 6));
1143 SIG_EXPR_LIST_DECL_SESG(AE7, ESPICK, ESPI, SIG_DESC_SET(SCU434, 20));
1144 PIN_DECL_2(AE7, GPIOW4, LCLK, ESPICK);
1145
1146 #define AF7 181
1147 SIG_EXPR_LIST_DECL_SESG(AF7, LFRAME, LPC, SIG_DESC_SET(SCU434, 21),
1148               SIG_DESC_SET(SCU510, 6));
1149 SIG_EXPR_LIST_DECL_SESG(AF7, ESPICS, ESPI, SIG_DESC_SET(SCU434, 21));
1150 PIN_DECL_2(AF7, GPIOW5, LFRAME, ESPICS);
1151
1152 #define AD7 182
1153 SIG_EXPR_LIST_DECL_SESG(AD7, LSIRQ, LSIRQ, SIG_DESC_SET(SCU434, 22),
1154               SIG_DESC_SET(SCU510, 6));
1155 SIG_EXPR_LIST_DECL_SESG(AD7, ESPIALT, ESPIALT, SIG_DESC_SET(SCU434, 22));
1156 PIN_DECL_2(AD7, GPIOW6, LSIRQ, ESPIALT);
1157 FUNC_GROUP_DECL(LSIRQ, AD7);
1158 FUNC_GROUP_DECL(ESPIALT, AD7);
1159
1160 #define AD8 183
1161 SIG_EXPR_LIST_DECL_SESG(AD8, LPCRST, LPC, SIG_DESC_SET(SCU434, 23),
1162               SIG_DESC_SET(SCU510, 6));
1163 SIG_EXPR_LIST_DECL_SESG(AD8, ESPIRST, ESPI, SIG_DESC_SET(SCU434, 23));
1164 PIN_DECL_2(AD8, GPIOW7, LPCRST, ESPIRST);
1165
1166 FUNC_GROUP_DECL(LPC, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1167 FUNC_GROUP_DECL(ESPI, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1168
1169 #define AE8 184
1170 SIG_EXPR_LIST_DECL_SEMG(AE8, SPI2CS0, SPI2, SPI2, SIG_DESC_SET(SCU434, 24));
1171 PIN_DECL_1(AE8, GPIOX0, SPI2CS0);
1172
1173 #define AA9 185
1174 SSSF_PIN_DECL(AA9, GPIOX1, SPI2CS1, SIG_DESC_SET(SCU434, 25));
1175
1176 #define AC9 186
1177 SSSF_PIN_DECL(AC9, GPIOX2, SPI2CS2, SIG_DESC_SET(SCU434, 26));
1178
1179 #define AF8 187
1180 SIG_EXPR_LIST_DECL_SEMG(AF8, SPI2CK, SPI2, SPI2, SIG_DESC_SET(SCU434, 27));
1181 PIN_DECL_1(AF8, GPIOX3, SPI2CK);
1182
1183 #define AB9 188
1184 SIG_EXPR_LIST_DECL_SEMG(AB9, SPI2MOSI, SPI2, SPI2, SIG_DESC_SET(SCU434, 28));
1185 PIN_DECL_1(AB9, GPIOX4, SPI2MOSI);
1186
1187 #define AD9 189
1188 SIG_EXPR_LIST_DECL_SEMG(AD9, SPI2MISO, SPI2, SPI2, SIG_DESC_SET(SCU434, 29));
1189 PIN_DECL_1(AD9, GPIOX5, SPI2MISO);
1190
1191 GROUP_DECL(SPI2, AE8, AF8, AB9, AD9);
1192
1193 #define AF9 190
1194 SIG_EXPR_LIST_DECL_SEMG(AF9, SPI2DQ2, QSPI2, SPI2, SIG_DESC_SET(SCU434, 30));
1195 SIG_EXPR_LIST_DECL_SEMG(AF9, TXD12, UART12G1, UART12, SIG_DESC_SET(SCU4D4, 30));
1196 PIN_DECL_2(AF9, GPIOX6, SPI2DQ2, TXD12);
1197
1198 #define AB10 191
1199 SIG_EXPR_LIST_DECL_SEMG(AB10, SPI2DQ3, QSPI2, SPI2, SIG_DESC_SET(SCU434, 31));
1200 SIG_EXPR_LIST_DECL_SEMG(AB10, RXD12, UART12G1, UART12,
1201             SIG_DESC_SET(SCU4D4, 31));
1202 PIN_DECL_2(AB10, GPIOX7, SPI2DQ3, RXD12);
1203
1204 GROUP_DECL(QSPI2, AE8, AF8, AB9, AD9, AF9, AB10);
1205 FUNC_DECL_2(SPI2, SPI2, QSPI2);
1206
1207 GROUP_DECL(UART12G1, AF9, AB10);
1208 FUNC_DECL_2(UART12, UART12G0, UART12G1);
1209
1210 #define AF11 192
1211 SIG_EXPR_LIST_DECL_SESG(AF11, SALT5, SALT5, SIG_DESC_SET(SCU438, 0));
1212 SIG_EXPR_LIST_DECL_SESG(AF11, WDTRST1, WDTRST1, SIG_DESC_SET(SCU4D8, 0));
1213 PIN_DECL_2(AF11, GPIOY0, SALT5, WDTRST1);
1214 FUNC_GROUP_DECL(SALT5, AF11);
1215 FUNC_GROUP_DECL(WDTRST1, AF11);
1216
1217 #define AD12 193
1218 SIG_EXPR_LIST_DECL_SESG(AD12, SALT6, SALT6, SIG_DESC_SET(SCU438, 1));
1219 SIG_EXPR_LIST_DECL_SESG(AD12, WDTRST2, WDTRST2, SIG_DESC_SET(SCU4D8, 1));
1220 PIN_DECL_2(AD12, GPIOY1, SALT6, WDTRST2);
1221 FUNC_GROUP_DECL(SALT6, AD12);
1222 FUNC_GROUP_DECL(WDTRST2, AD12);
1223
1224 #define AE11 194
1225 SIG_EXPR_LIST_DECL_SESG(AE11, SALT7, SALT7, SIG_DESC_SET(SCU438, 2));
1226 SIG_EXPR_LIST_DECL_SESG(AE11, WDTRST3, WDTRST3, SIG_DESC_SET(SCU4D8, 2));
1227 PIN_DECL_2(AE11, GPIOY2, SALT7, WDTRST3);
1228 FUNC_GROUP_DECL(SALT7, AE11);
1229 FUNC_GROUP_DECL(WDTRST3, AE11);
1230
1231 #define AA12 195
1232 SIG_EXPR_LIST_DECL_SESG(AA12, SALT8, SALT8, SIG_DESC_SET(SCU438, 3));
1233 SIG_EXPR_LIST_DECL_SESG(AA12, WDTRST4, WDTRST4, SIG_DESC_SET(SCU4D8, 3));
1234 PIN_DECL_2(AA12, GPIOY3, SALT8, WDTRST4);
1235 FUNC_GROUP_DECL(SALT8, AA12);
1236 FUNC_GROUP_DECL(WDTRST4, AA12);
1237
1238 #define AE12 196
1239 SIG_EXPR_LIST_DECL_SESG(AE12, FWSPIQ2, FWQSPI, SIG_DESC_SET(SCU438, 4));
1240 SIG_EXPR_LIST_DECL_SESG(AE12, GPIOY4, GPIOY4);
1241 PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, FWSPIQ2),
1242       SIG_EXPR_LIST_PTR(AE12, GPIOY4));
1243
1244 #define AF12 197
1245 SIG_EXPR_LIST_DECL_SESG(AF12, FWSPIQ3, FWQSPI, SIG_DESC_SET(SCU438, 5));
1246 SIG_EXPR_LIST_DECL_SESG(AF12, GPIOY5, GPIOY5);
1247 PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, FWSPIQ3),
1248       SIG_EXPR_LIST_PTR(AF12, GPIOY5));
1249 FUNC_GROUP_DECL(FWQSPI, AE12, AF12);
1250
1251 #define AC12 198
1252 SSSF_PIN_DECL(AC12, GPIOY6, FWSPIABR, SIG_DESC_SET(SCU438, 6));
1253
1254 #define AB12 199
1255 SSSF_PIN_DECL(AB12, GPIOY7, FWSPIWP, SIG_DESC_SET(SCU438, 7));
1256
1257 #define AC10 200
1258 SSSF_PIN_DECL(AC10, GPIOZ0, SPI1CS1, SIG_DESC_SET(SCU438, 8));
1259
1260 #define AD10 201
1261 SSSF_PIN_DECL(AD10, GPIOZ1, SPI1ABR, SIG_DESC_SET(SCU438, 9));
1262
1263 #define AE10 202
1264 SSSF_PIN_DECL(AE10, GPIOZ2, SPI1WP, SIG_DESC_SET(SCU438, 10));
1265
1266 #define AB11 203
1267 SIG_EXPR_LIST_DECL_SEMG(AB11, SPI1CK, SPI1, SPI1, SIG_DESC_SET(SCU438, 11));
1268 PIN_DECL_1(AB11, GPIOZ3, SPI1CK);
1269
1270 #define AC11 204
1271 SIG_EXPR_LIST_DECL_SEMG(AC11, SPI1MOSI, SPI1, SPI1, SIG_DESC_SET(SCU438, 12));
1272 PIN_DECL_1(AC11, GPIOZ4, SPI1MOSI);
1273
1274 #define AA11 205
1275 SIG_EXPR_LIST_DECL_SEMG(AA11, SPI1MISO, SPI1, SPI1, SIG_DESC_SET(SCU438, 13));
1276 PIN_DECL_1(AA11, GPIOZ5, SPI1MISO);
1277
1278 GROUP_DECL(SPI1, AB11, AC11, AA11);
1279
1280 #define AD11 206
1281 SIG_EXPR_LIST_DECL_SEMG(AD11, SPI1DQ2, QSPI1, SPI1, SIG_DESC_SET(SCU438, 14));
1282 SIG_EXPR_LIST_DECL_SEMG(AD11, TXD13, UART13G1, UART13,
1283             SIG_DESC_CLEAR(SCU4B8, 2), SIG_DESC_SET(SCU4D8, 14));
1284 PIN_DECL_2(AD11, GPIOZ6, SPI1DQ2, TXD13);
1285
1286 #define AF10 207
1287 SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));
1288 SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,
1289             SIG_DESC_CLEAR(SCU4B8, 3), SIG_DESC_SET(SCU4D8, 15));
1290 PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);
1291
1292 GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);
1293 FUNC_DECL_2(SPI1, SPI1, QSPI1);
1294
1295 GROUP_DECL(UART13G1, AD11, AF10);
1296 FUNC_DECL_2(UART13, UART13G0, UART13G1);
1297
1298 #define C6 208
1299 SIG_EXPR_LIST_DECL_SESG(C6, RGMII1TXCK, RGMII1, SIG_DESC_SET(SCU400, 0),
1300               SIG_DESC_SET(SCU500, 6));
1301 SIG_EXPR_LIST_DECL_SESG(C6, RMII1RCLKO, RMII1, SIG_DESC_SET(SCU400, 0),
1302               SIG_DESC_CLEAR(SCU500, 6));
1303 PIN_DECL_2(C6, GPIO18A0, RGMII1TXCK, RMII1RCLKO);
1304
1305 #define D6 209
1306 SIG_EXPR_LIST_DECL_SESG(D6, RGMII1TXCTL, RGMII1, SIG_DESC_SET(SCU400, 1),
1307               SIG_DESC_SET(SCU500, 6));
1308 SIG_EXPR_LIST_DECL_SESG(D6, RMII1TXEN, RMII1, SIG_DESC_SET(SCU400, 1),
1309               SIG_DESC_CLEAR(SCU500, 6));
1310 PIN_DECL_2(D6, GPIO18A1, RGMII1TXCTL, RMII1TXEN);
1311
1312 #define D5 210
1313 SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1314               SIG_DESC_SET(SCU500, 6));
1315 SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1316               SIG_DESC_CLEAR(SCU500, 6));
1317 PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1318
1319 #define A3 211
1320 SIG_EXPR_LIST_DECL_SESG(A3, RGMII1TXD1, RGMII1, SIG_DESC_SET(SCU400, 3),
1321               SIG_DESC_SET(SCU500, 6));
1322 SIG_EXPR_LIST_DECL_SESG(A3, RMII1TXD1, RMII1, SIG_DESC_SET(SCU400, 3),
1323               SIG_DESC_CLEAR(SCU500, 6));
1324 PIN_DECL_2(A3, GPIO18A3, RGMII1TXD1, RMII1TXD1);
1325
1326 #define C5 212
1327 SIG_EXPR_LIST_DECL_SESG(C5, RGMII1TXD2, RGMII1, SIG_DESC_SET(SCU400, 4),
1328               SIG_DESC_SET(SCU500, 6));
1329 PIN_DECL_1(C5, GPIO18A4, RGMII1TXD2);
1330
1331 #define E6 213
1332 SIG_EXPR_LIST_DECL_SESG(E6, RGMII1TXD3, RGMII1, SIG_DESC_SET(SCU400, 5),
1333               SIG_DESC_SET(SCU500, 6));
1334 PIN_DECL_1(E6, GPIO18A5, RGMII1TXD3);
1335
1336 #define B3 214
1337 SIG_EXPR_LIST_DECL_SESG(B3, RGMII1RXCK, RGMII1, SIG_DESC_SET(SCU400, 6),
1338               SIG_DESC_SET(SCU500, 6));
1339 SIG_EXPR_LIST_DECL_SESG(B3, RMII1RCLKI, RMII1, SIG_DESC_SET(SCU400, 6),
1340               SIG_DESC_CLEAR(SCU500, 6));
1341 PIN_DECL_2(B3, GPIO18A6, RGMII1RXCK, RMII1RCLKI);
1342
1343 #define A2 215
1344 SIG_EXPR_LIST_DECL_SESG(A2, RGMII1RXCTL, RGMII1, SIG_DESC_SET(SCU400, 7),
1345               SIG_DESC_SET(SCU500, 6));
1346 PIN_DECL_1(A2, GPIO18A7, RGMII1RXCTL);
1347
1348 #define B2 216
1349 SIG_EXPR_LIST_DECL_SESG(B2, RGMII1RXD0, RGMII1, SIG_DESC_SET(SCU400, 8),
1350               SIG_DESC_SET(SCU500, 6));
1351 SIG_EXPR_LIST_DECL_SESG(B2, RMII1RXD0, RMII1, SIG_DESC_SET(SCU400, 8),
1352               SIG_DESC_CLEAR(SCU500, 6));
1353 PIN_DECL_2(B2, GPIO18B0, RGMII1RXD0, RMII1RXD0);
1354
1355 #define B1 217
1356 SIG_EXPR_LIST_DECL_SESG(B1, RGMII1RXD1, RGMII1, SIG_DESC_SET(SCU400, 9),
1357               SIG_DESC_SET(SCU500, 6));
1358 SIG_EXPR_LIST_DECL_SESG(B1, RMII1RXD1, RMII1, SIG_DESC_SET(SCU400, 9),
1359               SIG_DESC_CLEAR(SCU500, 6));
1360 PIN_DECL_2(B1, GPIO18B1, RGMII1RXD1, RMII1RXD1);
1361
1362 #define C4 218
1363 SIG_EXPR_LIST_DECL_SESG(C4, RGMII1RXD2, RGMII1, SIG_DESC_SET(SCU400, 10),
1364               SIG_DESC_SET(SCU500, 6));
1365 SIG_EXPR_LIST_DECL_SESG(C4, RMII1CRSDV, RMII1, SIG_DESC_SET(SCU400, 10),
1366               SIG_DESC_CLEAR(SCU500, 6));
1367 PIN_DECL_2(C4, GPIO18B2, RGMII1RXD2, RMII1CRSDV);
1368
1369 #define E5 219
1370 SIG_EXPR_LIST_DECL_SESG(E5, RGMII1RXD3, RGMII1, SIG_DESC_SET(SCU400, 11),
1371               SIG_DESC_SET(SCU500, 6));
1372 SIG_EXPR_LIST_DECL_SESG(E5, RMII1RXER, RMII1, SIG_DESC_SET(SCU400, 11),
1373               SIG_DESC_CLEAR(SCU500, 6));
1374 PIN_DECL_2(E5, GPIO18B3, RGMII1RXD3, RMII1RXER);
1375
1376 FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1377 FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1378
1379 #define D4 220
1380 SIG_EXPR_LIST_DECL_SESG(D4, RGMII2TXCK, RGMII2, SIG_DESC_SET(SCU400, 12),
1381               SIG_DESC_SET(SCU500, 7));
1382 SIG_EXPR_LIST_DECL_SESG(D4, RMII2RCLKO, RMII2, SIG_DESC_SET(SCU400, 12),
1383               SIG_DESC_CLEAR(SCU500, 7));
1384 PIN_DECL_2(D4, GPIO18B4, RGMII2TXCK, RMII2RCLKO);
1385
1386 #define C2 221
1387 SIG_EXPR_LIST_DECL_SESG(C2, RGMII2TXCTL, RGMII2, SIG_DESC_SET(SCU400, 13),
1388               SIG_DESC_SET(SCU500, 7));
1389 SIG_EXPR_LIST_DECL_SESG(C2, RMII2TXEN, RMII2, SIG_DESC_SET(SCU400, 13),
1390               SIG_DESC_CLEAR(SCU500, 7));
1391 PIN_DECL_2(C2, GPIO18B5, RGMII2TXCTL, RMII2TXEN);
1392
1393 #define C1 222
1394 SIG_EXPR_LIST_DECL_SESG(C1, RGMII2TXD0, RGMII2, SIG_DESC_SET(SCU400, 14),
1395               SIG_DESC_SET(SCU500, 7));
1396 SIG_EXPR_LIST_DECL_SESG(C1, RMII2TXD0, RMII2, SIG_DESC_SET(SCU400, 14),
1397               SIG_DESC_CLEAR(SCU500, 7));
1398 PIN_DECL_2(C1, GPIO18B6, RGMII2TXD0, RMII2TXD0);
1399
1400 #define D3 223
1401 SIG_EXPR_LIST_DECL_SESG(D3, RGMII2TXD1, RGMII2, SIG_DESC_SET(SCU400, 15),
1402               SIG_DESC_SET(SCU500, 7));
1403 SIG_EXPR_LIST_DECL_SESG(D3, RMII2TXD1, RMII2, SIG_DESC_SET(SCU400, 15),
1404               SIG_DESC_CLEAR(SCU500, 7));
1405 PIN_DECL_2(D3, GPIO18B7, RGMII2TXD1, RMII2TXD1);
1406
1407 #define E4 224
1408 SIG_EXPR_LIST_DECL_SESG(E4, RGMII2TXD2, RGMII2, SIG_DESC_SET(SCU400, 16),
1409               SIG_DESC_SET(SCU500, 7));
1410 PIN_DECL_1(E4, GPIO18C0, RGMII2TXD2);
1411
1412 #define F5 225
1413 SIG_EXPR_LIST_DECL_SESG(F5, RGMII2TXD3, RGMII2, SIG_DESC_SET(SCU400, 17),
1414               SIG_DESC_SET(SCU500, 7));
1415 PIN_DECL_1(F5, GPIO18C1, RGMII2TXD3);
1416
1417 #define D2 226
1418 SIG_EXPR_LIST_DECL_SESG(D2, RGMII2RXCK, RGMII2, SIG_DESC_SET(SCU400, 18),
1419               SIG_DESC_SET(SCU500, 7));
1420 SIG_EXPR_LIST_DECL_SESG(D2, RMII2RCLKI, RMII2, SIG_DESC_SET(SCU400, 18),
1421               SIG_DESC_CLEAR(SCU500, 7));
1422 PIN_DECL_2(D2, GPIO18C2, RGMII2RXCK, RMII2RCLKI);
1423
1424 #define E3 227
1425 SIG_EXPR_LIST_DECL_SESG(E3, RGMII2RXCTL, RGMII2, SIG_DESC_SET(SCU400, 19),
1426               SIG_DESC_SET(SCU500, 7));
1427 PIN_DECL_1(E3, GPIO18C3, RGMII2RXCTL);
1428
1429 #define D1 228
1430 SIG_EXPR_LIST_DECL_SESG(D1, RGMII2RXD0, RGMII2, SIG_DESC_SET(SCU400, 20),
1431               SIG_DESC_SET(SCU500, 7));
1432 SIG_EXPR_LIST_DECL_SESG(D1, RMII2RXD0, RMII2, SIG_DESC_SET(SCU400, 20),
1433               SIG_DESC_CLEAR(SCU500, 7));
1434 PIN_DECL_2(D1, GPIO18C4, RGMII2RXD0, RMII2RXD0);
1435
1436 #define F4 229
1437 SIG_EXPR_LIST_DECL_SESG(F4, RGMII2RXD1, RGMII2, SIG_DESC_SET(SCU400, 21),
1438               SIG_DESC_SET(SCU500, 7));
1439 SIG_EXPR_LIST_DECL_SESG(F4, RMII2RXD1, RMII2, SIG_DESC_SET(SCU400, 21),
1440               SIG_DESC_CLEAR(SCU500, 7));
1441 PIN_DECL_2(F4, GPIO18C5, RGMII2RXD1, RMII2RXD1);
1442
1443 #define E2 230
1444 SIG_EXPR_LIST_DECL_SESG(E2, RGMII2RXD2, RGMII2, SIG_DESC_SET(SCU400, 22),
1445               SIG_DESC_SET(SCU500, 7));
1446 SIG_EXPR_LIST_DECL_SESG(E2, RMII2CRSDV, RMII2, SIG_DESC_SET(SCU400, 22),
1447               SIG_DESC_CLEAR(SCU500, 7));
1448 PIN_DECL_2(E2, GPIO18C6, RGMII2RXD2, RMII2CRSDV);
1449
1450 #define E1 231
1451 SIG_EXPR_LIST_DECL_SESG(E1, RGMII2RXD3, RGMII2, SIG_DESC_SET(SCU400, 23),
1452               SIG_DESC_SET(SCU500, 7));
1453 SIG_EXPR_LIST_DECL_SESG(E1, RMII2RXER, RMII2, SIG_DESC_SET(SCU400, 23),
1454               SIG_DESC_CLEAR(SCU500, 7));
1455 PIN_DECL_2(E1, GPIO18C7, RGMII2RXD3, RMII2RXER);
1456
1457 FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
1458 FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1459
1460 #define AB4 232
1461 SIG_EXPR_LIST_DECL_SEMG(AB4, EMMCCLK, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 24));
1462 PIN_DECL_1(AB4, GPIO18D0, EMMCCLK);
1463
1464 #define AA4 233
1465 SIG_EXPR_LIST_DECL_SEMG(AA4, EMMCCMD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 25));
1466 PIN_DECL_1(AA4, GPIO18D1, EMMCCMD);
1467
1468 #define AC4 234
1469 SIG_EXPR_LIST_DECL_SEMG(AC4, EMMCDAT0, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 26));
1470 PIN_DECL_1(AC4, GPIO18D2, EMMCDAT0);
1471
1472 #define AA5 235
1473 SIG_EXPR_LIST_DECL_SEMG(AA5, EMMCDAT1, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 27));
1474 PIN_DECL_1(AA5, GPIO18D3, EMMCDAT1);
1475
1476 #define Y5 236
1477 SIG_EXPR_LIST_DECL_SEMG(Y5, EMMCDAT2, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 28));
1478 PIN_DECL_1(Y5, GPIO18D4, EMMCDAT2);
1479
1480 #define AB5 237
1481 SIG_EXPR_LIST_DECL_SEMG(AB5, EMMCDAT3, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 29));
1482 PIN_DECL_1(AB5, GPIO18D5, EMMCDAT3);
1483
1484 #define AB6 238
1485 SIG_EXPR_LIST_DECL_SEMG(AB6, EMMCCD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 30));
1486 PIN_DECL_1(AB6, GPIO18D6, EMMCCD);
1487
1488 #define AC5 239
1489 SIG_EXPR_LIST_DECL_SEMG(AC5, EMMCWP, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 31));
1490 PIN_DECL_1(AC5, GPIO18D7, EMMCWP);
1491
1492 GROUP_DECL(EMMCG1, AB4, AA4, AC4, AB6, AC5);
1493 GROUP_DECL(EMMCG4, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5);
1494
1495 #define Y1 240
1496 SIG_EXPR_LIST_DECL_SEMG(Y1, FWSPIDCS, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1497 SIG_EXPR_LIST_DECL_SESG(Y1, VBCS, VB, SIG_DESC_SET(SCU500, 5));
1498 SIG_EXPR_LIST_DECL_SEMG(Y1, EMMCDAT4, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 0));
1499 PIN_DECL_3(Y1, GPIO18E0, FWSPIDCS, VBCS, EMMCDAT4);
1500
1501 #define Y2 241
1502 SIG_EXPR_LIST_DECL_SEMG(Y2, FWSPIDCK, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1503 SIG_EXPR_LIST_DECL_SESG(Y2, VBCK, VB, SIG_DESC_SET(SCU500, 5));
1504 SIG_EXPR_LIST_DECL_SEMG(Y2, EMMCDAT5, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 1));
1505 PIN_DECL_3(Y2, GPIO18E1, FWSPIDCK, VBCK, EMMCDAT5);
1506
1507 #define Y3 242
1508 SIG_EXPR_LIST_DECL_SEMG(Y3, FWSPIDMOSI, FWSPID, FWSPID,
1509             SIG_DESC_SET(SCU500, 3));
1510 SIG_EXPR_LIST_DECL_SESG(Y3, VBMOSI, VB, SIG_DESC_SET(SCU500, 5));
1511 SIG_EXPR_LIST_DECL_SEMG(Y3, EMMCDAT6, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 2));
1512 PIN_DECL_3(Y3, GPIO18E2, FWSPIDMOSI, VBMOSI, EMMCDAT6);
1513
1514 #define Y4 243
1515 SIG_EXPR_LIST_DECL_SEMG(Y4, FWSPIDMISO, FWSPID, FWSPID,
1516             SIG_DESC_SET(SCU500, 3));
1517 SIG_EXPR_LIST_DECL_SESG(Y4, VBMISO, VB, SIG_DESC_SET(SCU500, 5));
1518 SIG_EXPR_LIST_DECL_SEMG(Y4, EMMCDAT7, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 3));
1519 PIN_DECL_3(Y4, GPIO18E3, FWSPIDMISO, VBMISO, EMMCDAT7);
1520
1521 GROUP_DECL(FWSPID, Y1, Y2, Y3, Y4);
1522 GROUP_DECL(EMMCG8, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5, Y1, Y2, Y3, Y4);
1523 FUNC_DECL_1(FWSPID, FWSPID);
1524 FUNC_GROUP_DECL(VB, Y1, Y2, Y3, Y4);
1525 FUNC_DECL_3(EMMC, EMMCG1, EMMCG4, EMMCG8);
1526 /*
1527  * FIXME: Confirm bits and priorities are the right way around for the
1528  * following 4 pins
1529  */
1530 #define AF25 244
1531 SIG_EXPR_LIST_DECL_SEMG(AF25, I3C3SCL, I3C3, I3C3, SIG_DESC_SET(SCU438, 20));
1532 SIG_EXPR_LIST_DECL_SESG(AF25, FSI1CLK, FSI1, SIG_DESC_SET(SCU4D8, 20));
1533 PIN_DECL_(AF25, SIG_EXPR_LIST_PTR(AF25, I3C3SCL),
1534       SIG_EXPR_LIST_PTR(AF25, FSI1CLK));
1535
1536 #define AE26 245
1537 SIG_EXPR_LIST_DECL_SEMG(AE26, I3C3SDA, I3C3, I3C3, SIG_DESC_SET(SCU438, 21));
1538 SIG_EXPR_LIST_DECL_SESG(AE26, FSI1DATA, FSI1, SIG_DESC_SET(SCU4D8, 21));
1539 PIN_DECL_(AE26, SIG_EXPR_LIST_PTR(AE26, I3C3SDA),
1540       SIG_EXPR_LIST_PTR(AE26, FSI1DATA));
1541
1542 GROUP_DECL(I3C3, AF25, AE26);
1543 FUNC_DECL_2(I3C3, HVI3C3, I3C3);
1544 FUNC_GROUP_DECL(FSI1, AF25, AE26);
1545
1546 #define AE25 246
1547 SIG_EXPR_LIST_DECL_SEMG(AE25, I3C4SCL, I3C4, I3C4, SIG_DESC_SET(SCU438, 22));
1548 SIG_EXPR_LIST_DECL_SESG(AE25, FSI2CLK, FSI2, SIG_DESC_SET(SCU4D8, 22));
1549 PIN_DECL_(AE25, SIG_EXPR_LIST_PTR(AE25, I3C4SCL),
1550       SIG_EXPR_LIST_PTR(AE25, FSI2CLK));
1551
1552 #define AF24 247
1553 SIG_EXPR_LIST_DECL_SEMG(AF24, I3C4SDA, I3C4, I3C4, SIG_DESC_SET(SCU438, 23));
1554 SIG_EXPR_LIST_DECL_SESG(AF24, FSI2DATA, FSI2, SIG_DESC_SET(SCU4D8, 23));
1555 PIN_DECL_(AF24, SIG_EXPR_LIST_PTR(AF24, I3C4SDA),
1556       SIG_EXPR_LIST_PTR(AF24, FSI2DATA));
1557
1558 GROUP_DECL(I3C4, AE25, AF24);
1559 FUNC_DECL_2(I3C4, HVI3C4, I3C4);
1560 FUNC_GROUP_DECL(FSI2, AE25, AF24);
1561
1562 #define AF23 248
1563 SIG_EXPR_LIST_DECL_SESG(AF23, I3C1SCL, I3C1, SIG_DESC_SET(SCU438, 16));
1564 PIN_DECL_(AF23, SIG_EXPR_LIST_PTR(AF23, I3C1SCL));
1565
1566 #define AE24 249
1567 SIG_EXPR_LIST_DECL_SESG(AE24, I3C1SDA, I3C1, SIG_DESC_SET(SCU438, 17));
1568 PIN_DECL_(AE24, SIG_EXPR_LIST_PTR(AE24, I3C1SDA));
1569
1570 FUNC_GROUP_DECL(I3C1, AF23, AE24);
1571
1572 #define AF22 250
1573 SIG_EXPR_LIST_DECL_SESG(AF22, I3C2SCL, I3C2, SIG_DESC_SET(SCU438, 18));
1574 PIN_DECL_(AF22, SIG_EXPR_LIST_PTR(AF22, I3C2SCL));
1575
1576 #define AE22 251
1577 SIG_EXPR_LIST_DECL_SESG(AE22, I3C2SDA, I3C2, SIG_DESC_SET(SCU438, 19));
1578 PIN_DECL_(AE22, SIG_EXPR_LIST_PTR(AE22, I3C2SDA));
1579
1580 FUNC_GROUP_DECL(I3C2, AF22, AE22);
1581
1582 #define USB2ADP_DESC   { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 0, 0 }
1583 #define USB2AD_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 1, 0 }
1584 #define USB2AH_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 2, 0 }
1585 #define USB2AHP_DESC   { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 3, 0 }
1586 #define USB11BHID_DESC { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 0, 0 }
1587 #define USB2BD_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 1, 0 }
1588 #define USB2BH_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 2, 0 }
1589
1590 #define A4 252
1591 SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADPDP, USBA, USB2ADP, USB2ADP_DESC,
1592             SIG_DESC_SET(SCUC20, 16));
1593 SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADDP, USBA, USB2AD, USB2AD_DESC);
1594 SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHDP, USBA, USB2AH, USB2AH_DESC);
1595 SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHPDP, USBA, USB2AHP, USB2AHP_DESC);
1596 PIN_DECL_(A4, SIG_EXPR_LIST_PTR(A4, USB2ADPDP), SIG_EXPR_LIST_PTR(A4, USB2ADDP),
1597       SIG_EXPR_LIST_PTR(A4, USB2AHDP));
1598
1599 #define B4 253
1600 SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADPDN, USBA, USB2ADP, USB2ADP_DESC);
1601 SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADDN, USBA, USB2AD, USB2AD_DESC);
1602 SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHDN, USBA, USB2AH, USB2AH_DESC);
1603 SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHPDN, USBA, USB2AHP, USB2AHP_DESC);
1604 PIN_DECL_(B4, SIG_EXPR_LIST_PTR(B4, USB2ADPDN), SIG_EXPR_LIST_PTR(B4, USB2ADDN),
1605       SIG_EXPR_LIST_PTR(B4, USB2AHDN));
1606
1607 GROUP_DECL(USBA, A4, B4);
1608
1609 FUNC_DECL_1(USB2ADP, USBA);
1610 FUNC_DECL_1(USB2AD, USBA);
1611 FUNC_DECL_1(USB2AH, USBA);
1612 FUNC_DECL_1(USB2AHP, USBA);
1613
1614 #define A6 254
1615 SIG_EXPR_LIST_DECL_SEMG(A6, USB11BDP, USBB, USB11BHID, USB11BHID_DESC);
1616 SIG_EXPR_LIST_DECL_SEMG(A6, USB2BDDP, USBB, USB2BD, USB2BD_DESC);
1617 SIG_EXPR_LIST_DECL_SEMG(A6, USB2BHDP, USBB, USB2BH, USB2BH_DESC);
1618 PIN_DECL_(A6, SIG_EXPR_LIST_PTR(A6, USB11BDP), SIG_EXPR_LIST_PTR(A6, USB2BDDP),
1619       SIG_EXPR_LIST_PTR(A6, USB2BHDP));
1620
1621 #define B6 255
1622 SIG_EXPR_LIST_DECL_SEMG(B6, USB11BDN, USBB, USB11BHID, USB11BHID_DESC);
1623 SIG_EXPR_LIST_DECL_SEMG(B6, USB2BDDN, USBB, USB2BD, USB2BD_DESC);
1624 SIG_EXPR_LIST_DECL_SEMG(B6, USB2BHDN, USBB, USB2BH, USB2BH_DESC);
1625 PIN_DECL_(B6, SIG_EXPR_LIST_PTR(B6, USB11BDN), SIG_EXPR_LIST_PTR(B6, USB2BDDN),
1626       SIG_EXPR_LIST_PTR(B6, USB2BHDN));
1627
1628 GROUP_DECL(USBB, A6, B6);
1629
1630 FUNC_DECL_1(USB11BHID, USBB);
1631 FUNC_DECL_1(USB2BD, USBB);
1632 FUNC_DECL_1(USB2BH, USBB);
1633
1634 /* Pins, groups and functions are sort(1):ed alphabetically for sanity */
1635
1636 static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = {
1637     ASPEED_PINCTRL_PIN(A11),
1638     ASPEED_PINCTRL_PIN(A12),
1639     ASPEED_PINCTRL_PIN(A13),
1640     ASPEED_PINCTRL_PIN(A14),
1641     ASPEED_PINCTRL_PIN(A15),
1642     ASPEED_PINCTRL_PIN(A16),
1643     ASPEED_PINCTRL_PIN(A17),
1644     ASPEED_PINCTRL_PIN(A18),
1645     ASPEED_PINCTRL_PIN(A19),
1646     ASPEED_PINCTRL_PIN(A2),
1647     ASPEED_PINCTRL_PIN(A20),
1648     ASPEED_PINCTRL_PIN(A21),
1649     ASPEED_PINCTRL_PIN(A22),
1650     ASPEED_PINCTRL_PIN(A23),
1651     ASPEED_PINCTRL_PIN(A24),
1652     ASPEED_PINCTRL_PIN(A25),
1653     ASPEED_PINCTRL_PIN(A3),
1654     ASPEED_PINCTRL_PIN(A4),
1655     ASPEED_PINCTRL_PIN(A6),
1656     ASPEED_PINCTRL_PIN(AA11),
1657     ASPEED_PINCTRL_PIN(AA12),
1658     ASPEED_PINCTRL_PIN(AA16),
1659     ASPEED_PINCTRL_PIN(AA17),
1660     ASPEED_PINCTRL_PIN(AA23),
1661     ASPEED_PINCTRL_PIN(AA24),
1662     ASPEED_PINCTRL_PIN(AA25),
1663     ASPEED_PINCTRL_PIN(AA26),
1664     ASPEED_PINCTRL_PIN(AA4),
1665     ASPEED_PINCTRL_PIN(AA5),
1666     ASPEED_PINCTRL_PIN(AA9),
1667     ASPEED_PINCTRL_PIN(AB10),
1668     ASPEED_PINCTRL_PIN(AB11),
1669     ASPEED_PINCTRL_PIN(AB12),
1670     ASPEED_PINCTRL_PIN(AB15),
1671     ASPEED_PINCTRL_PIN(AB16),
1672     ASPEED_PINCTRL_PIN(AB17),
1673     ASPEED_PINCTRL_PIN(AB18),
1674     ASPEED_PINCTRL_PIN(AB19),
1675     ASPEED_PINCTRL_PIN(AB22),
1676     ASPEED_PINCTRL_PIN(AB23),
1677     ASPEED_PINCTRL_PIN(AB24),
1678     ASPEED_PINCTRL_PIN(AB25),
1679     ASPEED_PINCTRL_PIN(AB26),
1680     ASPEED_PINCTRL_PIN(AB4),
1681     ASPEED_PINCTRL_PIN(AB5),
1682     ASPEED_PINCTRL_PIN(AB6),
1683     ASPEED_PINCTRL_PIN(AB7),
1684     ASPEED_PINCTRL_PIN(AB8),
1685     ASPEED_PINCTRL_PIN(AB9),
1686     ASPEED_PINCTRL_PIN(AC10),
1687     ASPEED_PINCTRL_PIN(AC11),
1688     ASPEED_PINCTRL_PIN(AC12),
1689     ASPEED_PINCTRL_PIN(AC15),
1690     ASPEED_PINCTRL_PIN(AC16),
1691     ASPEED_PINCTRL_PIN(AC17),
1692     ASPEED_PINCTRL_PIN(AC18),
1693     ASPEED_PINCTRL_PIN(AC19),
1694     ASPEED_PINCTRL_PIN(AC22),
1695     ASPEED_PINCTRL_PIN(AC23),
1696     ASPEED_PINCTRL_PIN(AC24),
1697     ASPEED_PINCTRL_PIN(AC26),
1698     ASPEED_PINCTRL_PIN(AC4),
1699     ASPEED_PINCTRL_PIN(AC5),
1700     ASPEED_PINCTRL_PIN(AC7),
1701     ASPEED_PINCTRL_PIN(AC8),
1702     ASPEED_PINCTRL_PIN(AC9),
1703     ASPEED_PINCTRL_PIN(AD10),
1704     ASPEED_PINCTRL_PIN(AD11),
1705     ASPEED_PINCTRL_PIN(AD12),
1706     ASPEED_PINCTRL_PIN(AD14),
1707     ASPEED_PINCTRL_PIN(AD15),
1708     ASPEED_PINCTRL_PIN(AD16),
1709     ASPEED_PINCTRL_PIN(AD19),
1710     ASPEED_PINCTRL_PIN(AD20),
1711     ASPEED_PINCTRL_PIN(AD22),
1712     ASPEED_PINCTRL_PIN(AD23),
1713     ASPEED_PINCTRL_PIN(AD24),
1714     ASPEED_PINCTRL_PIN(AD25),
1715     ASPEED_PINCTRL_PIN(AD26),
1716     ASPEED_PINCTRL_PIN(AD7),
1717     ASPEED_PINCTRL_PIN(AD8),
1718     ASPEED_PINCTRL_PIN(AD9),
1719     ASPEED_PINCTRL_PIN(AE10),
1720     ASPEED_PINCTRL_PIN(AE11),
1721     ASPEED_PINCTRL_PIN(AE12),
1722     ASPEED_PINCTRL_PIN(AE14),
1723     ASPEED_PINCTRL_PIN(AE15),
1724     ASPEED_PINCTRL_PIN(AE16),
1725     ASPEED_PINCTRL_PIN(AE18),
1726     ASPEED_PINCTRL_PIN(AE19),
1727     ASPEED_PINCTRL_PIN(AE22),
1728     ASPEED_PINCTRL_PIN(AE24),
1729     ASPEED_PINCTRL_PIN(AE25),
1730     ASPEED_PINCTRL_PIN(AE26),
1731     ASPEED_PINCTRL_PIN(AE7),
1732     ASPEED_PINCTRL_PIN(AE8),
1733     ASPEED_PINCTRL_PIN(AF10),
1734     ASPEED_PINCTRL_PIN(AF11),
1735     ASPEED_PINCTRL_PIN(AF12),
1736     ASPEED_PINCTRL_PIN(AF14),
1737     ASPEED_PINCTRL_PIN(AF15),
1738     ASPEED_PINCTRL_PIN(AF22),
1739     ASPEED_PINCTRL_PIN(AF23),
1740     ASPEED_PINCTRL_PIN(AF24),
1741     ASPEED_PINCTRL_PIN(AF25),
1742     ASPEED_PINCTRL_PIN(AF7),
1743     ASPEED_PINCTRL_PIN(AF8),
1744     ASPEED_PINCTRL_PIN(AF9),
1745     ASPEED_PINCTRL_PIN(B1),
1746     ASPEED_PINCTRL_PIN(B12),
1747     ASPEED_PINCTRL_PIN(B13),
1748     ASPEED_PINCTRL_PIN(B14),
1749     ASPEED_PINCTRL_PIN(B16),
1750     ASPEED_PINCTRL_PIN(B17),
1751     ASPEED_PINCTRL_PIN(B18),
1752     ASPEED_PINCTRL_PIN(B2),
1753     ASPEED_PINCTRL_PIN(B20),
1754     ASPEED_PINCTRL_PIN(B21),
1755     ASPEED_PINCTRL_PIN(B22),
1756     ASPEED_PINCTRL_PIN(B24),
1757     ASPEED_PINCTRL_PIN(B25),
1758     ASPEED_PINCTRL_PIN(B26),
1759     ASPEED_PINCTRL_PIN(B3),
1760     ASPEED_PINCTRL_PIN(B4),
1761     ASPEED_PINCTRL_PIN(B6),
1762     ASPEED_PINCTRL_PIN(C1),
1763     ASPEED_PINCTRL_PIN(C11),
1764     ASPEED_PINCTRL_PIN(C12),
1765     ASPEED_PINCTRL_PIN(C13),
1766     ASPEED_PINCTRL_PIN(C14),
1767     ASPEED_PINCTRL_PIN(C15),
1768     ASPEED_PINCTRL_PIN(C16),
1769     ASPEED_PINCTRL_PIN(C17),
1770     ASPEED_PINCTRL_PIN(C18),
1771     ASPEED_PINCTRL_PIN(C19),
1772     ASPEED_PINCTRL_PIN(C2),
1773     ASPEED_PINCTRL_PIN(C20),
1774     ASPEED_PINCTRL_PIN(C21),
1775     ASPEED_PINCTRL_PIN(C22),
1776     ASPEED_PINCTRL_PIN(C23),
1777     ASPEED_PINCTRL_PIN(C24),
1778     ASPEED_PINCTRL_PIN(C25),
1779     ASPEED_PINCTRL_PIN(C26),
1780     ASPEED_PINCTRL_PIN(C4),
1781     ASPEED_PINCTRL_PIN(C5),
1782     ASPEED_PINCTRL_PIN(C6),
1783     ASPEED_PINCTRL_PIN(D1),
1784     ASPEED_PINCTRL_PIN(D11),
1785     ASPEED_PINCTRL_PIN(D12),
1786     ASPEED_PINCTRL_PIN(D13),
1787     ASPEED_PINCTRL_PIN(D14),
1788     ASPEED_PINCTRL_PIN(D15),
1789     ASPEED_PINCTRL_PIN(D16),
1790     ASPEED_PINCTRL_PIN(D17),
1791     ASPEED_PINCTRL_PIN(D18),
1792     ASPEED_PINCTRL_PIN(D19),
1793     ASPEED_PINCTRL_PIN(D2),
1794     ASPEED_PINCTRL_PIN(D20),
1795     ASPEED_PINCTRL_PIN(D21),
1796     ASPEED_PINCTRL_PIN(D22),
1797     ASPEED_PINCTRL_PIN(D23),
1798     ASPEED_PINCTRL_PIN(D24),
1799     ASPEED_PINCTRL_PIN(D26),
1800     ASPEED_PINCTRL_PIN(D3),
1801     ASPEED_PINCTRL_PIN(D4),
1802     ASPEED_PINCTRL_PIN(D5),
1803     ASPEED_PINCTRL_PIN(D6),
1804     ASPEED_PINCTRL_PIN(E1),
1805     ASPEED_PINCTRL_PIN(E11),
1806     ASPEED_PINCTRL_PIN(E12),
1807     ASPEED_PINCTRL_PIN(E13),
1808     ASPEED_PINCTRL_PIN(E14),
1809     ASPEED_PINCTRL_PIN(E15),
1810     ASPEED_PINCTRL_PIN(E16),
1811     ASPEED_PINCTRL_PIN(E17),
1812     ASPEED_PINCTRL_PIN(E18),
1813     ASPEED_PINCTRL_PIN(E19),
1814     ASPEED_PINCTRL_PIN(E2),
1815     ASPEED_PINCTRL_PIN(E20),
1816     ASPEED_PINCTRL_PIN(E21),
1817     ASPEED_PINCTRL_PIN(E22),
1818     ASPEED_PINCTRL_PIN(E23),
1819     ASPEED_PINCTRL_PIN(E24),
1820     ASPEED_PINCTRL_PIN(E25),
1821     ASPEED_PINCTRL_PIN(E26),
1822     ASPEED_PINCTRL_PIN(E3),
1823     ASPEED_PINCTRL_PIN(E4),
1824     ASPEED_PINCTRL_PIN(E5),
1825     ASPEED_PINCTRL_PIN(E6),
1826     ASPEED_PINCTRL_PIN(F13),
1827     ASPEED_PINCTRL_PIN(F15),
1828     ASPEED_PINCTRL_PIN(F22),
1829     ASPEED_PINCTRL_PIN(F23),
1830     ASPEED_PINCTRL_PIN(F24),
1831     ASPEED_PINCTRL_PIN(F25),
1832     ASPEED_PINCTRL_PIN(F26),
1833     ASPEED_PINCTRL_PIN(F4),
1834     ASPEED_PINCTRL_PIN(F5),
1835     ASPEED_PINCTRL_PIN(G22),
1836     ASPEED_PINCTRL_PIN(G23),
1837     ASPEED_PINCTRL_PIN(G24),
1838     ASPEED_PINCTRL_PIN(G26),
1839     ASPEED_PINCTRL_PIN(H22),
1840     ASPEED_PINCTRL_PIN(H23),
1841     ASPEED_PINCTRL_PIN(H24),
1842     ASPEED_PINCTRL_PIN(H25),
1843     ASPEED_PINCTRL_PIN(H26),
1844     ASPEED_PINCTRL_PIN(J22),
1845     ASPEED_PINCTRL_PIN(J23),
1846     ASPEED_PINCTRL_PIN(J24),
1847     ASPEED_PINCTRL_PIN(J25),
1848     ASPEED_PINCTRL_PIN(J26),
1849     ASPEED_PINCTRL_PIN(K23),
1850     ASPEED_PINCTRL_PIN(K24),
1851     ASPEED_PINCTRL_PIN(K25),
1852     ASPEED_PINCTRL_PIN(K26),
1853     ASPEED_PINCTRL_PIN(L23),
1854     ASPEED_PINCTRL_PIN(L24),
1855     ASPEED_PINCTRL_PIN(L26),
1856     ASPEED_PINCTRL_PIN(M23),
1857     ASPEED_PINCTRL_PIN(M24),
1858     ASPEED_PINCTRL_PIN(M25),
1859     ASPEED_PINCTRL_PIN(M26),
1860     ASPEED_PINCTRL_PIN(N23),
1861     ASPEED_PINCTRL_PIN(N24),
1862     ASPEED_PINCTRL_PIN(N25),
1863     ASPEED_PINCTRL_PIN(N26),
1864     ASPEED_PINCTRL_PIN(P23),
1865     ASPEED_PINCTRL_PIN(P24),
1866     ASPEED_PINCTRL_PIN(P25),
1867     ASPEED_PINCTRL_PIN(P26),
1868     ASPEED_PINCTRL_PIN(R23),
1869     ASPEED_PINCTRL_PIN(R24),
1870     ASPEED_PINCTRL_PIN(R26),
1871     ASPEED_PINCTRL_PIN(T23),
1872     ASPEED_PINCTRL_PIN(T24),
1873     ASPEED_PINCTRL_PIN(T25),
1874     ASPEED_PINCTRL_PIN(T26),
1875     ASPEED_PINCTRL_PIN(U24),
1876     ASPEED_PINCTRL_PIN(U25),
1877     ASPEED_PINCTRL_PIN(U26),
1878     ASPEED_PINCTRL_PIN(V24),
1879     ASPEED_PINCTRL_PIN(V25),
1880     ASPEED_PINCTRL_PIN(V26),
1881     ASPEED_PINCTRL_PIN(W23),
1882     ASPEED_PINCTRL_PIN(W24),
1883     ASPEED_PINCTRL_PIN(W26),
1884     ASPEED_PINCTRL_PIN(Y1),
1885     ASPEED_PINCTRL_PIN(Y2),
1886     ASPEED_PINCTRL_PIN(Y23),
1887     ASPEED_PINCTRL_PIN(Y24),
1888     ASPEED_PINCTRL_PIN(Y25),
1889     ASPEED_PINCTRL_PIN(Y26),
1890     ASPEED_PINCTRL_PIN(Y3),
1891     ASPEED_PINCTRL_PIN(Y4),
1892     ASPEED_PINCTRL_PIN(Y5),
1893 };
1894
1895 static const struct aspeed_pin_group aspeed_g6_groups[] = {
1896     ASPEED_PINCTRL_GROUP(ADC0),
1897     ASPEED_PINCTRL_GROUP(ADC1),
1898     ASPEED_PINCTRL_GROUP(ADC10),
1899     ASPEED_PINCTRL_GROUP(ADC11),
1900     ASPEED_PINCTRL_GROUP(ADC12),
1901     ASPEED_PINCTRL_GROUP(ADC13),
1902     ASPEED_PINCTRL_GROUP(ADC14),
1903     ASPEED_PINCTRL_GROUP(ADC15),
1904     ASPEED_PINCTRL_GROUP(ADC2),
1905     ASPEED_PINCTRL_GROUP(ADC3),
1906     ASPEED_PINCTRL_GROUP(ADC4),
1907     ASPEED_PINCTRL_GROUP(ADC5),
1908     ASPEED_PINCTRL_GROUP(ADC6),
1909     ASPEED_PINCTRL_GROUP(ADC7),
1910     ASPEED_PINCTRL_GROUP(ADC8),
1911     ASPEED_PINCTRL_GROUP(ADC9),
1912     ASPEED_PINCTRL_GROUP(BMCINT),
1913     ASPEED_PINCTRL_GROUP(ESPI),
1914     ASPEED_PINCTRL_GROUP(ESPIALT),
1915     ASPEED_PINCTRL_GROUP(FSI1),
1916     ASPEED_PINCTRL_GROUP(FSI2),
1917     ASPEED_PINCTRL_GROUP(FWSPIABR),
1918     ASPEED_PINCTRL_GROUP(FWSPID),
1919     ASPEED_PINCTRL_GROUP(FWQSPI),
1920     ASPEED_PINCTRL_GROUP(FWSPIWP),
1921     ASPEED_PINCTRL_GROUP(GPIT0),
1922     ASPEED_PINCTRL_GROUP(GPIT1),
1923     ASPEED_PINCTRL_GROUP(GPIT2),
1924     ASPEED_PINCTRL_GROUP(GPIT3),
1925     ASPEED_PINCTRL_GROUP(GPIT4),
1926     ASPEED_PINCTRL_GROUP(GPIT5),
1927     ASPEED_PINCTRL_GROUP(GPIT6),
1928     ASPEED_PINCTRL_GROUP(GPIT7),
1929     ASPEED_PINCTRL_GROUP(GPIU0),
1930     ASPEED_PINCTRL_GROUP(GPIU1),
1931     ASPEED_PINCTRL_GROUP(GPIU2),
1932     ASPEED_PINCTRL_GROUP(GPIU3),
1933     ASPEED_PINCTRL_GROUP(GPIU4),
1934     ASPEED_PINCTRL_GROUP(GPIU5),
1935     ASPEED_PINCTRL_GROUP(GPIU6),
1936     ASPEED_PINCTRL_GROUP(GPIU7),
1937     ASPEED_PINCTRL_GROUP(HEARTBEAT),
1938     ASPEED_PINCTRL_GROUP(HVI3C3),
1939     ASPEED_PINCTRL_GROUP(HVI3C4),
1940     ASPEED_PINCTRL_GROUP(I2C1),
1941     ASPEED_PINCTRL_GROUP(I2C10),
1942     ASPEED_PINCTRL_GROUP(I2C11),
1943     ASPEED_PINCTRL_GROUP(I2C12),
1944     ASPEED_PINCTRL_GROUP(I2C13),
1945     ASPEED_PINCTRL_GROUP(I2C14),
1946     ASPEED_PINCTRL_GROUP(I2C15),
1947     ASPEED_PINCTRL_GROUP(I2C16),
1948     ASPEED_PINCTRL_GROUP(I2C2),
1949     ASPEED_PINCTRL_GROUP(I2C3),
1950     ASPEED_PINCTRL_GROUP(I2C4),
1951     ASPEED_PINCTRL_GROUP(I2C5),
1952     ASPEED_PINCTRL_GROUP(I2C6),
1953     ASPEED_PINCTRL_GROUP(I2C7),
1954     ASPEED_PINCTRL_GROUP(I2C8),
1955     ASPEED_PINCTRL_GROUP(I2C9),
1956     ASPEED_PINCTRL_GROUP(I3C1),
1957     ASPEED_PINCTRL_GROUP(I3C2),
1958     ASPEED_PINCTRL_GROUP(I3C3),
1959     ASPEED_PINCTRL_GROUP(I3C4),
1960     ASPEED_PINCTRL_GROUP(I3C5),
1961     ASPEED_PINCTRL_GROUP(I3C6),
1962     ASPEED_PINCTRL_GROUP(JTAGM),
1963     ASPEED_PINCTRL_GROUP(LHPD),
1964     ASPEED_PINCTRL_GROUP(LHSIRQ),
1965     ASPEED_PINCTRL_GROUP(LPC),
1966     ASPEED_PINCTRL_GROUP(LPCHC),
1967     ASPEED_PINCTRL_GROUP(LPCPD),
1968     ASPEED_PINCTRL_GROUP(LPCPME),
1969     ASPEED_PINCTRL_GROUP(LPCSMI),
1970     ASPEED_PINCTRL_GROUP(LSIRQ),
1971     ASPEED_PINCTRL_GROUP(MACLINK1),
1972     ASPEED_PINCTRL_GROUP(MACLINK2),
1973     ASPEED_PINCTRL_GROUP(MACLINK3),
1974     ASPEED_PINCTRL_GROUP(MACLINK4),
1975     ASPEED_PINCTRL_GROUP(MDIO1),
1976     ASPEED_PINCTRL_GROUP(MDIO2),
1977     ASPEED_PINCTRL_GROUP(MDIO3),
1978     ASPEED_PINCTRL_GROUP(MDIO4),
1979     ASPEED_PINCTRL_GROUP(NCTS1),
1980     ASPEED_PINCTRL_GROUP(NCTS2),
1981     ASPEED_PINCTRL_GROUP(NCTS3),
1982     ASPEED_PINCTRL_GROUP(NCTS4),
1983     ASPEED_PINCTRL_GROUP(NDCD1),
1984     ASPEED_PINCTRL_GROUP(NDCD2),
1985     ASPEED_PINCTRL_GROUP(NDCD3),
1986     ASPEED_PINCTRL_GROUP(NDCD4),
1987     ASPEED_PINCTRL_GROUP(NDSR1),
1988     ASPEED_PINCTRL_GROUP(NDSR2),
1989     ASPEED_PINCTRL_GROUP(NDSR3),
1990     ASPEED_PINCTRL_GROUP(NDSR4),
1991     ASPEED_PINCTRL_GROUP(NDTR1),
1992     ASPEED_PINCTRL_GROUP(NDTR2),
1993     ASPEED_PINCTRL_GROUP(NDTR3),
1994     ASPEED_PINCTRL_GROUP(NDTR4),
1995     ASPEED_PINCTRL_GROUP(NRI1),
1996     ASPEED_PINCTRL_GROUP(NRI2),
1997     ASPEED_PINCTRL_GROUP(NRI3),
1998     ASPEED_PINCTRL_GROUP(NRI4),
1999     ASPEED_PINCTRL_GROUP(NRTS1),
2000     ASPEED_PINCTRL_GROUP(NRTS2),
2001     ASPEED_PINCTRL_GROUP(NRTS3),
2002     ASPEED_PINCTRL_GROUP(NRTS4),
2003     ASPEED_PINCTRL_GROUP(OSCCLK),
2004     ASPEED_PINCTRL_GROUP(PEWAKE),
2005     ASPEED_PINCTRL_GROUP(PWM0),
2006     ASPEED_PINCTRL_GROUP(PWM1),
2007     ASPEED_PINCTRL_GROUP(PWM10G0),
2008     ASPEED_PINCTRL_GROUP(PWM10G1),
2009     ASPEED_PINCTRL_GROUP(PWM11G0),
2010     ASPEED_PINCTRL_GROUP(PWM11G1),
2011     ASPEED_PINCTRL_GROUP(PWM12G0),
2012     ASPEED_PINCTRL_GROUP(PWM12G1),
2013     ASPEED_PINCTRL_GROUP(PWM13G0),
2014     ASPEED_PINCTRL_GROUP(PWM13G1),
2015     ASPEED_PINCTRL_GROUP(PWM14G0),
2016     ASPEED_PINCTRL_GROUP(PWM14G1),
2017     ASPEED_PINCTRL_GROUP(PWM15G0),
2018     ASPEED_PINCTRL_GROUP(PWM15G1),
2019     ASPEED_PINCTRL_GROUP(PWM2),
2020     ASPEED_PINCTRL_GROUP(PWM3),
2021     ASPEED_PINCTRL_GROUP(PWM4),
2022     ASPEED_PINCTRL_GROUP(PWM5),
2023     ASPEED_PINCTRL_GROUP(PWM6),
2024     ASPEED_PINCTRL_GROUP(PWM7),
2025     ASPEED_PINCTRL_GROUP(PWM8G0),
2026     ASPEED_PINCTRL_GROUP(PWM8G1),
2027     ASPEED_PINCTRL_GROUP(PWM9G0),
2028     ASPEED_PINCTRL_GROUP(PWM9G1),
2029     ASPEED_PINCTRL_GROUP(QSPI1),
2030     ASPEED_PINCTRL_GROUP(QSPI2),
2031     ASPEED_PINCTRL_GROUP(RGMII1),
2032     ASPEED_PINCTRL_GROUP(RGMII2),
2033     ASPEED_PINCTRL_GROUP(RGMII3),
2034     ASPEED_PINCTRL_GROUP(RGMII4),
2035     ASPEED_PINCTRL_GROUP(RMII1),
2036     ASPEED_PINCTRL_GROUP(RMII2),
2037     ASPEED_PINCTRL_GROUP(RMII3),
2038     ASPEED_PINCTRL_GROUP(RMII4),
2039     ASPEED_PINCTRL_GROUP(RXD1),
2040     ASPEED_PINCTRL_GROUP(RXD2),
2041     ASPEED_PINCTRL_GROUP(RXD3),
2042     ASPEED_PINCTRL_GROUP(RXD4),
2043     ASPEED_PINCTRL_GROUP(SALT1),
2044     ASPEED_PINCTRL_GROUP(SALT10G0),
2045     ASPEED_PINCTRL_GROUP(SALT10G1),
2046     ASPEED_PINCTRL_GROUP(SALT11G0),
2047     ASPEED_PINCTRL_GROUP(SALT11G1),
2048     ASPEED_PINCTRL_GROUP(SALT12G0),
2049     ASPEED_PINCTRL_GROUP(SALT12G1),
2050     ASPEED_PINCTRL_GROUP(SALT13G0),
2051     ASPEED_PINCTRL_GROUP(SALT13G1),
2052     ASPEED_PINCTRL_GROUP(SALT14G0),
2053     ASPEED_PINCTRL_GROUP(SALT14G1),
2054     ASPEED_PINCTRL_GROUP(SALT15G0),
2055     ASPEED_PINCTRL_GROUP(SALT15G1),
2056     ASPEED_PINCTRL_GROUP(SALT16G0),
2057     ASPEED_PINCTRL_GROUP(SALT16G1),
2058     ASPEED_PINCTRL_GROUP(SALT2),
2059     ASPEED_PINCTRL_GROUP(SALT3),
2060     ASPEED_PINCTRL_GROUP(SALT4),
2061     ASPEED_PINCTRL_GROUP(SALT5),
2062     ASPEED_PINCTRL_GROUP(SALT6),
2063     ASPEED_PINCTRL_GROUP(SALT7),
2064     ASPEED_PINCTRL_GROUP(SALT8),
2065     ASPEED_PINCTRL_GROUP(SALT9G0),
2066     ASPEED_PINCTRL_GROUP(SALT9G1),
2067     ASPEED_PINCTRL_GROUP(SD1),
2068     ASPEED_PINCTRL_GROUP(SD2),
2069     ASPEED_PINCTRL_GROUP(EMMCG1),
2070     ASPEED_PINCTRL_GROUP(EMMCG4),
2071     ASPEED_PINCTRL_GROUP(EMMCG8),
2072     ASPEED_PINCTRL_GROUP(SGPM1),
2073     ASPEED_PINCTRL_GROUP(SGPM2),
2074     ASPEED_PINCTRL_GROUP(SGPS1),
2075     ASPEED_PINCTRL_GROUP(SGPS2),
2076     ASPEED_PINCTRL_GROUP(SIOONCTRL),
2077     ASPEED_PINCTRL_GROUP(SIOPBI),
2078     ASPEED_PINCTRL_GROUP(SIOPBO),
2079     ASPEED_PINCTRL_GROUP(SIOPWREQ),
2080     ASPEED_PINCTRL_GROUP(SIOPWRGD),
2081     ASPEED_PINCTRL_GROUP(SIOS3),
2082     ASPEED_PINCTRL_GROUP(SIOS5),
2083     ASPEED_PINCTRL_GROUP(SIOSCI),
2084     ASPEED_PINCTRL_GROUP(SPI1),
2085     ASPEED_PINCTRL_GROUP(SPI1ABR),
2086     ASPEED_PINCTRL_GROUP(SPI1CS1),
2087     ASPEED_PINCTRL_GROUP(SPI1WP),
2088     ASPEED_PINCTRL_GROUP(SPI2),
2089     ASPEED_PINCTRL_GROUP(SPI2CS1),
2090     ASPEED_PINCTRL_GROUP(SPI2CS2),
2091     ASPEED_PINCTRL_GROUP(TACH0),
2092     ASPEED_PINCTRL_GROUP(TACH1),
2093     ASPEED_PINCTRL_GROUP(TACH10),
2094     ASPEED_PINCTRL_GROUP(TACH11),
2095     ASPEED_PINCTRL_GROUP(TACH12),
2096     ASPEED_PINCTRL_GROUP(TACH13),
2097     ASPEED_PINCTRL_GROUP(TACH14),
2098     ASPEED_PINCTRL_GROUP(TACH15),
2099     ASPEED_PINCTRL_GROUP(TACH2),
2100     ASPEED_PINCTRL_GROUP(TACH3),
2101     ASPEED_PINCTRL_GROUP(TACH4),
2102     ASPEED_PINCTRL_GROUP(TACH5),
2103     ASPEED_PINCTRL_GROUP(TACH6),
2104     ASPEED_PINCTRL_GROUP(TACH7),
2105     ASPEED_PINCTRL_GROUP(TACH8),
2106     ASPEED_PINCTRL_GROUP(TACH9),
2107     ASPEED_PINCTRL_GROUP(THRU0),
2108     ASPEED_PINCTRL_GROUP(THRU1),
2109     ASPEED_PINCTRL_GROUP(THRU2),
2110     ASPEED_PINCTRL_GROUP(THRU3),
2111     ASPEED_PINCTRL_GROUP(TXD1),
2112     ASPEED_PINCTRL_GROUP(TXD2),
2113     ASPEED_PINCTRL_GROUP(TXD3),
2114     ASPEED_PINCTRL_GROUP(TXD4),
2115     ASPEED_PINCTRL_GROUP(UART10),
2116     ASPEED_PINCTRL_GROUP(UART11),
2117     ASPEED_PINCTRL_GROUP(UART12G0),
2118     ASPEED_PINCTRL_GROUP(UART12G1),
2119     ASPEED_PINCTRL_GROUP(UART13G0),
2120     ASPEED_PINCTRL_GROUP(UART13G1),
2121     ASPEED_PINCTRL_GROUP(UART6),
2122     ASPEED_PINCTRL_GROUP(UART7),
2123     ASPEED_PINCTRL_GROUP(UART8),
2124     ASPEED_PINCTRL_GROUP(UART9),
2125     ASPEED_PINCTRL_GROUP(USBA),
2126     ASPEED_PINCTRL_GROUP(USBB),
2127     ASPEED_PINCTRL_GROUP(VB),
2128     ASPEED_PINCTRL_GROUP(VGAHS),
2129     ASPEED_PINCTRL_GROUP(VGAVS),
2130     ASPEED_PINCTRL_GROUP(WDTRST1),
2131     ASPEED_PINCTRL_GROUP(WDTRST2),
2132     ASPEED_PINCTRL_GROUP(WDTRST3),
2133     ASPEED_PINCTRL_GROUP(WDTRST4),
2134 };
2135
2136 static const struct aspeed_pin_function aspeed_g6_functions[] = {
2137     ASPEED_PINCTRL_FUNC(ADC0),
2138     ASPEED_PINCTRL_FUNC(ADC1),
2139     ASPEED_PINCTRL_FUNC(ADC10),
2140     ASPEED_PINCTRL_FUNC(ADC11),
2141     ASPEED_PINCTRL_FUNC(ADC12),
2142     ASPEED_PINCTRL_FUNC(ADC13),
2143     ASPEED_PINCTRL_FUNC(ADC14),
2144     ASPEED_PINCTRL_FUNC(ADC15),
2145     ASPEED_PINCTRL_FUNC(ADC2),
2146     ASPEED_PINCTRL_FUNC(ADC3),
2147     ASPEED_PINCTRL_FUNC(ADC4),
2148     ASPEED_PINCTRL_FUNC(ADC5),
2149     ASPEED_PINCTRL_FUNC(ADC6),
2150     ASPEED_PINCTRL_FUNC(ADC7),
2151     ASPEED_PINCTRL_FUNC(ADC8),
2152     ASPEED_PINCTRL_FUNC(ADC9),
2153     ASPEED_PINCTRL_FUNC(BMCINT),
2154     ASPEED_PINCTRL_FUNC(EMMC),
2155     ASPEED_PINCTRL_FUNC(ESPI),
2156     ASPEED_PINCTRL_FUNC(ESPIALT),
2157     ASPEED_PINCTRL_FUNC(FSI1),
2158     ASPEED_PINCTRL_FUNC(FSI2),
2159     ASPEED_PINCTRL_FUNC(FWSPIABR),
2160     ASPEED_PINCTRL_FUNC(FWSPID),
2161     ASPEED_PINCTRL_FUNC(FWQSPI),
2162     ASPEED_PINCTRL_FUNC(FWSPIWP),
2163     ASPEED_PINCTRL_FUNC(GPIT0),
2164     ASPEED_PINCTRL_FUNC(GPIT1),
2165     ASPEED_PINCTRL_FUNC(GPIT2),
2166     ASPEED_PINCTRL_FUNC(GPIT3),
2167     ASPEED_PINCTRL_FUNC(GPIT4),
2168     ASPEED_PINCTRL_FUNC(GPIT5),
2169     ASPEED_PINCTRL_FUNC(GPIT6),
2170     ASPEED_PINCTRL_FUNC(GPIT7),
2171     ASPEED_PINCTRL_FUNC(GPIU0),
2172     ASPEED_PINCTRL_FUNC(GPIU1),
2173     ASPEED_PINCTRL_FUNC(GPIU2),
2174     ASPEED_PINCTRL_FUNC(GPIU3),
2175     ASPEED_PINCTRL_FUNC(GPIU4),
2176     ASPEED_PINCTRL_FUNC(GPIU5),
2177     ASPEED_PINCTRL_FUNC(GPIU6),
2178     ASPEED_PINCTRL_FUNC(GPIU7),
2179     ASPEED_PINCTRL_FUNC(HEARTBEAT),
2180     ASPEED_PINCTRL_FUNC(I2C1),
2181     ASPEED_PINCTRL_FUNC(I2C10),
2182     ASPEED_PINCTRL_FUNC(I2C11),
2183     ASPEED_PINCTRL_FUNC(I2C12),
2184     ASPEED_PINCTRL_FUNC(I2C13),
2185     ASPEED_PINCTRL_FUNC(I2C14),
2186     ASPEED_PINCTRL_FUNC(I2C15),
2187     ASPEED_PINCTRL_FUNC(I2C16),
2188     ASPEED_PINCTRL_FUNC(I2C2),
2189     ASPEED_PINCTRL_FUNC(I2C3),
2190     ASPEED_PINCTRL_FUNC(I2C4),
2191     ASPEED_PINCTRL_FUNC(I2C5),
2192     ASPEED_PINCTRL_FUNC(I2C6),
2193     ASPEED_PINCTRL_FUNC(I2C7),
2194     ASPEED_PINCTRL_FUNC(I2C8),
2195     ASPEED_PINCTRL_FUNC(I2C9),
2196     ASPEED_PINCTRL_FUNC(I3C1),
2197     ASPEED_PINCTRL_FUNC(I3C2),
2198     ASPEED_PINCTRL_FUNC(I3C3),
2199     ASPEED_PINCTRL_FUNC(I3C4),
2200     ASPEED_PINCTRL_FUNC(I3C5),
2201     ASPEED_PINCTRL_FUNC(I3C6),
2202     ASPEED_PINCTRL_FUNC(JTAGM),
2203     ASPEED_PINCTRL_FUNC(LHPD),
2204     ASPEED_PINCTRL_FUNC(LHSIRQ),
2205     ASPEED_PINCTRL_FUNC(LPC),
2206     ASPEED_PINCTRL_FUNC(LPCHC),
2207     ASPEED_PINCTRL_FUNC(LPCPD),
2208     ASPEED_PINCTRL_FUNC(LPCPME),
2209     ASPEED_PINCTRL_FUNC(LPCSMI),
2210     ASPEED_PINCTRL_FUNC(LSIRQ),
2211     ASPEED_PINCTRL_FUNC(MACLINK1),
2212     ASPEED_PINCTRL_FUNC(MACLINK2),
2213     ASPEED_PINCTRL_FUNC(MACLINK3),
2214     ASPEED_PINCTRL_FUNC(MACLINK4),
2215     ASPEED_PINCTRL_FUNC(MDIO1),
2216     ASPEED_PINCTRL_FUNC(MDIO2),
2217     ASPEED_PINCTRL_FUNC(MDIO3),
2218     ASPEED_PINCTRL_FUNC(MDIO4),
2219     ASPEED_PINCTRL_FUNC(NCTS1),
2220     ASPEED_PINCTRL_FUNC(NCTS2),
2221     ASPEED_PINCTRL_FUNC(NCTS3),
2222     ASPEED_PINCTRL_FUNC(NCTS4),
2223     ASPEED_PINCTRL_FUNC(NDCD1),
2224     ASPEED_PINCTRL_FUNC(NDCD2),
2225     ASPEED_PINCTRL_FUNC(NDCD3),
2226     ASPEED_PINCTRL_FUNC(NDCD4),
2227     ASPEED_PINCTRL_FUNC(NDSR1),
2228     ASPEED_PINCTRL_FUNC(NDSR2),
2229     ASPEED_PINCTRL_FUNC(NDSR3),
2230     ASPEED_PINCTRL_FUNC(NDSR4),
2231     ASPEED_PINCTRL_FUNC(NDTR1),
2232     ASPEED_PINCTRL_FUNC(NDTR2),
2233     ASPEED_PINCTRL_FUNC(NDTR3),
2234     ASPEED_PINCTRL_FUNC(NDTR4),
2235     ASPEED_PINCTRL_FUNC(NRI1),
2236     ASPEED_PINCTRL_FUNC(NRI2),
2237     ASPEED_PINCTRL_FUNC(NRI3),
2238     ASPEED_PINCTRL_FUNC(NRI4),
2239     ASPEED_PINCTRL_FUNC(NRTS1),
2240     ASPEED_PINCTRL_FUNC(NRTS2),
2241     ASPEED_PINCTRL_FUNC(NRTS3),
2242     ASPEED_PINCTRL_FUNC(NRTS4),
2243     ASPEED_PINCTRL_FUNC(OSCCLK),
2244     ASPEED_PINCTRL_FUNC(PEWAKE),
2245     ASPEED_PINCTRL_FUNC(PWM0),
2246     ASPEED_PINCTRL_FUNC(PWM1),
2247     ASPEED_PINCTRL_FUNC(PWM10),
2248     ASPEED_PINCTRL_FUNC(PWM11),
2249     ASPEED_PINCTRL_FUNC(PWM12),
2250     ASPEED_PINCTRL_FUNC(PWM13),
2251     ASPEED_PINCTRL_FUNC(PWM14),
2252     ASPEED_PINCTRL_FUNC(PWM15),
2253     ASPEED_PINCTRL_FUNC(PWM2),
2254     ASPEED_PINCTRL_FUNC(PWM3),
2255     ASPEED_PINCTRL_FUNC(PWM4),
2256     ASPEED_PINCTRL_FUNC(PWM5),
2257     ASPEED_PINCTRL_FUNC(PWM6),
2258     ASPEED_PINCTRL_FUNC(PWM7),
2259     ASPEED_PINCTRL_FUNC(PWM8),
2260     ASPEED_PINCTRL_FUNC(PWM9),
2261     ASPEED_PINCTRL_FUNC(RGMII1),
2262     ASPEED_PINCTRL_FUNC(RGMII2),
2263     ASPEED_PINCTRL_FUNC(RGMII3),
2264     ASPEED_PINCTRL_FUNC(RGMII4),
2265     ASPEED_PINCTRL_FUNC(RMII1),
2266     ASPEED_PINCTRL_FUNC(RMII2),
2267     ASPEED_PINCTRL_FUNC(RMII3),
2268     ASPEED_PINCTRL_FUNC(RMII4),
2269     ASPEED_PINCTRL_FUNC(RXD1),
2270     ASPEED_PINCTRL_FUNC(RXD2),
2271     ASPEED_PINCTRL_FUNC(RXD3),
2272     ASPEED_PINCTRL_FUNC(RXD4),
2273     ASPEED_PINCTRL_FUNC(SALT1),
2274     ASPEED_PINCTRL_FUNC(SALT10),
2275     ASPEED_PINCTRL_FUNC(SALT11),
2276     ASPEED_PINCTRL_FUNC(SALT12),
2277     ASPEED_PINCTRL_FUNC(SALT13),
2278     ASPEED_PINCTRL_FUNC(SALT14),
2279     ASPEED_PINCTRL_FUNC(SALT15),
2280     ASPEED_PINCTRL_FUNC(SALT16),
2281     ASPEED_PINCTRL_FUNC(SALT2),
2282     ASPEED_PINCTRL_FUNC(SALT3),
2283     ASPEED_PINCTRL_FUNC(SALT4),
2284     ASPEED_PINCTRL_FUNC(SALT5),
2285     ASPEED_PINCTRL_FUNC(SALT6),
2286     ASPEED_PINCTRL_FUNC(SALT7),
2287     ASPEED_PINCTRL_FUNC(SALT8),
2288     ASPEED_PINCTRL_FUNC(SALT9),
2289     ASPEED_PINCTRL_FUNC(SD1),
2290     ASPEED_PINCTRL_FUNC(SD2),
2291     ASPEED_PINCTRL_FUNC(SGPM1),
2292     ASPEED_PINCTRL_FUNC(SGPM2),
2293     ASPEED_PINCTRL_FUNC(SGPS1),
2294     ASPEED_PINCTRL_FUNC(SGPS2),
2295     ASPEED_PINCTRL_FUNC(SIOONCTRL),
2296     ASPEED_PINCTRL_FUNC(SIOPBI),
2297     ASPEED_PINCTRL_FUNC(SIOPBO),
2298     ASPEED_PINCTRL_FUNC(SIOPWREQ),
2299     ASPEED_PINCTRL_FUNC(SIOPWRGD),
2300     ASPEED_PINCTRL_FUNC(SIOS3),
2301     ASPEED_PINCTRL_FUNC(SIOS5),
2302     ASPEED_PINCTRL_FUNC(SIOSCI),
2303     ASPEED_PINCTRL_FUNC(SPI1),
2304     ASPEED_PINCTRL_FUNC(SPI1ABR),
2305     ASPEED_PINCTRL_FUNC(SPI1CS1),
2306     ASPEED_PINCTRL_FUNC(SPI1WP),
2307     ASPEED_PINCTRL_FUNC(SPI2),
2308     ASPEED_PINCTRL_FUNC(SPI2CS1),
2309     ASPEED_PINCTRL_FUNC(SPI2CS2),
2310     ASPEED_PINCTRL_FUNC(TACH0),
2311     ASPEED_PINCTRL_FUNC(TACH1),
2312     ASPEED_PINCTRL_FUNC(TACH10),
2313     ASPEED_PINCTRL_FUNC(TACH11),
2314     ASPEED_PINCTRL_FUNC(TACH12),
2315     ASPEED_PINCTRL_FUNC(TACH13),
2316     ASPEED_PINCTRL_FUNC(TACH14),
2317     ASPEED_PINCTRL_FUNC(TACH15),
2318     ASPEED_PINCTRL_FUNC(TACH2),
2319     ASPEED_PINCTRL_FUNC(TACH3),
2320     ASPEED_PINCTRL_FUNC(TACH4),
2321     ASPEED_PINCTRL_FUNC(TACH5),
2322     ASPEED_PINCTRL_FUNC(TACH6),
2323     ASPEED_PINCTRL_FUNC(TACH7),
2324     ASPEED_PINCTRL_FUNC(TACH8),
2325     ASPEED_PINCTRL_FUNC(TACH9),
2326     ASPEED_PINCTRL_FUNC(THRU0),
2327     ASPEED_PINCTRL_FUNC(THRU1),
2328     ASPEED_PINCTRL_FUNC(THRU2),
2329     ASPEED_PINCTRL_FUNC(THRU3),
2330     ASPEED_PINCTRL_FUNC(TXD1),
2331     ASPEED_PINCTRL_FUNC(TXD2),
2332     ASPEED_PINCTRL_FUNC(TXD3),
2333     ASPEED_PINCTRL_FUNC(TXD4),
2334     ASPEED_PINCTRL_FUNC(UART10),
2335     ASPEED_PINCTRL_FUNC(UART11),
2336     ASPEED_PINCTRL_FUNC(UART12),
2337     ASPEED_PINCTRL_FUNC(UART13),
2338     ASPEED_PINCTRL_FUNC(UART6),
2339     ASPEED_PINCTRL_FUNC(UART7),
2340     ASPEED_PINCTRL_FUNC(UART8),
2341     ASPEED_PINCTRL_FUNC(UART9),
2342     ASPEED_PINCTRL_FUNC(USB11BHID),
2343     ASPEED_PINCTRL_FUNC(USB2AD),
2344     ASPEED_PINCTRL_FUNC(USB2ADP),
2345     ASPEED_PINCTRL_FUNC(USB2AH),
2346     ASPEED_PINCTRL_FUNC(USB2AHP),
2347     ASPEED_PINCTRL_FUNC(USB2BD),
2348     ASPEED_PINCTRL_FUNC(USB2BH),
2349     ASPEED_PINCTRL_FUNC(VB),
2350     ASPEED_PINCTRL_FUNC(VGAHS),
2351     ASPEED_PINCTRL_FUNC(VGAVS),
2352     ASPEED_PINCTRL_FUNC(WDTRST1),
2353     ASPEED_PINCTRL_FUNC(WDTRST2),
2354     ASPEED_PINCTRL_FUNC(WDTRST3),
2355     ASPEED_PINCTRL_FUNC(WDTRST4),
2356 };
2357
2358 static struct aspeed_pin_config aspeed_g6_configs[] = {
2359     /* GPIOB7 */
2360     ASPEED_PULL_DOWN_PINCONF(J24, SCU610, 15),
2361     /* GPIOB6 */
2362     ASPEED_PULL_DOWN_PINCONF(H25, SCU610, 14),
2363     /* GPIOB5 */
2364     ASPEED_PULL_DOWN_PINCONF(G26, SCU610, 13),
2365     /* GPIOB4 */
2366     ASPEED_PULL_DOWN_PINCONF(J23, SCU610, 12),
2367     /* GPIOB3 */
2368     ASPEED_PULL_DOWN_PINCONF(J25, SCU610, 11),
2369     /* GPIOB2 */
2370     ASPEED_PULL_DOWN_PINCONF(H26, SCU610, 10),
2371     /* GPIOB1 */
2372     ASPEED_PULL_DOWN_PINCONF(K23, SCU610, 9),
2373     /* GPIOB0 */
2374     ASPEED_PULL_DOWN_PINCONF(J26, SCU610, 8),
2375
2376     /* GPIOH3 */
2377     ASPEED_PULL_DOWN_PINCONF(A17, SCU614, 27),
2378     /* GPIOH2 */
2379     ASPEED_PULL_DOWN_PINCONF(C18, SCU614, 26),
2380     /* GPIOH1 */
2381     ASPEED_PULL_DOWN_PINCONF(B18, SCU614, 25),
2382     /* GPIOH0 */
2383     ASPEED_PULL_DOWN_PINCONF(A18, SCU614, 24),
2384
2385     /* GPIOL7 */
2386     ASPEED_PULL_DOWN_PINCONF(C14, SCU618, 31),
2387     /* GPIOL6 */
2388     ASPEED_PULL_DOWN_PINCONF(B14, SCU618, 30),
2389     /* GPIOL5 */
2390     ASPEED_PULL_DOWN_PINCONF(F15, SCU618, 29),
2391     /* GPIOL4 */
2392     ASPEED_PULL_DOWN_PINCONF(C15, SCU618, 28),
2393
2394     /* GPIOJ7 */
2395     ASPEED_PULL_UP_PINCONF(D19, SCU618, 15),
2396     /* GPIOJ6 */
2397     ASPEED_PULL_UP_PINCONF(C20, SCU618, 14),
2398     /* GPIOJ5 */
2399     ASPEED_PULL_UP_PINCONF(A19, SCU618, 13),
2400     /* GPIOJ4 */
2401     ASPEED_PULL_UP_PINCONF(C19, SCU618, 12),
2402     /* GPIOJ3 */
2403     ASPEED_PULL_UP_PINCONF(D20, SCU618, 11),
2404     /* GPIOJ2 */
2405     ASPEED_PULL_UP_PINCONF(E19, SCU618, 10),
2406     /* GPIOJ1 */
2407     ASPEED_PULL_UP_PINCONF(A20, SCU618, 9),
2408     /* GPIOJ0 */
2409     ASPEED_PULL_UP_PINCONF(B20, SCU618, 8),
2410
2411     /* GPIOI7 */
2412     ASPEED_PULL_DOWN_PINCONF(A15, SCU618, 7),
2413     /* GPIOI6 */
2414     ASPEED_PULL_DOWN_PINCONF(B16, SCU618, 6),
2415     /* GPIOI5 */
2416     ASPEED_PULL_DOWN_PINCONF(E16, SCU618, 5),
2417     /* GPIOI4 */
2418     ASPEED_PULL_DOWN_PINCONF(C16, SCU618, 4),
2419     /* GPIOI3 */
2420     ASPEED_PULL_DOWN_PINCONF(D16, SCU618, 3),
2421     /* GPIOI2 */
2422     ASPEED_PULL_DOWN_PINCONF(E17, SCU618, 2),
2423     /* GPIOI1 */
2424     ASPEED_PULL_DOWN_PINCONF(A16, SCU618, 1),
2425     /* GPIOI0 */
2426     ASPEED_PULL_DOWN_PINCONF(D17, SCU618, 0),
2427
2428     /* GPIOP7 */
2429     ASPEED_PULL_DOWN_PINCONF(Y23, SCU61C, 31),
2430     /* GPIOP6 */
2431     ASPEED_PULL_DOWN_PINCONF(AB24, SCU61C, 30),
2432     /* GPIOP5 */
2433     ASPEED_PULL_DOWN_PINCONF(AB23, SCU61C, 29),
2434     /* GPIOP4 */
2435     ASPEED_PULL_DOWN_PINCONF(W23, SCU61C, 28),
2436     /* GPIOP3 */
2437     ASPEED_PULL_DOWN_PINCONF(AA24, SCU61C, 27),
2438     /* GPIOP2 */
2439     ASPEED_PULL_DOWN_PINCONF(AA23, SCU61C, 26),
2440     /* GPIOP1 */
2441     ASPEED_PULL_DOWN_PINCONF(W24, SCU61C, 25),
2442     /* GPIOP0 */
2443     ASPEED_PULL_DOWN_PINCONF(AB22, SCU61C, 24),
2444
2445     /* GPIOO7 */
2446     ASPEED_PULL_DOWN_PINCONF(AC23, SCU61C, 23),
2447     /* GPIOO6 */
2448     ASPEED_PULL_DOWN_PINCONF(AC24, SCU61C, 22),
2449     /* GPIOO5 */
2450     ASPEED_PULL_DOWN_PINCONF(AC22, SCU61C, 21),
2451     /* GPIOO4 */
2452     ASPEED_PULL_DOWN_PINCONF(AD25, SCU61C, 20),
2453     /* GPIOO3 */
2454     ASPEED_PULL_DOWN_PINCONF(AD24, SCU61C, 19),
2455     /* GPIOO2 */
2456     ASPEED_PULL_DOWN_PINCONF(AD23, SCU61C, 18),
2457     /* GPIOO1 */
2458     ASPEED_PULL_DOWN_PINCONF(AD22, SCU61C, 17),
2459     /* GPIOO0 */
2460     ASPEED_PULL_DOWN_PINCONF(AD26, SCU61C, 16),
2461
2462     /* GPION7 */
2463     ASPEED_PULL_DOWN_PINCONF(M26, SCU61C, 15),
2464     /* GPION6 */
2465     ASPEED_PULL_DOWN_PINCONF(N26, SCU61C, 14),
2466     /* GPION5 */
2467     ASPEED_PULL_DOWN_PINCONF(M23, SCU61C, 13),
2468     /* GPION4 */
2469     ASPEED_PULL_DOWN_PINCONF(P26, SCU61C, 12),
2470     /* GPION3 */
2471     ASPEED_PULL_DOWN_PINCONF(N24, SCU61C, 11),
2472     /* GPION2 */
2473     ASPEED_PULL_DOWN_PINCONF(N25, SCU61C, 10),
2474     /* GPION1 */
2475     ASPEED_PULL_DOWN_PINCONF(N23, SCU61C, 9),
2476     /* GPION0 */
2477     ASPEED_PULL_DOWN_PINCONF(P25, SCU61C, 8),
2478
2479     /* GPIOM7 */
2480     ASPEED_PULL_DOWN_PINCONF(D13, SCU61C, 7),
2481     /* GPIOM6 */
2482     ASPEED_PULL_DOWN_PINCONF(C13, SCU61C, 6),
2483     /* GPIOM5 */
2484     ASPEED_PULL_DOWN_PINCONF(C12, SCU61C, 5),
2485     /* GPIOM4 */
2486     ASPEED_PULL_DOWN_PINCONF(B12, SCU61C, 4),
2487     /* GPIOM3 */
2488     ASPEED_PULL_DOWN_PINCONF(E14, SCU61C, 3),
2489     /* GPIOM2 */
2490     ASPEED_PULL_DOWN_PINCONF(A12, SCU61C, 2),
2491     /* GPIOM1 */
2492     ASPEED_PULL_DOWN_PINCONF(B13, SCU61C, 1),
2493     /* GPIOM0 */
2494     ASPEED_PULL_DOWN_PINCONF(D14, SCU61C, 0),
2495
2496     /* GPIOS7 */
2497     ASPEED_PULL_DOWN_PINCONF(T24, SCU620, 23),
2498     /* GPIOS6 */
2499     ASPEED_PULL_DOWN_PINCONF(P23, SCU620, 22),
2500     /* GPIOS5 */
2501     ASPEED_PULL_DOWN_PINCONF(P24, SCU620, 21),
2502     /* GPIOS4 */
2503     ASPEED_PULL_DOWN_PINCONF(R26, SCU620, 20),
2504     /* GPIOS3*/
2505     ASPEED_PULL_DOWN_PINCONF(R24, SCU620, 19),
2506     /* GPIOS2 */
2507     ASPEED_PULL_DOWN_PINCONF(T26, SCU620, 18),
2508     /* GPIOS1 */
2509     ASPEED_PULL_DOWN_PINCONF(T25, SCU620, 17),
2510     /* GPIOS0 */
2511     ASPEED_PULL_DOWN_PINCONF(R23, SCU620, 16),
2512
2513     /* GPIOR7 */
2514     ASPEED_PULL_DOWN_PINCONF(U26, SCU620, 15),
2515     /* GPIOR6 */
2516     ASPEED_PULL_DOWN_PINCONF(W26, SCU620, 14),
2517     /* GPIOR5 */
2518     ASPEED_PULL_DOWN_PINCONF(T23, SCU620, 13),
2519     /* GPIOR4 */
2520     ASPEED_PULL_DOWN_PINCONF(U25, SCU620, 12),
2521     /* GPIOR3*/
2522     ASPEED_PULL_DOWN_PINCONF(V26, SCU620, 11),
2523     /* GPIOR2 */
2524     ASPEED_PULL_DOWN_PINCONF(V24, SCU620, 10),
2525     /* GPIOR1 */
2526     ASPEED_PULL_DOWN_PINCONF(U24, SCU620, 9),
2527     /* GPIOR0 */
2528     ASPEED_PULL_DOWN_PINCONF(V25, SCU620, 8),
2529
2530     /* GPIOX7 */
2531     ASPEED_PULL_DOWN_PINCONF(AB10, SCU634, 31),
2532     /* GPIOX6 */
2533     ASPEED_PULL_DOWN_PINCONF(AF9, SCU634, 30),
2534     /* GPIOX5 */
2535     ASPEED_PULL_DOWN_PINCONF(AD9, SCU634, 29),
2536     /* GPIOX4 */
2537     ASPEED_PULL_DOWN_PINCONF(AB9, SCU634, 28),
2538     /* GPIOX3*/
2539     ASPEED_PULL_DOWN_PINCONF(AF8, SCU634, 27),
2540     /* GPIOX2 */
2541     ASPEED_PULL_DOWN_PINCONF(AC9, SCU634, 26),
2542     /* GPIOX1 */
2543     ASPEED_PULL_DOWN_PINCONF(AA9, SCU634, 25),
2544     /* GPIOX0 */
2545     ASPEED_PULL_DOWN_PINCONF(AE8, SCU634, 24),
2546
2547     /* GPIOV7 */
2548     ASPEED_PULL_DOWN_PINCONF(AF15, SCU634, 15),
2549     /* GPIOV6 */
2550     ASPEED_PULL_DOWN_PINCONF(AD15, SCU634, 14),
2551     /* GPIOV5 */
2552     ASPEED_PULL_DOWN_PINCONF(AE14, SCU634, 13),
2553     /* GPIOV4 */
2554     ASPEED_PULL_DOWN_PINCONF(AE15, SCU634, 12),
2555     /* GPIOV3*/
2556     ASPEED_PULL_DOWN_PINCONF(AC15, SCU634, 11),
2557     /* GPIOV2 */
2558     ASPEED_PULL_DOWN_PINCONF(AD14, SCU634, 10),
2559     /* GPIOV1 */
2560     ASPEED_PULL_DOWN_PINCONF(AF14, SCU634, 9),
2561     /* GPIOV0 */
2562     ASPEED_PULL_DOWN_PINCONF(AB15, SCU634, 8),
2563
2564     /* GPIOZ7 */
2565     ASPEED_PULL_DOWN_PINCONF(AF10, SCU638, 15),
2566     /* GPIOZ6 */
2567     ASPEED_PULL_DOWN_PINCONF(AD11, SCU638, 14),
2568     /* GPIOZ5 */
2569     ASPEED_PULL_DOWN_PINCONF(AA11, SCU638, 13),
2570     /* GPIOZ4 */
2571     ASPEED_PULL_DOWN_PINCONF(AC11, SCU638, 12),
2572     /* GPIOZ3*/
2573     ASPEED_PULL_DOWN_PINCONF(AB11, SCU638, 11),
2574
2575     /* GPIOZ1 */
2576     ASPEED_PULL_DOWN_PINCONF(AD10, SCU638, 9),
2577     /* GPIOZ0 */
2578     ASPEED_PULL_DOWN_PINCONF(AC10, SCU638, 8),
2579
2580     /* GPIOY6 */
2581     ASPEED_PULL_DOWN_PINCONF(AC12, SCU638, 6),
2582     /* GPIOY5 */
2583     ASPEED_PULL_DOWN_PINCONF(AF12, SCU638, 5),
2584     /* GPIOY4 */
2585     ASPEED_PULL_DOWN_PINCONF(AE12, SCU638, 4),
2586     /* GPIOY3 */
2587     ASPEED_PULL_DOWN_PINCONF(AA12, SCU638, 3),
2588     /* GPIOY2 */
2589     ASPEED_PULL_DOWN_PINCONF(AE11, SCU638, 2),
2590     /* GPIOY1 */
2591     ASPEED_PULL_DOWN_PINCONF(AD12, SCU638, 1),
2592     /* GPIOY0 */
2593     ASPEED_PULL_DOWN_PINCONF(AF11, SCU638, 0),
2594
2595     /* LAD3 */
2596     { PIN_CONFIG_DRIVE_STRENGTH, { AC7, AC7 }, SCU454, GENMASK(31, 30)},
2597     /* LAD2 */
2598     { PIN_CONFIG_DRIVE_STRENGTH, { AC8, AC8 }, SCU454, GENMASK(29, 28)},
2599     /* LAD1 */
2600     { PIN_CONFIG_DRIVE_STRENGTH, { AB8, AB8 }, SCU454, GENMASK(27, 26)},
2601     /* LAD0 */
2602     { PIN_CONFIG_DRIVE_STRENGTH, { AB7, AB7 }, SCU454, GENMASK(25, 24)},
2603
2604     /* MAC3 */
2605     { PIN_CONFIG_POWER_SOURCE,   { H24, E26 }, SCU458, BIT_MASK(4)},
2606     { PIN_CONFIG_DRIVE_STRENGTH, { H24, E26 }, SCU458, GENMASK(1, 0)},
2607     /* MAC4 */
2608     { PIN_CONFIG_POWER_SOURCE,   { F24, B24 }, SCU458, BIT_MASK(5)},
2609     { PIN_CONFIG_DRIVE_STRENGTH, { F24, B24 }, SCU458, GENMASK(3, 2)},
2610
2611     /* GPIO18E */
2612     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, Y1, Y4, SCU40C, 4),
2613     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   Y1, Y4, SCU40C, 4),
2614     /* GPIO18D */
2615     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, AB4, AC5, SCU40C, 3),
2616     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   AB4, AC5, SCU40C, 3),
2617     /* GPIO18C */
2618     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E4, E1, SCU40C, 2),
2619     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   E4, E1, SCU40C, 2),
2620     /* GPIO18B */
2621     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D3, SCU40C, 1),
2622     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   B2, D3, SCU40C, 1),
2623     /* GPIO18A */
2624     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C6, A2, SCU40C, 0),
2625     ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   C6, A2, SCU40C, 0),
2626 };
2627
2628 /**
2629  * aspeed_g6_sig_expr_set() - Configure a pin's signal by applying an
2630  * expression's descriptor state for all descriptors in the expression.
2631  *
2632  * @ctx: The pinmux context
2633  * @expr: The expression associated with the function whose signal is to be
2634  *        configured
2635  * @enable: true to enable an function's signal through a pin's signal
2636  *          expression, false to disable the function's signal
2637  *
2638  * Return: 0 if the expression is configured as requested and a negative error
2639  * code otherwise
2640  */
2641 static int aspeed_g6_sig_expr_set(struct aspeed_pinmux_data *ctx,
2642                   const struct aspeed_sig_expr *expr,
2643                   bool enable)
2644 {
2645     int ret;
2646     int i;
2647
2648     for (i = 0; i < expr->ndescs; i++) {
2649         const struct aspeed_sig_desc *desc = &expr->descs[i];
2650         u32 pattern = enable ? desc->enable : desc->disable;
2651         u32 val = (pattern << __ffs(desc->mask));
2652         bool is_strap;
2653
2654         if (!ctx->maps[desc->ip])
2655             return -ENODEV;
2656
2657         WARN_ON(desc->ip != ASPEED_IP_SCU);
2658         is_strap = desc->reg == SCU500 || desc->reg == SCU510;
2659
2660         if (is_strap) {
2661             /*
2662              * The AST2600 has write protection mask registers for
2663              * the hardware strapping in SCU508 and SCU518. Assume
2664              * that if the platform doesn't want the strapping
2665              * values changed that it has set the write mask.
2666              *
2667              * The strapping registers implement write-1-clear
2668              * behaviour. SCU500 is paired with clear writes on
2669              * SCU504, likewise SCU510 is paired with SCU514.
2670              */
2671             u32 clear = ~val & desc->mask;
2672             u32 w1c = desc->reg + 4;
2673
2674             if (clear)
2675                 ret = regmap_update_bits(ctx->maps[desc->ip],
2676                              w1c, desc->mask,
2677                              clear);
2678         }
2679
2680         ret = regmap_update_bits(ctx->maps[desc->ip], desc->reg,
2681                      desc->mask, val);
2682         if (ret)
2683             return ret;
2684     }
2685
2686     ret = aspeed_sig_expr_eval(ctx, expr, enable);
2687     if (ret < 0)
2688         return ret;
2689
2690     if (!ret)
2691         return -EPERM;
2692     return 0;
2693 }
2694
2695 static const struct aspeed_pin_config_map aspeed_g6_pin_config_map[] = {
2696     { PIN_CONFIG_BIAS_PULL_DOWN,  0,   1, BIT_MASK(0)},
2697     { PIN_CONFIG_BIAS_PULL_DOWN, -1,   0, BIT_MASK(0)},
2698     { PIN_CONFIG_BIAS_PULL_UP,    0,   1, BIT_MASK(0)},
2699     { PIN_CONFIG_BIAS_PULL_UP,   -1,   0, BIT_MASK(0)},
2700     { PIN_CONFIG_BIAS_DISABLE,   -1,   1, BIT_MASK(0)},
2701     { PIN_CONFIG_DRIVE_STRENGTH,  4,   0, GENMASK(1, 0)},
2702     { PIN_CONFIG_DRIVE_STRENGTH,  8,   1, GENMASK(1, 0)},
2703     { PIN_CONFIG_DRIVE_STRENGTH, 12,   2, GENMASK(1, 0)},
2704     { PIN_CONFIG_DRIVE_STRENGTH, 16,   3, GENMASK(1, 0)},
2705     { PIN_CONFIG_POWER_SOURCE,   3300, 0, BIT_MASK(0)},
2706     { PIN_CONFIG_POWER_SOURCE,   1800, 1, BIT_MASK(0)},
2707 };
2708
2709 static const struct aspeed_pinmux_ops aspeed_g5_ops = {
2710     .set = aspeed_g6_sig_expr_set,
2711 };
2712
2713 static struct aspeed_pinctrl_data aspeed_g6_pinctrl_data = {
2714     .pins = aspeed_g6_pins,
2715     .npins = ARRAY_SIZE(aspeed_g6_pins),
2716     .pinmux = {
2717         .ops = &aspeed_g5_ops,
2718         .groups = aspeed_g6_groups,
2719         .ngroups = ARRAY_SIZE(aspeed_g6_groups),
2720         .functions = aspeed_g6_functions,
2721         .nfunctions = ARRAY_SIZE(aspeed_g6_functions),
2722     },
2723     .configs = aspeed_g6_configs,
2724     .nconfigs = ARRAY_SIZE(aspeed_g6_configs),
2725     .confmaps = aspeed_g6_pin_config_map,
2726     .nconfmaps = ARRAY_SIZE(aspeed_g6_pin_config_map),
2727 };
2728
2729 static const struct pinmux_ops aspeed_g6_pinmux_ops = {
2730     .get_functions_count = aspeed_pinmux_get_fn_count,
2731     .get_function_name = aspeed_pinmux_get_fn_name,
2732     .get_function_groups = aspeed_pinmux_get_fn_groups,
2733     .set_mux = aspeed_pinmux_set_mux,
2734     .gpio_request_enable = aspeed_gpio_request_enable,
2735     .strict = true,
2736 };
2737
2738 static const struct pinctrl_ops aspeed_g6_pinctrl_ops = {
2739     .get_groups_count = aspeed_pinctrl_get_groups_count,
2740     .get_group_name = aspeed_pinctrl_get_group_name,
2741     .get_group_pins = aspeed_pinctrl_get_group_pins,
2742     .pin_dbg_show = aspeed_pinctrl_pin_dbg_show,
2743     .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
2744     .dt_free_map = pinctrl_utils_free_map,
2745 };
2746
2747 static const struct pinconf_ops aspeed_g6_conf_ops = {
2748     .is_generic = true,
2749     .pin_config_get = aspeed_pin_config_get,
2750     .pin_config_set = aspeed_pin_config_set,
2751     .pin_config_group_get = aspeed_pin_config_group_get,
2752     .pin_config_group_set = aspeed_pin_config_group_set,
2753 };
2754
2755 static struct pinctrl_desc aspeed_g6_pinctrl_desc = {
2756     .name = "aspeed-g6-pinctrl",
2757     .pins = aspeed_g6_pins,
2758     .npins = ARRAY_SIZE(aspeed_g6_pins),
2759     .pctlops = &aspeed_g6_pinctrl_ops,
2760     .pmxops = &aspeed_g6_pinmux_ops,
2761     .confops = &aspeed_g6_conf_ops,
2762 };
2763
2764 static int aspeed_g6_pinctrl_probe(struct platform_device *pdev)
2765 {
2766     int i;
2767
2768     for (i = 0; i < ARRAY_SIZE(aspeed_g6_pins); i++)
2769         aspeed_g6_pins[i].number = i;
2770
2771     return aspeed_pinctrl_probe(pdev, &aspeed_g6_pinctrl_desc,
2772             &aspeed_g6_pinctrl_data);
2773 }
2774
2775 static const struct of_device_id aspeed_g6_pinctrl_of_match[] = {
2776     { .compatible = "aspeed,ast2600-pinctrl", },
2777     { },
2778 };
2779
2780 static struct platform_driver aspeed_g6_pinctrl_driver = {
2781     .probe = aspeed_g6_pinctrl_probe,
2782     .driver = {
2783         .name = "aspeed-g6-pinctrl",
2784         .of_match_table = aspeed_g6_pinctrl_of_match,
2785     },
2786 };
2787
2788 static int aspeed_g6_pinctrl_init(void)
2789 {
2790     return platform_driver_register(&aspeed_g6_pinctrl_driver);
2791 }
2792
2793 arch_initcall(aspeed_g6_pinctrl_init);