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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Actions Semi Owl S700 Pinctrl driver
0004  *
0005  * Copyright (c) 2014 Actions Semi Inc.
0006  * Author: David Liu <liuwei@actions-semi.com>
0007  *
0008  * Author: Pathiban Nallathambi <pn@denx.de>
0009  * Author: Saravanan Sekar <sravanhome@gmail.com>
0010  */
0011 
0012 #include <linux/module.h>
0013 #include <linux/of.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/pinctrl/pinconf-generic.h>
0016 #include <linux/pinctrl/pinctrl.h>
0017 #include "pinctrl-owl.h"
0018 
0019 /* Pinctrl registers offset */
0020 #define MFCTL0          (0x0040)
0021 #define MFCTL1          (0x0044)
0022 #define MFCTL2          (0x0048)
0023 #define MFCTL3          (0x004C)
0024 #define PAD_PULLCTL0        (0x0060)
0025 #define PAD_PULLCTL1        (0x0064)
0026 #define PAD_PULLCTL2        (0x0068)
0027 #define PAD_ST0         (0x006C)
0028 #define PAD_ST1         (0x0070)
0029 #define PAD_CTL         (0x0074)
0030 #define PAD_DRV0        (0x0080)
0031 #define PAD_DRV1        (0x0084)
0032 #define PAD_DRV2        (0x0088)
0033 
0034 /*
0035  * Most pins affected by the pinmux can also be GPIOs. Define these first.
0036  * These must match how the GPIO driver names/numbers its pins.
0037  */
0038 #define _GPIOA(offset)      (offset)
0039 #define _GPIOB(offset)      (32 + (offset))
0040 #define _GPIOC(offset)      (64 + (offset))
0041 #define _GPIOD(offset)      (96 + (offset))
0042 #define _GPIOE(offset)      (128 + (offset))
0043 
0044 /* All non-GPIO pins follow */
0045 #define NUM_GPIOS       (_GPIOE(7) + 1)
0046 #define _PIN(offset)        (NUM_GPIOS + (offset))
0047 
0048 /* Ethernet MAC */
0049 #define ETH_TXD0        _GPIOA(14)
0050 #define ETH_TXD1        _GPIOA(15)
0051 #define ETH_TXD2        _GPIOE(4)
0052 #define ETH_TXD3        _GPIOE(5)
0053 #define ETH_TXEN        _GPIOA(16)
0054 #define ETH_RXER        _GPIOA(17)
0055 #define ETH_CRS_DV      _GPIOA(18)
0056 #define ETH_RXD1        _GPIOA(19)
0057 #define ETH_RXD0        _GPIOA(20)
0058 #define ETH_RXD2        _GPIOE(6)
0059 #define ETH_RXD3        _GPIOE(7)
0060 #define ETH_REF_CLK     _GPIOA(21)
0061 #define ETH_MDC         _GPIOA(22)
0062 #define ETH_MDIO        _GPIOA(23)
0063 
0064 /* SIRQ */
0065 #define SIRQ0           _GPIOA(24)
0066 #define SIRQ1           _GPIOA(25)
0067 #define SIRQ2           _GPIOA(26)
0068 
0069 /* I2S */
0070 #define I2S_D0          _GPIOA(27)
0071 #define I2S_BCLK0       _GPIOA(28)
0072 #define I2S_LRCLK0      _GPIOA(29)
0073 #define I2S_MCLK0       _GPIOA(30)
0074 #define I2S_D1          _GPIOA(31)
0075 #define I2S_BCLK1       _GPIOB(0)
0076 #define I2S_LRCLK1      _GPIOB(1)
0077 #define I2S_MCLK1       _GPIOB(2)
0078 
0079 /* PCM1 */
0080 #define PCM1_IN         _GPIOD(28)
0081 #define PCM1_CLK        _GPIOD(29)
0082 #define PCM1_SYNC       _GPIOD(30)
0083 #define PCM1_OUT        _GPIOD(31)
0084 
0085 /* KEY */
0086 #define KS_IN0          _GPIOB(3)
0087 #define KS_IN1          _GPIOB(4)
0088 #define KS_IN2          _GPIOB(5)
0089 #define KS_IN3          _GPIOB(6)
0090 #define KS_OUT0         _GPIOB(7)
0091 #define KS_OUT1         _GPIOB(8)
0092 #define KS_OUT2         _GPIOB(9)
0093 
0094 /* LVDS */
0095 #define LVDS_OEP        _GPIOB(10)
0096 #define LVDS_OEN        _GPIOB(11)
0097 #define LVDS_ODP        _GPIOB(12)
0098 #define LVDS_ODN        _GPIOB(13)
0099 #define LVDS_OCP        _GPIOB(14)
0100 #define LVDS_OCN        _GPIOB(15)
0101 #define LVDS_OBP        _GPIOB(16)
0102 #define LVDS_OBN        _GPIOB(17)
0103 #define LVDS_OAP        _GPIOB(18)
0104 #define LVDS_OAN        _GPIOB(19)
0105 #define LVDS_EEP        _GPIOB(20)
0106 #define LVDS_EEN        _GPIOB(21)
0107 #define LVDS_EDP        _GPIOB(22)
0108 #define LVDS_EDN        _GPIOB(23)
0109 #define LVDS_ECP        _GPIOB(24)
0110 #define LVDS_ECN        _GPIOB(25)
0111 #define LVDS_EBP        _GPIOB(26)
0112 #define LVDS_EBN        _GPIOB(27)
0113 #define LVDS_EAP        _GPIOB(28)
0114 #define LVDS_EAN        _GPIOB(29)
0115 #define LCD0_D18        _GPIOB(30)
0116 #define LCD0_D2         _GPIOB(31)
0117 
0118 /* DSI */
0119 #define DSI_DP3         _GPIOC(0)
0120 #define DSI_DN3         _GPIOC(1)
0121 #define DSI_DP1         _GPIOC(2)
0122 #define DSI_DN1         _GPIOC(3)
0123 #define DSI_CP          _GPIOC(4)
0124 #define DSI_CN          _GPIOC(5)
0125 #define DSI_DP0         _GPIOC(6)
0126 #define DSI_DN0         _GPIOC(7)
0127 #define DSI_DP2         _GPIOC(8)
0128 #define DSI_DN2         _GPIOC(9)
0129 
0130 /* SD */
0131 #define SD0_D0          _GPIOC(10)
0132 #define SD0_D1          _GPIOC(11)
0133 #define SD0_D2          _GPIOC(12)
0134 #define SD0_D3          _GPIOC(13)
0135 #define SD0_D4          _GPIOC(14)
0136 #define SD0_D5          _GPIOC(15)
0137 #define SD0_D6          _GPIOC(16)
0138 #define SD0_D7          _GPIOC(17)
0139 #define SD0_CMD         _GPIOC(18)
0140 #define SD0_CLK         _GPIOC(19)
0141 #define SD1_CMD         _GPIOC(20)
0142 #define SD1_CLK         _GPIOC(21)
0143 #define SD1_D0          SD0_D4
0144 #define SD1_D1          SD0_D5
0145 #define SD1_D2          SD0_D6
0146 #define SD1_D3          SD0_D7
0147 
0148 /* SPI */
0149 #define SPI0_SS         _GPIOC(23)
0150 #define SPI0_MISO       _GPIOC(24)
0151 
0152 /* UART for console */
0153 #define UART0_RX        _GPIOC(26)
0154 #define UART0_TX        _GPIOC(27)
0155 
0156 /* UART for Bluetooth */
0157 #define UART2_RX        _GPIOD(18)
0158 #define UART2_TX        _GPIOD(19)
0159 #define UART2_RTSB      _GPIOD(20)
0160 #define UART2_CTSB      _GPIOD(21)
0161 
0162 /* UART for 3G */
0163 #define UART3_RX        _GPIOD(22)
0164 #define UART3_TX        _GPIOD(23)
0165 #define UART3_RTSB      _GPIOD(24)
0166 #define UART3_CTSB      _GPIOD(25)
0167 
0168 /* I2C */
0169 #define I2C0_SCLK       _GPIOC(28)
0170 #define I2C0_SDATA      _GPIOC(29)
0171 #define I2C1_SCLK       _GPIOE(0)
0172 #define I2C1_SDATA      _GPIOE(1)
0173 #define I2C2_SCLK       _GPIOE(2)
0174 #define I2C2_SDATA      _GPIOE(3)
0175 
0176 /* CSI*/
0177 #define CSI_DN0         _PIN(0)
0178 #define CSI_DP0         _PIN(1)
0179 #define CSI_DN1         _PIN(2)
0180 #define CSI_DP1         _PIN(3)
0181 #define CSI_CN          _PIN(4)
0182 #define CSI_CP          _PIN(5)
0183 #define CSI_DN2         _PIN(6)
0184 #define CSI_DP2         _PIN(7)
0185 #define CSI_DN3         _PIN(8)
0186 #define CSI_DP3         _PIN(9)
0187 
0188 /* Sensor */
0189 #define SENSOR0_PCLK        _GPIOC(31)
0190 #define SENSOR0_CKOUT       _GPIOD(10)
0191 
0192 /* NAND (1.8v / 3.3v) */
0193 #define DNAND_D0        _PIN(10)
0194 #define DNAND_D1        _PIN(11)
0195 #define DNAND_D2        _PIN(12)
0196 #define DNAND_D3        _PIN(13)
0197 #define DNAND_D4        _PIN(14)
0198 #define DNAND_D5        _PIN(15)
0199 #define DNAND_D6        _PIN(16)
0200 #define DNAND_D7        _PIN(17)
0201 #define DNAND_WRB       _PIN(18)
0202 #define DNAND_RDB       _PIN(19)
0203 #define DNAND_RDBN      _PIN(20)
0204 #define DNAND_DQS       _GPIOA(12)
0205 #define DNAND_DQSN      _GPIOA(13)
0206 #define DNAND_RB0       _PIN(21)
0207 #define DNAND_ALE       _GPIOD(12)
0208 #define DNAND_CLE       _GPIOD(13)
0209 #define DNAND_CEB0      _GPIOD(14)
0210 #define DNAND_CEB1      _GPIOD(15)
0211 #define DNAND_CEB2      _GPIOD(16)
0212 #define DNAND_CEB3      _GPIOD(17)
0213 
0214 /* System */
0215 #define PORB            _PIN(22)
0216 #define CLKO_25M        _PIN(23)
0217 #define BSEL            _PIN(24)
0218 #define PKG0            _PIN(25)
0219 #define PKG1            _PIN(26)
0220 #define PKG2            _PIN(27)
0221 #define PKG3            _PIN(28)
0222 
0223 #define _FIRSTPAD       _GPIOA(0)
0224 #define _LASTPAD        PKG3
0225 #define NUM_PADS        (_PIN(28) + 1)
0226 
0227 /* Pad names for the pinmux subsystem */
0228 static const struct pinctrl_pin_desc s700_pads[] = {
0229     PINCTRL_PIN(ETH_TXD0, "eth_txd0"),
0230     PINCTRL_PIN(ETH_TXD1, "eth_txd1"),
0231     PINCTRL_PIN(ETH_TXD2, "eth_txd2"),
0232     PINCTRL_PIN(ETH_TXD3, "eth_txd3"),
0233     PINCTRL_PIN(ETH_TXEN, "eth_txen"),
0234     PINCTRL_PIN(ETH_RXER, "eth_rxer"),
0235     PINCTRL_PIN(ETH_CRS_DV, "eth_crs_dv"),
0236     PINCTRL_PIN(ETH_RXD1, "eth_rxd1"),
0237     PINCTRL_PIN(ETH_RXD0, "eth_rxd0"),
0238     PINCTRL_PIN(ETH_RXD2, "eth_rxd2"),
0239     PINCTRL_PIN(ETH_RXD3, "eth_rxd3"),
0240     PINCTRL_PIN(ETH_REF_CLK, "eth_ref_clk"),
0241     PINCTRL_PIN(ETH_MDC, "eth_mdc"),
0242     PINCTRL_PIN(ETH_MDIO, "eth_mdio"),
0243     PINCTRL_PIN(SIRQ0, "sirq0"),
0244     PINCTRL_PIN(SIRQ1, "sirq1"),
0245     PINCTRL_PIN(SIRQ2, "sirq2"),
0246     PINCTRL_PIN(I2S_D0, "i2s_d0"),
0247     PINCTRL_PIN(I2S_BCLK0, "i2s_bclk0"),
0248     PINCTRL_PIN(I2S_LRCLK0, "i2s_lrclk0"),
0249     PINCTRL_PIN(I2S_MCLK0, "i2s_mclk0"),
0250     PINCTRL_PIN(I2S_D1, "i2s_d1"),
0251     PINCTRL_PIN(I2S_BCLK1, "i2s_bclk1"),
0252     PINCTRL_PIN(I2S_LRCLK1, "i2s_lrclk1"),
0253     PINCTRL_PIN(I2S_MCLK1, "i2s_mclk1"),
0254     PINCTRL_PIN(PCM1_IN, "pcm1_in"),
0255     PINCTRL_PIN(PCM1_CLK, "pcm1_clk"),
0256     PINCTRL_PIN(PCM1_SYNC, "pcm1_sync"),
0257     PINCTRL_PIN(PCM1_OUT, "pcm1_out"),
0258     PINCTRL_PIN(KS_IN0, "ks_in0"),
0259     PINCTRL_PIN(KS_IN1, "ks_in1"),
0260     PINCTRL_PIN(KS_IN2, "ks_in2"),
0261     PINCTRL_PIN(KS_IN3, "ks_in3"),
0262     PINCTRL_PIN(KS_OUT0, "ks_out0"),
0263     PINCTRL_PIN(KS_OUT1, "ks_out1"),
0264     PINCTRL_PIN(KS_OUT2, "ks_out2"),
0265     PINCTRL_PIN(LVDS_OEP, "lvds_oep"),
0266     PINCTRL_PIN(LVDS_OEN, "lvds_oen"),
0267     PINCTRL_PIN(LVDS_ODP, "lvds_odp"),
0268     PINCTRL_PIN(LVDS_ODN, "lvds_odn"),
0269     PINCTRL_PIN(LVDS_OCP, "lvds_ocp"),
0270     PINCTRL_PIN(LVDS_OCN, "lvds_ocn"),
0271     PINCTRL_PIN(LVDS_OBP, "lvds_obp"),
0272     PINCTRL_PIN(LVDS_OBN, "lvds_obn"),
0273     PINCTRL_PIN(LVDS_OAP, "lvds_oap"),
0274     PINCTRL_PIN(LVDS_OAN, "lvds_oan"),
0275     PINCTRL_PIN(LVDS_EEP, "lvds_eep"),
0276     PINCTRL_PIN(LVDS_EEN, "lvds_een"),
0277     PINCTRL_PIN(LVDS_EDP, "lvds_edp"),
0278     PINCTRL_PIN(LVDS_EDN, "lvds_edn"),
0279     PINCTRL_PIN(LVDS_ECP, "lvds_ecp"),
0280     PINCTRL_PIN(LVDS_ECN, "lvds_ecn"),
0281     PINCTRL_PIN(LVDS_EBP, "lvds_ebp"),
0282     PINCTRL_PIN(LVDS_EBN, "lvds_ebn"),
0283     PINCTRL_PIN(LVDS_EAP, "lvds_eap"),
0284     PINCTRL_PIN(LVDS_EAN, "lvds_ean"),
0285     PINCTRL_PIN(LCD0_D18, "lcd0_d18"),
0286     PINCTRL_PIN(LCD0_D2, "lcd0_d2"),
0287     PINCTRL_PIN(DSI_DP3, "dsi_dp3"),
0288     PINCTRL_PIN(DSI_DN3, "dsi_dn3"),
0289     PINCTRL_PIN(DSI_DP1, "dsi_dp1"),
0290     PINCTRL_PIN(DSI_DN1, "dsi_dn1"),
0291     PINCTRL_PIN(DSI_CP, "dsi_cp"),
0292     PINCTRL_PIN(DSI_CN, "dsi_cn"),
0293     PINCTRL_PIN(DSI_DP0, "dsi_dp0"),
0294     PINCTRL_PIN(DSI_DN0, "dsi_dn0"),
0295     PINCTRL_PIN(DSI_DP2, "dsi_dp2"),
0296     PINCTRL_PIN(DSI_DN2, "dsi_dn2"),
0297     PINCTRL_PIN(SD0_D0, "sd0_d0"),
0298     PINCTRL_PIN(SD0_D1, "sd0_d1"),
0299     PINCTRL_PIN(SD0_D2, "sd0_d2"),
0300     PINCTRL_PIN(SD0_D3, "sd0_d3"),
0301     PINCTRL_PIN(SD1_D0, "sd1_d0"),
0302     PINCTRL_PIN(SD1_D1, "sd1_d1"),
0303     PINCTRL_PIN(SD1_D2, "sd1_d2"),
0304     PINCTRL_PIN(SD1_D3, "sd1_d3"),
0305     PINCTRL_PIN(SD0_CMD, "sd0_cmd"),
0306     PINCTRL_PIN(SD0_CLK, "sd0_clk"),
0307     PINCTRL_PIN(SD1_CMD, "sd1_cmd"),
0308     PINCTRL_PIN(SD1_CLK, "sd1_clk"),
0309     PINCTRL_PIN(SPI0_SS, "spi0_ss"),
0310     PINCTRL_PIN(SPI0_MISO, "spi0_miso"),
0311     PINCTRL_PIN(UART0_RX, "uart0_rx"),
0312     PINCTRL_PIN(UART0_TX, "uart0_tx"),
0313     PINCTRL_PIN(UART2_RX, "uart2_rx"),
0314     PINCTRL_PIN(UART2_TX, "uart2_tx"),
0315     PINCTRL_PIN(UART2_RTSB, "uart2_rtsb"),
0316     PINCTRL_PIN(UART2_CTSB, "uart2_ctsb"),
0317     PINCTRL_PIN(UART3_RX, "uart3_rx"),
0318     PINCTRL_PIN(UART3_TX, "uart3_tx"),
0319     PINCTRL_PIN(UART3_RTSB, "uart3_rtsb"),
0320     PINCTRL_PIN(UART3_CTSB, "uart3_ctsb"),
0321     PINCTRL_PIN(I2C0_SCLK, "i2c0_sclk"),
0322     PINCTRL_PIN(I2C0_SDATA, "i2c0_sdata"),
0323     PINCTRL_PIN(I2C1_SCLK, "i2c1_sclk"),
0324     PINCTRL_PIN(I2C1_SDATA, "i2c1_sdata"),
0325     PINCTRL_PIN(I2C2_SCLK, "i2c2_sclk"),
0326     PINCTRL_PIN(I2C2_SDATA, "i2c2_sdata"),
0327     PINCTRL_PIN(CSI_DN0, "csi_dn0"),
0328     PINCTRL_PIN(CSI_DP0, "csi_dp0"),
0329     PINCTRL_PIN(CSI_DN1, "csi_dn1"),
0330     PINCTRL_PIN(CSI_DP1, "csi_dp1"),
0331     PINCTRL_PIN(CSI_CN, "csi_cn"),
0332     PINCTRL_PIN(CSI_CP, "csi_cp"),
0333     PINCTRL_PIN(CSI_DN2, "csi_dn2"),
0334     PINCTRL_PIN(CSI_DP2, "csi_dp2"),
0335     PINCTRL_PIN(CSI_DN3, "csi_dn3"),
0336     PINCTRL_PIN(CSI_DP3, "csi_dp3"),
0337     PINCTRL_PIN(SENSOR0_PCLK, "sensor0_pclk"),
0338     PINCTRL_PIN(SENSOR0_CKOUT, "sensor0_ckout"),
0339     PINCTRL_PIN(DNAND_D0, "dnand_d0"),
0340     PINCTRL_PIN(DNAND_D1, "dnand_d1"),
0341     PINCTRL_PIN(DNAND_D2, "dnand_d2"),
0342     PINCTRL_PIN(DNAND_D3, "dnand_d3"),
0343     PINCTRL_PIN(DNAND_D4, "dnand_d4"),
0344     PINCTRL_PIN(DNAND_D5, "dnand_d5"),
0345     PINCTRL_PIN(DNAND_D6, "dnand_d6"),
0346     PINCTRL_PIN(DNAND_D7, "dnand_d7"),
0347     PINCTRL_PIN(DNAND_WRB, "dnand_wrb"),
0348     PINCTRL_PIN(DNAND_RDB, "dnand_rdb"),
0349     PINCTRL_PIN(DNAND_RDBN, "dnand_rdbn"),
0350     PINCTRL_PIN(DNAND_DQS, "dnand_dqs"),
0351     PINCTRL_PIN(DNAND_DQSN, "dnand_dqsn"),
0352     PINCTRL_PIN(DNAND_RB0, "dnand_rb0"),
0353     PINCTRL_PIN(DNAND_ALE, "dnand_ale"),
0354     PINCTRL_PIN(DNAND_CLE, "dnand_cle"),
0355     PINCTRL_PIN(DNAND_CEB0, "dnand_ceb0"),
0356     PINCTRL_PIN(DNAND_CEB1, "dnand_ceb1"),
0357     PINCTRL_PIN(DNAND_CEB2, "dnand_ceb2"),
0358     PINCTRL_PIN(DNAND_CEB3, "dnand_ceb3"),
0359     PINCTRL_PIN(PORB, "porb"),
0360     PINCTRL_PIN(CLKO_25M, "clko_25m"),
0361     PINCTRL_PIN(BSEL, "bsel"),
0362     PINCTRL_PIN(PKG0, "pkg0"),
0363     PINCTRL_PIN(PKG1, "pkg1"),
0364     PINCTRL_PIN(PKG2, "pkg2"),
0365     PINCTRL_PIN(PKG3, "pkg3"),
0366 };
0367 
0368 enum s700_pinmux_functions {
0369     S700_MUX_NOR,
0370     S700_MUX_ETH_RGMII,
0371     S700_MUX_ETH_SGMII,
0372     S700_MUX_SPI0,
0373     S700_MUX_SPI1,
0374     S700_MUX_SPI2,
0375     S700_MUX_SPI3,
0376     S700_MUX_SENS0,
0377     S700_MUX_SENS1,
0378     S700_MUX_UART0,
0379     S700_MUX_UART1,
0380     S700_MUX_UART2,
0381     S700_MUX_UART3,
0382     S700_MUX_UART4,
0383     S700_MUX_UART5,
0384     S700_MUX_UART6,
0385     S700_MUX_I2S0,
0386     S700_MUX_I2S1,
0387     S700_MUX_PCM1,
0388     S700_MUX_PCM0,
0389     S700_MUX_KS,
0390     S700_MUX_JTAG,
0391     S700_MUX_PWM0,
0392     S700_MUX_PWM1,
0393     S700_MUX_PWM2,
0394     S700_MUX_PWM3,
0395     S700_MUX_PWM4,
0396     S700_MUX_PWM5,
0397     S700_MUX_P0,
0398     S700_MUX_SD0,
0399     S700_MUX_SD1,
0400     S700_MUX_SD2,
0401     S700_MUX_I2C0,
0402     S700_MUX_I2C1,
0403     S700_MUX_I2C2,
0404     S700_MUX_I2C3,
0405     S700_MUX_DSI,
0406     S700_MUX_LVDS,
0407     S700_MUX_USB30,
0408     S700_MUX_CLKO_25M,
0409     S700_MUX_MIPI_CSI,
0410     S700_MUX_NAND,
0411     S700_MUX_SPDIF,
0412     S700_MUX_SIRQ0,
0413     S700_MUX_SIRQ1,
0414     S700_MUX_SIRQ2,
0415     S700_MUX_BT,
0416     S700_MUX_LCD0,
0417     S700_MUX_RESERVED,
0418 };
0419 
0420 /* mfp0_31_30 reserved */
0421 
0422 /* rgmii_txd23 */
0423 static unsigned int  rgmii_txd23_mfp_pads[]     = { ETH_TXD2, ETH_TXD3};
0424 static unsigned int  rgmii_txd23_mfp_funcs[]        = { S700_MUX_ETH_RGMII,
0425                                 S700_MUX_I2C1,
0426                                 S700_MUX_UART3 };
0427 /* rgmii_rxd2 */
0428 static unsigned int  rgmii_rxd2_mfp_pads[]      = { ETH_RXD2 };
0429 static unsigned int  rgmii_rxd2_mfp_funcs[]     = { S700_MUX_ETH_RGMII,
0430                                 S700_MUX_PWM0,
0431                                 S700_MUX_UART3 };
0432 /* rgmii_rxd3 */
0433 static unsigned int  rgmii_rxd3_mfp_pads[]      = { ETH_RXD3};
0434 static unsigned int  rgmii_rxd3_mfp_funcs[]     = { S700_MUX_ETH_RGMII,
0435                                 S700_MUX_PWM2,
0436                                 S700_MUX_UART3 };
0437 /* lcd0_d18 */
0438 static unsigned int  lcd0_d18_mfp_pads[]        = { LCD0_D18 };
0439 static unsigned int  lcd0_d18_mfp_funcs[]       = { S700_MUX_NOR,
0440                                 S700_MUX_SENS1,
0441                                 S700_MUX_PWM2,
0442                                 S700_MUX_PWM4,
0443                                 S700_MUX_LCD0 };
0444 /* rgmii_txd01 */
0445 static unsigned int  rgmii_txd01_mfp_pads[]     = { ETH_CRS_DV };
0446 static unsigned int  rgmii_txd01_mfp_funcs[]        = { S700_MUX_ETH_RGMII,
0447                                 S700_MUX_RESERVED,
0448                                 S700_MUX_SPI2,
0449                                 S700_MUX_UART4,
0450                                 S700_MUX_PWM4 };
0451 /* rgmii_txd0 */
0452 static unsigned int  rgmii_txd0_mfp_pads[]      = { ETH_TXD0 };
0453 static unsigned int  rgmii_txd0_mfp_funcs[]     = { S700_MUX_ETH_RGMII,
0454                                 S700_MUX_ETH_SGMII,
0455                                 S700_MUX_SPI2,
0456                                 S700_MUX_UART6,
0457                                 S700_MUX_PWM4 };
0458 /* rgmii_txd1 */
0459 static unsigned int  rgmii_txd1_mfp_pads[]      = { ETH_TXD1 };
0460 static unsigned int  rgmii_txd1_mfp_funcs[]     = { S700_MUX_ETH_RGMII,
0461                                 S700_MUX_ETH_SGMII,
0462                                 S700_MUX_SPI2,
0463                                 S700_MUX_UART6,
0464                                 S700_MUX_PWM5 };
0465 /* rgmii_txen */
0466 static unsigned int  rgmii_txen_mfp_pads[]      = { ETH_TXEN };
0467 static unsigned int  rgmii_txen_mfp_funcs[]     = { S700_MUX_ETH_RGMII,
0468                                 S700_MUX_UART2,
0469                                 S700_MUX_SPI3,
0470                                 S700_MUX_PWM0 };
0471 /* rgmii_rxen */
0472 static unsigned int  rgmii_rxen_mfp_pads[]      = { ETH_RXER };
0473 static unsigned int  rgmii_rxen_mfp_funcs[]     = { S700_MUX_ETH_RGMII,
0474                                 S700_MUX_UART2,
0475                                 S700_MUX_SPI3,
0476                                 S700_MUX_PWM1 };
0477 /* mfp0_12_11 reserved */
0478 /* rgmii_rxd1*/
0479 static unsigned int  rgmii_rxd1_mfp_pads[]      = { ETH_RXD1 };
0480 static unsigned int  rgmii_rxd1_mfp_funcs[]     = { S700_MUX_ETH_RGMII,
0481                                 S700_MUX_UART2,
0482                                 S700_MUX_SPI3,
0483                                 S700_MUX_PWM2,
0484                                 S700_MUX_UART5,
0485                                 S700_MUX_ETH_SGMII };
0486 /* rgmii_rxd0 */
0487 static unsigned int  rgmii_rxd0_mfp_pads[]      = { ETH_RXD0 };
0488 static unsigned int  rgmii_rxd0_mfp_funcs[]     = { S700_MUX_ETH_RGMII,
0489                                 S700_MUX_UART2,
0490                                 S700_MUX_SPI3,
0491                                 S700_MUX_PWM3,
0492                                 S700_MUX_UART5,
0493                                 S700_MUX_ETH_SGMII };
0494 /* rgmii_ref_clk */
0495 static unsigned int  rgmii_ref_clk_mfp_pads[]       = { ETH_REF_CLK };
0496 static unsigned int  rgmii_ref_clk_mfp_funcs[]      = { S700_MUX_ETH_RGMII,
0497                                 S700_MUX_UART4,
0498                                 S700_MUX_SPI2,
0499                                 S700_MUX_RESERVED,
0500                                 S700_MUX_ETH_SGMII };
0501 /* i2s_d0 */
0502 static unsigned int  i2s_d0_mfp_pads[]          = { I2S_D0 };
0503 static unsigned int  i2s_d0_mfp_funcs[]         = { S700_MUX_I2S0,
0504                                 S700_MUX_NOR };
0505 /* i2s_pcm1 */
0506 static unsigned int  i2s_pcm1_mfp_pads[]        = { I2S_LRCLK0,
0507                                 I2S_MCLK0 };
0508 static unsigned int  i2s_pcm1_mfp_funcs[]       = { S700_MUX_I2S0,
0509                                 S700_MUX_NOR,
0510                                 S700_MUX_PCM1,
0511                                 S700_MUX_BT };
0512 /* i2s0_pcm0 */
0513 static unsigned int  i2s0_pcm0_mfp_pads[]       = { I2S_BCLK0 };
0514 static unsigned int  i2s0_pcm0_mfp_funcs[]      = { S700_MUX_I2S0,
0515                                 S700_MUX_NOR,
0516                                 S700_MUX_PCM0,
0517                                 S700_MUX_BT };
0518 /* i2s1_pcm0 */
0519 static unsigned int  i2s1_pcm0_mfp_pads[]       = { I2S_BCLK1,
0520                                 I2S_LRCLK1,
0521                                 I2S_MCLK1 };
0522 
0523 static unsigned int  i2s1_pcm0_mfp_funcs[]      = { S700_MUX_I2S1,
0524                                 S700_MUX_NOR,
0525                                 S700_MUX_PCM0,
0526                                 S700_MUX_BT };
0527 /* i2s_d1 */
0528 static unsigned int  i2s_d1_mfp_pads[]          = { I2S_D1 };
0529 static unsigned int  i2s_d1_mfp_funcs[]         = { S700_MUX_I2S1,
0530                                 S700_MUX_NOR };
0531 /* ks_in2 */
0532 static unsigned int  ks_in2_mfp_pads[]          = { KS_IN2 };
0533 static unsigned int  ks_in2_mfp_funcs[]         = { S700_MUX_KS,
0534                                 S700_MUX_JTAG,
0535                                 S700_MUX_NOR,
0536                                 S700_MUX_BT,
0537                                 S700_MUX_PWM0,
0538                                 S700_MUX_SENS1,
0539                                 S700_MUX_PWM0,
0540                                 S700_MUX_P0 };
0541 /* ks_in1 */
0542 static unsigned int  ks_in1_mfp_pads[]          = { KS_IN1 };
0543 static unsigned int  ks_in1_mfp_funcs[]         = { S700_MUX_KS,
0544                                 S700_MUX_JTAG,
0545                                 S700_MUX_NOR,
0546                                 S700_MUX_BT,
0547                                 S700_MUX_PWM5,
0548                                 S700_MUX_SENS1,
0549                                 S700_MUX_PWM1,
0550                                 S700_MUX_USB30 };
0551 /* ks_in0 */
0552 static unsigned int  ks_in0_mfp_pads[]          = { KS_IN0 };
0553 static unsigned int  ks_in0_mfp_funcs[]         = { S700_MUX_KS,
0554                                 S700_MUX_JTAG,
0555                                 S700_MUX_NOR,
0556                                 S700_MUX_BT,
0557                                 S700_MUX_PWM4,
0558                                 S700_MUX_SENS1,
0559                                 S700_MUX_PWM4,
0560                                 S700_MUX_P0 };
0561 /* ks_in3 */
0562 static unsigned int  ks_in3_mfp_pads[]          = { KS_IN3 };
0563 static unsigned int  ks_in3_mfp_funcs[]         = { S700_MUX_KS,
0564                                 S700_MUX_JTAG,
0565                                 S700_MUX_NOR,
0566                                 S700_MUX_PWM1,
0567                                 S700_MUX_BT,
0568                                 S700_MUX_SENS1 };
0569 /* ks_out0 */
0570 static unsigned int  ks_out0_mfp_pads[]         = { KS_OUT0 };
0571 static unsigned int  ks_out0_mfp_funcs[]        = { S700_MUX_KS,
0572                                 S700_MUX_UART5,
0573                                 S700_MUX_NOR,
0574                                 S700_MUX_PWM2,
0575                                 S700_MUX_BT,
0576                                 S700_MUX_SENS1,
0577                                 S700_MUX_SD0,
0578                                 S700_MUX_UART4 };
0579 
0580 /* ks_out1 */
0581 static unsigned int  ks_out1_mfp_pads[]         = { KS_OUT1 };
0582 static unsigned int  ks_out1_mfp_funcs[]        = { S700_MUX_KS,
0583                                 S700_MUX_JTAG,
0584                                 S700_MUX_NOR,
0585                                 S700_MUX_PWM3,
0586                                 S700_MUX_BT,
0587                                 S700_MUX_SENS1,
0588                                 S700_MUX_SD0,
0589                                 S700_MUX_UART4 };
0590 /* ks_out2 */
0591 static unsigned int  ks_out2_mfp_pads[]         = { KS_OUT2 };
0592 static unsigned int  ks_out2_mfp_funcs[]        = { S700_MUX_SD0,
0593                                 S700_MUX_KS,
0594                                 S700_MUX_NOR,
0595                                 S700_MUX_PWM2,
0596                                 S700_MUX_UART5,
0597                                 S700_MUX_SENS1,
0598                                 S700_MUX_BT };
0599 /* lvds_o_pn */
0600 static unsigned int  lvds_o_pn_mfp_pads[]       = { LVDS_OEP,
0601                                 LVDS_OEN,
0602                                 LVDS_ODP,
0603                                 LVDS_ODN,
0604                                 LVDS_OCP,
0605                                 LVDS_OCN,
0606                                 LVDS_OBP,
0607                                 LVDS_OBN,
0608                                 LVDS_OAP,
0609                                 LVDS_OAN };
0610 
0611 static unsigned int  lvds_o_pn_mfp_funcs[]      = { S700_MUX_LVDS,
0612                                 S700_MUX_BT,
0613                                 S700_MUX_LCD0 };
0614 
0615 /* dsi_dn0 */
0616 static unsigned int  dsi_dn0_mfp_pads[]         = { DSI_DN0 };
0617 static unsigned int  dsi_dn0_mfp_funcs[]        = { S700_MUX_DSI,
0618                                 S700_MUX_UART2,
0619                                 S700_MUX_SPI0 };
0620 /* dsi_dp2 */
0621 static unsigned int  dsi_dp2_mfp_pads[]         = { DSI_DP2 };
0622 static unsigned int  dsi_dp2_mfp_funcs[]        = { S700_MUX_DSI,
0623                                 S700_MUX_UART2,
0624                                 S700_MUX_SPI0,
0625                                 S700_MUX_SD1 };
0626 /* lcd0_d2 */
0627 static unsigned int  lcd0_d2_mfp_pads[]         = { LCD0_D2 };
0628 static unsigned int  lcd0_d2_mfp_funcs[]        = { S700_MUX_NOR,
0629                                 S700_MUX_SD0,
0630                                 S700_MUX_RESERVED,
0631                                 S700_MUX_PWM3,
0632                                 S700_MUX_LCD0 };
0633 /* dsi_dp3 */
0634 static unsigned int  dsi_dp3_mfp_pads[]         = { DSI_DP3 };
0635 static unsigned int  dsi_dp3_mfp_funcs[]        = { S700_MUX_DSI,
0636                                 S700_MUX_SD0,
0637                                 S700_MUX_SD1,
0638                                 S700_MUX_LCD0 };
0639 /* dsi_dn3 */
0640 static unsigned int  dsi_dn3_mfp_pads[]         = { DSI_DN3 };
0641 static unsigned int  dsi_dn3_mfp_funcs[]        = { S700_MUX_DSI,
0642                                 S700_MUX_SD0,
0643                                 S700_MUX_SD1,
0644                                 S700_MUX_LCD0 };
0645 /* dsi_dp0 */
0646 static unsigned int  dsi_dp0_mfp_pads[]         = { DSI_DP0 };
0647 static unsigned int  dsi_dp0_mfp_funcs[]        = { S700_MUX_DSI,
0648                                 S700_MUX_RESERVED,
0649                                 S700_MUX_SD0,
0650                                 S700_MUX_UART2,
0651                                 S700_MUX_SPI0 };
0652 /* lvds_ee_pn */
0653 static unsigned int  lvds_ee_pn_mfp_pads[]      = { LVDS_EEP,
0654                                 LVDS_EEN };
0655 static unsigned int  lvds_ee_pn_mfp_funcs[]     = { S700_MUX_LVDS,
0656                                 S700_MUX_NOR,
0657                                 S700_MUX_BT,
0658                                 S700_MUX_LCD0 };
0659 /* uart2_rx_tx */
0660 static unsigned int  uart2_rx_tx_mfp_pads[]     = { UART2_RX,
0661                                 UART2_TX };
0662 static unsigned int  uart2_rx_tx_mfp_funcs[]        = { S700_MUX_UART2,
0663                                 S700_MUX_NOR,
0664                                 S700_MUX_SPI0,
0665                                 S700_MUX_PCM0 };
0666 /* spi0_i2c_pcm */
0667 static unsigned int  spi0_i2c_pcm_mfp_pads[]        = { SPI0_SS,
0668                                 SPI0_MISO };
0669 static unsigned int  spi0_i2c_pcm_mfp_funcs[]       = { S700_MUX_SPI0,
0670                                 S700_MUX_NOR,
0671                                 S700_MUX_I2S1,
0672                                 S700_MUX_PCM1,
0673                                 S700_MUX_PCM0,
0674                                 S700_MUX_I2C2 };
0675 /* mfp2_31 reserved */
0676 
0677 /* dsi_dnp1_cp_d2 */
0678 static unsigned int  dsi_dnp1_cp_d2_mfp_pads[]      = { DSI_DP1,
0679                                 DSI_CP,
0680                                 DSI_CN };
0681 static unsigned int  dsi_dnp1_cp_d2_mfp_funcs[]     = { S700_MUX_DSI,
0682                                 S700_MUX_LCD0,
0683                                 S700_MUX_RESERVED };
0684 /* dsi_dnp1_cp_d17 */
0685 static unsigned int  dsi_dnp1_cp_d17_mfp_pads[]     = { DSI_DP1,
0686                                 DSI_CP,
0687                                 DSI_CN };
0688 
0689 static unsigned int  dsi_dnp1_cp_d17_mfp_funcs[]    = { S700_MUX_DSI,
0690                                 S700_MUX_RESERVED,
0691                                 S700_MUX_LCD0 };
0692 /* lvds_e_pn */
0693 static unsigned int  lvds_e_pn_mfp_pads[]       = { LVDS_EDP,
0694                                 LVDS_EDN,
0695                                 LVDS_ECP,
0696                                 LVDS_ECN,
0697                                 LVDS_EBP,
0698                                 LVDS_EBN,
0699                                 LVDS_EAP,
0700                                 LVDS_EAN };
0701 
0702 static unsigned int  lvds_e_pn_mfp_funcs[]      = { S700_MUX_LVDS,
0703                                 S700_MUX_NOR,
0704                                 S700_MUX_LCD0 };
0705 /* dsi_dn2 */
0706 static unsigned int  dsi_dn2_mfp_pads[]         = { DSI_DN2 };
0707 static unsigned int  dsi_dn2_mfp_funcs[]        = { S700_MUX_DSI,
0708                                 S700_MUX_RESERVED,
0709                                 S700_MUX_SD1,
0710                                 S700_MUX_UART2,
0711                                 S700_MUX_SPI0 };
0712 /* uart2_rtsb */
0713 static unsigned int  uart2_rtsb_mfp_pads[]      = { UART2_RTSB };
0714 static unsigned int  uart2_rtsb_mfp_funcs[]     = { S700_MUX_UART2,
0715                                 S700_MUX_UART0 };
0716 
0717 /* uart2_ctsb */
0718 static unsigned int  uart2_ctsb_mfp_pads[]      = { UART2_CTSB };
0719 static unsigned int  uart2_ctsb_mfp_funcs[]     = { S700_MUX_UART2,
0720                                 S700_MUX_UART0 };
0721 /* uart3_rtsb */
0722 static unsigned int  uart3_rtsb_mfp_pads[]      = { UART3_RTSB };
0723 static unsigned int  uart3_rtsb_mfp_funcs[]     = { S700_MUX_UART3,
0724                                 S700_MUX_UART5 };
0725 
0726 /* uart3_ctsb */
0727 static unsigned int  uart3_ctsb_mfp_pads[]      = { UART3_CTSB };
0728 static unsigned int  uart3_ctsb_mfp_funcs[]     = { S700_MUX_UART3,
0729                                 S700_MUX_UART5 };
0730 /* sd0_d0 */
0731 static unsigned int  sd0_d0_mfp_pads[]          = { SD0_D0 };
0732 static unsigned int  sd0_d0_mfp_funcs[]         = { S700_MUX_SD0,
0733                                 S700_MUX_NOR,
0734                                 S700_MUX_RESERVED,
0735                                 S700_MUX_JTAG,
0736                                 S700_MUX_UART2,
0737                                 S700_MUX_UART5 };
0738 /* sd0_d1 */
0739 static unsigned int  sd0_d1_mfp_pads[]          = { SD0_D1 };
0740 static unsigned int  sd0_d1_mfp_funcs[]         = { S700_MUX_SD0,
0741                                 S700_MUX_NOR,
0742                                 S700_MUX_RESERVED,
0743                                 S700_MUX_RESERVED,
0744                                 S700_MUX_UART2,
0745                                 S700_MUX_UART5 };
0746 /* sd0_d2_d3 */
0747 static unsigned int  sd0_d2_d3_mfp_pads[]       = { SD0_D2,
0748                                 SD0_D3 };
0749 static unsigned int  sd0_d2_d3_mfp_funcs[]      = { S700_MUX_SD0,
0750                                 S700_MUX_NOR,
0751                                 S700_MUX_RESERVED,
0752                                 S700_MUX_JTAG,
0753                                 S700_MUX_UART2,
0754                                 S700_MUX_UART1 };
0755 
0756 /* sd1_d0_d3 */
0757 static unsigned int  sd1_d0_d3_mfp_pads[]       = { SD1_D0,
0758                                 SD1_D1,
0759                                 SD1_D2,
0760                                 SD1_D3 };
0761 static unsigned int  sd1_d0_d3_mfp_funcs[]      = { S700_MUX_SD0,
0762                                 S700_MUX_NOR,
0763                                 S700_MUX_RESERVED,
0764                                 S700_MUX_SD1 };
0765 
0766 /* sd0_cmd */
0767 static unsigned int  sd0_cmd_mfp_pads[]         = { SD0_CMD };
0768 static unsigned int  sd0_cmd_mfp_funcs[]        = { S700_MUX_SD0,
0769                                 S700_MUX_NOR,
0770                                 S700_MUX_RESERVED,
0771                                 S700_MUX_JTAG };
0772 /* sd0_clk */
0773 static unsigned int  sd0_clk_mfp_pads[]         = { SD0_CLK };
0774 static unsigned int  sd0_clk_mfp_funcs[]        = { S700_MUX_SD0,
0775                                 S700_MUX_RESERVED,
0776                                 S700_MUX_JTAG };
0777 /* sd1_cmd */
0778 static unsigned int  sd1_cmd_mfp_pads[]         = { SD1_CMD };
0779 static unsigned int  sd1_cmd_mfp_funcs[]        = { S700_MUX_SD1,
0780                                 S700_MUX_NOR };
0781 /* uart0_rx */
0782 static unsigned int  uart0_rx_mfp_pads[]        = { UART0_RX };
0783 static unsigned int  uart0_rx_mfp_funcs[]       = { S700_MUX_UART0,
0784                                 S700_MUX_UART2,
0785                                 S700_MUX_SPI1,
0786                                 S700_MUX_I2C0,
0787                                 S700_MUX_PCM1,
0788                                 S700_MUX_I2S1 };
0789 /* dnand_data_wr1 reserved */
0790 
0791 /* clko_25m */
0792 static unsigned int  clko_25m_mfp_pads[]        = { CLKO_25M };
0793 static unsigned int  clko_25m_mfp_funcs[]       = { S700_MUX_RESERVED,
0794                                 S700_MUX_CLKO_25M };
0795 /* csi_cn_cp */
0796 static unsigned int  csi_cn_cp_mfp_pads[]       = { CSI_CN,
0797                                 CSI_CP };
0798 static unsigned int  csi_cn_cp_mfp_funcs[]      = { S700_MUX_MIPI_CSI,
0799                                 S700_MUX_SENS0 };
0800 /* dnand_acle_ce07_24 reserved */
0801 
0802 /* sens0_ckout */
0803 static unsigned int  sens0_ckout_mfp_pads[]     = { SENSOR0_CKOUT };
0804 static unsigned int  sens0_ckout_mfp_funcs[]        = { S700_MUX_SENS0,
0805                                 S700_MUX_NOR,
0806                                 S700_MUX_SENS1,
0807                                 S700_MUX_PWM1 };
0808 /* uart0_tx */
0809 static unsigned int  uart0_tx_mfp_pads[]        = { UART0_TX };
0810 static unsigned int  uart0_tx_mfp_funcs[]       = { S700_MUX_UART0,
0811                                 S700_MUX_UART2,
0812                                 S700_MUX_SPI1,
0813                                 S700_MUX_I2C0,
0814                                 S700_MUX_SPDIF,
0815                                 S700_MUX_PCM1,
0816                                 S700_MUX_I2S1 };
0817 /* i2c0_mfp */
0818 static unsigned int  i2c0_mfp_pads[]        = { I2C0_SCLK,
0819                                 I2C0_SDATA };
0820 static unsigned int  i2c0_mfp_funcs[]       = { S700_MUX_I2C0,
0821                                 S700_MUX_UART2,
0822                                 S700_MUX_I2C1,
0823                                 S700_MUX_UART1,
0824                                 S700_MUX_SPI1 };
0825 /* csi_dn_dp */
0826 static unsigned int  csi_dn_dp_mfp_pads[]       = { CSI_DN0,
0827                                 CSI_DN1,
0828                                 CSI_DN2,
0829                                 CSI_DN3,
0830                                 CSI_DP0,
0831                                 CSI_DP1,
0832                                 CSI_DP2,
0833                                 CSI_DP3 };
0834 static unsigned int  csi_dn_dp_mfp_funcs[]      = { S700_MUX_MIPI_CSI,
0835                                 S700_MUX_SENS0 };
0836 /* sen0_pclk */
0837 static unsigned int  sen0_pclk_mfp_pads[]       = { SENSOR0_PCLK };
0838 static unsigned int  sen0_pclk_mfp_funcs[]      = { S700_MUX_SENS0,
0839                                 S700_MUX_NOR,
0840                                 S700_MUX_PWM0 };
0841 /* pcm1_in */
0842 static unsigned int  pcm1_in_mfp_pads[]         = { PCM1_IN };
0843 static unsigned int  pcm1_in_mfp_funcs[]        = { S700_MUX_PCM1,
0844                                 S700_MUX_SENS1,
0845                                 S700_MUX_BT,
0846                                 S700_MUX_PWM4 };
0847 /* pcm1_clk */
0848 static unsigned int  pcm1_clk_mfp_pads[]        = { PCM1_CLK };
0849 static unsigned int  pcm1_clk_mfp_funcs[]       = { S700_MUX_PCM1,
0850                                 S700_MUX_SENS1,
0851                                 S700_MUX_BT,
0852                                 S700_MUX_PWM5 };
0853 /* pcm1_sync */
0854 static unsigned int  pcm1_sync_mfp_pads[]       = { PCM1_SYNC };
0855 static unsigned int  pcm1_sync_mfp_funcs[]      = { S700_MUX_PCM1,
0856                                 S700_MUX_SENS1,
0857                                 S700_MUX_BT,
0858                                 S700_MUX_I2C3 };
0859 /* pcm1_out */
0860 static unsigned int  pcm1_out_mfp_pads[]        = { PCM1_OUT };
0861 static unsigned int  pcm1_out_mfp_funcs[]       = { S700_MUX_PCM1,
0862                                 S700_MUX_SENS1,
0863                                 S700_MUX_BT,
0864                                 S700_MUX_I2C3 };
0865 /* dnand_data_wr */
0866 static unsigned int  dnand_data_wr_mfp_pads[]       = { DNAND_D0,
0867                                 DNAND_D1,
0868                                 DNAND_D2,
0869                                 DNAND_D3,
0870                                 DNAND_D4,
0871                                 DNAND_D5,
0872                                 DNAND_D6,
0873                                 DNAND_D7,
0874                                 DNAND_RDB,
0875                                 DNAND_RDBN };
0876 static unsigned int  dnand_data_wr_mfp_funcs[]      = { S700_MUX_NAND,
0877                                 S700_MUX_SD2 };
0878 /* dnand_acle_ce0 */
0879 static unsigned int  dnand_acle_ce0_mfp_pads[]      = { DNAND_ALE,
0880                                 DNAND_CLE,
0881                                 DNAND_CEB0,
0882                                 DNAND_CEB1 };
0883 static unsigned int  dnand_acle_ce0_mfp_funcs[]     = { S700_MUX_NAND,
0884                                 S700_MUX_SPI2 };
0885 
0886 /* nand_ceb2 */
0887 static unsigned int  nand_ceb2_mfp_pads[]       = { DNAND_CEB2 };
0888 static unsigned int  nand_ceb2_mfp_funcs[]      = { S700_MUX_NAND,
0889                                 S700_MUX_PWM5 };
0890 /* nand_ceb3 */
0891 static unsigned int  nand_ceb3_mfp_pads[]       = { DNAND_CEB3 };
0892 static unsigned int  nand_ceb3_mfp_funcs[]      = { S700_MUX_NAND,
0893                                 S700_MUX_PWM4 };
0894 /*****End MFP group data****************************/
0895 
0896 /*****PADDRV group data****************************/
0897 
0898 /*PAD_DRV0*/
0899 static unsigned int  sirq_drv_pads[]            = { SIRQ0,
0900                                 SIRQ1,
0901                                 SIRQ2 };
0902 
0903 static unsigned int  rgmii_txd23_drv_pads[]     = { ETH_TXD2,
0904                                 ETH_TXD3 };
0905 
0906 static unsigned int  rgmii_rxd23_drv_pads[]     = { ETH_RXD2,
0907                                 ETH_RXD3 };
0908 
0909 static unsigned int  rgmii_txd01_txen_drv_pads[]    = { ETH_TXD0,
0910                                 ETH_TXD1,
0911                                 ETH_TXEN };
0912 
0913 static unsigned int  rgmii_rxer_drv_pads[]      = { ETH_RXER };
0914 
0915 static unsigned int  rgmii_crs_drv_pads[]       = { ETH_CRS_DV };
0916 
0917 static unsigned int  rgmii_rxd10_drv_pads[]     = { ETH_RXD0,
0918                                 ETH_RXD1 };
0919 
0920 static unsigned int  rgmii_ref_clk_drv_pads[]       = { ETH_REF_CLK };
0921 
0922 static unsigned int  smi_mdc_mdio_drv_pads[]        = { ETH_MDC,
0923                                 ETH_MDIO };
0924 
0925 static unsigned int  i2s_d0_drv_pads[]          = { I2S_D0 };
0926 
0927 static unsigned int  i2s_bclk0_drv_pads[]       = { I2S_BCLK0 };
0928 
0929 static unsigned int  i2s3_drv_pads[]            = { I2S_LRCLK0,
0930                                 I2S_MCLK0,
0931                                 I2S_D1 };
0932 
0933 static unsigned int  i2s13_drv_pads[]           = { I2S_BCLK1,
0934                                 I2S_LRCLK1,
0935                                 I2S_MCLK1 };
0936 
0937 static unsigned int  pcm1_drv_pads[]            = { PCM1_IN,
0938                                 PCM1_CLK,
0939                                 PCM1_SYNC,
0940                                 PCM1_OUT };
0941 
0942 static unsigned int  ks_in_drv_pads[]           = { KS_IN0,
0943                                 KS_IN1,
0944                                 KS_IN2,
0945                                 KS_IN3 };
0946 
0947 /*PAD_DRV1*/
0948 static unsigned int  ks_out_drv_pads[]          = { KS_OUT0,
0949                                 KS_OUT1,
0950                                 KS_OUT2 };
0951 
0952 static unsigned int  lvds_all_drv_pads[]        = { LVDS_OEP,
0953                                 LVDS_OEN,
0954                                 LVDS_ODP,
0955                                 LVDS_ODN,
0956                                 LVDS_OCP,
0957                                 LVDS_OCN,
0958                                 LVDS_OBP,
0959                                 LVDS_OBN,
0960                                 LVDS_OAP,
0961                                 LVDS_OAN,
0962                                 LVDS_EEP,
0963                                 LVDS_EEN,
0964                                 LVDS_EDP,
0965                                 LVDS_EDN,
0966                                 LVDS_ECP,
0967                                 LVDS_ECN,
0968                                 LVDS_EBP,
0969                                 LVDS_EBN,
0970                                 LVDS_EAP,
0971                                 LVDS_EAN };
0972 
0973 static unsigned int  lcd_d18_d2_drv_pads[]      = { LCD0_D18,
0974                                 LCD0_D2 };
0975 
0976 static unsigned int  dsi_all_drv_pads[]         = { DSI_DP0,
0977                                 DSI_DN0,
0978                                 DSI_DP2,
0979                                 DSI_DN2,
0980                                 DSI_DP3,
0981                                 DSI_DN3,
0982                                 DSI_DP1,
0983                                 DSI_DN1,
0984                                 DSI_CP,
0985                                 DSI_CN };
0986 
0987 static unsigned int  sd0_d0_d3_drv_pads[]       = { SD0_D0,
0988                                 SD0_D1,
0989                                 SD0_D2,
0990                                 SD0_D3 };
0991 
0992 static unsigned int  sd0_cmd_drv_pads[]         = { SD0_CMD };
0993 
0994 static unsigned int  sd0_clk_drv_pads[]         = { SD0_CLK };
0995 
0996 static unsigned int  spi0_all_drv_pads[]        = { SPI0_SS,
0997                                 SPI0_MISO };
0998 
0999 /*PAD_DRV2*/
1000 static unsigned int  uart0_rx_drv_pads[]        = { UART0_RX };
1001 
1002 static unsigned int  uart0_tx_drv_pads[]        = { UART0_TX };
1003 
1004 static unsigned int  uart2_all_drv_pads[]       = { UART2_RX,
1005                                 UART2_TX,
1006                                 UART2_RTSB,
1007                                 UART2_CTSB };
1008 
1009 static unsigned int  i2c0_all_drv_pads[]        = { I2C0_SCLK,
1010                                 I2C0_SDATA };
1011 
1012 static unsigned int  i2c12_all_drv_pads[]       = { I2C1_SCLK,
1013                                 I2C1_SDATA,
1014                                 I2C2_SCLK,
1015                                 I2C2_SDATA };
1016 
1017 static unsigned int  sens0_pclk_drv_pads[]      = { SENSOR0_PCLK };
1018 
1019 static unsigned int  sens0_ckout_drv_pads[]     = { SENSOR0_CKOUT };
1020 
1021 static unsigned int  uart3_all_drv_pads[]       = { UART3_RX,
1022                                 UART3_TX,
1023                                 UART3_RTSB,
1024                                 UART3_CTSB };
1025 
1026 /* all pinctrl groups of S700 board */
1027 static const struct owl_pingroup s700_groups[] = {
1028     MUX_PG(rgmii_txd23_mfp, 0, 28, 2),
1029     MUX_PG(rgmii_rxd2_mfp, 0, 26, 2),
1030     MUX_PG(rgmii_rxd3_mfp, 0, 26, 2),
1031     MUX_PG(lcd0_d18_mfp, 0, 23, 3),
1032     MUX_PG(rgmii_txd01_mfp, 0, 20, 3),
1033     MUX_PG(rgmii_txd0_mfp, 0, 16, 3),
1034     MUX_PG(rgmii_txd1_mfp, 0, 16, 3),
1035     MUX_PG(rgmii_txen_mfp, 0, 13, 3),
1036     MUX_PG(rgmii_rxen_mfp, 0, 13, 3),
1037     MUX_PG(rgmii_rxd1_mfp, 0, 8, 3),
1038     MUX_PG(rgmii_rxd0_mfp, 0, 8, 3),
1039     MUX_PG(rgmii_ref_clk_mfp, 0, 6, 2),
1040     MUX_PG(i2s_d0_mfp, 0, 5, 1),
1041     MUX_PG(i2s_pcm1_mfp, 0, 3, 2),
1042     MUX_PG(i2s0_pcm0_mfp, 0, 1, 2),
1043     MUX_PG(i2s1_pcm0_mfp, 0, 1, 2),
1044     MUX_PG(i2s_d1_mfp, 0, 0, 1),
1045     MUX_PG(ks_in2_mfp, 1, 29, 3),
1046     MUX_PG(ks_in1_mfp, 1, 29, 3),
1047     MUX_PG(ks_in0_mfp, 1, 29, 3),
1048     MUX_PG(ks_in3_mfp, 1, 26, 3),
1049     MUX_PG(ks_out0_mfp, 1, 26, 3),
1050     MUX_PG(ks_out1_mfp, 1, 26, 3),
1051     MUX_PG(ks_out2_mfp, 1, 23, 3),
1052     MUX_PG(lvds_o_pn_mfp, 1, 21, 2),
1053     MUX_PG(dsi_dn0_mfp, 1, 19, 2),
1054     MUX_PG(dsi_dp2_mfp, 1, 17, 2),
1055     MUX_PG(lcd0_d2_mfp, 1, 14, 3),
1056     MUX_PG(dsi_dp3_mfp, 1, 12, 2),
1057     MUX_PG(dsi_dn3_mfp, 1, 10, 2),
1058     MUX_PG(dsi_dp0_mfp, 1, 7, 3),
1059     MUX_PG(lvds_ee_pn_mfp, 1, 5, 2),
1060     MUX_PG(uart2_rx_tx_mfp, 1, 3, 2),
1061     MUX_PG(spi0_i2c_pcm_mfp, 1, 0, 3),
1062     MUX_PG(dsi_dnp1_cp_d2_mfp, 2, 29, 2),
1063     MUX_PG(dsi_dnp1_cp_d17_mfp, 2, 29, 2),
1064     MUX_PG(lvds_e_pn_mfp, 2, 27, 2),
1065     MUX_PG(dsi_dn2_mfp, 2, 24, 3),
1066     MUX_PG(uart2_rtsb_mfp, 2, 23, 1),
1067     MUX_PG(uart2_ctsb_mfp, 2, 22, 1),
1068     MUX_PG(uart3_rtsb_mfp, 2, 21, 1),
1069     MUX_PG(uart3_ctsb_mfp, 2, 20, 1),
1070     MUX_PG(sd0_d0_mfp, 2, 17, 3),
1071     MUX_PG(sd0_d1_mfp, 2, 14, 3),
1072     MUX_PG(sd0_d2_d3_mfp, 2, 11, 3),
1073     MUX_PG(sd1_d0_d3_mfp, 2, 9, 2),
1074     MUX_PG(sd0_cmd_mfp, 2, 7, 2),
1075     MUX_PG(sd0_clk_mfp, 2, 5, 2),
1076     MUX_PG(sd1_cmd_mfp, 2, 3, 2),
1077     MUX_PG(uart0_rx_mfp, 2, 0, 3),
1078     MUX_PG(clko_25m_mfp, 3, 30, 1),
1079     MUX_PG(csi_cn_cp_mfp, 3, 28, 2),
1080     MUX_PG(sens0_ckout_mfp, 3, 22, 2),
1081     MUX_PG(uart0_tx_mfp, 3, 19, 3),
1082     MUX_PG(i2c0_mfp, 3, 16, 3),
1083     MUX_PG(csi_dn_dp_mfp, 3, 14, 2),
1084     MUX_PG(sen0_pclk_mfp, 3, 12, 2),
1085     MUX_PG(pcm1_in_mfp, 3, 10, 2),
1086     MUX_PG(pcm1_clk_mfp, 3, 8, 2),
1087     MUX_PG(pcm1_sync_mfp, 3, 6, 2),
1088     MUX_PG(pcm1_out_mfp, 3, 4, 2),
1089     MUX_PG(dnand_data_wr_mfp, 3, 3, 1),
1090     MUX_PG(dnand_acle_ce0_mfp, 3, 2, 1),
1091     MUX_PG(nand_ceb2_mfp, 3, 0, 2),
1092     MUX_PG(nand_ceb3_mfp, 3, 0, 2),
1093 
1094     DRV_PG(sirq_drv, 0, 28, 2),
1095     DRV_PG(rgmii_txd23_drv, 0, 26, 2),
1096     DRV_PG(rgmii_rxd23_drv, 0, 24, 2),
1097     DRV_PG(rgmii_txd01_txen_drv, 0, 22, 2),
1098     DRV_PG(rgmii_rxer_drv, 0, 20, 2),
1099     DRV_PG(rgmii_crs_drv, 0, 18, 2),
1100     DRV_PG(rgmii_rxd10_drv, 0, 16, 2),
1101     DRV_PG(rgmii_ref_clk_drv, 0, 14, 2),
1102     DRV_PG(smi_mdc_mdio_drv, 0, 12, 2),
1103     DRV_PG(i2s_d0_drv, 0, 10, 2),
1104     DRV_PG(i2s_bclk0_drv, 0, 8, 2),
1105     DRV_PG(i2s3_drv, 0, 6, 2),
1106     DRV_PG(i2s13_drv, 0, 4, 2),
1107     DRV_PG(pcm1_drv, 0, 2, 2),
1108     DRV_PG(ks_in_drv, 0, 0, 2),
1109     DRV_PG(ks_out_drv, 1, 30, 2),
1110     DRV_PG(lvds_all_drv, 1, 28, 2),
1111     DRV_PG(lcd_d18_d2_drv, 1, 26, 2),
1112     DRV_PG(dsi_all_drv, 1, 24, 2),
1113     DRV_PG(sd0_d0_d3_drv, 1, 22, 2),
1114     DRV_PG(sd0_cmd_drv, 1, 18, 2),
1115     DRV_PG(sd0_clk_drv, 1, 16, 2),
1116     DRV_PG(spi0_all_drv, 1, 10, 2),
1117     DRV_PG(uart0_rx_drv, 2, 30, 2),
1118     DRV_PG(uart0_tx_drv, 2, 28, 2),
1119     DRV_PG(uart2_all_drv, 2, 26, 2),
1120     DRV_PG(i2c0_all_drv, 2, 23, 2),
1121     DRV_PG(i2c12_all_drv, 2, 21, 2),
1122     DRV_PG(sens0_pclk_drv, 2, 18, 2),
1123     DRV_PG(sens0_ckout_drv, 2, 12, 2),
1124     DRV_PG(uart3_all_drv, 2, 2, 2),
1125 };
1126 
1127 static const char * const nor_groups[] = {
1128     "lcd0_d18_mfp",
1129     "i2s_d0_mfp",
1130     "i2s0_pcm0_mfp",
1131     "i2s1_pcm0_mfp",
1132     "i2s_d1_mfp",
1133     "ks_in2_mfp",
1134     "ks_in1_mfp",
1135     "ks_in0_mfp",
1136     "ks_in3_mfp",
1137     "ks_out0_mfp",
1138     "ks_out1_mfp",
1139     "ks_out2_mfp",
1140     "lcd0_d2_mfp",
1141     "lvds_ee_pn_mfp",
1142     "uart2_rx_tx_mfp",
1143     "spi0_i2c_pcm_mfp",
1144     "lvds_e_pn_mfp",
1145     "sd0_d0_mfp",
1146     "sd0_d1_mfp",
1147     "sd0_d2_d3_mfp",
1148     "sd1_d0_d3_mfp",
1149     "sd0_cmd_mfp",
1150     "sd1_cmd_mfp",
1151     "sens0_ckout_mfp",
1152     "sen0_pclk_mfp",
1153 };
1154 
1155 static const char * const eth_rmii_groups[] = {
1156     "rgmii_txd23_mfp",
1157     "rgmii_rxd2_mfp",
1158     "rgmii_rxd3_mfp",
1159     "rgmii_txd01_mfp",
1160     "rgmii_txd0_mfp",
1161     "rgmii_txd1_mfp",
1162     "rgmii_txen_mfp",
1163     "rgmii_rxen_mfp",
1164     "rgmii_rxd1_mfp",
1165     "rgmii_rxd0_mfp",
1166     "rgmii_ref_clk_mfp",
1167     "eth_smi_dummy",
1168 };
1169 
1170 static const char * const eth_smii_groups[] = {
1171     "rgmii_txd0_mfp",
1172     "rgmii_txd1_mfp",
1173     "rgmii_rxd0_mfp",
1174     "rgmii_rxd1_mfp",
1175     "rgmii_ref_clk_mfp",
1176     "eth_smi_dummy",
1177 };
1178 
1179 static const char * const spi0_groups[] = {
1180     "dsi_dn0_mfp",
1181     "dsi_dp2_mfp",
1182     "dsi_dp0_mfp",
1183     "uart2_rx_tx_mfp",
1184     "spi0_i2c_pcm_mfp",
1185     "dsi_dn2_mfp",
1186 };
1187 
1188 static const char * const spi1_groups[] = {
1189     "uart0_rx_mfp",
1190     "uart0_tx_mfp",
1191     "i2c0_mfp",
1192 };
1193 
1194 static const char * const spi2_groups[] = {
1195     "rgmii_txd01_mfp",
1196     "rgmii_txd0_mfp",
1197     "rgmii_txd1_mfp",
1198     "rgmii_ref_clk_mfp",
1199     "dnand_acle_ce0_mfp",
1200 };
1201 
1202 static const char * const spi3_groups[] = {
1203     "rgmii_txen_mfp",
1204     "rgmii_rxen_mfp",
1205     "rgmii_rxd1_mfp",
1206     "rgmii_rxd0_mfp",
1207 };
1208 
1209 static const char * const sens0_groups[] = {
1210     "csi_cn_cp_mfp",
1211     "sens0_ckout_mfp",
1212     "csi_dn_dp_mfp",
1213     "sen0_pclk_mfp",
1214 };
1215 
1216 static const char * const sens1_groups[] = {
1217     "lcd0_d18_mfp",
1218     "ks_in2_mfp",
1219     "ks_in1_mfp",
1220     "ks_in0_mfp",
1221     "ks_in3_mfp",
1222     "ks_out0_mfp",
1223     "ks_out1_mfp",
1224     "ks_out2_mfp",
1225     "sens0_ckout_mfp",
1226     "pcm1_in_mfp",
1227     "pcm1_clk_mfp",
1228     "pcm1_sync_mfp",
1229     "pcm1_out_mfp",
1230 };
1231 
1232 static const char * const uart0_groups[] = {
1233     "uart2_rtsb_mfp",
1234     "uart2_ctsb_mfp",
1235     "uart0_rx_mfp",
1236     "uart0_tx_mfp",
1237 };
1238 
1239 static const char * const uart1_groups[] = {
1240     "sd0_d2_d3_mfp",
1241     "i2c0_mfp",
1242 };
1243 
1244 static const char * const uart2_groups[] = {
1245     "rgmii_txen_mfp",
1246     "rgmii_rxen_mfp",
1247     "rgmii_rxd1_mfp",
1248     "rgmii_rxd0_mfp",
1249     "dsi_dn0_mfp",
1250     "dsi_dp2_mfp",
1251     "dsi_dp0_mfp",
1252     "uart2_rx_tx_mfp",
1253     "dsi_dn2_mfp",
1254     "uart2_rtsb_mfp",
1255     "uart2_ctsb_mfp",
1256     "sd0_d0_mfp",
1257     "sd0_d1_mfp",
1258     "sd0_d2_d3_mfp",
1259     "uart0_rx_mfp",
1260     "uart0_tx_mfp",
1261     "i2c0_mfp",
1262     "uart2_dummy"
1263 };
1264 
1265 static const char * const uart3_groups[] = {
1266     "rgmii_txd23_mfp",
1267     "rgmii_rxd2_mfp",
1268     "rgmii_rxd3_mfp",
1269     "uart3_rtsb_mfp",
1270     "uart3_ctsb_mfp",
1271     "uart3_dummy"
1272 };
1273 
1274 static const char * const uart4_groups[] = {
1275     "rgmii_txd01_mfp",
1276     "rgmii_ref_clk_mfp",
1277     "ks_out0_mfp",
1278     "ks_out1_mfp",
1279 };
1280 
1281 static const char * const uart5_groups[] = {
1282     "rgmii_rxd1_mfp",
1283     "rgmii_rxd0_mfp",
1284     "ks_out0_mfp",
1285     "ks_out2_mfp",
1286     "uart3_rtsb_mfp",
1287     "uart3_ctsb_mfp",
1288     "sd0_d0_mfp",
1289     "sd0_d1_mfp",
1290 };
1291 
1292 static const char * const uart6_groups[] = {
1293     "rgmii_txd0_mfp",
1294     "rgmii_txd1_mfp",
1295 };
1296 
1297 static const char * const i2s0_groups[] = {
1298     "i2s_d0_mfp",
1299     "i2s_pcm1_mfp",
1300     "i2s0_pcm0_mfp",
1301 };
1302 
1303 static const char * const i2s1_groups[] = {
1304     "i2s1_pcm0_mfp",
1305     "i2s_d1_mfp",
1306     "i2s1_dummy",
1307     "spi0_i2c_pcm_mfp",
1308     "uart0_rx_mfp",
1309     "uart0_tx_mfp",
1310 };
1311 
1312 static const char * const pcm1_groups[] = {
1313     "i2s_pcm1_mfp",
1314     "spi0_i2c_pcm_mfp",
1315     "uart0_rx_mfp",
1316     "uart0_tx_mfp",
1317     "pcm1_in_mfp",
1318     "pcm1_clk_mfp",
1319     "pcm1_sync_mfp",
1320     "pcm1_out_mfp",
1321 };
1322 
1323 static const char * const pcm0_groups[] = {
1324     "i2s0_pcm0_mfp",
1325     "i2s1_pcm0_mfp",
1326     "uart2_rx_tx_mfp",
1327     "spi0_i2c_pcm_mfp",
1328 };
1329 
1330 static const char * const ks_groups[] = {
1331     "ks_in2_mfp",
1332     "ks_in1_mfp",
1333     "ks_in0_mfp",
1334     "ks_in3_mfp",
1335     "ks_out0_mfp",
1336     "ks_out1_mfp",
1337     "ks_out2_mfp",
1338 };
1339 
1340 static const char * const jtag_groups[] = {
1341     "ks_in2_mfp",
1342     "ks_in1_mfp",
1343     "ks_in0_mfp",
1344     "ks_in3_mfp",
1345     "ks_out1_mfp",
1346     "sd0_d0_mfp",
1347     "sd0_d2_d3_mfp",
1348     "sd0_cmd_mfp",
1349     "sd0_clk_mfp",
1350 };
1351 
1352 static const char * const pwm0_groups[] = {
1353     "rgmii_rxd2_mfp",
1354     "rgmii_txen_mfp",
1355     "ks_in2_mfp",
1356     "sen0_pclk_mfp",
1357 };
1358 
1359 static const char * const pwm1_groups[] = {
1360     "rgmii_rxen_mfp",
1361     "ks_in1_mfp",
1362     "ks_in3_mfp",
1363     "sens0_ckout_mfp",
1364 };
1365 
1366 static const char * const pwm2_groups[] = {
1367     "lcd0_d18_mfp",
1368     "rgmii_rxd3_mfp",
1369     "rgmii_rxd1_mfp",
1370     "ks_out0_mfp",
1371     "ks_out2_mfp",
1372 };
1373 
1374 static const char * const pwm3_groups[] = {
1375     "rgmii_rxd0_mfp",
1376     "ks_out1_mfp",
1377     "lcd0_d2_mfp",
1378 };
1379 
1380 static const char * const pwm4_groups[] = {
1381     "lcd0_d18_mfp",
1382     "rgmii_txd01_mfp",
1383     "rgmii_txd0_mfp",
1384     "ks_in0_mfp",
1385     "pcm1_in_mfp",
1386     "nand_ceb3_mfp",
1387 };
1388 
1389 static const char * const pwm5_groups[] = {
1390     "rgmii_txd1_mfp",
1391     "ks_in1_mfp",
1392     "pcm1_clk_mfp",
1393     "nand_ceb2_mfp",
1394 };
1395 
1396 static const char * const p0_groups[] = {
1397     "ks_in2_mfp",
1398     "ks_in0_mfp",
1399 };
1400 
1401 static const char * const sd0_groups[] = {
1402     "ks_out0_mfp",
1403     "ks_out1_mfp",
1404     "ks_out2_mfp",
1405     "lcd0_d2_mfp",
1406     "dsi_dp3_mfp",
1407     "dsi_dp0_mfp",
1408     "sd0_d0_mfp",
1409     "sd0_d1_mfp",
1410     "sd0_d2_d3_mfp",
1411     "sd1_d0_d3_mfp",
1412     "sd0_cmd_mfp",
1413     "sd0_clk_mfp",
1414 };
1415 
1416 static const char * const sd1_groups[] = {
1417     "dsi_dp2_mfp",
1418     "mfp1_16_14_mfp",
1419     "lcd0_d2_mfp",
1420     "mfp1_16_14_d17_mfp",
1421     "dsi_dp3_mfp",
1422     "dsi_dn3_mfp",
1423     "dsi_dnp1_cp_d2_mfp",
1424     "dsi_dnp1_cp_d17_mfp",
1425     "dsi_dn2_mfp",
1426     "sd1_d0_d3_mfp",
1427     "sd1_cmd_mfp",
1428     "sd1_dummy",
1429 };
1430 
1431 static const char * const sd2_groups[] = {
1432     "dnand_data_wr_mfp",
1433 };
1434 
1435 static const char * const i2c0_groups[] = {
1436     "uart0_rx_mfp",
1437     "uart0_tx_mfp",
1438     "i2c0_mfp",
1439 };
1440 
1441 static const char * const i2c1_groups[] = {
1442     "i2c0_mfp",
1443     "i2c1_dummy"
1444 };
1445 
1446 static const char * const i2c2_groups[] = {
1447     "i2c2_dummy"
1448 };
1449 
1450 static const char * const i2c3_groups[] = {
1451     "uart2_rx_tx_mfp",
1452     "pcm1_sync_mfp",
1453     "pcm1_out_mfp",
1454 };
1455 
1456 static const char * const lvds_groups[] = {
1457     "lvds_o_pn_mfp",
1458     "lvds_ee_pn_mfp",
1459     "lvds_e_pn_mfp",
1460 };
1461 
1462 static const char * const bt_groups[] = {
1463     "i2s_pcm1_mfp",
1464     "i2s0_pcm0_mfp",
1465     "i2s1_pcm0_mfp",
1466     "ks_in2_mfp",
1467     "ks_in1_mfp",
1468     "ks_in0_mfp",
1469     "ks_in3_mfp",
1470     "ks_out0_mfp",
1471     "ks_out1_mfp",
1472     "ks_out2_mfp",
1473     "lvds_o_pn_mfp",
1474     "lvds_ee_pn_mfp",
1475     "pcm1_in_mfp",
1476     "pcm1_clk_mfp",
1477     "pcm1_sync_mfp",
1478     "pcm1_out_mfp",
1479 };
1480 
1481 static const char * const lcd0_groups[] = {
1482     "lcd0_d18_mfp",
1483     "lcd0_d2_mfp",
1484     "mfp1_16_14_d17_mfp",
1485     "lvds_o_pn_mfp",
1486     "dsi_dp3_mfp",
1487     "dsi_dn3_mfp",
1488     "lvds_ee_pn_mfp",
1489     "dsi_dnp1_cp_d2_mfp",
1490     "dsi_dnp1_cp_d17_mfp",
1491     "lvds_e_pn_mfp",
1492 };
1493 
1494 
1495 static const char * const usb30_groups[] = {
1496     "ks_in1_mfp",
1497 };
1498 
1499 static const char * const clko_25m_groups[] = {
1500     "clko_25m_mfp",
1501 };
1502 
1503 static const char * const mipi_csi_groups[] = {
1504     "csi_cn_cp_mfp",
1505     "csi_dn_dp_mfp",
1506 };
1507 
1508 static const char * const dsi_groups[] = {
1509     "dsi_dn0_mfp",
1510     "dsi_dp2_mfp",
1511     "dsi_dp3_mfp",
1512     "dsi_dn3_mfp",
1513     "dsi_dp0_mfp",
1514     "dsi_dnp1_cp_d2_mfp",
1515     "dsi_dnp1_cp_d17_mfp",
1516     "dsi_dn2_mfp",
1517     "dsi_dummy",
1518 };
1519 
1520 static const char * const nand_groups[] = {
1521     "dnand_data_wr_mfp",
1522     "dnand_acle_ce0_mfp",
1523     "nand_ceb2_mfp",
1524     "nand_ceb3_mfp",
1525     "nand_dummy",
1526 };
1527 
1528 static const char * const spdif_groups[] = {
1529     "uart0_tx_mfp",
1530 };
1531 
1532 static const char * const sirq0_groups[] = {
1533     "sirq0_dummy",
1534 };
1535 
1536 static const char * const sirq1_groups[] = {
1537     "sirq1_dummy",
1538 };
1539 
1540 static const char * const sirq2_groups[] = {
1541     "sirq2_dummy",
1542 };
1543 
1544 static const struct owl_pinmux_func s700_functions[] = {
1545     [S700_MUX_NOR] = FUNCTION(nor),
1546     [S700_MUX_ETH_RGMII] = FUNCTION(eth_rmii),
1547     [S700_MUX_ETH_SGMII] = FUNCTION(eth_smii),
1548     [S700_MUX_SPI0] = FUNCTION(spi0),
1549     [S700_MUX_SPI1] = FUNCTION(spi1),
1550     [S700_MUX_SPI2] = FUNCTION(spi2),
1551     [S700_MUX_SPI3] = FUNCTION(spi3),
1552     [S700_MUX_SENS0] = FUNCTION(sens0),
1553     [S700_MUX_SENS1] = FUNCTION(sens1),
1554     [S700_MUX_UART0] = FUNCTION(uart0),
1555     [S700_MUX_UART1] = FUNCTION(uart1),
1556     [S700_MUX_UART2] = FUNCTION(uart2),
1557     [S700_MUX_UART3] = FUNCTION(uart3),
1558     [S700_MUX_UART4] = FUNCTION(uart4),
1559     [S700_MUX_UART5] = FUNCTION(uart5),
1560     [S700_MUX_UART6] = FUNCTION(uart6),
1561     [S700_MUX_I2S0] = FUNCTION(i2s0),
1562     [S700_MUX_I2S1] = FUNCTION(i2s1),
1563     [S700_MUX_PCM1] = FUNCTION(pcm1),
1564     [S700_MUX_PCM0] = FUNCTION(pcm0),
1565     [S700_MUX_KS] = FUNCTION(ks),
1566     [S700_MUX_JTAG] = FUNCTION(jtag),
1567     [S700_MUX_PWM0] = FUNCTION(pwm0),
1568     [S700_MUX_PWM1] = FUNCTION(pwm1),
1569     [S700_MUX_PWM2] = FUNCTION(pwm2),
1570     [S700_MUX_PWM3] = FUNCTION(pwm3),
1571     [S700_MUX_PWM4] = FUNCTION(pwm4),
1572     [S700_MUX_PWM5] = FUNCTION(pwm5),
1573     [S700_MUX_P0] = FUNCTION(p0),
1574     [S700_MUX_SD0] = FUNCTION(sd0),
1575     [S700_MUX_SD1] = FUNCTION(sd1),
1576     [S700_MUX_SD2] = FUNCTION(sd2),
1577     [S700_MUX_I2C0] = FUNCTION(i2c0),
1578     [S700_MUX_I2C1] = FUNCTION(i2c1),
1579     [S700_MUX_I2C2] = FUNCTION(i2c2),
1580     [S700_MUX_I2C3] = FUNCTION(i2c3),
1581     [S700_MUX_DSI] = FUNCTION(dsi),
1582     [S700_MUX_LVDS] = FUNCTION(lvds),
1583     [S700_MUX_USB30] = FUNCTION(usb30),
1584     [S700_MUX_CLKO_25M] = FUNCTION(clko_25m),
1585     [S700_MUX_MIPI_CSI] = FUNCTION(mipi_csi),
1586     [S700_MUX_NAND] = FUNCTION(nand),
1587     [S700_MUX_SPDIF] = FUNCTION(spdif),
1588     [S700_MUX_SIRQ0] = FUNCTION(sirq0),
1589     [S700_MUX_SIRQ1] = FUNCTION(sirq1),
1590     [S700_MUX_SIRQ2] = FUNCTION(sirq2),
1591     [S700_MUX_BT] = FUNCTION(bt),
1592     [S700_MUX_LCD0] = FUNCTION(lcd0),
1593 };
1594 
1595 /* PAD_ST0 */
1596 static PAD_ST_CONF(UART2_TX, 0, 31, 1);
1597 static PAD_ST_CONF(I2C0_SDATA, 0, 30, 1);
1598 static PAD_ST_CONF(UART0_RX, 0, 29, 1);
1599 static PAD_ST_CONF(I2S_MCLK1, 0, 23, 1);
1600 static PAD_ST_CONF(ETH_REF_CLK, 0, 22, 1);
1601 static PAD_ST_CONF(ETH_TXEN, 0, 21, 1);
1602 static PAD_ST_CONF(ETH_TXD0, 0, 20, 1);
1603 static PAD_ST_CONF(I2S_LRCLK1, 0, 19, 1);
1604 static PAD_ST_CONF(DSI_DP0, 0, 16, 1);
1605 static PAD_ST_CONF(DSI_DN0, 0, 15, 1);
1606 static PAD_ST_CONF(UART0_TX, 0, 14, 1);
1607 static PAD_ST_CONF(SD0_CLK, 0, 12, 1);
1608 static PAD_ST_CONF(KS_IN0, 0, 11, 1);
1609 static PAD_ST_CONF(SENSOR0_PCLK, 0, 9, 1);
1610 static PAD_ST_CONF(I2C0_SCLK, 0, 7, 1);
1611 static PAD_ST_CONF(KS_OUT0, 0, 6, 1);
1612 static PAD_ST_CONF(KS_OUT1, 0, 5, 1);
1613 static PAD_ST_CONF(KS_OUT2, 0, 4, 1);
1614 static PAD_ST_CONF(ETH_TXD3, 0, 3, 1);
1615 static PAD_ST_CONF(ETH_TXD2, 0, 2, 1);
1616 
1617 /* PAD_ST1 */
1618 static PAD_ST_CONF(DSI_DP2, 1, 31, 1);
1619 static PAD_ST_CONF(DSI_DN2, 1, 30, 1);
1620 static PAD_ST_CONF(I2S_LRCLK0, 1, 29, 1);
1621 static PAD_ST_CONF(UART3_CTSB, 1, 27, 1);
1622 static PAD_ST_CONF(UART3_RTSB, 1, 26, 1);
1623 static PAD_ST_CONF(UART3_RX, 1, 25, 1);
1624 static PAD_ST_CONF(UART2_RTSB, 1, 24, 1);
1625 static PAD_ST_CONF(UART2_CTSB, 1, 23, 1);
1626 static PAD_ST_CONF(UART2_RX, 1, 22, 1);
1627 static PAD_ST_CONF(ETH_RXD0, 1, 21, 1);
1628 static PAD_ST_CONF(ETH_RXD1, 1, 20, 1);
1629 static PAD_ST_CONF(ETH_CRS_DV, 1, 19, 1);
1630 static PAD_ST_CONF(ETH_RXER, 1, 18, 1);
1631 static PAD_ST_CONF(ETH_TXD1, 1, 17, 1);
1632 static PAD_ST_CONF(LVDS_OAP, 1, 12, 1);
1633 static PAD_ST_CONF(PCM1_CLK, 1, 11, 1);
1634 static PAD_ST_CONF(PCM1_IN, 1, 10, 1);
1635 static PAD_ST_CONF(PCM1_SYNC, 1, 9, 1);
1636 static PAD_ST_CONF(I2C1_SCLK, 1, 8, 1);
1637 static PAD_ST_CONF(I2C1_SDATA, 1, 7, 1);
1638 static PAD_ST_CONF(I2C2_SCLK, 1, 6, 1);
1639 static PAD_ST_CONF(I2C2_SDATA, 1, 5, 1);
1640 
1641 static PAD_ST_CONF(SPI0_MISO, 1, 3, 1);
1642 static PAD_ST_CONF(SPI0_SS, 1, 2, 1);
1643 static PAD_ST_CONF(I2S_BCLK0, 1, 1, 1);
1644 static PAD_ST_CONF(I2S_MCLK0, 1, 0, 1);
1645 
1646 /* PAD_PULLCTL0 */
1647 static PAD_PULLCTL_CONF(PCM1_SYNC, 0, 30, 1);
1648 static PAD_PULLCTL_CONF(PCM1_OUT, 0, 29, 1);
1649 static PAD_PULLCTL_CONF(KS_OUT2, 0, 28, 1);
1650 static PAD_PULLCTL_CONF(LCD0_D2, 0, 27, 1);
1651 static PAD_PULLCTL_CONF(DSI_DN3, 0, 26, 1);
1652 static PAD_PULLCTL_CONF(ETH_RXER, 0, 16, 1);
1653 static PAD_PULLCTL_CONF(SIRQ0, 0, 14, 2);
1654 static PAD_PULLCTL_CONF(SIRQ1, 0, 12, 2);
1655 static PAD_PULLCTL_CONF(SIRQ2, 0, 10, 2);
1656 static PAD_PULLCTL_CONF(I2C0_SDATA, 0, 9, 1);
1657 static PAD_PULLCTL_CONF(I2C0_SCLK, 0, 8, 1);
1658 static PAD_PULLCTL_CONF(KS_IN0, 0, 7, 1);
1659 static PAD_PULLCTL_CONF(KS_IN1, 0, 6, 1);
1660 static PAD_PULLCTL_CONF(KS_IN2, 0, 5, 1);
1661 static PAD_PULLCTL_CONF(KS_IN3, 0, 4, 1);
1662 static PAD_PULLCTL_CONF(KS_OUT0, 0, 2, 1);
1663 static PAD_PULLCTL_CONF(KS_OUT1, 0, 1, 1);
1664 static PAD_PULLCTL_CONF(DSI_DP1, 0, 0, 1);
1665 
1666 /* PAD_PULLCTL1 */
1667 static PAD_PULLCTL_CONF(SD0_D0, 1, 17, 1);
1668 static PAD_PULLCTL_CONF(SD0_D1, 1, 16, 1);
1669 static PAD_PULLCTL_CONF(SD0_D2, 1, 15, 1);
1670 static PAD_PULLCTL_CONF(SD0_D3, 1, 14, 1);
1671 static PAD_PULLCTL_CONF(SD0_CMD, 1, 13, 1);
1672 static PAD_PULLCTL_CONF(SD0_CLK, 1, 12, 1);
1673 static PAD_PULLCTL_CONF(UART0_RX, 1, 2, 1);
1674 static PAD_PULLCTL_CONF(UART0_TX, 1, 1, 1);
1675 static PAD_PULLCTL_CONF(CLKO_25M, 1, 0, 1);
1676 
1677 /* PAD_PULLCTL2 */
1678 static PAD_PULLCTL_CONF(ETH_TXD2, 2, 18, 1);
1679 static PAD_PULLCTL_CONF(ETH_TXD3, 2, 17, 1);
1680 static PAD_PULLCTL_CONF(SPI0_SS, 2, 16, 1);
1681 static PAD_PULLCTL_CONF(SPI0_MISO, 2, 15, 1);
1682 static PAD_PULLCTL_CONF(I2C1_SDATA, 2, 10, 1);
1683 static PAD_PULLCTL_CONF(I2C1_SCLK, 2, 9, 1);
1684 static PAD_PULLCTL_CONF(I2C2_SDATA, 2, 8, 1);
1685 static PAD_PULLCTL_CONF(I2C2_SCLK, 2, 7, 1);
1686 
1687 /* Pad info table for the pinmux subsystem */
1688 static const struct owl_padinfo s700_padinfo[NUM_PADS] = {
1689     [ETH_TXD0] = PAD_INFO_ST(ETH_TXD0),
1690     [ETH_TXD1] = PAD_INFO_ST(ETH_TXD1),
1691     [ETH_TXEN] = PAD_INFO_ST(ETH_TXEN),
1692     [ETH_RXER] = PAD_INFO_PULLCTL_ST(ETH_RXER),
1693     [ETH_CRS_DV] = PAD_INFO_ST(ETH_CRS_DV),
1694     [ETH_RXD1] = PAD_INFO_ST(ETH_RXD1),
1695     [ETH_RXD0] = PAD_INFO_ST(ETH_RXD0),
1696     [ETH_REF_CLK] = PAD_INFO_ST(ETH_REF_CLK),
1697     [ETH_MDC] = PAD_INFO(ETH_MDC),
1698     [ETH_MDIO] = PAD_INFO(ETH_MDIO),
1699     [SIRQ0] = PAD_INFO_PULLCTL(SIRQ0),
1700     [SIRQ1] = PAD_INFO_PULLCTL(SIRQ1),
1701     [SIRQ2] = PAD_INFO_PULLCTL(SIRQ2),
1702     [I2S_D0] = PAD_INFO(I2S_D0),
1703     [I2S_BCLK0] = PAD_INFO_ST(I2S_BCLK0),
1704     [I2S_LRCLK0] = PAD_INFO_ST(I2S_LRCLK0),
1705     [I2S_MCLK0] = PAD_INFO_ST(I2S_MCLK0),
1706     [I2S_D1] = PAD_INFO(I2S_D1),
1707     [I2S_BCLK1] = PAD_INFO(I2S_BCLK1),
1708     [I2S_LRCLK1] = PAD_INFO_ST(I2S_LRCLK1),
1709     [I2S_MCLK1] = PAD_INFO_ST(I2S_MCLK1),
1710     [KS_IN0] = PAD_INFO_PULLCTL_ST(KS_IN0),
1711     [KS_IN1] = PAD_INFO_PULLCTL(KS_IN1),
1712     [KS_IN2] = PAD_INFO_PULLCTL(KS_IN2),
1713     [KS_IN3] = PAD_INFO_PULLCTL(KS_IN3),
1714     [KS_OUT0] = PAD_INFO_PULLCTL_ST(KS_OUT0),
1715     [KS_OUT1] = PAD_INFO_PULLCTL_ST(KS_OUT1),
1716     [KS_OUT2] = PAD_INFO_PULLCTL_ST(KS_OUT2),
1717     [LVDS_OEP] = PAD_INFO(LVDS_OEP),
1718     [LVDS_OEN] = PAD_INFO(LVDS_OEN),
1719     [LVDS_ODP] = PAD_INFO(LVDS_ODP),
1720     [LVDS_ODN] = PAD_INFO(LVDS_ODN),
1721     [LVDS_OCP] = PAD_INFO(LVDS_OCP),
1722     [LVDS_OCN] = PAD_INFO(LVDS_OCN),
1723     [LVDS_OBP] = PAD_INFO(LVDS_OBP),
1724     [LVDS_OBN] = PAD_INFO(LVDS_OBN),
1725     [LVDS_OAP] = PAD_INFO_ST(LVDS_OAP),
1726     [LVDS_OAN] = PAD_INFO(LVDS_OAN),
1727     [LVDS_EEP] = PAD_INFO(LVDS_EEP),
1728     [LVDS_EEN] = PAD_INFO(LVDS_EEN),
1729     [LVDS_EDP] = PAD_INFO(LVDS_EDP),
1730     [LVDS_EDN] = PAD_INFO(LVDS_EDN),
1731     [LVDS_ECP] = PAD_INFO(LVDS_ECP),
1732     [LVDS_ECN] = PAD_INFO(LVDS_ECN),
1733     [LVDS_EBP] = PAD_INFO(LVDS_EBP),
1734     [LVDS_EBN] = PAD_INFO(LVDS_EBN),
1735     [LVDS_EAP] = PAD_INFO(LVDS_EAP),
1736     [LVDS_EAN] = PAD_INFO(LVDS_EAN),
1737     [LCD0_D18] = PAD_INFO(LCD0_D18),
1738     [LCD0_D2] = PAD_INFO_PULLCTL(LCD0_D2),
1739     [DSI_DP3] = PAD_INFO(DSI_DP3),
1740     [DSI_DN3] = PAD_INFO_PULLCTL(DSI_DN3),
1741     [DSI_DP1] = PAD_INFO_PULLCTL(DSI_DP1),
1742     [DSI_DN1] = PAD_INFO(DSI_DN1),
1743     [DSI_DP0] = PAD_INFO_ST(DSI_DP0),
1744     [DSI_DN0] = PAD_INFO_ST(DSI_DN0),
1745     [DSI_DP2] = PAD_INFO_ST(DSI_DP2),
1746     [DSI_DN2] = PAD_INFO_ST(DSI_DN2),
1747     [SD0_D0] = PAD_INFO_PULLCTL(SD0_D0),
1748     [SD0_D1] = PAD_INFO_PULLCTL(SD0_D1),
1749     [SD0_D2] = PAD_INFO_PULLCTL(SD0_D2),
1750     [SD0_D3] = PAD_INFO_PULLCTL(SD0_D3),
1751     [SD0_CMD] = PAD_INFO_PULLCTL(SD0_CMD),
1752     [SD0_CLK] = PAD_INFO_PULLCTL_ST(SD0_CLK),
1753     [SD1_CLK] = PAD_INFO(SD1_CLK),
1754     [SPI0_SS] = PAD_INFO_PULLCTL_ST(SPI0_SS),
1755     [SPI0_MISO] = PAD_INFO_PULLCTL_ST(SPI0_MISO),
1756     [UART0_RX] = PAD_INFO_PULLCTL_ST(UART0_RX),
1757     [UART0_TX] = PAD_INFO_PULLCTL_ST(UART0_TX),
1758     [I2C0_SCLK] = PAD_INFO_PULLCTL_ST(I2C0_SCLK),
1759     [I2C0_SDATA] = PAD_INFO_PULLCTL_ST(I2C0_SDATA),
1760     [SENSOR0_PCLK] = PAD_INFO_ST(SENSOR0_PCLK),
1761     [SENSOR0_CKOUT] = PAD_INFO(SENSOR0_CKOUT),
1762     [DNAND_ALE] = PAD_INFO(DNAND_ALE),
1763     [DNAND_CLE] = PAD_INFO(DNAND_CLE),
1764     [DNAND_CEB0] = PAD_INFO(DNAND_CEB0),
1765     [DNAND_CEB1] = PAD_INFO(DNAND_CEB1),
1766     [DNAND_CEB2] = PAD_INFO(DNAND_CEB2),
1767     [DNAND_CEB3] = PAD_INFO(DNAND_CEB3),
1768     [UART2_RX] = PAD_INFO_ST(UART2_RX),
1769     [UART2_TX] = PAD_INFO_ST(UART2_TX),
1770     [UART2_RTSB] = PAD_INFO_ST(UART2_RTSB),
1771     [UART2_CTSB] = PAD_INFO_ST(UART2_CTSB),
1772     [UART3_RX] = PAD_INFO_ST(UART3_RX),
1773     [UART3_TX] = PAD_INFO(UART3_TX),
1774     [UART3_RTSB] = PAD_INFO_ST(UART3_RTSB),
1775     [UART3_CTSB] = PAD_INFO_ST(UART3_CTSB),
1776     [PCM1_IN] = PAD_INFO_ST(PCM1_IN),
1777     [PCM1_CLK] = PAD_INFO_ST(PCM1_CLK),
1778     [PCM1_SYNC] = PAD_INFO_PULLCTL_ST(PCM1_SYNC),
1779     [PCM1_OUT] = PAD_INFO_PULLCTL(PCM1_OUT),
1780     [I2C1_SCLK] = PAD_INFO_PULLCTL_ST(I2C1_SCLK),
1781     [I2C1_SDATA] = PAD_INFO_PULLCTL_ST(I2C1_SDATA),
1782     [I2C2_SCLK] = PAD_INFO_PULLCTL_ST(I2C2_SCLK),
1783     [I2C2_SDATA] = PAD_INFO_PULLCTL_ST(I2C2_SDATA),
1784     [CSI_DN0] = PAD_INFO(CSI_DN0),
1785     [CSI_DP0] = PAD_INFO(CSI_DP0),
1786     [CSI_DN1] = PAD_INFO(CSI_DN1),
1787     [CSI_DP1] = PAD_INFO(CSI_DP1),
1788     [CSI_CN] = PAD_INFO(CSI_CN),
1789     [CSI_CP] = PAD_INFO(CSI_CP),
1790     [CSI_DN2] = PAD_INFO(CSI_DN2),
1791     [CSI_DP2] = PAD_INFO(CSI_DP2),
1792     [CSI_DN3] = PAD_INFO(CSI_DN3),
1793     [CSI_DP3] = PAD_INFO(CSI_DP3),
1794     [DNAND_WRB] = PAD_INFO(DNAND_WRB),
1795     [DNAND_RDB] = PAD_INFO(DNAND_RDB),
1796     [DNAND_RB0] = PAD_INFO(DNAND_RB0),
1797     [PORB] = PAD_INFO(PORB),
1798     [CLKO_25M] = PAD_INFO_PULLCTL(CLKO_25M),
1799     [BSEL] = PAD_INFO(BSEL),
1800     [PKG0] = PAD_INFO(PKG0),
1801     [PKG1] = PAD_INFO(PKG1),
1802     [PKG2] = PAD_INFO(PKG2),
1803     [PKG3] = PAD_INFO(PKG3),
1804     [ETH_TXD2] = PAD_INFO_PULLCTL_ST(ETH_TXD2),
1805     [ETH_TXD3] = PAD_INFO_PULLCTL_ST(ETH_TXD3),
1806 };
1807 
1808 static const struct owl_gpio_port s700_gpio_ports[] = {
1809     OWL_GPIO_PORT(A, 0x0000, 32, 0x0, 0x4, 0x8, 0x204, 0x208, 0x20C, 0x230, 0),
1810     OWL_GPIO_PORT(B, 0x000C, 32, 0x0, 0x4, 0x8, 0x204, 0x210, 0x214, 0x238, 1),
1811     OWL_GPIO_PORT(C, 0x0018, 32, 0x0, 0x4, 0x8, 0x204, 0x218, 0x21C, 0x240, 2),
1812     OWL_GPIO_PORT(D, 0x0024, 32, 0x0, 0x4, 0x8, 0x204, 0x220, 0x224, 0x248, 3),
1813     /* 0x24C (INTC_GPIOD_TYPE1) used to tweak the driver to handle generic */
1814     OWL_GPIO_PORT(E, 0x0030, 8, 0x0, 0x4, 0x8, 0x204, 0x228, 0x22C, 0x24C, 4),
1815 };
1816 
1817 enum s700_pinconf_pull {
1818     OWL_PINCONF_PULL_DOWN,
1819     OWL_PINCONF_PULL_UP,
1820 };
1821 
1822 static int s700_pad_pinconf_arg2val(const struct owl_padinfo *info,
1823                 unsigned int param,
1824                 u32 *arg)
1825 {
1826     switch (param) {
1827     case PIN_CONFIG_BIAS_PULL_DOWN:
1828         *arg = OWL_PINCONF_PULL_DOWN;
1829         break;
1830     case PIN_CONFIG_BIAS_PULL_UP:
1831         *arg = OWL_PINCONF_PULL_UP;
1832         break;
1833     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1834         *arg = (*arg >= 1 ? 1 : 0);
1835         break;
1836     default:
1837         return -ENOTSUPP;
1838     }
1839 
1840     return 0;
1841 }
1842 
1843 static int s700_pad_pinconf_val2arg(const struct owl_padinfo *padinfo,
1844                 unsigned int param,
1845                 u32 *arg)
1846 {
1847     switch (param) {
1848     case PIN_CONFIG_BIAS_PULL_DOWN:
1849         *arg = *arg == OWL_PINCONF_PULL_DOWN;
1850         break;
1851     case PIN_CONFIG_BIAS_PULL_UP:
1852         *arg = *arg == OWL_PINCONF_PULL_UP;
1853         break;
1854     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1855         *arg = *arg == 1;
1856         break;
1857     default:
1858         return -ENOTSUPP;
1859     }
1860 
1861     return 0;
1862 }
1863 
1864 static struct owl_pinctrl_soc_data s700_pinctrl_data = {
1865     .padinfo = s700_padinfo,
1866     .pins = (const struct pinctrl_pin_desc *)s700_pads,
1867     .npins = ARRAY_SIZE(s700_pads),
1868     .functions = s700_functions,
1869     .nfunctions = ARRAY_SIZE(s700_functions),
1870     .groups = s700_groups,
1871     .ngroups = ARRAY_SIZE(s700_groups),
1872     .ngpios = NUM_GPIOS,
1873     .ports = s700_gpio_ports,
1874     .nports = ARRAY_SIZE(s700_gpio_ports),
1875     .padctl_arg2val = s700_pad_pinconf_arg2val,
1876     .padctl_val2arg = s700_pad_pinconf_val2arg,
1877 };
1878 
1879 static int s700_pinctrl_probe(struct platform_device *pdev)
1880 {
1881     return owl_pinctrl_probe(pdev, &s700_pinctrl_data);
1882 }
1883 
1884 static const struct of_device_id s700_pinctrl_of_match[] = {
1885     { .compatible = "actions,s700-pinctrl", },
1886     {}
1887 };
1888 
1889 static struct platform_driver s700_pinctrl_driver = {
1890     .probe = s700_pinctrl_probe,
1891     .driver = {
1892         .name = "pinctrl-s700",
1893         .of_match_table = of_match_ptr(s700_pinctrl_of_match),
1894     },
1895 };
1896 
1897 static int __init s700_pinctrl_init(void)
1898 {
1899     return platform_driver_register(&s700_pinctrl_driver);
1900 }
1901 arch_initcall(s700_pinctrl_init);
1902 
1903 static void __exit s700_pinctrl_exit(void)
1904 {
1905     platform_driver_unregister(&s700_pinctrl_driver);
1906 }
1907 module_exit(s700_pinctrl_exit);
1908 
1909 MODULE_AUTHOR("Actions Semi Inc.");
1910 MODULE_DESCRIPTION("Actions Semi S700 Soc Pinctrl Driver");
1911 MODULE_LICENSE("GPL");