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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
0004  *
0005  * Copyright (C) 2004-2007 Texas Instruments
0006  * Copyright (C) 2008 Nokia Corporation
0007  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
0008  *
0009  * Current status:
0010  *  - HS USB ULPI mode works.
0011  *  - 3-pin mode support may be added in future.
0012  */
0013 
0014 #include <linux/module.h>
0015 #include <linux/init.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/platform_device.h>
0018 #include <linux/workqueue.h>
0019 #include <linux/io.h>
0020 #include <linux/delay.h>
0021 #include <linux/usb/otg.h>
0022 #include <linux/phy/phy.h>
0023 #include <linux/pm_runtime.h>
0024 #include <linux/usb/musb.h>
0025 #include <linux/usb/ulpi.h>
0026 #include <linux/mfd/twl.h>
0027 #include <linux/regulator/consumer.h>
0028 #include <linux/err.h>
0029 #include <linux/slab.h>
0030 
0031 /* Register defines */
0032 
0033 #define MCPC_CTRL           0x30
0034 #define MCPC_CTRL_RTSOL         (1 << 7)
0035 #define MCPC_CTRL_EXTSWR        (1 << 6)
0036 #define MCPC_CTRL_EXTSWC        (1 << 5)
0037 #define MCPC_CTRL_VOICESW       (1 << 4)
0038 #define MCPC_CTRL_OUT64K        (1 << 3)
0039 #define MCPC_CTRL_RTSCTSSW      (1 << 2)
0040 #define MCPC_CTRL_HS_UART       (1 << 0)
0041 
0042 #define MCPC_IO_CTRL            0x33
0043 #define MCPC_IO_CTRL_MICBIASEN      (1 << 5)
0044 #define MCPC_IO_CTRL_CTS_NPU        (1 << 4)
0045 #define MCPC_IO_CTRL_RXD_PU     (1 << 3)
0046 #define MCPC_IO_CTRL_TXDTYP     (1 << 2)
0047 #define MCPC_IO_CTRL_CTSTYP     (1 << 1)
0048 #define MCPC_IO_CTRL_RTSTYP     (1 << 0)
0049 
0050 #define MCPC_CTRL2          0x36
0051 #define MCPC_CTRL2_MCPC_CK_EN       (1 << 0)
0052 
0053 #define OTHER_FUNC_CTRL         0x80
0054 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
0055 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
0056 
0057 #define OTHER_IFC_CTRL          0x83
0058 #define OTHER_IFC_CTRL_OE_INT_EN    (1 << 6)
0059 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
0060 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN  (1 << 4)
0061 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT   (1 << 3)
0062 #define OTHER_IFC_CTRL_HIZ_ULPI     (1 << 2)
0063 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
0064 
0065 #define OTHER_INT_EN_RISE       0x86
0066 #define OTHER_INT_EN_FALL       0x89
0067 #define OTHER_INT_STS           0x8C
0068 #define OTHER_INT_LATCH         0x8D
0069 #define OTHER_INT_VB_SESS_VLD       (1 << 7)
0070 #define OTHER_INT_DM_HI         (1 << 6) /* not valid for "latch" reg */
0071 #define OTHER_INT_DP_HI         (1 << 5) /* not valid for "latch" reg */
0072 #define OTHER_INT_BDIS_ACON     (1 << 3) /* not valid for "fall" regs */
0073 #define OTHER_INT_MANU          (1 << 1)
0074 #define OTHER_INT_ABNORMAL_STRESS   (1 << 0)
0075 
0076 #define ID_STATUS           0x96
0077 #define ID_RES_FLOAT            (1 << 4)
0078 #define ID_RES_440K         (1 << 3)
0079 #define ID_RES_200K         (1 << 2)
0080 #define ID_RES_102K         (1 << 1)
0081 #define ID_RES_GND          (1 << 0)
0082 
0083 #define POWER_CTRL          0xAC
0084 #define POWER_CTRL_OTG_ENAB     (1 << 5)
0085 
0086 #define OTHER_IFC_CTRL2         0xAF
0087 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
0088 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
0089 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
0090 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
0091 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
0092 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
0093 
0094 #define REG_CTRL_EN         0xB2
0095 #define REG_CTRL_ERROR          0xB5
0096 #define ULPI_I2C_CONFLICT_INTEN     (1 << 0)
0097 
0098 #define OTHER_FUNC_CTRL2        0xB8
0099 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
0100 
0101 /* following registers do not have separate _clr and _set registers */
0102 #define VBUS_DEBOUNCE           0xC0
0103 #define ID_DEBOUNCE         0xC1
0104 #define VBAT_TIMER          0xD3
0105 #define PHY_PWR_CTRL            0xFD
0106 #define PHY_PWR_PHYPWD          (1 << 0)
0107 #define PHY_CLK_CTRL            0xFE
0108 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
0109 #define PHY_CLK_CTRL_CLK32K_EN      (1 << 1)
0110 #define REQ_PHY_DPLL_CLK        (1 << 0)
0111 #define PHY_CLK_CTRL_STS        0xFF
0112 #define PHY_DPLL_CLK            (1 << 0)
0113 
0114 /* In module TWL_MODULE_PM_MASTER */
0115 #define STS_HW_CONDITIONS       0x0F
0116 
0117 /* In module TWL_MODULE_PM_RECEIVER */
0118 #define VUSB_DEDICATED1         0x7D
0119 #define VUSB_DEDICATED2         0x7E
0120 #define VUSB1V5_DEV_GRP         0x71
0121 #define VUSB1V5_TYPE            0x72
0122 #define VUSB1V5_REMAP           0x73
0123 #define VUSB1V8_DEV_GRP         0x74
0124 #define VUSB1V8_TYPE            0x75
0125 #define VUSB1V8_REMAP           0x76
0126 #define VUSB3V1_DEV_GRP         0x77
0127 #define VUSB3V1_TYPE            0x78
0128 #define VUSB3V1_REMAP           0x79
0129 
0130 /* In module TWL4030_MODULE_INTBR */
0131 #define PMBR1               0x0D
0132 #define GPIO_USB_4PIN_ULPI_2430C    (3 << 0)
0133 
0134 static irqreturn_t twl4030_usb_irq(int irq, void *_twl);
0135 /*
0136  * If VBUS is valid or ID is ground, then we know a
0137  * cable is present and we need to be runtime-enabled
0138  */
0139 static inline bool cable_present(enum musb_vbus_id_status stat)
0140 {
0141     return stat == MUSB_VBUS_VALID ||
0142         stat == MUSB_ID_GROUND;
0143 }
0144 
0145 struct twl4030_usb {
0146     struct usb_phy      phy;
0147     struct device       *dev;
0148 
0149     /* TWL4030 internal USB regulator supplies */
0150     struct regulator    *usb1v5;
0151     struct regulator    *usb1v8;
0152     struct regulator    *usb3v1;
0153 
0154     /* for vbus reporting with irqs disabled */
0155     struct mutex        lock;
0156 
0157     /* pin configuration */
0158     enum twl4030_usb_mode   usb_mode;
0159 
0160     int         irq;
0161     enum musb_vbus_id_status linkstat;
0162     atomic_t        connected;
0163     bool            vbus_supplied;
0164     bool            musb_mailbox_pending;
0165     unsigned long       runtime_suspended:1;
0166     unsigned long       needs_resume:1;
0167 
0168     struct delayed_work id_workaround_work;
0169 };
0170 
0171 /* internal define on top of container_of */
0172 #define phy_to_twl(x)       container_of((x), struct twl4030_usb, phy)
0173 
0174 /*-------------------------------------------------------------------------*/
0175 
0176 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
0177         u8 module, u8 data, u8 address)
0178 {
0179     u8 check = 0xFF;
0180 
0181     if ((twl_i2c_write_u8(module, data, address) >= 0) &&
0182         (twl_i2c_read_u8(module, &check, address) >= 0) &&
0183                         (check == data))
0184         return 0;
0185     dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
0186             1, module, address, check, data);
0187 
0188     /* Failed once: Try again */
0189     if ((twl_i2c_write_u8(module, data, address) >= 0) &&
0190         (twl_i2c_read_u8(module, &check, address) >= 0) &&
0191                         (check == data))
0192         return 0;
0193     dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
0194             2, module, address, check, data);
0195 
0196     /* Failed again: Return error */
0197     return -EBUSY;
0198 }
0199 
0200 #define twl4030_usb_write_verify(twl, address, data)    \
0201     twl4030_i2c_write_u8_verify(twl, TWL_MODULE_USB, (data), (address))
0202 
0203 static inline int twl4030_usb_write(struct twl4030_usb *twl,
0204         u8 address, u8 data)
0205 {
0206     int ret = 0;
0207 
0208     ret = twl_i2c_write_u8(TWL_MODULE_USB, data, address);
0209     if (ret < 0)
0210         dev_dbg(twl->dev,
0211             "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
0212     return ret;
0213 }
0214 
0215 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
0216 {
0217     u8 data;
0218     int ret = 0;
0219 
0220     ret = twl_i2c_read_u8(module, &data, address);
0221     if (ret >= 0)
0222         ret = data;
0223     else
0224         dev_dbg(twl->dev,
0225             "TWL4030:readb[0x%x,0x%x] Error %d\n",
0226                     module, address, ret);
0227 
0228     return ret;
0229 }
0230 
0231 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
0232 {
0233     return twl4030_readb(twl, TWL_MODULE_USB, address);
0234 }
0235 
0236 /*-------------------------------------------------------------------------*/
0237 
0238 static inline int
0239 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
0240 {
0241     return twl4030_usb_write(twl, ULPI_SET(reg), bits);
0242 }
0243 
0244 static inline int
0245 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
0246 {
0247     return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
0248 }
0249 
0250 /*-------------------------------------------------------------------------*/
0251 
0252 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
0253 {
0254     int ret;
0255 
0256     ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
0257     if (ret < 0 || !(ret & PHY_DPLL_CLK))
0258         /*
0259          * if clocks are off, registers are not updated,
0260          * but we can assume we don't drive VBUS in this case
0261          */
0262         return false;
0263 
0264     ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
0265     if (ret < 0)
0266         return false;
0267 
0268     return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
0269 }
0270 
0271 static enum musb_vbus_id_status
0272     twl4030_usb_linkstat(struct twl4030_usb *twl)
0273 {
0274     int status;
0275     enum musb_vbus_id_status linkstat = MUSB_UNKNOWN;
0276 
0277     twl->vbus_supplied = false;
0278 
0279     /*
0280      * For ID/VBUS sensing, see manual section 15.4.8 ...
0281      * except when using only battery backup power, two
0282      * comparators produce VBUS_PRES and ID_PRES signals,
0283      * which don't match docs elsewhere.  But ... BIT(7)
0284      * and BIT(2) of STS_HW_CONDITIONS, respectively, do
0285      * seem to match up.  If either is true the USB_PRES
0286      * signal is active, the OTG module is activated, and
0287      * its interrupt may be raised (may wake the system).
0288      */
0289     status = twl4030_readb(twl, TWL_MODULE_PM_MASTER, STS_HW_CONDITIONS);
0290     if (status < 0)
0291         dev_err(twl->dev, "USB link status err %d\n", status);
0292     else if (status & (BIT(7) | BIT(2))) {
0293         if (status & BIT(7)) {
0294             if (twl4030_is_driving_vbus(twl))
0295                 status &= ~BIT(7);
0296             else
0297                 twl->vbus_supplied = true;
0298         }
0299 
0300         if (status & BIT(2))
0301             linkstat = MUSB_ID_GROUND;
0302         else if (status & BIT(7))
0303             linkstat = MUSB_VBUS_VALID;
0304         else
0305             linkstat = MUSB_VBUS_OFF;
0306     } else {
0307         if (twl->linkstat != MUSB_UNKNOWN)
0308             linkstat = MUSB_VBUS_OFF;
0309     }
0310 
0311     kobject_uevent(&twl->dev->kobj, linkstat == MUSB_VBUS_VALID
0312                     ? KOBJ_ONLINE : KOBJ_OFFLINE);
0313 
0314     dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
0315             status, status, linkstat);
0316 
0317     /* REVISIT this assumes host and peripheral controllers
0318      * are registered, and that both are active...
0319      */
0320 
0321     return linkstat;
0322 }
0323 
0324 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
0325 {
0326     twl->usb_mode = mode;
0327 
0328     switch (mode) {
0329     case T2_USB_MODE_ULPI:
0330         twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
0331                     ULPI_IFC_CTRL_CARKITMODE);
0332         twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
0333         twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
0334                     ULPI_FUNC_CTRL_XCVRSEL_MASK |
0335                     ULPI_FUNC_CTRL_OPMODE_MASK);
0336         break;
0337     case -1:
0338         /* FIXME: power on defaults */
0339         break;
0340     default:
0341         dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
0342                 mode);
0343         break;
0344     }
0345 }
0346 
0347 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
0348 {
0349     unsigned long timeout;
0350     int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
0351 
0352     if (val >= 0) {
0353         if (on) {
0354             /* enable DPLL to access PHY registers over I2C */
0355             val |= REQ_PHY_DPLL_CLK;
0356             WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
0357                         (u8)val) < 0);
0358 
0359             timeout = jiffies + HZ;
0360             while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
0361                             PHY_DPLL_CLK)
0362                 && time_before(jiffies, timeout))
0363                     udelay(10);
0364             if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
0365                             PHY_DPLL_CLK))
0366                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
0367                         "PHY DPLL clock\n");
0368         } else {
0369             /* let ULPI control the DPLL clock */
0370             val &= ~REQ_PHY_DPLL_CLK;
0371             WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
0372                         (u8)val) < 0);
0373         }
0374     }
0375 }
0376 
0377 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
0378 {
0379     u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
0380 
0381     if (on)
0382         pwr &= ~PHY_PWR_PHYPWD;
0383     else
0384         pwr |= PHY_PWR_PHYPWD;
0385 
0386     WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
0387 }
0388 
0389 static int twl4030_usb_runtime_suspend(struct device *dev);
0390 static int twl4030_usb_runtime_resume(struct device *dev);
0391 
0392 static int __maybe_unused twl4030_usb_suspend(struct device *dev)
0393 {
0394     struct twl4030_usb *twl = dev_get_drvdata(dev);
0395 
0396     /*
0397      * we need enabled runtime on resume,
0398      * so turn irq off here, so we do not get it early
0399      * note: wakeup on usb plug works independently of this
0400      */
0401     dev_dbg(twl->dev, "%s\n", __func__);
0402     disable_irq(twl->irq);
0403     if (!twl->runtime_suspended && !atomic_read(&twl->connected)) {
0404         twl4030_usb_runtime_suspend(dev);
0405         twl->needs_resume = 1;
0406     }
0407 
0408     return 0;
0409 }
0410 
0411 static int __maybe_unused twl4030_usb_resume(struct device *dev)
0412 {
0413     struct twl4030_usb *twl = dev_get_drvdata(dev);
0414 
0415     dev_dbg(twl->dev, "%s\n", __func__);
0416     enable_irq(twl->irq);
0417     if (twl->needs_resume)
0418         twl4030_usb_runtime_resume(dev);
0419     /* check whether cable status changed */
0420     twl4030_usb_irq(0, twl);
0421 
0422     twl->runtime_suspended = 0;
0423 
0424     return 0;
0425 }
0426 
0427 static int __maybe_unused twl4030_usb_runtime_suspend(struct device *dev)
0428 {
0429     struct twl4030_usb *twl = dev_get_drvdata(dev);
0430 
0431     dev_dbg(twl->dev, "%s\n", __func__);
0432 
0433     __twl4030_phy_power(twl, 0);
0434     regulator_disable(twl->usb1v5);
0435     regulator_disable(twl->usb1v8);
0436     regulator_disable(twl->usb3v1);
0437 
0438     twl->runtime_suspended = 1;
0439 
0440     return 0;
0441 }
0442 
0443 static int __maybe_unused twl4030_usb_runtime_resume(struct device *dev)
0444 {
0445     struct twl4030_usb *twl = dev_get_drvdata(dev);
0446     int res;
0447 
0448     dev_dbg(twl->dev, "%s\n", __func__);
0449 
0450     res = regulator_enable(twl->usb3v1);
0451     if (res)
0452         dev_err(twl->dev, "Failed to enable usb3v1\n");
0453 
0454     res = regulator_enable(twl->usb1v8);
0455     if (res)
0456         dev_err(twl->dev, "Failed to enable usb1v8\n");
0457 
0458     /*
0459      * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
0460      * in twl4030) resets the VUSB_DEDICATED2 register. This reset
0461      * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
0462      * SLEEP. We work around this by clearing the bit after usv3v1
0463      * is re-activated. This ensures that VUSB3V1 is really active.
0464      */
0465     twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
0466 
0467     res = regulator_enable(twl->usb1v5);
0468     if (res)
0469         dev_err(twl->dev, "Failed to enable usb1v5\n");
0470 
0471     __twl4030_phy_power(twl, 1);
0472     twl4030_usb_write(twl, PHY_CLK_CTRL,
0473               twl4030_usb_read(twl, PHY_CLK_CTRL) |
0474               (PHY_CLK_CTRL_CLOCKGATING_EN |
0475                PHY_CLK_CTRL_CLK32K_EN));
0476 
0477     twl4030_i2c_access(twl, 1);
0478     twl4030_usb_set_mode(twl, twl->usb_mode);
0479     if (twl->usb_mode == T2_USB_MODE_ULPI)
0480         twl4030_i2c_access(twl, 0);
0481     /*
0482      * According to the TPS65950 TRM, there has to be at least 50ms
0483      * delay between setting POWER_CTRL_OTG_ENAB and enabling charging
0484      * so wait here so that a fully enabled phy can be expected after
0485      * resume
0486      */
0487     msleep(50);
0488     return 0;
0489 }
0490 
0491 static int twl4030_phy_power_off(struct phy *phy)
0492 {
0493     struct twl4030_usb *twl = phy_get_drvdata(phy);
0494 
0495     dev_dbg(twl->dev, "%s\n", __func__);
0496 
0497     return 0;
0498 }
0499 
0500 static int twl4030_phy_power_on(struct phy *phy)
0501 {
0502     struct twl4030_usb *twl = phy_get_drvdata(phy);
0503 
0504     dev_dbg(twl->dev, "%s\n", __func__);
0505     pm_runtime_get_sync(twl->dev);
0506     schedule_delayed_work(&twl->id_workaround_work, HZ);
0507     pm_runtime_mark_last_busy(twl->dev);
0508     pm_runtime_put_autosuspend(twl->dev);
0509 
0510     return 0;
0511 }
0512 
0513 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
0514 {
0515     /* Enable writing to power configuration registers */
0516     twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
0517              TWL4030_PM_MASTER_PROTECT_KEY);
0518 
0519     twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
0520              TWL4030_PM_MASTER_PROTECT_KEY);
0521 
0522     /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
0523     /*twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
0524 
0525     /* input to VUSB3V1 LDO is from VBAT, not VBUS */
0526     twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
0527 
0528     /* Initialize 3.1V regulator */
0529     twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
0530 
0531     twl->usb3v1 = devm_regulator_get(twl->dev, "usb3v1");
0532     if (IS_ERR(twl->usb3v1))
0533         return -ENODEV;
0534 
0535     twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
0536 
0537     /* Initialize 1.5V regulator */
0538     twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
0539 
0540     twl->usb1v5 = devm_regulator_get(twl->dev, "usb1v5");
0541     if (IS_ERR(twl->usb1v5))
0542         return -ENODEV;
0543 
0544     twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
0545 
0546     /* Initialize 1.8V regulator */
0547     twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
0548 
0549     twl->usb1v8 = devm_regulator_get(twl->dev, "usb1v8");
0550     if (IS_ERR(twl->usb1v8))
0551         return -ENODEV;
0552 
0553     twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
0554 
0555     /* disable access to power configuration registers */
0556     twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
0557              TWL4030_PM_MASTER_PROTECT_KEY);
0558 
0559     return 0;
0560 }
0561 
0562 static ssize_t vbus_show(struct device *dev,
0563              struct device_attribute *attr, char *buf)
0564 {
0565     struct twl4030_usb *twl = dev_get_drvdata(dev);
0566     int ret = -EINVAL;
0567 
0568     mutex_lock(&twl->lock);
0569     ret = sprintf(buf, "%s\n",
0570             twl->vbus_supplied ? "on" : "off");
0571     mutex_unlock(&twl->lock);
0572 
0573     return ret;
0574 }
0575 static DEVICE_ATTR_RO(vbus);
0576 
0577 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
0578 {
0579     struct twl4030_usb *twl = _twl;
0580     enum musb_vbus_id_status status;
0581     int err;
0582 
0583     status = twl4030_usb_linkstat(twl);
0584 
0585     mutex_lock(&twl->lock);
0586     twl->linkstat = status;
0587     mutex_unlock(&twl->lock);
0588 
0589     if (cable_present(status)) {
0590         if (atomic_add_unless(&twl->connected, 1, 1)) {
0591             dev_dbg(twl->dev, "%s: cable connected %i\n",
0592                 __func__, status);
0593             pm_runtime_get_sync(twl->dev);
0594             twl->musb_mailbox_pending = true;
0595         }
0596     } else {
0597         if (atomic_add_unless(&twl->connected, -1, 0)) {
0598             dev_dbg(twl->dev, "%s: cable disconnected %i\n",
0599                 __func__, status);
0600             pm_runtime_mark_last_busy(twl->dev);
0601             pm_runtime_put_autosuspend(twl->dev);
0602             twl->musb_mailbox_pending = true;
0603         }
0604     }
0605     if (twl->musb_mailbox_pending) {
0606         err = musb_mailbox(status);
0607         if (!err)
0608             twl->musb_mailbox_pending = false;
0609     }
0610 
0611     /* don't schedule during sleep - irq works right then */
0612     if (status == MUSB_ID_GROUND && pm_runtime_active(twl->dev)) {
0613         cancel_delayed_work(&twl->id_workaround_work);
0614         schedule_delayed_work(&twl->id_workaround_work, HZ);
0615     }
0616 
0617     if (irq)
0618         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
0619 
0620     return IRQ_HANDLED;
0621 }
0622 
0623 static void twl4030_id_workaround_work(struct work_struct *work)
0624 {
0625     struct twl4030_usb *twl = container_of(work, struct twl4030_usb,
0626         id_workaround_work.work);
0627 
0628     twl4030_usb_irq(0, twl);
0629 }
0630 
0631 static int twl4030_phy_init(struct phy *phy)
0632 {
0633     struct twl4030_usb *twl = phy_get_drvdata(phy);
0634 
0635     pm_runtime_get_sync(twl->dev);
0636     twl->linkstat = MUSB_UNKNOWN;
0637     schedule_delayed_work(&twl->id_workaround_work, HZ);
0638     pm_runtime_mark_last_busy(twl->dev);
0639     pm_runtime_put_autosuspend(twl->dev);
0640 
0641     return 0;
0642 }
0643 
0644 static int twl4030_set_peripheral(struct usb_otg *otg,
0645                     struct usb_gadget *gadget)
0646 {
0647     if (!otg)
0648         return -ENODEV;
0649 
0650     otg->gadget = gadget;
0651     if (!gadget)
0652         otg->state = OTG_STATE_UNDEFINED;
0653 
0654     return 0;
0655 }
0656 
0657 static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host)
0658 {
0659     if (!otg)
0660         return -ENODEV;
0661 
0662     otg->host = host;
0663     if (!host)
0664         otg->state = OTG_STATE_UNDEFINED;
0665 
0666     return 0;
0667 }
0668 
0669 static const struct phy_ops ops = {
0670     .init       = twl4030_phy_init,
0671     .power_on   = twl4030_phy_power_on,
0672     .power_off  = twl4030_phy_power_off,
0673     .owner      = THIS_MODULE,
0674 };
0675 
0676 static const struct dev_pm_ops twl4030_usb_pm_ops = {
0677     SET_RUNTIME_PM_OPS(twl4030_usb_runtime_suspend,
0678                twl4030_usb_runtime_resume, NULL)
0679     SET_SYSTEM_SLEEP_PM_OPS(twl4030_usb_suspend, twl4030_usb_resume)
0680 };
0681 
0682 static int twl4030_usb_probe(struct platform_device *pdev)
0683 {
0684     struct twl4030_usb_data *pdata = dev_get_platdata(&pdev->dev);
0685     struct twl4030_usb  *twl;
0686     struct phy      *phy;
0687     int         status, err;
0688     struct usb_otg      *otg;
0689     struct device_node  *np = pdev->dev.of_node;
0690     struct phy_provider *phy_provider;
0691 
0692     twl = devm_kzalloc(&pdev->dev, sizeof(*twl), GFP_KERNEL);
0693     if (!twl)
0694         return -ENOMEM;
0695 
0696     if (np)
0697         of_property_read_u32(np, "usb_mode",
0698                 (enum twl4030_usb_mode *)&twl->usb_mode);
0699     else if (pdata) {
0700         twl->usb_mode = pdata->usb_mode;
0701     } else {
0702         dev_err(&pdev->dev, "twl4030 initialized without pdata\n");
0703         return -EINVAL;
0704     }
0705 
0706     otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
0707     if (!otg)
0708         return -ENOMEM;
0709 
0710     twl->dev        = &pdev->dev;
0711     twl->irq        = platform_get_irq(pdev, 0);
0712     twl->vbus_supplied  = false;
0713     twl->linkstat       = MUSB_UNKNOWN;
0714     twl->musb_mailbox_pending = false;
0715 
0716     twl->phy.dev        = twl->dev;
0717     twl->phy.label      = "twl4030";
0718     twl->phy.otg        = otg;
0719     twl->phy.type       = USB_PHY_TYPE_USB2;
0720 
0721     otg->usb_phy        = &twl->phy;
0722     otg->set_host       = twl4030_set_host;
0723     otg->set_peripheral = twl4030_set_peripheral;
0724 
0725     phy = devm_phy_create(twl->dev, NULL, &ops);
0726     if (IS_ERR(phy)) {
0727         dev_dbg(&pdev->dev, "Failed to create PHY\n");
0728         return PTR_ERR(phy);
0729     }
0730 
0731     phy_set_drvdata(phy, twl);
0732 
0733     phy_provider = devm_of_phy_provider_register(twl->dev,
0734         of_phy_simple_xlate);
0735     if (IS_ERR(phy_provider))
0736         return PTR_ERR(phy_provider);
0737 
0738     /* init mutex for workqueue */
0739     mutex_init(&twl->lock);
0740 
0741     INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work);
0742 
0743     err = twl4030_usb_ldo_init(twl);
0744     if (err) {
0745         dev_err(&pdev->dev, "ldo init failed\n");
0746         return err;
0747     }
0748     usb_add_phy_dev(&twl->phy);
0749 
0750     platform_set_drvdata(pdev, twl);
0751     if (device_create_file(&pdev->dev, &dev_attr_vbus))
0752         dev_warn(&pdev->dev, "could not create sysfs file\n");
0753 
0754     ATOMIC_INIT_NOTIFIER_HEAD(&twl->phy.notifier);
0755 
0756     pm_runtime_use_autosuspend(&pdev->dev);
0757     pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
0758     pm_runtime_enable(&pdev->dev);
0759     pm_runtime_get_sync(&pdev->dev);
0760 
0761     /* Our job is to use irqs and status from the power module
0762      * to keep the transceiver disabled when nothing's connected.
0763      *
0764      * FIXME we actually shouldn't start enabling it until the
0765      * USB controller drivers have said they're ready, by calling
0766      * set_host() and/or set_peripheral() ... OTG_capable boards
0767      * need both handles, otherwise just one suffices.
0768      */
0769     status = devm_request_threaded_irq(twl->dev, twl->irq, NULL,
0770             twl4030_usb_irq, IRQF_TRIGGER_FALLING |
0771             IRQF_TRIGGER_RISING | IRQF_ONESHOT, "twl4030_usb", twl);
0772     if (status < 0) {
0773         dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
0774             twl->irq, status);
0775         return status;
0776     }
0777 
0778     if (pdata)
0779         err = phy_create_lookup(phy, "usb", "musb-hdrc.0");
0780     if (err)
0781         return err;
0782 
0783     pm_runtime_mark_last_busy(&pdev->dev);
0784     pm_runtime_put_autosuspend(twl->dev);
0785 
0786     dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
0787     return 0;
0788 }
0789 
0790 static int twl4030_usb_remove(struct platform_device *pdev)
0791 {
0792     struct twl4030_usb *twl = platform_get_drvdata(pdev);
0793     int val;
0794 
0795     usb_remove_phy(&twl->phy);
0796     pm_runtime_get_sync(twl->dev);
0797     cancel_delayed_work_sync(&twl->id_workaround_work);
0798     device_remove_file(twl->dev, &dev_attr_vbus);
0799 
0800     /* set transceiver mode to power on defaults */
0801     twl4030_usb_set_mode(twl, -1);
0802 
0803     /* idle ulpi before powering off */
0804     if (cable_present(twl->linkstat))
0805         pm_runtime_put_noidle(twl->dev);
0806     pm_runtime_mark_last_busy(twl->dev);
0807     pm_runtime_dont_use_autosuspend(&pdev->dev);
0808     pm_runtime_put_sync(twl->dev);
0809     pm_runtime_disable(twl->dev);
0810 
0811     /* autogate 60MHz ULPI clock,
0812      * clear dpll clock request for i2c access,
0813      * disable 32KHz
0814      */
0815     val = twl4030_usb_read(twl, PHY_CLK_CTRL);
0816     if (val >= 0) {
0817         val |= PHY_CLK_CTRL_CLOCKGATING_EN;
0818         val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
0819         twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
0820     }
0821 
0822     /* disable complete OTG block */
0823     twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
0824 
0825     return 0;
0826 }
0827 
0828 #ifdef CONFIG_OF
0829 static const struct of_device_id twl4030_usb_id_table[] = {
0830     { .compatible = "ti,twl4030-usb" },
0831     {}
0832 };
0833 MODULE_DEVICE_TABLE(of, twl4030_usb_id_table);
0834 #endif
0835 
0836 static struct platform_driver twl4030_usb_driver = {
0837     .probe      = twl4030_usb_probe,
0838     .remove     = twl4030_usb_remove,
0839     .driver     = {
0840         .name   = "twl4030_usb",
0841         .pm = &twl4030_usb_pm_ops,
0842         .of_match_table = of_match_ptr(twl4030_usb_id_table),
0843     },
0844 };
0845 
0846 static int __init twl4030_usb_init(void)
0847 {
0848     return platform_driver_register(&twl4030_usb_driver);
0849 }
0850 subsys_initcall(twl4030_usb_init);
0851 
0852 static void __exit twl4030_usb_exit(void)
0853 {
0854     platform_driver_unregister(&twl4030_usb_driver);
0855 }
0856 module_exit(twl4030_usb_exit);
0857 
0858 MODULE_ALIAS("platform:twl4030_usb");
0859 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
0860 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
0861 MODULE_LICENSE("GPL");
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