phy/renesas/phy-rcar-gen3-usb2.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Renesas R-Car Gen3 for USB2.0 PHY driver
0004  *
0005  * Copyright (C) 2015-2017 Renesas Electronics Corporation
0006  *
0007  * This is based on the phy-rcar-gen2 driver:
0008  * Copyright (C) 2014 Renesas Solutions Corp.
0009  * Copyright (C) 2014 Cogent Embedded, Inc.
0010  */
0011
0012 #include <linux/extcon-provider.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/io.h>
0015 #include <linux/module.h>
0016 #include <linux/mutex.h>
0017 #include <linux/of.h>
0018 #include <linux/of_address.h>
0019 #include <linux/of_device.h>
0020 #include <linux/phy/phy.h>
0021 #include <linux/platform_device.h>
0022 #include <linux/pm_runtime.h>
0023 #include <linux/regulator/consumer.h>
0024 #include <linux/string.h>
0025 #include <linux/usb/of.h>
0026 #include <linux/workqueue.h>
0027
0028 /******* USB2.0 Host registers (original offset is +0x200) *******/
0029 #define USB2_INT_ENABLE     0x000
0030 #define USB2_USBCTR     0x00c
0031 #define USB2_SPD_RSM_TIMSET 0x10c
0032 #define USB2_OC_TIMSET      0x110
0033 #define USB2_COMMCTRL       0x600
0034 #define USB2_OBINTSTA       0x604
0035 #define USB2_OBINTEN        0x608
0036 #define USB2_VBCTRL     0x60c
0037 #define USB2_LINECTRL1      0x610
0038 #define USB2_ADPCTRL        0x630
0039
0040 /* INT_ENABLE */
0041 #define USB2_INT_ENABLE_UCOM_INTEN  BIT(3)
0042 #define USB2_INT_ENABLE_USBH_INTB_EN    BIT(2)  /* For EHCI */
0043 #define USB2_INT_ENABLE_USBH_INTA_EN    BIT(1)  /* For OHCI */
0044
0045 /* USBCTR */
0046 #define USB2_USBCTR_DIRPD   BIT(2)
0047 #define USB2_USBCTR_PLL_RST BIT(1)
0048
0049 /* SPD_RSM_TIMSET */
0050 #define USB2_SPD_RSM_TIMSET_INIT    0x014e029b
0051
0052 /* OC_TIMSET */
0053 #define USB2_OC_TIMSET_INIT     0x000209ab
0054
0055 /* COMMCTRL */
0056 #define USB2_COMMCTRL_OTG_PERI      BIT(31) /* 1 = Peripheral mode */
0057
0058 /* OBINTSTA and OBINTEN */
0059 #define USB2_OBINT_SESSVLDCHG       BIT(12)
0060 #define USB2_OBINT_IDDIGCHG     BIT(11)
0061 #define USB2_OBINT_BITS         (USB2_OBINT_SESSVLDCHG | \
0062                      USB2_OBINT_IDDIGCHG)
0063
0064 /* VBCTRL */
0065 #define USB2_VBCTRL_OCCLREN     BIT(16)
0066 #define USB2_VBCTRL_DRVVBUSSEL      BIT(8)
0067 #define USB2_VBCTRL_VBOUT       BIT(0)
0068
0069 /* LINECTRL1 */
0070 #define USB2_LINECTRL1_DPRPD_EN     BIT(19)
0071 #define USB2_LINECTRL1_DP_RPD       BIT(18)
0072 #define USB2_LINECTRL1_DMRPD_EN     BIT(17)
0073 #define USB2_LINECTRL1_DM_RPD       BIT(16)
0074 #define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
0075
0076 /* ADPCTRL */
0077 #define USB2_ADPCTRL_OTGSESSVLD     BIT(20)
0078 #define USB2_ADPCTRL_IDDIG      BIT(19)
0079 #define USB2_ADPCTRL_IDPULLUP       BIT(5)  /* 1 = ID sampling is enabled */
0080 #define USB2_ADPCTRL_DRVVBUS        BIT(4)
0081
0082 /*  RZ/G2L specific */
0083 #define USB2_OBINT_IDCHG_EN     BIT(0)
0084 #define USB2_LINECTRL1_USB2_IDMON   BIT(0)
0085
0086 #define NUM_OF_PHYS         4
0087 enum rcar_gen3_phy_index {
0088     PHY_INDEX_BOTH_HC,
0089     PHY_INDEX_OHCI,
0090     PHY_INDEX_EHCI,
0091     PHY_INDEX_HSUSB
0092 };
0093
0094 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
0095     USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
0096     USB2_INT_ENABLE_USBH_INTA_EN,
0097     USB2_INT_ENABLE_USBH_INTB_EN,
0098     0
0099 };
0100
0101 struct rcar_gen3_phy {
0102     struct phy *phy;
0103     struct rcar_gen3_chan *ch;
0104     u32 int_enable_bits;
0105     bool initialized;
0106     bool otg_initialized;
0107     bool powered;
0108 };
0109
0110 struct rcar_gen3_chan {
0111     void __iomem *base;
0112     struct device *dev; /* platform_device's device */
0113     struct extcon_dev *extcon;
0114     struct rcar_gen3_phy rphys[NUM_OF_PHYS];
0115     struct regulator *vbus;
0116     struct work_struct work;
0117     struct mutex lock;  /* protects rphys[...].powered */
0118     enum usb_dr_mode dr_mode;
0119     int irq;
0120     u32 obint_enable_bits;
0121     bool extcon_host;
0122     bool is_otg_channel;
0123     bool uses_otg_pins;
0124     bool soc_no_adp_ctrl;
0125 };
0126
0127 struct rcar_gen3_phy_drv_data {
0128     const struct phy_ops *phy_usb2_ops;
0129     bool no_adp_ctrl;
0130 };
0131
0132 /*
0133  * Combination about is_otg_channel and uses_otg_pins:
0134  *
0135  * Parameters               || Behaviors
0136  * is_otg_channel   | uses_otg_pins || irqs     | role sysfs
0137  * ---------------------+---------------++--------------+------------
0138  * true         | true      || enabled  | enabled
0139  * true                 | false     || disabled | enabled
0140  * false                | any       || disabled | disabled
0141  */
0142
0143 static void rcar_gen3_phy_usb2_work(struct work_struct *work)
0144 {
0145     struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
0146                          work);
0147
0148     if (ch->extcon_host) {
0149         extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
0150         extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
0151     } else {
0152         extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
0153         extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
0154     }
0155 }
0156
0157 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
0158 {
0159     void __iomem *usb2_base = ch->base;
0160     u32 val = readl(usb2_base + USB2_COMMCTRL);
0161
0162     dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
0163     if (host)
0164         val &= ~USB2_COMMCTRL_OTG_PERI;
0165     else
0166         val |= USB2_COMMCTRL_OTG_PERI;
0167     writel(val, usb2_base + USB2_COMMCTRL);
0168 }
0169
0170 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
0171 {
0172     void __iomem *usb2_base = ch->base;
0173     u32 val = readl(usb2_base + USB2_LINECTRL1);
0174
0175     dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
0176     val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
0177     if (dp)
0178         val |= USB2_LINECTRL1_DP_RPD;
0179     if (dm)
0180         val |= USB2_LINECTRL1_DM_RPD;
0181     writel(val, usb2_base + USB2_LINECTRL1);
0182 }
0183
0184 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
0185 {
0186     void __iomem *usb2_base = ch->base;
0187     u32 vbus_ctrl_reg = USB2_ADPCTRL;
0188     u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS;
0189     u32 val;
0190
0191     dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
0192     if (ch->soc_no_adp_ctrl) {
0193         vbus_ctrl_reg = USB2_VBCTRL;
0194         vbus_ctrl_val = USB2_VBCTRL_VBOUT;
0195     }
0196
0197     val = readl(usb2_base + vbus_ctrl_reg);
0198     if (vbus)
0199         val |= vbus_ctrl_val;
0200     else
0201         val &= ~vbus_ctrl_val;
0202     writel(val, usb2_base + vbus_ctrl_reg);
0203 }
0204
0205 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
0206 {
0207     void __iomem *usb2_base = ch->base;
0208     u32 val = readl(usb2_base + USB2_OBINTEN);
0209
0210     if (ch->uses_otg_pins && enable)
0211         val |= ch->obint_enable_bits;
0212     else
0213         val &= ~ch->obint_enable_bits;
0214     writel(val, usb2_base + USB2_OBINTEN);
0215 }
0216
0217 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
0218 {
0219     rcar_gen3_set_linectrl(ch, 1, 1);
0220     rcar_gen3_set_host_mode(ch, 1);
0221     rcar_gen3_enable_vbus_ctrl(ch, 1);
0222
0223     ch->extcon_host = true;
0224     schedule_work(&ch->work);
0225 }
0226
0227 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
0228 {
0229     rcar_gen3_set_linectrl(ch, 0, 1);
0230     rcar_gen3_set_host_mode(ch, 0);
0231     rcar_gen3_enable_vbus_ctrl(ch, 0);
0232
0233     ch->extcon_host = false;
0234     schedule_work(&ch->work);
0235 }
0236
0237 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
0238 {
0239     void __iomem *usb2_base = ch->base;
0240     u32 val;
0241
0242     val = readl(usb2_base + USB2_LINECTRL1);
0243     writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
0244
0245     rcar_gen3_set_linectrl(ch, 1, 1);
0246     rcar_gen3_set_host_mode(ch, 1);
0247     rcar_gen3_enable_vbus_ctrl(ch, 0);
0248
0249     val = readl(usb2_base + USB2_LINECTRL1);
0250     writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
0251 }
0252
0253 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
0254 {
0255     rcar_gen3_set_linectrl(ch, 0, 1);
0256     rcar_gen3_set_host_mode(ch, 0);
0257     rcar_gen3_enable_vbus_ctrl(ch, 1);
0258 }
0259
0260 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
0261 {
0262     rcar_gen3_control_otg_irq(ch, 0);
0263
0264     rcar_gen3_enable_vbus_ctrl(ch, 1);
0265     rcar_gen3_init_for_host(ch);
0266
0267     rcar_gen3_control_otg_irq(ch, 1);
0268 }
0269
0270 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
0271 {
0272     if (!ch->uses_otg_pins)
0273         return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
0274
0275     if (ch->soc_no_adp_ctrl)
0276         return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
0277
0278     return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
0279 }
0280
0281 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
0282 {
0283     if (!rcar_gen3_check_id(ch))
0284         rcar_gen3_init_for_host(ch);
0285     else
0286         rcar_gen3_init_for_peri(ch);
0287 }
0288
0289 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
0290 {
0291     return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
0292 }
0293
0294 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
0295 {
0296     if (rcar_gen3_is_host(ch))
0297         return PHY_MODE_USB_HOST;
0298
0299     return PHY_MODE_USB_DEVICE;
0300 }
0301
0302 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
0303 {
0304     int i;
0305
0306     for (i = 0; i < NUM_OF_PHYS; i++) {
0307         if (ch->rphys[i].initialized)
0308             return true;
0309     }
0310
0311     return false;
0312 }
0313
0314 static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch)
0315 {
0316     int i;
0317
0318     for (i = 0; i < NUM_OF_PHYS; i++) {
0319         if (ch->rphys[i].otg_initialized)
0320             return false;
0321     }
0322
0323     return true;
0324 }
0325
0326 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
0327 {
0328     int i;
0329
0330     for (i = 0; i < NUM_OF_PHYS; i++) {
0331         if (ch->rphys[i].powered)
0332             return false;
0333     }
0334
0335     return true;
0336 }
0337
0338 static ssize_t role_store(struct device *dev, struct device_attribute *attr,
0339               const char *buf, size_t count)
0340 {
0341     struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
0342     bool is_b_device;
0343     enum phy_mode cur_mode, new_mode;
0344
0345     if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
0346         return -EIO;
0347
0348     if (sysfs_streq(buf, "host"))
0349         new_mode = PHY_MODE_USB_HOST;
0350     else if (sysfs_streq(buf, "peripheral"))
0351         new_mode = PHY_MODE_USB_DEVICE;
0352     else
0353         return -EINVAL;
0354
0355     /* is_b_device: true is B-Device. false is A-Device. */
0356     is_b_device = rcar_gen3_check_id(ch);
0357     cur_mode = rcar_gen3_get_phy_mode(ch);
0358
0359     /* If current and new mode is the same, this returns the error */
0360     if (cur_mode == new_mode)
0361         return -EINVAL;
0362
0363     if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
0364         if (!is_b_device)   /* A-Peripheral */
0365             rcar_gen3_init_from_a_peri_to_a_host(ch);
0366         else            /* B-Peripheral */
0367             rcar_gen3_init_for_b_host(ch);
0368     } else {            /* And is_host must be true */
0369         if (!is_b_device)   /* A-Host */
0370             rcar_gen3_init_for_a_peri(ch);
0371         else            /* B-Host */
0372             rcar_gen3_init_for_peri(ch);
0373     }
0374
0375     return count;
0376 }
0377
0378 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
0379              char *buf)
0380 {
0381     struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
0382
0383     if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
0384         return -EIO;
0385
0386     return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
0387                                 "peripheral");
0388 }
0389 static DEVICE_ATTR_RW(role);
0390
0391 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
0392 {
0393     void __iomem *usb2_base = ch->base;
0394     u32 val;
0395
0396     /* Should not use functions of read-modify-write a register */
0397     val = readl(usb2_base + USB2_LINECTRL1);
0398     val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
0399           USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
0400     writel(val, usb2_base + USB2_LINECTRL1);
0401
0402     if (!ch->soc_no_adp_ctrl) {
0403         val = readl(usb2_base + USB2_VBCTRL);
0404         val &= ~USB2_VBCTRL_OCCLREN;
0405         writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
0406         val = readl(usb2_base + USB2_ADPCTRL);
0407         writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
0408     }
0409     msleep(20);
0410
0411     writel(0xffffffff, usb2_base + USB2_OBINTSTA);
0412     writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN);
0413
0414     rcar_gen3_device_recognition(ch);
0415 }
0416
0417 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
0418 {
0419     struct rcar_gen3_chan *ch = _ch;
0420     void __iomem *usb2_base = ch->base;
0421     u32 status = readl(usb2_base + USB2_OBINTSTA);
0422     irqreturn_t ret = IRQ_NONE;
0423
0424     if (status & ch->obint_enable_bits) {
0425         dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
0426         writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA);
0427         rcar_gen3_device_recognition(ch);
0428         ret = IRQ_HANDLED;
0429     }
0430
0431     return ret;
0432 }
0433
0434 static int rcar_gen3_phy_usb2_init(struct phy *p)
0435 {
0436     struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
0437     struct rcar_gen3_chan *channel = rphy->ch;
0438     void __iomem *usb2_base = channel->base;
0439     u32 val;
0440     int ret;
0441
0442     if (!rcar_gen3_is_any_rphy_initialized(channel) && channel->irq >= 0) {
0443         INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
0444         ret = request_irq(channel->irq, rcar_gen3_phy_usb2_irq,
0445                   IRQF_SHARED, dev_name(channel->dev), channel);
0446         if (ret < 0) {
0447             dev_err(channel->dev, "No irq handler (%d)\n", channel->irq);
0448             return ret;
0449         }
0450     }
0451
0452     /* Initialize USB2 part */
0453     val = readl(usb2_base + USB2_INT_ENABLE);
0454     val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
0455     writel(val, usb2_base + USB2_INT_ENABLE);
0456     writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
0457     writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
0458
0459     /* Initialize otg part */
0460     if (channel->is_otg_channel) {
0461         if (rcar_gen3_needs_init_otg(channel))
0462             rcar_gen3_init_otg(channel);
0463         rphy->otg_initialized = true;
0464     }
0465
0466     rphy->initialized = true;
0467
0468     return 0;
0469 }
0470
0471 static int rcar_gen3_phy_usb2_exit(struct phy *p)
0472 {
0473     struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
0474     struct rcar_gen3_chan *channel = rphy->ch;
0475     void __iomem *usb2_base = channel->base;
0476     u32 val;
0477
0478     rphy->initialized = false;
0479
0480     if (channel->is_otg_channel)
0481         rphy->otg_initialized = false;
0482
0483     val = readl(usb2_base + USB2_INT_ENABLE);
0484     val &= ~rphy->int_enable_bits;
0485     if (!rcar_gen3_is_any_rphy_initialized(channel))
0486         val &= ~USB2_INT_ENABLE_UCOM_INTEN;
0487     writel(val, usb2_base + USB2_INT_ENABLE);
0488
0489     if (channel->irq >= 0 && !rcar_gen3_is_any_rphy_initialized(channel))
0490         free_irq(channel->irq, channel);
0491
0492     return 0;
0493 }
0494
0495 static int rcar_gen3_phy_usb2_power_on(struct phy *p)
0496 {
0497     struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
0498     struct rcar_gen3_chan *channel = rphy->ch;
0499     void __iomem *usb2_base = channel->base;
0500     u32 val;
0501     int ret = 0;
0502
0503     mutex_lock(&channel->lock);
0504     if (!rcar_gen3_are_all_rphys_power_off(channel))
0505         goto out;
0506
0507     if (channel->vbus) {
0508         ret = regulator_enable(channel->vbus);
0509         if (ret)
0510             goto out;
0511     }
0512
0513     val = readl(usb2_base + USB2_USBCTR);
0514     val |= USB2_USBCTR_PLL_RST;
0515     writel(val, usb2_base + USB2_USBCTR);
0516     val &= ~USB2_USBCTR_PLL_RST;
0517     writel(val, usb2_base + USB2_USBCTR);
0518
0519 out:
0520     /* The powered flag should be set for any other phys anyway */
0521     rphy->powered = true;
0522     mutex_unlock(&channel->lock);
0523
0524     return 0;
0525 }
0526
0527 static int rcar_gen3_phy_usb2_power_off(struct phy *p)
0528 {
0529     struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
0530     struct rcar_gen3_chan *channel = rphy->ch;
0531     int ret = 0;
0532
0533     mutex_lock(&channel->lock);
0534     rphy->powered = false;
0535
0536     if (!rcar_gen3_are_all_rphys_power_off(channel))
0537         goto out;
0538
0539     if (channel->vbus)
0540         ret = regulator_disable(channel->vbus);
0541
0542 out:
0543     mutex_unlock(&channel->lock);
0544
0545     return ret;
0546 }
0547
0548 static const struct phy_ops rcar_gen3_phy_usb2_ops = {
0549     .init       = rcar_gen3_phy_usb2_init,
0550     .exit       = rcar_gen3_phy_usb2_exit,
0551     .power_on   = rcar_gen3_phy_usb2_power_on,
0552     .power_off  = rcar_gen3_phy_usb2_power_off,
0553     .owner      = THIS_MODULE,
0554 };
0555
0556 static const struct phy_ops rz_g1c_phy_usb2_ops = {
0557     .init       = rcar_gen3_phy_usb2_init,
0558     .exit       = rcar_gen3_phy_usb2_exit,
0559     .owner      = THIS_MODULE,
0560 };
0561
0562 static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = {
0563     .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
0564     .no_adp_ctrl = false,
0565 };
0566
0567 static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = {
0568     .phy_usb2_ops = &rz_g1c_phy_usb2_ops,
0569     .no_adp_ctrl = false,
0570 };
0571
0572 static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = {
0573     .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
0574     .no_adp_ctrl = true,
0575 };
0576
0577 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
0578     {
0579         .compatible = "renesas,usb2-phy-r8a77470",
0580         .data = &rz_g1c_phy_usb2_data,
0581     },
0582     {
0583         .compatible = "renesas,usb2-phy-r8a7795",
0584         .data = &rcar_gen3_phy_usb2_data,
0585     },
0586     {
0587         .compatible = "renesas,usb2-phy-r8a7796",
0588         .data = &rcar_gen3_phy_usb2_data,
0589     },
0590     {
0591         .compatible = "renesas,usb2-phy-r8a77965",
0592         .data = &rcar_gen3_phy_usb2_data,
0593     },
0594     {
0595         .compatible = "renesas,rzg2l-usb2-phy",
0596         .data = &rz_g2l_phy_usb2_data,
0597     },
0598     {
0599         .compatible = "renesas,rcar-gen3-usb2-phy",
0600         .data = &rcar_gen3_phy_usb2_data,
0601     },
0602     { /* sentinel */ },
0603 };
0604 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
0605
0606 static const unsigned int rcar_gen3_phy_cable[] = {
0607     EXTCON_USB,
0608     EXTCON_USB_HOST,
0609     EXTCON_NONE,
0610 };
0611
0612 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
0613                         struct of_phandle_args *args)
0614 {
0615     struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
0616
0617     if (args->args_count == 0)  /* For old version dts */
0618         return ch->rphys[PHY_INDEX_BOTH_HC].phy;
0619     else if (args->args_count > 1)  /* Prevent invalid args count */
0620         return ERR_PTR(-ENODEV);
0621
0622     if (args->args[0] >= NUM_OF_PHYS)
0623         return ERR_PTR(-ENODEV);
0624
0625     return ch->rphys[args->args[0]].phy;
0626 }
0627
0628 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
0629 {
0630     enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
0631     int i;
0632
0633     /*
0634      * If one of device nodes has other dr_mode except UNKNOWN,
0635      * this function returns UNKNOWN. To achieve backward compatibility,
0636      * this loop starts the index as 0.
0637      */
0638     for (i = 0; i < NUM_OF_PHYS; i++) {
0639         enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
0640
0641         if (mode != USB_DR_MODE_UNKNOWN) {
0642             if (candidate == USB_DR_MODE_UNKNOWN)
0643                 candidate = mode;
0644             else if (candidate != mode)
0645                 return USB_DR_MODE_UNKNOWN;
0646         }
0647     }
0648
0649     return candidate;
0650 }
0651
0652 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
0653 {
0654     const struct rcar_gen3_phy_drv_data *phy_data;
0655     struct device *dev = &pdev->dev;
0656     struct rcar_gen3_chan *channel;
0657     struct phy_provider *provider;
0658     int ret = 0, i;
0659
0660     if (!dev->of_node) {
0661         dev_err(dev, "This driver needs device tree\n");
0662         return -EINVAL;
0663     }
0664
0665     channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
0666     if (!channel)
0667         return -ENOMEM;
0668
0669     channel->base = devm_platform_ioremap_resource(pdev, 0);
0670     if (IS_ERR(channel->base))
0671         return PTR_ERR(channel->base);
0672
0673     channel->obint_enable_bits = USB2_OBINT_BITS;
0674     /* get irq number here and request_irq for OTG in phy_init */
0675     channel->irq = platform_get_irq_optional(pdev, 0);
0676     channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
0677     if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
0678         int ret;
0679
0680         channel->is_otg_channel = true;
0681         channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
0682                             "renesas,no-otg-pins");
0683         channel->extcon = devm_extcon_dev_allocate(dev,
0684                             rcar_gen3_phy_cable);
0685         if (IS_ERR(channel->extcon))
0686             return PTR_ERR(channel->extcon);
0687
0688         ret = devm_extcon_dev_register(dev, channel->extcon);
0689         if (ret < 0) {
0690             dev_err(dev, "Failed to register extcon\n");
0691             return ret;
0692         }
0693     }
0694
0695     /*
0696      * devm_phy_create() will call pm_runtime_enable(&phy->dev);
0697      * And then, phy-core will manage runtime pm for this device.
0698      */
0699     pm_runtime_enable(dev);
0700
0701     phy_data = of_device_get_match_data(dev);
0702     if (!phy_data) {
0703         ret = -EINVAL;
0704         goto error;
0705     }
0706
0707     channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl;
0708     if (phy_data->no_adp_ctrl)
0709         channel->obint_enable_bits = USB2_OBINT_IDCHG_EN;
0710
0711     mutex_init(&channel->lock);
0712     for (i = 0; i < NUM_OF_PHYS; i++) {
0713         channel->rphys[i].phy = devm_phy_create(dev, NULL,
0714                             phy_data->phy_usb2_ops);
0715         if (IS_ERR(channel->rphys[i].phy)) {
0716             dev_err(dev, "Failed to create USB2 PHY\n");
0717             ret = PTR_ERR(channel->rphys[i].phy);
0718             goto error;
0719         }
0720         channel->rphys[i].ch = channel;
0721         channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
0722         phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
0723     }
0724
0725     channel->vbus = devm_regulator_get_optional(dev, "vbus");
0726     if (IS_ERR(channel->vbus)) {
0727         if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
0728             ret = PTR_ERR(channel->vbus);
0729             goto error;
0730         }
0731         channel->vbus = NULL;
0732     }
0733
0734     platform_set_drvdata(pdev, channel);
0735     channel->dev = dev;
0736
0737     provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
0738     if (IS_ERR(provider)) {
0739         dev_err(dev, "Failed to register PHY provider\n");
0740         ret = PTR_ERR(provider);
0741         goto error;
0742     } else if (channel->is_otg_channel) {
0743         int ret;
0744
0745         ret = device_create_file(dev, &dev_attr_role);
0746         if (ret < 0)
0747             goto error;
0748     }
0749
0750     return 0;
0751
0752 error:
0753     pm_runtime_disable(dev);
0754
0755     return ret;
0756 }
0757
0758 static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
0759 {
0760     struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
0761
0762     if (channel->is_otg_channel)
0763         device_remove_file(&pdev->dev, &dev_attr_role);
0764
0765     pm_runtime_disable(&pdev->dev);
0766
0767     return 0;
0768 };
0769
0770 static struct platform_driver rcar_gen3_phy_usb2_driver = {
0771     .driver = {
0772         .name       = "phy_rcar_gen3_usb2",
0773         .of_match_table = rcar_gen3_phy_usb2_match_table,
0774     },
0775     .probe  = rcar_gen3_phy_usb2_probe,
0776     .remove = rcar_gen3_phy_usb2_remove,
0777 };
0778 module_platform_driver(rcar_gen3_phy_usb2_driver);
0779
0780 MODULE_LICENSE("GPL v2");
0781 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
0782 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");