phy/qualcomm/phy-qcom-qmp-qserdes-com-v3.h

0001
0002 /* SPDX-License-Identifier: GPL-2.0 */
0003 /*
0004  * Copyright (c) 2017, The Linux Foundation. All rights reserved.
0005  */
0006
0007 #ifndef QCOM_PHY_QMP_QSERDES_COM_V3_H_
0008 #define QCOM_PHY_QMP_QSERDES_COM_V3_H_
0009
0010 /* Only for QMP V3 PHY - QSERDES COM registers */
0011 #define QSERDES_V3_COM_ATB_SEL1             0x000
0012 #define QSERDES_V3_COM_ATB_SEL2             0x004
0013 #define QSERDES_V3_COM_FREQ_UPDATE          0x008
0014 #define QSERDES_V3_COM_BG_TIMER             0x00c
0015 #define QSERDES_V3_COM_SSC_EN_CENTER            0x010
0016 #define QSERDES_V3_COM_SSC_ADJ_PER1         0x014
0017 #define QSERDES_V3_COM_SSC_ADJ_PER2         0x018
0018 #define QSERDES_V3_COM_SSC_PER1             0x01c
0019 #define QSERDES_V3_COM_SSC_PER2             0x020
0020 #define QSERDES_V3_COM_SSC_STEP_SIZE1           0x024
0021 #define QSERDES_V3_COM_SSC_STEP_SIZE2           0x028
0022 #define QSERDES_V3_COM_POST_DIV             0x02c
0023 #define QSERDES_V3_COM_POST_DIV_MUX         0x030
0024 #define QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN      0x034
0025 #define QSERDES_V3_COM_CLK_ENABLE1          0x038
0026 #define QSERDES_V3_COM_SYS_CLK_CTRL         0x03c
0027 #define QSERDES_V3_COM_SYSCLK_BUF_ENABLE        0x040
0028 #define QSERDES_V3_COM_PLL_EN               0x044
0029 #define QSERDES_V3_COM_PLL_IVCO             0x048
0030 #define QSERDES_V3_COM_CMN_IETRIM           0x04c
0031 #define QSERDES_V3_COM_CMN_IPTRIM           0x050
0032 #define QSERDES_V3_COM_EP_CLOCK_DETECT_CTR      0x054
0033 #define QSERDES_V3_COM_SYSCLK_DET_COMP_STATUS       0x058
0034 #define QSERDES_V3_COM_CLK_EP_DIV           0x05c
0035 #define QSERDES_V3_COM_CP_CTRL_MODE0            0x060
0036 #define QSERDES_V3_COM_CP_CTRL_MODE1            0x064
0037 #define QSERDES_V3_COM_PLL_RCTRL_MODE0          0x068
0038 #define QSERDES_V3_COM_PLL_RCTRL_MODE1          0x06c
0039 #define QSERDES_V3_COM_PLL_CCTRL_MODE0          0x070
0040 #define QSERDES_V3_COM_PLL_CCTRL_MODE1          0x074
0041 #define QSERDES_V3_COM_PLL_CNTRL            0x078
0042 #define QSERDES_V3_COM_BIAS_EN_CTRL_BY_PSM      0x07c
0043 #define QSERDES_V3_COM_SYSCLK_EN_SEL            0x080
0044 #define QSERDES_V3_COM_CML_SYSCLK_SEL           0x084
0045 #define QSERDES_V3_COM_RESETSM_CNTRL            0x088
0046 #define QSERDES_V3_COM_RESETSM_CNTRL2           0x08c
0047 #define QSERDES_V3_COM_LOCK_CMP_EN          0x090
0048 #define QSERDES_V3_COM_LOCK_CMP_CFG         0x094
0049 #define QSERDES_V3_COM_LOCK_CMP1_MODE0          0x098
0050 #define QSERDES_V3_COM_LOCK_CMP2_MODE0          0x09c
0051 #define QSERDES_V3_COM_LOCK_CMP3_MODE0          0x0a0
0052 #define QSERDES_V3_COM_LOCK_CMP1_MODE1          0x0a4
0053 #define QSERDES_V3_COM_LOCK_CMP2_MODE1          0x0a8
0054 #define QSERDES_V3_COM_LOCK_CMP3_MODE1          0x0ac
0055 #define QSERDES_V3_COM_DEC_START_MODE0          0x0b0
0056 #define QSERDES_V3_COM_DEC_START_MODE1          0x0b4
0057 #define QSERDES_V3_COM_DIV_FRAC_START1_MODE0        0x0b8
0058 #define QSERDES_V3_COM_DIV_FRAC_START2_MODE0        0x0bc
0059 #define QSERDES_V3_COM_DIV_FRAC_START3_MODE0        0x0c0
0060 #define QSERDES_V3_COM_DIV_FRAC_START1_MODE1        0x0c4
0061 #define QSERDES_V3_COM_DIV_FRAC_START2_MODE1        0x0c8
0062 #define QSERDES_V3_COM_DIV_FRAC_START3_MODE1        0x0cc
0063 #define QSERDES_V3_COM_INTEGLOOP_INITVAL        0x0d0
0064 #define QSERDES_V3_COM_INTEGLOOP_EN         0x0d4
0065 #define QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE0        0x0d8
0066 #define QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE0        0x0dc
0067 #define QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE1        0x0e0
0068 #define QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE1        0x0e4
0069 #define QSERDES_V3_COM_VCOCAL_DEADMAN_CTRL      0x0e8
0070 #define QSERDES_V3_COM_VCO_TUNE_CTRL            0x0ec
0071 #define QSERDES_V3_COM_VCO_TUNE_MAP         0x0f0
0072 #define QSERDES_V3_COM_VCO_TUNE1_MODE0          0x0f4
0073 #define QSERDES_V3_COM_VCO_TUNE2_MODE0          0x0f8
0074 #define QSERDES_V3_COM_VCO_TUNE1_MODE1          0x0fc
0075 #define QSERDES_V3_COM_VCO_TUNE2_MODE1          0x100
0076 #define QSERDES_V3_COM_VCO_TUNE_INITVAL1        0x104
0077 #define QSERDES_V3_COM_VCO_TUNE_INITVAL2        0x108
0078 #define QSERDES_V3_COM_VCO_TUNE_MINVAL1         0x10c
0079 #define QSERDES_V3_COM_VCO_TUNE_MINVAL2         0x110
0080 #define QSERDES_V3_COM_VCO_TUNE_MAXVAL1         0x114
0081 #define QSERDES_V3_COM_VCO_TUNE_MAXVAL2         0x118
0082 #define QSERDES_V3_COM_VCO_TUNE_TIMER1          0x11c
0083 #define QSERDES_V3_COM_VCO_TUNE_TIMER2          0x120
0084 #define QSERDES_V3_COM_CMN_STATUS           0x124
0085 #define QSERDES_V3_COM_RESET_SM_STATUS          0x128
0086 #define QSERDES_V3_COM_RESTRIM_CODE_STATUS      0x12c
0087 #define QSERDES_V3_COM_PLLCAL_CODE1_STATUS      0x130
0088 #define QSERDES_V3_COM_PLLCAL_CODE2_STATUS      0x134
0089 #define QSERDES_V3_COM_CLK_SELECT           0x138
0090 #define QSERDES_V3_COM_HSCLK_SEL            0x13c
0091 #define QSERDES_V3_COM_INTEGLOOP_BINCODE_STATUS     0x140
0092 #define QSERDES_V3_COM_PLL_ANALOG           0x144
0093 #define QSERDES_V3_COM_CORECLK_DIV_MODE0        0x148
0094 #define QSERDES_V3_COM_CORECLK_DIV_MODE1        0x14c
0095 #define QSERDES_V3_COM_SW_RESET             0x150
0096 #define QSERDES_V3_COM_CORE_CLK_EN          0x154
0097 #define QSERDES_V3_COM_C_READY_STATUS           0x158
0098 #define QSERDES_V3_COM_CMN_CONFIG           0x15c
0099 #define QSERDES_V3_COM_CMN_RATE_OVERRIDE        0x160
0100 #define QSERDES_V3_COM_SVS_MODE_CLK_SEL         0x164
0101 #define QSERDES_V3_COM_DEBUG_BUS0           0x168
0102 #define QSERDES_V3_COM_DEBUG_BUS1           0x16c
0103 #define QSERDES_V3_COM_DEBUG_BUS2           0x170
0104 #define QSERDES_V3_COM_DEBUG_BUS3           0x174
0105 #define QSERDES_V3_COM_DEBUG_BUS_SEL            0x178
0106 #define QSERDES_V3_COM_CMN_MISC1            0x17c
0107 #define QSERDES_V3_COM_CMN_MISC2            0x180
0108 #define QSERDES_V3_COM_CMN_MODE             0x184
0109 #define QSERDES_V3_COM_CMN_VREG_SEL         0x188
0110
0111 #endif