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0006 #ifndef QCOM_PHY_QMP_PCS_UFS_V3_H_
0007 #define QCOM_PHY_QMP_PCS_UFS_V3_H_
0008
0009 #define QPHY_V3_PCS_UFS_TX_LARGE_AMP_DRV_LVL 0x02c
0010 #define QPHY_V3_PCS_UFS_TX_SMALL_AMP_DRV_LVL 0x034
0011 #define QPHY_V3_PCS_UFS_RX_SYM_RESYNC_CTRL 0x134
0012 #define QPHY_V3_PCS_UFS_RX_MIN_HIBERN8_TIME 0x138
0013 #define QPHY_V3_PCS_UFS_RX_SIGDET_CTRL1 0x13c
0014 #define QPHY_V3_PCS_UFS_RX_SIGDET_CTRL2 0x140
0015 #define QPHY_V3_PCS_UFS_TX_MID_TERM_CTRL1 0x1bc
0016 #define QPHY_V3_PCS_UFS_MULTI_LANE_CTRL1 0x1c4
0017
0018 #endif