phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2017, The Linux Foundation. All rights reserved.
0004  */
0005
0006 #ifndef QCOM_PHY_QMP_PCS_PCIE_V5_20_H_
0007 #define QCOM_PHY_QMP_PCS_PCIE_V5_20_H_
0008
0009 /* Only for QMP V5_20 PHY - PCIe PCS registers */
0010 #define QPHY_V5_20_PCS_PCIE_ENDPOINT_REFCLK_DRIVE   0x01c
0011 #define QPHY_V5_20_PCS_PCIE_OSC_DTCT_ACTIONS        0x090
0012 #define QPHY_V5_20_PCS_PCIE_EQ_CONFIG1          0x0a0
0013 #define QPHY_V5_20_PCS_PCIE_G4_EQ_CONFIG5       0x108
0014 #define QPHY_V5_20_PCS_PCIE_G4_PRE_GAIN         0x15c
0015 #define QPHY_V5_20_PCS_PCIE_RX_MARGINING_CONFIG3    0x184
0016
0017 #endif