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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * IMG Pistachio USB PHY driver
0004  *
0005  * Copyright (C) 2015 Google, Inc.
0006  */
0007 
0008 #include <linux/clk.h>
0009 #include <linux/delay.h>
0010 #include <linux/io.h>
0011 #include <linux/kernel.h>
0012 #include <linux/mfd/syscon.h>
0013 #include <linux/module.h>
0014 #include <linux/of.h>
0015 #include <linux/phy/phy.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/regmap.h>
0018 
0019 #include <dt-bindings/phy/phy-pistachio-usb.h>
0020 
0021 #define USB_PHY_CONTROL1                0x04
0022 #define USB_PHY_CONTROL1_FSEL_SHIFT         2
0023 #define USB_PHY_CONTROL1_FSEL_MASK          0x7
0024 
0025 #define USB_PHY_STRAP_CONTROL               0x10
0026 #define USB_PHY_STRAP_CONTROL_REFCLK_SHIFT      4
0027 #define USB_PHY_STRAP_CONTROL_REFCLK_MASK       0x3
0028 
0029 #define USB_PHY_STATUS                  0x14
0030 #define USB_PHY_STATUS_RX_PHY_CLK           BIT(9)
0031 #define USB_PHY_STATUS_RX_UTMI_CLK          BIT(8)
0032 #define USB_PHY_STATUS_VBUS_FAULT           BIT(7)
0033 
0034 struct pistachio_usb_phy {
0035     struct device *dev;
0036     struct regmap *cr_top;
0037     struct clk *phy_clk;
0038     unsigned int refclk;
0039 };
0040 
0041 static const unsigned long fsel_rate_map[] = {
0042     9600000,
0043     10000000,
0044     12000000,
0045     19200000,
0046     20000000,
0047     24000000,
0048     0,
0049     50000000,
0050 };
0051 
0052 static int pistachio_usb_phy_power_on(struct phy *phy)
0053 {
0054     struct pistachio_usb_phy *p_phy = phy_get_drvdata(phy);
0055     unsigned long timeout, rate;
0056     unsigned int i;
0057     int ret;
0058 
0059     ret = clk_prepare_enable(p_phy->phy_clk);
0060     if (ret < 0) {
0061         dev_err(p_phy->dev, "Failed to enable PHY clock: %d\n", ret);
0062         return ret;
0063     }
0064 
0065     regmap_update_bits(p_phy->cr_top, USB_PHY_STRAP_CONTROL,
0066                USB_PHY_STRAP_CONTROL_REFCLK_MASK <<
0067                USB_PHY_STRAP_CONTROL_REFCLK_SHIFT,
0068                p_phy->refclk << USB_PHY_STRAP_CONTROL_REFCLK_SHIFT);
0069 
0070     rate = clk_get_rate(p_phy->phy_clk);
0071     if (p_phy->refclk == REFCLK_XO_CRYSTAL && rate != 12000000) {
0072         dev_err(p_phy->dev, "Unsupported rate for XO crystal: %ld\n",
0073             rate);
0074         ret = -EINVAL;
0075         goto disable_clk;
0076     }
0077 
0078     for (i = 0; i < ARRAY_SIZE(fsel_rate_map); i++) {
0079         if (rate == fsel_rate_map[i])
0080             break;
0081     }
0082     if (i == ARRAY_SIZE(fsel_rate_map)) {
0083         dev_err(p_phy->dev, "Unsupported clock rate: %lu\n", rate);
0084         ret = -EINVAL;
0085         goto disable_clk;
0086     }
0087 
0088     regmap_update_bits(p_phy->cr_top, USB_PHY_CONTROL1,
0089                USB_PHY_CONTROL1_FSEL_MASK <<
0090                USB_PHY_CONTROL1_FSEL_SHIFT,
0091                i << USB_PHY_CONTROL1_FSEL_SHIFT);
0092 
0093     timeout = jiffies + msecs_to_jiffies(200);
0094     while (time_before(jiffies, timeout)) {
0095         unsigned int val;
0096 
0097         regmap_read(p_phy->cr_top, USB_PHY_STATUS, &val);
0098         if (val & USB_PHY_STATUS_VBUS_FAULT) {
0099             dev_err(p_phy->dev, "VBUS fault detected\n");
0100             ret = -EIO;
0101             goto disable_clk;
0102         }
0103         if ((val & USB_PHY_STATUS_RX_PHY_CLK) &&
0104             (val & USB_PHY_STATUS_RX_UTMI_CLK))
0105             return 0;
0106         usleep_range(1000, 1500);
0107     }
0108 
0109     dev_err(p_phy->dev, "Timed out waiting for PHY to power on\n");
0110     ret = -ETIMEDOUT;
0111 
0112 disable_clk:
0113     clk_disable_unprepare(p_phy->phy_clk);
0114     return ret;
0115 }
0116 
0117 static int pistachio_usb_phy_power_off(struct phy *phy)
0118 {
0119     struct pistachio_usb_phy *p_phy = phy_get_drvdata(phy);
0120 
0121     clk_disable_unprepare(p_phy->phy_clk);
0122 
0123     return 0;
0124 }
0125 
0126 static const struct phy_ops pistachio_usb_phy_ops = {
0127     .power_on = pistachio_usb_phy_power_on,
0128     .power_off = pistachio_usb_phy_power_off,
0129     .owner = THIS_MODULE,
0130 };
0131 
0132 static int pistachio_usb_phy_probe(struct platform_device *pdev)
0133 {
0134     struct pistachio_usb_phy *p_phy;
0135     struct phy_provider *provider;
0136     struct phy *phy;
0137     int ret;
0138 
0139     p_phy = devm_kzalloc(&pdev->dev, sizeof(*p_phy), GFP_KERNEL);
0140     if (!p_phy)
0141         return -ENOMEM;
0142     p_phy->dev = &pdev->dev;
0143     platform_set_drvdata(pdev, p_phy);
0144 
0145     p_phy->cr_top = syscon_regmap_lookup_by_phandle(p_phy->dev->of_node,
0146                             "img,cr-top");
0147     if (IS_ERR(p_phy->cr_top)) {
0148         dev_err(p_phy->dev, "Failed to get CR_TOP registers: %ld\n",
0149             PTR_ERR(p_phy->cr_top));
0150         return PTR_ERR(p_phy->cr_top);
0151     }
0152 
0153     p_phy->phy_clk = devm_clk_get(p_phy->dev, "usb_phy");
0154     if (IS_ERR(p_phy->phy_clk)) {
0155         dev_err(p_phy->dev, "Failed to get usb_phy clock: %ld\n",
0156             PTR_ERR(p_phy->phy_clk));
0157         return PTR_ERR(p_phy->phy_clk);
0158     }
0159 
0160     ret = of_property_read_u32(p_phy->dev->of_node, "img,refclk",
0161                    &p_phy->refclk);
0162     if (ret < 0) {
0163         dev_err(p_phy->dev, "No reference clock selector specified\n");
0164         return ret;
0165     }
0166 
0167     phy = devm_phy_create(p_phy->dev, NULL, &pistachio_usb_phy_ops);
0168     if (IS_ERR(phy)) {
0169         dev_err(p_phy->dev, "Failed to create PHY: %ld\n",
0170             PTR_ERR(phy));
0171         return PTR_ERR(phy);
0172     }
0173     phy_set_drvdata(phy, p_phy);
0174 
0175     provider = devm_of_phy_provider_register(p_phy->dev,
0176                          of_phy_simple_xlate);
0177     if (IS_ERR(provider)) {
0178         dev_err(p_phy->dev, "Failed to register PHY provider: %ld\n",
0179             PTR_ERR(provider));
0180         return PTR_ERR(provider);
0181     }
0182 
0183     return 0;
0184 }
0185 
0186 static const struct of_device_id pistachio_usb_phy_of_match[] = {
0187     { .compatible = "img,pistachio-usb-phy", },
0188     { },
0189 };
0190 MODULE_DEVICE_TABLE(of, pistachio_usb_phy_of_match);
0191 
0192 static struct platform_driver pistachio_usb_phy_driver = {
0193     .probe      = pistachio_usb_phy_probe,
0194     .driver     = {
0195         .name   = "pistachio-usb-phy",
0196         .of_match_table = pistachio_usb_phy_of_match,
0197     },
0198 };
0199 module_platform_driver(pistachio_usb_phy_driver);
0200 
0201 MODULE_AUTHOR("Andrew Bresticker <abrestic@chromium.org>");
0202 MODULE_DESCRIPTION("IMG Pistachio USB2.0 PHY driver");
0203 MODULE_LICENSE("GPL v2");