phy/broadcom/phy-brcm-usb-init-synopsys.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright (c) 2018, Broadcom */
0003
0004 /*
0005  * This module contains USB PHY initialization for power up and S3 resume
0006  * for newer Synopsys based USB hardware first used on the bcm7216.
0007  */
0008
0009 #include <linux/delay.h>
0010 #include <linux/io.h>
0011
0012 #include <linux/soc/brcmstb/brcmstb.h>
0013 #include "phy-brcm-usb-init.h"
0014
0015 #define PHY_LOCK_TIMEOUT_MS 200
0016
0017 /* Register definitions for syscon piarbctl registers */
0018 #define PIARBCTL_CAM            0x00
0019 #define PIARBCTL_SPLITTER       0x04
0020 #define PIARBCTL_MISC           0x08
0021 #define   PIARBCTL_MISC_SECURE_MASK         0x80000000
0022 #define   PIARBCTL_MISC_USB_SELECT_MASK         0x40000000
0023 #define   PIARBCTL_MISC_USB_4G_SDRAM_MASK       0x20000000
0024 #define   PIARBCTL_MISC_USB_PRIORITY_MASK       0x000f0000
0025 #define   PIARBCTL_MISC_USB_MEM_PAGE_MASK       0x0000f000
0026 #define   PIARBCTL_MISC_CAM1_MEM_PAGE_MASK      0x00000f00
0027 #define   PIARBCTL_MISC_CAM0_MEM_PAGE_MASK      0x000000f0
0028 #define   PIARBCTL_MISC_SATA_PRIORITY_MASK      0x0000000f
0029
0030 #define PIARBCTL_MISC_USB_ONLY_MASK     \
0031     (PIARBCTL_MISC_USB_SELECT_MASK |    \
0032      PIARBCTL_MISC_USB_4G_SDRAM_MASK |  \
0033      PIARBCTL_MISC_USB_PRIORITY_MASK |  \
0034      PIARBCTL_MISC_USB_MEM_PAGE_MASK)
0035
0036 /* Register definitions for the USB CTRL block */
0037 #define USB_CTRL_SETUP          0x00
0038 #define   USB_CTRL_SETUP_STRAP_IPP_SEL_MASK     0x02000000
0039 #define   USB_CTRL_SETUP_SCB2_EN_MASK           0x00008000
0040 #define   USB_CTRL_SETUP_tca_drv_sel_MASK       0x01000000
0041 #define   USB_CTRL_SETUP_SCB1_EN_MASK           0x00004000
0042 #define   USB_CTRL_SETUP_SOFT_SHUTDOWN_MASK     0x00000200
0043 #define   USB_CTRL_SETUP_IPP_MASK           0x00000020
0044 #define   USB_CTRL_SETUP_IOC_MASK           0x00000010
0045 #define USB_CTRL_USB_PM         0x04
0046 #define   USB_CTRL_USB_PM_USB_PWRDN_MASK        0x80000000
0047 #define   USB_CTRL_USB_PM_SOFT_RESET_MASK       0x40000000
0048 #define   USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK      0x00800000
0049 #define   USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK      0x00400000
0050 #define   USB_CTRL_USB_PM_XHC_PME_EN_MASK       0x00000010
0051 #define   USB_CTRL_USB_PM_XHC_S2_CLK_SWITCH_EN_MASK 0x00000008
0052 #define USB_CTRL_USB_PM_STATUS      0x08
0053 #define USB_CTRL_USB_DEVICE_CTL1    0x10
0054 #define   USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK   0x00000003
0055 #define USB_CTRL_TEST_PORT_CTL      0x30
0056 #define   USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff
0057 #define   USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_PME_GEN_MASK 0x0000002e
0058 #define USB_CTRL_TP_DIAG1       0x34
0059 #define   USB_CTLR_TP_DIAG1_wake_MASK   0x00000002
0060 #define USB_CTRL_CTLR_CSHCR     0x50
0061 #define   USB_CTRL_CTLR_CSHCR_ctl_pme_en_MASK   0x00040000
0062
0063 /* Register definitions for the USB_PHY block in 7211b0 */
0064 #define USB_PHY_PLL_CTL         0x00
0065 #define   USB_PHY_PLL_CTL_PLL_RESETB_MASK       0x40000000
0066 #define USB_PHY_PLL_LDO_CTL     0x08
0067 #define   USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK      0x00000004
0068 #define   USB_PHY_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK  0x00000002
0069 #define   USB_PHY_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK   0x00000001
0070 #define USB_PHY_UTMI_CTL_1      0x04
0071 #define   USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK   0x00000800
0072 #define   USB_PHY_UTMI_CTL_1_PHY_MODE_MASK      0x0000000c
0073 #define   USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT     2
0074 #define USB_PHY_IDDQ            0x1c
0075 #define   USB_PHY_IDDQ_phy_iddq_MASK            0x00000001
0076 #define USB_PHY_STATUS          0x20
0077 #define   USB_PHY_STATUS_pll_lock_MASK          0x00000001
0078
0079 /* Register definitions for the MDIO registers in the DWC2 block of
0080  * the 7211b0.
0081  * NOTE: The PHY's MDIO registers are only accessible through the
0082  * legacy DesignWare USB controller even though it's not being used.
0083  */
0084 #define USB_GMDIOCSR    0
0085 #define USB_GMDIOGEN    4
0086
0087 /* Register definitions for the BDC EC block in 7211b0 */
0088 #define BDC_EC_AXIRDA           0x0c
0089 #define   BDC_EC_AXIRDA_RTS_MASK            0xf0000000
0090 #define   BDC_EC_AXIRDA_RTS_SHIFT           28
0091
0092
0093 static void usb_mdio_write_7211b0(struct brcm_usb_init_params *params,
0094                   uint8_t addr, uint16_t data)
0095 {
0096     void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO];
0097
0098     addr &= 0x1f; /* 5-bit address */
0099     brcm_usb_writel(0xffffffff, usb_mdio + USB_GMDIOGEN);
0100     while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
0101         ;
0102     brcm_usb_writel(0x59020000 | (addr << 18) | data,
0103             usb_mdio + USB_GMDIOGEN);
0104     while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
0105         ;
0106     brcm_usb_writel(0x00000000, usb_mdio + USB_GMDIOGEN);
0107     while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
0108         ;
0109 }
0110
0111 static uint16_t __maybe_unused usb_mdio_read_7211b0(
0112     struct brcm_usb_init_params *params, uint8_t addr)
0113 {
0114     void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO];
0115
0116     addr &= 0x1f; /* 5-bit address */
0117     brcm_usb_writel(0xffffffff, usb_mdio + USB_GMDIOGEN);
0118     while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
0119         ;
0120     brcm_usb_writel(0x69020000 | (addr << 18), usb_mdio + USB_GMDIOGEN);
0121     while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
0122         ;
0123     brcm_usb_writel(0x00000000, usb_mdio + USB_GMDIOGEN);
0124     while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
0125         ;
0126     return brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & 0xffff;
0127 }
0128
0129 static void usb2_eye_fix_7211b0(struct brcm_usb_init_params *params)
0130 {
0131     /* select bank */
0132     usb_mdio_write_7211b0(params, 0x1f, 0x80a0);
0133
0134     /* Set the eye */
0135     usb_mdio_write_7211b0(params, 0x0a, 0xc6a0);
0136 }
0137
0138 static void xhci_soft_reset(struct brcm_usb_init_params *params,
0139             int on_off)
0140 {
0141     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0142
0143     /* Assert reset */
0144     if (on_off)
0145         USB_CTRL_UNSET(ctrl, USB_PM, XHC_SOFT_RESETB);
0146     /* De-assert reset */
0147     else
0148         USB_CTRL_SET(ctrl, USB_PM, XHC_SOFT_RESETB);
0149 }
0150
0151 static void usb_init_ipp(struct brcm_usb_init_params *params)
0152 {
0153     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0154     u32 reg;
0155     u32 orig_reg;
0156
0157     pr_debug("%s\n", __func__);
0158
0159     orig_reg = reg = brcm_usb_readl(USB_CTRL_REG(ctrl, SETUP));
0160     if (params->ipp != 2)
0161         /* override ipp strap pin (if it exits) */
0162         reg &= ~(USB_CTRL_MASK(SETUP, STRAP_IPP_SEL));
0163
0164     /* Override the default OC and PP polarity */
0165     reg &= ~(USB_CTRL_MASK(SETUP, IPP) | USB_CTRL_MASK(SETUP, IOC));
0166     if (params->ioc)
0167         reg |= USB_CTRL_MASK(SETUP, IOC);
0168     if (params->ipp == 1)
0169         reg |= USB_CTRL_MASK(SETUP, IPP);
0170     brcm_usb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
0171
0172     /*
0173      * If we're changing IPP, make sure power is off long enough
0174      * to turn off any connected devices.
0175      */
0176     if ((reg ^ orig_reg) & USB_CTRL_MASK(SETUP, IPP))
0177         msleep(50);
0178 }
0179
0180 static void syscon_piarbctl_init(struct regmap *rmap)
0181 {
0182     /* Switch from legacy USB OTG controller to new STB USB controller */
0183     regmap_update_bits(rmap, PIARBCTL_MISC, PIARBCTL_MISC_USB_ONLY_MASK,
0184                PIARBCTL_MISC_USB_SELECT_MASK |
0185                PIARBCTL_MISC_USB_4G_SDRAM_MASK);
0186 }
0187
0188 static void usb_init_common(struct brcm_usb_init_params *params)
0189 {
0190     u32 reg;
0191     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0192
0193     pr_debug("%s\n", __func__);
0194
0195     if (USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE)) {
0196         reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
0197         reg &= ~USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE);
0198         reg |= params->mode;
0199         brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
0200     }
0201     switch (params->mode) {
0202     case USB_CTLR_MODE_HOST:
0203         USB_CTRL_UNSET(ctrl, USB_PM, BDC_SOFT_RESETB);
0204         break;
0205     default:
0206         USB_CTRL_UNSET(ctrl, USB_PM, BDC_SOFT_RESETB);
0207         USB_CTRL_SET(ctrl, USB_PM, BDC_SOFT_RESETB);
0208         break;
0209     }
0210 }
0211
0212 static void usb_wake_enable_7211b0(struct brcm_usb_init_params *params,
0213                    bool enable)
0214 {
0215     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0216
0217     if (enable)
0218         USB_CTRL_SET(ctrl, CTLR_CSHCR, ctl_pme_en);
0219     else
0220         USB_CTRL_UNSET(ctrl, CTLR_CSHCR, ctl_pme_en);
0221 }
0222
0223 static void usb_wake_enable_7216(struct brcm_usb_init_params *params,
0224                  bool enable)
0225 {
0226     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0227
0228     if (enable)
0229         USB_CTRL_SET(ctrl, USB_PM, XHC_PME_EN);
0230     else
0231         USB_CTRL_UNSET(ctrl, USB_PM, XHC_PME_EN);
0232 }
0233
0234 static void usb_init_common_7211b0(struct brcm_usb_init_params *params)
0235 {
0236     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0237     void __iomem *usb_phy = params->regs[BRCM_REGS_USB_PHY];
0238     void __iomem *bdc_ec = params->regs[BRCM_REGS_BDC_EC];
0239     int timeout_ms = PHY_LOCK_TIMEOUT_MS;
0240     u32 reg;
0241
0242     if (params->syscon_piarbctl)
0243         syscon_piarbctl_init(params->syscon_piarbctl);
0244
0245     USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN);
0246
0247     usb_wake_enable_7211b0(params, false);
0248     if (!params->wake_enabled) {
0249
0250         /* undo possible suspend settings */
0251         brcm_usb_writel(0, usb_phy + USB_PHY_IDDQ);
0252         reg = brcm_usb_readl(usb_phy + USB_PHY_PLL_CTL);
0253         reg |= USB_PHY_PLL_CTL_PLL_RESETB_MASK;
0254         brcm_usb_writel(reg, usb_phy + USB_PHY_PLL_CTL);
0255
0256         /* temporarily enable FSM so PHY comes up properly */
0257         reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1);
0258         reg |= USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK;
0259         brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1);
0260     }
0261
0262     /* Init the PHY */
0263     reg = USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK |
0264         USB_PHY_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK |
0265         USB_PHY_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK;
0266     brcm_usb_writel(reg, usb_phy + USB_PHY_PLL_LDO_CTL);
0267
0268     /* wait for lock */
0269     while (timeout_ms-- > 0) {
0270         reg = brcm_usb_readl(usb_phy + USB_PHY_STATUS);
0271         if (reg & USB_PHY_STATUS_pll_lock_MASK)
0272             break;
0273         usleep_range(1000, 2000);
0274     }
0275
0276     /* Set the PHY_MODE */
0277     reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1);
0278     reg &= ~USB_PHY_UTMI_CTL_1_PHY_MODE_MASK;
0279     reg |= params->mode << USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT;
0280     brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1);
0281
0282     usb_init_common(params);
0283
0284     /*
0285      * The BDC controller will get occasional failures with
0286      * the default "Read Transaction Size" of 6 (1024 bytes).
0287      * Set it to 4 (256 bytes).
0288      */
0289     if ((params->mode != USB_CTLR_MODE_HOST) && bdc_ec) {
0290         reg = brcm_usb_readl(bdc_ec + BDC_EC_AXIRDA);
0291         reg &= ~BDC_EC_AXIRDA_RTS_MASK;
0292         reg |= (0x4 << BDC_EC_AXIRDA_RTS_SHIFT);
0293         brcm_usb_writel(reg, bdc_ec + BDC_EC_AXIRDA);
0294     }
0295
0296     /*
0297      * Disable FSM, otherwise the PHY will auto suspend when no
0298      * device is connected and will be reset on resume.
0299      */
0300     reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1);
0301     reg &= ~USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK;
0302     brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1);
0303
0304     usb2_eye_fix_7211b0(params);
0305 }
0306
0307 static void usb_init_common_7216(struct brcm_usb_init_params *params)
0308 {
0309     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0310
0311     USB_CTRL_UNSET(ctrl, USB_PM, XHC_S2_CLK_SWITCH_EN);
0312     USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN);
0313
0314     /* 1 millisecond - for USB clocks to settle down */
0315     usleep_range(1000, 2000);
0316
0317     usb_wake_enable_7216(params, false);
0318     usb_init_common(params);
0319 }
0320
0321 static void usb_init_xhci(struct brcm_usb_init_params *params)
0322 {
0323     pr_debug("%s\n", __func__);
0324
0325     xhci_soft_reset(params, 0);
0326 }
0327
0328 static void usb_uninit_common_7216(struct brcm_usb_init_params *params)
0329 {
0330     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0331
0332     pr_debug("%s\n", __func__);
0333
0334     if (!params->wake_enabled) {
0335         USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN);
0336
0337         /* Switch to using slower clock during suspend to save power */
0338         USB_CTRL_SET(ctrl, USB_PM, XHC_S2_CLK_SWITCH_EN);
0339     } else {
0340         usb_wake_enable_7216(params, true);
0341     }
0342 }
0343
0344 static void usb_uninit_common_7211b0(struct brcm_usb_init_params *params)
0345 {
0346     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0347     void __iomem *usb_phy = params->regs[BRCM_REGS_USB_PHY];
0348     u32 reg;
0349
0350     pr_debug("%s\n", __func__);
0351
0352     if (params->wake_enabled) {
0353         USB_CTRL_SET(ctrl, TEST_PORT_CTL, TPOUT_SEL_PME_GEN);
0354         usb_wake_enable_7211b0(params, true);
0355     } else {
0356         USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN);
0357         brcm_usb_writel(0, usb_phy + USB_PHY_PLL_LDO_CTL);
0358         reg = brcm_usb_readl(usb_phy + USB_PHY_PLL_CTL);
0359         reg &= ~USB_PHY_PLL_CTL_PLL_RESETB_MASK;
0360         brcm_usb_writel(reg, usb_phy + USB_PHY_PLL_CTL);
0361         brcm_usb_writel(USB_PHY_IDDQ_phy_iddq_MASK,
0362                 usb_phy + USB_PHY_IDDQ);
0363     }
0364
0365 }
0366
0367 static void usb_uninit_xhci(struct brcm_usb_init_params *params)
0368 {
0369
0370     pr_debug("%s\n", __func__);
0371
0372     if (!params->wake_enabled)
0373         xhci_soft_reset(params, 1);
0374 }
0375
0376 static int usb_get_dual_select(struct brcm_usb_init_params *params)
0377 {
0378     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0379     u32 reg = 0;
0380
0381     pr_debug("%s\n", __func__);
0382
0383     reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
0384     reg &= USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE);
0385     return reg;
0386 }
0387
0388 static void usb_set_dual_select(struct brcm_usb_init_params *params, int mode)
0389 {
0390     void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
0391     u32 reg;
0392
0393     pr_debug("%s\n", __func__);
0394
0395     reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
0396     reg &= ~USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE);
0397     reg |= mode;
0398     brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
0399 }
0400
0401 static const struct brcm_usb_init_ops bcm7216_ops = {
0402     .init_ipp = usb_init_ipp,
0403     .init_common = usb_init_common_7216,
0404     .init_xhci = usb_init_xhci,
0405     .uninit_common = usb_uninit_common_7216,
0406     .uninit_xhci = usb_uninit_xhci,
0407     .get_dual_select = usb_get_dual_select,
0408     .set_dual_select = usb_set_dual_select,
0409 };
0410
0411 static const struct brcm_usb_init_ops bcm7211b0_ops = {
0412     .init_ipp = usb_init_ipp,
0413     .init_common = usb_init_common_7211b0,
0414     .init_xhci = usb_init_xhci,
0415     .uninit_common = usb_uninit_common_7211b0,
0416     .uninit_xhci = usb_uninit_xhci,
0417     .get_dual_select = usb_get_dual_select,
0418     .set_dual_select = usb_set_dual_select,
0419 };
0420
0421 void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params)
0422 {
0423
0424     pr_debug("%s\n", __func__);
0425
0426     params->family_name = "7216";
0427     params->ops = &bcm7216_ops;
0428     params->suspend_with_clocks = true;
0429 }
0430
0431 void brcm_usb_dvr_init_7211b0(struct brcm_usb_init_params *params)
0432 {
0433
0434     pr_debug("%s\n", __func__);
0435
0436     params->family_name = "7211";
0437     params->ops = &bcm7211b0_ops;
0438     params->suspend_with_clocks = true;
0439 }