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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Regular cardbus driver ("yenta_socket")
0004  *
0005  * (C) Copyright 1999, 2000 Linus Torvalds
0006  *
0007  * Changelog:
0008  * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
0009  *  Dynamically adjust the size of the bridge resource
0010  *
0011  * May 2003: Dominik Brodowski <linux@brodo.de>
0012  *  Merge pci_socket.c and yenta.c into one file
0013  */
0014 #include <linux/init.h>
0015 #include <linux/pci.h>
0016 #include <linux/workqueue.h>
0017 #include <linux/interrupt.h>
0018 #include <linux/delay.h>
0019 #include <linux/module.h>
0020 #include <linux/io.h>
0021 #include <linux/slab.h>
0022 
0023 #include <pcmcia/ss.h>
0024 
0025 #include "yenta_socket.h"
0026 #include "i82365.h"
0027 
0028 static bool disable_clkrun;
0029 module_param(disable_clkrun, bool, 0444);
0030 MODULE_PARM_DESC(disable_clkrun,
0031          "If PC card doesn't function properly, please try this option (TI and Ricoh bridges only)");
0032 
0033 static bool isa_probe = 1;
0034 module_param(isa_probe, bool, 0444);
0035 MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
0036 
0037 static bool pwr_irqs_off;
0038 module_param(pwr_irqs_off, bool, 0644);
0039 MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
0040 
0041 static char o2_speedup[] = "default";
0042 module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
0043 MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
0044     "or 'default' (uses recommended behaviour for the detected bridge)");
0045 
0046 /*
0047  * Only probe "regular" interrupts, don't
0048  * touch dangerous spots like the mouse irq,
0049  * because there are mice that apparently
0050  * get really confused if they get fondled
0051  * too intimately.
0052  *
0053  * Default to 11, 10, 9, 7, 6, 5, 4, 3.
0054  */
0055 static u32 isa_interrupts = 0x0ef8;
0056 
0057 
0058 #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
0059 
0060 /* Don't ask.. */
0061 #define to_cycles(ns)   ((ns)/120)
0062 #define to_ns(cycles)   ((cycles)*120)
0063 
0064 /*
0065  * yenta PCI irq probing.
0066  * currently only used in the TI/EnE initialization code
0067  */
0068 #ifdef CONFIG_YENTA_TI
0069 static int yenta_probe_cb_irq(struct yenta_socket *socket);
0070 static unsigned int yenta_probe_irq(struct yenta_socket *socket,
0071                 u32 isa_irq_mask);
0072 #endif
0073 
0074 
0075 static unsigned int override_bios;
0076 module_param(override_bios, uint, 0000);
0077 MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
0078 
0079 /*
0080  * Generate easy-to-use ways of reading a cardbus sockets
0081  * regular memory space ("cb_xxx"), configuration space
0082  * ("config_xxx") and compatibility space ("exca_xxxx")
0083  */
0084 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
0085 {
0086     u32 val = readl(socket->base + reg);
0087     debug("%04x %08x\n", socket, reg, val);
0088     return val;
0089 }
0090 
0091 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
0092 {
0093     debug("%04x %08x\n", socket, reg, val);
0094     writel(val, socket->base + reg);
0095     readl(socket->base + reg); /* avoid problems with PCI write posting */
0096 }
0097 
0098 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
0099 {
0100     u8 val;
0101     pci_read_config_byte(socket->dev, offset, &val);
0102     debug("%04x %02x\n", socket, offset, val);
0103     return val;
0104 }
0105 
0106 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
0107 {
0108     u16 val;
0109     pci_read_config_word(socket->dev, offset, &val);
0110     debug("%04x %04x\n", socket, offset, val);
0111     return val;
0112 }
0113 
0114 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
0115 {
0116     u32 val;
0117     pci_read_config_dword(socket->dev, offset, &val);
0118     debug("%04x %08x\n", socket, offset, val);
0119     return val;
0120 }
0121 
0122 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
0123 {
0124     debug("%04x %02x\n", socket, offset, val);
0125     pci_write_config_byte(socket->dev, offset, val);
0126 }
0127 
0128 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
0129 {
0130     debug("%04x %04x\n", socket, offset, val);
0131     pci_write_config_word(socket->dev, offset, val);
0132 }
0133 
0134 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
0135 {
0136     debug("%04x %08x\n", socket, offset, val);
0137     pci_write_config_dword(socket->dev, offset, val);
0138 }
0139 
0140 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
0141 {
0142     u8 val = readb(socket->base + 0x800 + reg);
0143     debug("%04x %02x\n", socket, reg, val);
0144     return val;
0145 }
0146 
0147 /*
0148 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
0149 {
0150     u16 val;
0151     val = readb(socket->base + 0x800 + reg);
0152     val |= readb(socket->base + 0x800 + reg + 1) << 8;
0153     debug("%04x %04x\n", socket, reg, val);
0154     return val;
0155 }
0156 */
0157 
0158 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
0159 {
0160     debug("%04x %02x\n", socket, reg, val);
0161     writeb(val, socket->base + 0x800 + reg);
0162     readb(socket->base + 0x800 + reg); /* PCI write posting... */
0163 }
0164 
0165 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
0166 {
0167     debug("%04x %04x\n", socket, reg, val);
0168     writeb(val, socket->base + 0x800 + reg);
0169     writeb(val >> 8, socket->base + 0x800 + reg + 1);
0170 
0171     /* PCI write posting... */
0172     readb(socket->base + 0x800 + reg);
0173     readb(socket->base + 0x800 + reg + 1);
0174 }
0175 
0176 static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
0177 {
0178     struct yenta_socket *socket = dev_get_drvdata(yentadev);
0179     int offset = 0, i;
0180 
0181     offset = sysfs_emit(buf, "CB registers:");
0182     for (i = 0; i < 0x24; i += 4) {
0183         unsigned val;
0184         if (!(i & 15))
0185             offset += sysfs_emit_at(buf, offset, "\n%02x:", i);
0186         val = cb_readl(socket, i);
0187         offset += sysfs_emit_at(buf, offset, " %08x", val);
0188     }
0189 
0190     offset += sysfs_emit_at(buf, offset, "\n\nExCA registers:");
0191     for (i = 0; i < 0x45; i++) {
0192         unsigned char val;
0193         if (!(i & 7)) {
0194             if (i & 8) {
0195                 memcpy(buf + offset, " -", 2);
0196                 offset += 2;
0197             } else
0198                 offset += sysfs_emit_at(buf, offset, "\n%02x:", i);
0199         }
0200         val = exca_readb(socket, i);
0201         offset += sysfs_emit_at(buf, offset, " %02x", val);
0202     }
0203     sysfs_emit_at(buf, offset, "\n");
0204     return offset;
0205 }
0206 
0207 static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
0208 
0209 /*
0210  * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
0211  * on what kind of card is inserted..
0212  */
0213 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
0214 {
0215     struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
0216     unsigned int val;
0217     u32 state = cb_readl(socket, CB_SOCKET_STATE);
0218 
0219     val  = (state & CB_3VCARD) ? SS_3VCARD : 0;
0220     val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
0221     val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
0222     val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
0223 
0224 
0225     if (state & CB_CBCARD) {
0226         val |= SS_CARDBUS;
0227         val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
0228         val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
0229         val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
0230     } else if (state & CB_16BITCARD) {
0231         u8 status = exca_readb(socket, I365_STATUS);
0232         val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
0233         if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
0234             val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
0235         } else {
0236             val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
0237             val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
0238         }
0239         val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
0240         val |= (status & I365_CS_READY) ? SS_READY : 0;
0241         val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
0242     }
0243 
0244     *value = val;
0245     return 0;
0246 }
0247 
0248 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
0249 {
0250     /* some birdges require to use the ExCA registers to power 16bit cards */
0251     if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
0252         (socket->flags & YENTA_16BIT_POWER_EXCA)) {
0253         u8 reg, old;
0254         reg = old = exca_readb(socket, I365_POWER);
0255         reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
0256 
0257         /* i82365SL-DF style */
0258         if (socket->flags & YENTA_16BIT_POWER_DF) {
0259             switch (state->Vcc) {
0260             case 33:
0261                 reg |= I365_VCC_3V;
0262                 break;
0263             case 50:
0264                 reg |= I365_VCC_5V;
0265                 break;
0266             default:
0267                 reg = 0;
0268                 break;
0269             }
0270             switch (state->Vpp) {
0271             case 33:
0272             case 50:
0273                 reg |= I365_VPP1_5V;
0274                 break;
0275             case 120:
0276                 reg |= I365_VPP1_12V;
0277                 break;
0278             }
0279         } else {
0280             /* i82365SL-B style */
0281             switch (state->Vcc) {
0282             case 50:
0283                 reg |= I365_VCC_5V;
0284                 break;
0285             default:
0286                 reg = 0;
0287                 break;
0288             }
0289             switch (state->Vpp) {
0290             case 50:
0291                 reg |= I365_VPP1_5V | I365_VPP2_5V;
0292                 break;
0293             case 120:
0294                 reg |= I365_VPP1_12V | I365_VPP2_12V;
0295                 break;
0296             }
0297         }
0298 
0299         if (reg != old)
0300             exca_writeb(socket, I365_POWER, reg);
0301     } else {
0302         u32 reg = 0;    /* CB_SC_STPCLK? */
0303         switch (state->Vcc) {
0304         case 33:
0305             reg = CB_SC_VCC_3V;
0306             break;
0307         case 50:
0308             reg = CB_SC_VCC_5V;
0309             break;
0310         default:
0311             reg = 0;
0312             break;
0313         }
0314         switch (state->Vpp) {
0315         case 33:
0316             reg |= CB_SC_VPP_3V;
0317             break;
0318         case 50:
0319             reg |= CB_SC_VPP_5V;
0320             break;
0321         case 120:
0322             reg |= CB_SC_VPP_12V;
0323             break;
0324         }
0325         if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
0326             cb_writel(socket, CB_SOCKET_CONTROL, reg);
0327     }
0328 }
0329 
0330 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
0331 {
0332     struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
0333     u16 bridge;
0334 
0335     /* if powering down: do it immediately */
0336     if (state->Vcc == 0)
0337         yenta_set_power(socket, state);
0338 
0339     socket->io_irq = state->io_irq;
0340     bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
0341     if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
0342         u8 intr;
0343         bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
0344 
0345         /* ISA interrupt control? */
0346         intr = exca_readb(socket, I365_INTCTL);
0347         intr = (intr & ~0xf);
0348         if (!socket->dev->irq) {
0349             intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
0350             bridge |= CB_BRIDGE_INTR;
0351         }
0352         exca_writeb(socket, I365_INTCTL, intr);
0353     }  else {
0354         u8 reg;
0355 
0356         reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
0357         reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
0358         reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
0359         if (state->io_irq != socket->dev->irq) {
0360             reg |= state->io_irq;
0361             bridge |= CB_BRIDGE_INTR;
0362         }
0363         exca_writeb(socket, I365_INTCTL, reg);
0364 
0365         reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
0366         reg |= I365_PWR_NORESET;
0367         if (state->flags & SS_PWR_AUTO)
0368             reg |= I365_PWR_AUTO;
0369         if (state->flags & SS_OUTPUT_ENA)
0370             reg |= I365_PWR_OUT;
0371         if (exca_readb(socket, I365_POWER) != reg)
0372             exca_writeb(socket, I365_POWER, reg);
0373 
0374         /* CSC interrupt: no ISA irq for CSC */
0375         reg = exca_readb(socket, I365_CSCINT);
0376         reg &= I365_CSC_IRQ_MASK;
0377         reg |= I365_CSC_DETECT;
0378         if (state->flags & SS_IOCARD) {
0379             if (state->csc_mask & SS_STSCHG)
0380                 reg |= I365_CSC_STSCHG;
0381         } else {
0382             if (state->csc_mask & SS_BATDEAD)
0383                 reg |= I365_CSC_BVD1;
0384             if (state->csc_mask & SS_BATWARN)
0385                 reg |= I365_CSC_BVD2;
0386             if (state->csc_mask & SS_READY)
0387                 reg |= I365_CSC_READY;
0388         }
0389         exca_writeb(socket, I365_CSCINT, reg);
0390         exca_readb(socket, I365_CSC);
0391         if (sock->zoom_video)
0392             sock->zoom_video(sock, state->flags & SS_ZVCARD);
0393     }
0394     config_writew(socket, CB_BRIDGE_CONTROL, bridge);
0395     /* Socket event mask: get card insert/remove events.. */
0396     cb_writel(socket, CB_SOCKET_EVENT, -1);
0397     cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
0398 
0399     /* if powering up: do it as the last step when the socket is configured */
0400     if (state->Vcc != 0)
0401         yenta_set_power(socket, state);
0402     return 0;
0403 }
0404 
0405 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
0406 {
0407     struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
0408     int map;
0409     unsigned char ioctl, addr, enable;
0410 
0411     map = io->map;
0412 
0413     if (map > 1)
0414         return -EINVAL;
0415 
0416     enable = I365_ENA_IO(map);
0417     addr = exca_readb(socket, I365_ADDRWIN);
0418 
0419     /* Disable the window before changing it.. */
0420     if (addr & enable) {
0421         addr &= ~enable;
0422         exca_writeb(socket, I365_ADDRWIN, addr);
0423     }
0424 
0425     exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
0426     exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
0427 
0428     ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
0429     if (io->flags & MAP_0WS)
0430         ioctl |= I365_IOCTL_0WS(map);
0431     if (io->flags & MAP_16BIT)
0432         ioctl |= I365_IOCTL_16BIT(map);
0433     if (io->flags & MAP_AUTOSZ)
0434         ioctl |= I365_IOCTL_IOCS16(map);
0435     exca_writeb(socket, I365_IOCTL, ioctl);
0436 
0437     if (io->flags & MAP_ACTIVE)
0438         exca_writeb(socket, I365_ADDRWIN, addr | enable);
0439     return 0;
0440 }
0441 
0442 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
0443 {
0444     struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
0445     struct pci_bus_region region;
0446     int map;
0447     unsigned char addr, enable;
0448     unsigned int start, stop, card_start;
0449     unsigned short word;
0450 
0451     pcibios_resource_to_bus(socket->dev->bus, &region, mem->res);
0452 
0453     map = mem->map;
0454     start = region.start;
0455     stop = region.end;
0456     card_start = mem->card_start;
0457 
0458     if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
0459         (card_start >> 26) || mem->speed > 1000)
0460         return -EINVAL;
0461 
0462     enable = I365_ENA_MEM(map);
0463     addr = exca_readb(socket, I365_ADDRWIN);
0464     if (addr & enable) {
0465         addr &= ~enable;
0466         exca_writeb(socket, I365_ADDRWIN, addr);
0467     }
0468 
0469     exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
0470 
0471     word = (start >> 12) & 0x0fff;
0472     if (mem->flags & MAP_16BIT)
0473         word |= I365_MEM_16BIT;
0474     if (mem->flags & MAP_0WS)
0475         word |= I365_MEM_0WS;
0476     exca_writew(socket, I365_MEM(map) + I365_W_START, word);
0477 
0478     word = (stop >> 12) & 0x0fff;
0479     switch (to_cycles(mem->speed)) {
0480     case 0:
0481         break;
0482     case 1:
0483         word |= I365_MEM_WS0;
0484         break;
0485     case 2:
0486         word |= I365_MEM_WS1;
0487         break;
0488     default:
0489         word |= I365_MEM_WS1 | I365_MEM_WS0;
0490         break;
0491     }
0492     exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
0493 
0494     word = ((card_start - start) >> 12) & 0x3fff;
0495     if (mem->flags & MAP_WRPROT)
0496         word |= I365_MEM_WRPROT;
0497     if (mem->flags & MAP_ATTRIB)
0498         word |= I365_MEM_REG;
0499     exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
0500 
0501     if (mem->flags & MAP_ACTIVE)
0502         exca_writeb(socket, I365_ADDRWIN, addr | enable);
0503     return 0;
0504 }
0505 
0506 
0507 
0508 static irqreturn_t yenta_interrupt(int irq, void *dev_id)
0509 {
0510     unsigned int events;
0511     struct yenta_socket *socket = (struct yenta_socket *) dev_id;
0512     u8 csc;
0513     u32 cb_event;
0514 
0515     /* Clear interrupt status for the event */
0516     cb_event = cb_readl(socket, CB_SOCKET_EVENT);
0517     cb_writel(socket, CB_SOCKET_EVENT, cb_event);
0518 
0519     csc = exca_readb(socket, I365_CSC);
0520 
0521     if (!(cb_event || csc))
0522         return IRQ_NONE;
0523 
0524     events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
0525     events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
0526     if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
0527         events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
0528     } else {
0529         events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
0530         events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
0531         events |= (csc & I365_CSC_READY) ? SS_READY : 0;
0532     }
0533 
0534     if (events)
0535         pcmcia_parse_events(&socket->socket, events);
0536 
0537     return IRQ_HANDLED;
0538 }
0539 
0540 static void yenta_interrupt_wrapper(struct timer_list *t)
0541 {
0542     struct yenta_socket *socket = from_timer(socket, t, poll_timer);
0543 
0544     yenta_interrupt(0, (void *)socket);
0545     socket->poll_timer.expires = jiffies + HZ;
0546     add_timer(&socket->poll_timer);
0547 }
0548 
0549 static void yenta_clear_maps(struct yenta_socket *socket)
0550 {
0551     int i;
0552     struct resource res = { .start = 0, .end = 0x0fff };
0553     pccard_io_map io = { 0, 0, 0, 0, 1 };
0554     pccard_mem_map mem = { .res = &res, };
0555 
0556     yenta_set_socket(&socket->socket, &dead_socket);
0557     for (i = 0; i < 2; i++) {
0558         io.map = i;
0559         yenta_set_io_map(&socket->socket, &io);
0560     }
0561     for (i = 0; i < 5; i++) {
0562         mem.map = i;
0563         yenta_set_mem_map(&socket->socket, &mem);
0564     }
0565 }
0566 
0567 /* redoes voltage interrogation if required */
0568 static void yenta_interrogate(struct yenta_socket *socket)
0569 {
0570     u32 state;
0571 
0572     state = cb_readl(socket, CB_SOCKET_STATE);
0573     if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
0574         (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
0575         ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
0576         cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
0577 }
0578 
0579 /* Called at resume and initialization events */
0580 static int yenta_sock_init(struct pcmcia_socket *sock)
0581 {
0582     struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
0583 
0584     exca_writeb(socket, I365_GBLCTL, 0x00);
0585     exca_writeb(socket, I365_GENCTL, 0x00);
0586 
0587     /* Redo card voltage interrogation */
0588     yenta_interrogate(socket);
0589 
0590     yenta_clear_maps(socket);
0591 
0592     if (socket->type && socket->type->sock_init)
0593         socket->type->sock_init(socket);
0594 
0595     /* Re-enable CSC interrupts */
0596     cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
0597 
0598     return 0;
0599 }
0600 
0601 static int yenta_sock_suspend(struct pcmcia_socket *sock)
0602 {
0603     struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
0604 
0605     /* Disable CSC interrupts */
0606     cb_writel(socket, CB_SOCKET_MASK, 0x0);
0607 
0608     return 0;
0609 }
0610 
0611 /*
0612  * Use an adaptive allocation for the memory resource,
0613  * sometimes the memory behind pci bridges is limited:
0614  * 1/8 of the size of the io window of the parent.
0615  * max 4 MB, min 16 kB. We try very hard to not get below
0616  * the "ACC" values, though.
0617  */
0618 #define BRIDGE_MEM_MAX (4*1024*1024)
0619 #define BRIDGE_MEM_ACC (128*1024)
0620 #define BRIDGE_MEM_MIN (16*1024)
0621 
0622 #define BRIDGE_IO_MAX 512
0623 #define BRIDGE_IO_ACC 256
0624 #define BRIDGE_IO_MIN 32
0625 
0626 #ifndef PCIBIOS_MIN_CARDBUS_IO
0627 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
0628 #endif
0629 
0630 static int yenta_search_one_res(struct resource *root, struct resource *res,
0631                 u32 min)
0632 {
0633     u32 align, size, start, end;
0634 
0635     if (res->flags & IORESOURCE_IO) {
0636         align = 1024;
0637         size = BRIDGE_IO_MAX;
0638         start = PCIBIOS_MIN_CARDBUS_IO;
0639         end = ~0U;
0640     } else {
0641         unsigned long avail = root->end - root->start;
0642         int i;
0643         size = BRIDGE_MEM_MAX;
0644         if (size > avail/8) {
0645             size = (avail+1)/8;
0646             /* round size down to next power of 2 */
0647             i = 0;
0648             while ((size /= 2) != 0)
0649                 i++;
0650             size = 1 << i;
0651         }
0652         if (size < min)
0653             size = min;
0654         align = size;
0655         start = PCIBIOS_MIN_MEM;
0656         end = ~0U;
0657     }
0658 
0659     do {
0660         if (allocate_resource(root, res, size, start, end, align,
0661                       NULL, NULL) == 0) {
0662             return 1;
0663         }
0664         size = size/2;
0665         align = size;
0666     } while (size >= min);
0667 
0668     return 0;
0669 }
0670 
0671 
0672 static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
0673                 u32 min)
0674 {
0675     struct resource *root;
0676     int i;
0677 
0678     pci_bus_for_each_resource(socket->dev->bus, root, i) {
0679         if (!root)
0680             continue;
0681 
0682         if ((res->flags ^ root->flags) &
0683             (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
0684             continue; /* Wrong type */
0685 
0686         if (yenta_search_one_res(root, res, min))
0687             return 1;
0688     }
0689     return 0;
0690 }
0691 
0692 static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
0693 {
0694     struct pci_dev *dev = socket->dev;
0695     struct resource *res;
0696     struct pci_bus_region region;
0697     unsigned mask;
0698 
0699     res = &dev->resource[nr];
0700     /* Already allocated? */
0701     if (res->parent)
0702         return 0;
0703 
0704     /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
0705     mask = ~0xfff;
0706     if (type & IORESOURCE_IO)
0707         mask = ~3;
0708 
0709     res->name = dev->subordinate->name;
0710     res->flags = type;
0711 
0712     region.start = config_readl(socket, addr_start) & mask;
0713     region.end = config_readl(socket, addr_end) | ~mask;
0714     if (region.start && region.end > region.start && !override_bios) {
0715         pcibios_bus_to_resource(dev->bus, res, &region);
0716         if (pci_claim_resource(dev, nr) == 0)
0717             return 0;
0718         dev_info(&dev->dev,
0719              "Preassigned resource %d busy or not available, reconfiguring...\n",
0720              nr);
0721     }
0722 
0723     if (type & IORESOURCE_IO) {
0724         if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
0725             (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
0726             (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
0727             return 1;
0728     } else {
0729         if (type & IORESOURCE_PREFETCH) {
0730             if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
0731                 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
0732                 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
0733                 return 1;
0734             /* Approximating prefetchable by non-prefetchable */
0735             res->flags = IORESOURCE_MEM;
0736         }
0737         if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
0738             (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
0739             (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
0740             return 1;
0741     }
0742 
0743     dev_info(&dev->dev,
0744          "no resource of type %x available, trying to continue...\n",
0745          type);
0746     res->start = res->end = res->flags = 0;
0747     return 0;
0748 }
0749 
0750 static void yenta_free_res(struct yenta_socket *socket, int nr)
0751 {
0752     struct pci_dev *dev = socket->dev;
0753     struct resource *res;
0754 
0755     res = &dev->resource[nr];
0756     if (res->start != 0 && res->end != 0)
0757         release_resource(res);
0758 
0759     res->start = res->end = res->flags = 0;
0760 }
0761 
0762 /*
0763  * Allocate the bridge mappings for the device..
0764  */
0765 static void yenta_allocate_resources(struct yenta_socket *socket)
0766 {
0767     int program = 0;
0768     program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW,
0769                IORESOURCE_IO,
0770                PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
0771     program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW,
0772                IORESOURCE_IO,
0773                PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
0774     program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW,
0775                IORESOURCE_MEM | IORESOURCE_PREFETCH,
0776                PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
0777     program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW,
0778                IORESOURCE_MEM,
0779                PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
0780     if (program)
0781         pci_setup_cardbus(socket->dev->subordinate);
0782 }
0783 
0784 
0785 /*
0786  * Free the bridge mappings for the device..
0787  */
0788 static void yenta_free_resources(struct yenta_socket *socket)
0789 {
0790     yenta_free_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW);
0791     yenta_free_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW);
0792     yenta_free_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW);
0793     yenta_free_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW);
0794 }
0795 
0796 
0797 /*
0798  * Close it down - release our resources and go home..
0799  */
0800 static void yenta_close(struct pci_dev *dev)
0801 {
0802     struct yenta_socket *sock = pci_get_drvdata(dev);
0803 
0804     /* Remove the register attributes */
0805     device_remove_file(&dev->dev, &dev_attr_yenta_registers);
0806 
0807     /* we don't want a dying socket registered */
0808     pcmcia_unregister_socket(&sock->socket);
0809 
0810     /* Disable all events so we don't die in an IRQ storm */
0811     cb_writel(sock, CB_SOCKET_MASK, 0x0);
0812     exca_writeb(sock, I365_CSCINT, 0);
0813 
0814     if (sock->cb_irq)
0815         free_irq(sock->cb_irq, sock);
0816     else
0817         del_timer_sync(&sock->poll_timer);
0818 
0819     iounmap(sock->base);
0820     yenta_free_resources(sock);
0821 
0822     pci_release_regions(dev);
0823     pci_disable_device(dev);
0824     pci_set_drvdata(dev, NULL);
0825     kfree(sock);
0826 }
0827 
0828 
0829 static struct pccard_operations yenta_socket_operations = {
0830     .init           = yenta_sock_init,
0831     .suspend        = yenta_sock_suspend,
0832     .get_status     = yenta_get_status,
0833     .set_socket     = yenta_set_socket,
0834     .set_io_map     = yenta_set_io_map,
0835     .set_mem_map        = yenta_set_mem_map,
0836 };
0837 
0838 
0839 #ifdef CONFIG_YENTA_TI
0840 #include "ti113x.h"
0841 #endif
0842 #ifdef CONFIG_YENTA_RICOH
0843 #include "ricoh.h"
0844 #endif
0845 #ifdef CONFIG_YENTA_TOSHIBA
0846 #include "topic.h"
0847 #endif
0848 #ifdef CONFIG_YENTA_O2
0849 #include "o2micro.h"
0850 #endif
0851 
0852 enum {
0853     CARDBUS_TYPE_DEFAULT = -1,
0854     CARDBUS_TYPE_TI,
0855     CARDBUS_TYPE_TI113X,
0856     CARDBUS_TYPE_TI12XX,
0857     CARDBUS_TYPE_TI1250,
0858     CARDBUS_TYPE_RICOH,
0859     CARDBUS_TYPE_TOPIC95,
0860     CARDBUS_TYPE_TOPIC97,
0861     CARDBUS_TYPE_O2MICRO,
0862     CARDBUS_TYPE_ENE,
0863 };
0864 
0865 /*
0866  * Different cardbus controllers have slightly different
0867  * initialization sequences etc details. List them here..
0868  */
0869 static struct cardbus_type cardbus_type[] = {
0870 #ifdef CONFIG_YENTA_TI
0871     [CARDBUS_TYPE_TI]   = {
0872         .override   = ti_override,
0873         .save_state = ti_save_state,
0874         .restore_state  = ti_restore_state,
0875         .sock_init  = ti_init,
0876     },
0877     [CARDBUS_TYPE_TI113X]   = {
0878         .override   = ti113x_override,
0879         .save_state = ti_save_state,
0880         .restore_state  = ti_restore_state,
0881         .sock_init  = ti_init,
0882     },
0883     [CARDBUS_TYPE_TI12XX]   = {
0884         .override   = ti12xx_override,
0885         .save_state = ti_save_state,
0886         .restore_state  = ti_restore_state,
0887         .sock_init  = ti_init,
0888     },
0889     [CARDBUS_TYPE_TI1250]   = {
0890         .override   = ti1250_override,
0891         .save_state = ti_save_state,
0892         .restore_state  = ti_restore_state,
0893         .sock_init  = ti_init,
0894     },
0895     [CARDBUS_TYPE_ENE]  = {
0896         .override   = ene_override,
0897         .save_state = ti_save_state,
0898         .restore_state  = ti_restore_state,
0899         .sock_init  = ti_init,
0900     },
0901 #endif
0902 #ifdef CONFIG_YENTA_RICOH
0903     [CARDBUS_TYPE_RICOH]    = {
0904         .override   = ricoh_override,
0905         .save_state = ricoh_save_state,
0906         .restore_state  = ricoh_restore_state,
0907     },
0908 #endif
0909 #ifdef CONFIG_YENTA_TOSHIBA
0910     [CARDBUS_TYPE_TOPIC95]  = {
0911         .override   = topic95_override,
0912     },
0913     [CARDBUS_TYPE_TOPIC97]  = {
0914         .override   = topic97_override,
0915     },
0916 #endif
0917 #ifdef CONFIG_YENTA_O2
0918     [CARDBUS_TYPE_O2MICRO]  = {
0919         .override   = o2micro_override,
0920         .restore_state  = o2micro_restore_state,
0921     },
0922 #endif
0923 };
0924 
0925 
0926 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
0927 {
0928     int i;
0929     unsigned long val;
0930     u32 mask;
0931     u8 reg;
0932 
0933     /*
0934      * Probe for usable interrupts using the force
0935      * register to generate bogus card status events.
0936      */
0937     cb_writel(socket, CB_SOCKET_EVENT, -1);
0938     cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
0939     reg = exca_readb(socket, I365_CSCINT);
0940     exca_writeb(socket, I365_CSCINT, 0);
0941     val = probe_irq_on() & isa_irq_mask;
0942     for (i = 1; i < 16; i++) {
0943         if (!((val >> i) & 1))
0944             continue;
0945         exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
0946         cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
0947         udelay(100);
0948         cb_writel(socket, CB_SOCKET_EVENT, -1);
0949     }
0950     cb_writel(socket, CB_SOCKET_MASK, 0);
0951     exca_writeb(socket, I365_CSCINT, reg);
0952 
0953     mask = probe_irq_mask(val) & 0xffff;
0954 
0955     return mask;
0956 }
0957 
0958 
0959 /*
0960  * yenta PCI irq probing.
0961  * currently only used in the TI/EnE initialization code
0962  */
0963 #ifdef CONFIG_YENTA_TI
0964 
0965 /* interrupt handler, only used during probing */
0966 static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
0967 {
0968     struct yenta_socket *socket = (struct yenta_socket *) dev_id;
0969     u8 csc;
0970     u32 cb_event;
0971 
0972     /* Clear interrupt status for the event */
0973     cb_event = cb_readl(socket, CB_SOCKET_EVENT);
0974     cb_writel(socket, CB_SOCKET_EVENT, -1);
0975     csc = exca_readb(socket, I365_CSC);
0976 
0977     if (cb_event || csc) {
0978         socket->probe_status = 1;
0979         return IRQ_HANDLED;
0980     }
0981 
0982     return IRQ_NONE;
0983 }
0984 
0985 /* probes the PCI interrupt, use only on override functions */
0986 static int yenta_probe_cb_irq(struct yenta_socket *socket)
0987 {
0988     u8 reg = 0;
0989 
0990     if (!socket->cb_irq)
0991         return -1;
0992 
0993     socket->probe_status = 0;
0994 
0995     if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
0996         dev_warn(&socket->dev->dev,
0997              "request_irq() in yenta_probe_cb_irq() failed!\n");
0998         return -1;
0999     }
1000 
1001     /* generate interrupt, wait */
1002     if (!socket->dev->irq)
1003         reg = exca_readb(socket, I365_CSCINT);
1004     exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
1005     cb_writel(socket, CB_SOCKET_EVENT, -1);
1006     cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
1007     cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
1008 
1009     msleep(100);
1010 
1011     /* disable interrupts */
1012     cb_writel(socket, CB_SOCKET_MASK, 0);
1013     exca_writeb(socket, I365_CSCINT, reg);
1014     cb_writel(socket, CB_SOCKET_EVENT, -1);
1015     exca_readb(socket, I365_CSC);
1016 
1017     free_irq(socket->cb_irq, socket);
1018 
1019     return (int) socket->probe_status;
1020 }
1021 
1022 #endif /* CONFIG_YENTA_TI */
1023 
1024 
1025 /*
1026  * Set static data that doesn't need re-initializing..
1027  */
1028 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
1029 {
1030     socket->socket.pci_irq = socket->cb_irq;
1031     if (isa_probe)
1032         socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
1033     else
1034         socket->socket.irq_mask = 0;
1035 
1036     dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
1037          socket->socket.irq_mask, socket->cb_irq);
1038 }
1039 
1040 /*
1041  * Initialize the standard cardbus registers
1042  */
1043 static void yenta_config_init(struct yenta_socket *socket)
1044 {
1045     u16 bridge;
1046     struct pci_dev *dev = socket->dev;
1047     struct pci_bus_region region;
1048 
1049     pcibios_resource_to_bus(socket->dev->bus, &region, &dev->resource[0]);
1050 
1051     config_writel(socket, CB_LEGACY_MODE_BASE, 0);
1052     config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1053     config_writew(socket, PCI_COMMAND,
1054             PCI_COMMAND_IO |
1055             PCI_COMMAND_MEMORY |
1056             PCI_COMMAND_MASTER |
1057             PCI_COMMAND_WAIT);
1058 
1059     /* MAGIC NUMBERS! Fixme */
1060     config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1061     config_writeb(socket, PCI_LATENCY_TIMER, 168);
1062     config_writel(socket, PCI_PRIMARY_BUS,
1063         (176 << 24) |              /* sec. latency timer */
1064         ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */
1065         ((unsigned int)dev->subordinate->busn_res.start << 8) |  /* secondary bus */
1066         dev->subordinate->primary);        /* primary bus */
1067 
1068     /*
1069      * Set up the bridging state:
1070      *  - enable write posting.
1071      *  - memory window 0 prefetchable, window 1 non-prefetchable
1072      *  - PCI interrupts enabled if a PCI interrupt exists..
1073      */
1074     bridge = config_readw(socket, CB_BRIDGE_CONTROL);
1075     bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1076     bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1077     config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1078 }
1079 
1080 /**
1081  * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
1082  * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
1083  *
1084  * Checks if devices on the bus which the CardBus bridge bridges to would be
1085  * invisible during PCI scans because of a misconfigured subordinate number
1086  * of the parent brige - some BIOSes seem to be too lazy to set it right.
1087  * Does the fixup carefully by checking how far it can go without conflicts.
1088  * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
1089  */
1090 static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1091 {
1092     struct pci_bus *sibling;
1093     unsigned char upper_limit;
1094     /*
1095      * We only check and fix the parent bridge: All systems which need
1096      * this fixup that have been reviewed are laptops and the only bridge
1097      * which needed fixing was the parent bridge of the CardBus bridge:
1098      */
1099     struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1100 
1101     /* Check bus numbers are already set up correctly: */
1102     if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end)
1103         return; /* The subordinate number is ok, nothing to do */
1104 
1105     if (!bridge_to_fix->parent)
1106         return; /* Root bridges are ok */
1107 
1108     /* stay within the limits of the bus range of the parent: */
1109     upper_limit = bridge_to_fix->parent->busn_res.end;
1110 
1111     /* check the bus ranges of all sibling bridges to prevent overlap */
1112     list_for_each_entry(sibling, &bridge_to_fix->parent->children,
1113             node) {
1114         /*
1115          * If the sibling has a higher secondary bus number
1116          * and it's secondary is equal or smaller than our
1117          * current upper limit, set the new upper limit to
1118          * the bus number below the sibling's range:
1119          */
1120         if (sibling->busn_res.start > bridge_to_fix->busn_res.end
1121             && sibling->busn_res.start <= upper_limit)
1122             upper_limit = sibling->busn_res.start - 1;
1123     }
1124 
1125     /* Show that the wanted subordinate number is not possible: */
1126     if (cardbus_bridge->busn_res.end > upper_limit)
1127         dev_warn(&cardbus_bridge->dev,
1128              "Upper limit for fixing this bridge's parent bridge: #%02x\n",
1129              upper_limit);
1130 
1131     /* If we have room to increase the bridge's subordinate number, */
1132     if (bridge_to_fix->busn_res.end < upper_limit) {
1133 
1134         /* use the highest number of the hidden bus, within limits */
1135         unsigned char subordinate_to_assign =
1136             min_t(int, cardbus_bridge->busn_res.end, upper_limit);
1137 
1138         dev_info(&bridge_to_fix->dev,
1139              "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n",
1140              bridge_to_fix->number,
1141              (int)bridge_to_fix->busn_res.end,
1142              subordinate_to_assign);
1143 
1144         /* Save the new subordinate in the bus struct of the bridge */
1145         bridge_to_fix->busn_res.end = subordinate_to_assign;
1146 
1147         /* and update the PCI config space with the new subordinate */
1148         pci_write_config_byte(bridge_to_fix->self,
1149             PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end);
1150     }
1151 }
1152 
1153 /*
1154  * Initialize a cardbus controller. Make sure we have a usable
1155  * interrupt, and that we can map the cardbus area. Fill in the
1156  * socket information structure..
1157  */
1158 static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
1159 {
1160     struct yenta_socket *socket;
1161     int ret;
1162 
1163     /*
1164      * If we failed to assign proper bus numbers for this cardbus
1165      * controller during PCI probe, its subordinate pci_bus is NULL.
1166      * Bail out if so.
1167      */
1168     if (!dev->subordinate) {
1169         dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n");
1170         return -ENODEV;
1171     }
1172 
1173     socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1174     if (!socket)
1175         return -ENOMEM;
1176 
1177     /* prepare pcmcia_socket */
1178     socket->socket.ops = &yenta_socket_operations;
1179     socket->socket.resource_ops = &pccard_nonstatic_ops;
1180     socket->socket.dev.parent = &dev->dev;
1181     socket->socket.driver_data = socket;
1182     socket->socket.owner = THIS_MODULE;
1183     socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1184     socket->socket.map_size = 0x1000;
1185     socket->socket.cb_dev = dev;
1186 
1187     /* prepare struct yenta_socket */
1188     socket->dev = dev;
1189     pci_set_drvdata(dev, socket);
1190 
1191     /*
1192      * Do some basic sanity checking..
1193      */
1194     if (pci_enable_device(dev)) {
1195         ret = -EBUSY;
1196         goto free;
1197     }
1198 
1199     ret = pci_request_regions(dev, "yenta_socket");
1200     if (ret)
1201         goto disable;
1202 
1203     if (!pci_resource_start(dev, 0)) {
1204         dev_err(&dev->dev, "No cardbus resource!\n");
1205         ret = -ENODEV;
1206         goto release;
1207     }
1208 
1209     /*
1210      * Ok, start setup.. Map the cardbus registers,
1211      * and request the IRQ.
1212      */
1213     socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1214     if (!socket->base) {
1215         ret = -ENOMEM;
1216         goto release;
1217     }
1218 
1219     /*
1220      * report the subsystem vendor and device for help debugging
1221      * the irq stuff...
1222      */
1223     dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n",
1224          dev->subsystem_vendor, dev->subsystem_device);
1225 
1226     yenta_config_init(socket);
1227 
1228     /* Disable all events */
1229     cb_writel(socket, CB_SOCKET_MASK, 0x0);
1230 
1231     /* Set up the bridge regions.. */
1232     yenta_allocate_resources(socket);
1233 
1234     socket->cb_irq = dev->irq;
1235 
1236     /* Do we have special options for the device? */
1237     if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1238         id->driver_data < ARRAY_SIZE(cardbus_type)) {
1239         socket->type = &cardbus_type[id->driver_data];
1240 
1241         ret = socket->type->override(socket);
1242         if (ret < 0)
1243             goto unmap;
1244     }
1245 
1246     /* We must finish initialization here */
1247 
1248     if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1249         /* No IRQ or request_irq failed. Poll */
1250         socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1251         timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0);
1252         mod_timer(&socket->poll_timer, jiffies + HZ);
1253         dev_info(&dev->dev,
1254              "no PCI IRQ, CardBus support disabled for this socket.\n");
1255         dev_info(&dev->dev,
1256              "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
1257     } else {
1258         socket->socket.features |= SS_CAP_CARDBUS;
1259     }
1260 
1261     /* Figure out what the dang thing can do for the PCMCIA layer... */
1262     yenta_interrogate(socket);
1263     yenta_get_socket_capabilities(socket, isa_interrupts);
1264     dev_info(&dev->dev, "Socket status: %08x\n",
1265          cb_readl(socket, CB_SOCKET_STATE));
1266 
1267     yenta_fixup_parent_bridge(dev->subordinate);
1268 
1269     /* Register it with the pcmcia layer.. */
1270     ret = pcmcia_register_socket(&socket->socket);
1271     if (ret)
1272         goto free_irq;
1273 
1274     /* Add the yenta register attributes */
1275     ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1276     if (ret)
1277         goto unregister_socket;
1278 
1279     return ret;
1280 
1281     /* error path... */
1282  unregister_socket:
1283     pcmcia_unregister_socket(&socket->socket);
1284  free_irq:
1285     if (socket->cb_irq)
1286         free_irq(socket->cb_irq, socket);
1287     else
1288         del_timer_sync(&socket->poll_timer);
1289  unmap:
1290     iounmap(socket->base);
1291     yenta_free_resources(socket);
1292  release:
1293     pci_release_regions(dev);
1294  disable:
1295     pci_disable_device(dev);
1296  free:
1297     pci_set_drvdata(dev, NULL);
1298     kfree(socket);
1299     return ret;
1300 }
1301 
1302 #ifdef CONFIG_PM_SLEEP
1303 static int yenta_dev_suspend_noirq(struct device *dev)
1304 {
1305     struct pci_dev *pdev = to_pci_dev(dev);
1306     struct yenta_socket *socket = pci_get_drvdata(pdev);
1307 
1308     if (!socket)
1309         return 0;
1310 
1311     if (socket->type && socket->type->save_state)
1312         socket->type->save_state(socket);
1313 
1314     pci_save_state(pdev);
1315     pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
1316     pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
1317     pci_disable_device(pdev);
1318 
1319     return 0;
1320 }
1321 
1322 static int yenta_dev_resume_noirq(struct device *dev)
1323 {
1324     struct pci_dev *pdev = to_pci_dev(dev);
1325     struct yenta_socket *socket = pci_get_drvdata(pdev);
1326     int ret;
1327 
1328     if (!socket)
1329         return 0;
1330 
1331     pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
1332     pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
1333 
1334     ret = pci_enable_device(pdev);
1335     if (ret)
1336         return ret;
1337 
1338     pci_set_master(pdev);
1339 
1340     if (socket->type && socket->type->restore_state)
1341         socket->type->restore_state(socket);
1342 
1343     return 0;
1344 }
1345 
1346 static const struct dev_pm_ops yenta_pm_ops = {
1347     SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(yenta_dev_suspend_noirq, yenta_dev_resume_noirq)
1348 };
1349 
1350 #define YENTA_PM_OPS    (&yenta_pm_ops)
1351 #else
1352 #define YENTA_PM_OPS    NULL
1353 #endif
1354 
1355 #define CB_ID(vend, dev, type)              \
1356     {                       \
1357         .vendor     = vend,         \
1358         .device     = dev,          \
1359         .subvendor  = PCI_ANY_ID,       \
1360         .subdevice  = PCI_ANY_ID,       \
1361         .class      = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1362         .class_mask = ~0,           \
1363         .driver_data    = CARDBUS_TYPE_##type,  \
1364     }
1365 
1366 static const struct pci_device_id yenta_table[] = {
1367     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1368 
1369     /*
1370      * TBD: Check if these TI variants can use more
1371      * advanced overrides instead.  (I can't get the
1372      * data sheets for these devices. --rmk)
1373      */
1374 #ifdef CONFIG_YENTA_TI
1375     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1376 
1377     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1378     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1379 
1380     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1381     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1382     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1383     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1384     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1385     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1386     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1387     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1388     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1389     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1390     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1391     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1392     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1393     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1394     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1395     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1396     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1397 
1398     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1399     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1400 
1401     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1402     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
1403     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
1404     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1405     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1406     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1407     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1408     CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1409 
1410     CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
1411     CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
1412     CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
1413     CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
1414     CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1415     CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1416     CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1417     CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
1418 #endif /* CONFIG_YENTA_TI */
1419 
1420 #ifdef CONFIG_YENTA_RICOH
1421     CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1422     CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1423     CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1424     CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1425     CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1426 #endif
1427 
1428 #ifdef CONFIG_YENTA_TOSHIBA
1429     CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1430     CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1431     CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1432 #endif
1433 
1434 #ifdef CONFIG_YENTA_O2
1435     CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1436 #endif
1437 
1438     /* match any cardbus bridge */
1439     CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1440     { /* all zeroes */ }
1441 };
1442 MODULE_DEVICE_TABLE(pci, yenta_table);
1443 
1444 
1445 static struct pci_driver yenta_cardbus_driver = {
1446     .name       = "yenta_cardbus",
1447     .id_table   = yenta_table,
1448     .probe      = yenta_probe,
1449     .remove     = yenta_close,
1450     .driver.pm  = YENTA_PM_OPS,
1451 };
1452 
1453 module_pci_driver(yenta_cardbus_driver);
1454 
1455 MODULE_LICENSE("GPL");
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