drivers/pcmcia/topic.h

0001 /*
0002  * topic.h 1.8 1999/08/28 04:01:47
0003  *
0004  * The contents of this file are subject to the Mozilla Public License
0005  * Version 1.1 (the "License"); you may not use this file except in
0006  * compliance with the License. You may obtain a copy of the License
0007  * at http://www.mozilla.org/MPL/
0008  *
0009  * Software distributed under the License is distributed on an "AS IS"
0010  * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
0011  * the License for the specific language governing rights and
0012  * limitations under the License.
0013  *
0014  * The initial developer of the original code is David A. Hinds
0015  * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
0016  * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
0017  *
0018  * Alternatively, the contents of this file may be used under the
0019  * terms of the GNU General Public License version 2 (the "GPL"), in which
0020  * case the provisions of the GPL are applicable instead of the
0021  * above.  If you wish to allow the use of your version of this file
0022  * only under the terms of the GPL and not to allow others to use
0023  * your version of this file under the MPL, indicate your decision by
0024  * deleting the provisions above and replace them with the notice and
0025  * other provisions required by the GPL.  If you do not delete the
0026  * provisions above, a recipient may use your version of this file
0027  * under either the MPL or the GPL.
0028  * topic.h $Release$ 1999/08/28 04:01:47
0029  */
0030
0031 #ifndef _LINUX_TOPIC_H
0032 #define _LINUX_TOPIC_H
0033
0034 /* Register definitions for Toshiba ToPIC95/97/100 controllers */
0035
0036 #define TOPIC_SOCKET_CONTROL        0x0090  /* 32 bit */
0037 #define  TOPIC_SCR_IRQSEL       0x00000001
0038
0039 #define TOPIC_SLOT_CONTROL      0x00a0  /* 8 bit */
0040 #define  TOPIC_SLOT_SLOTON      0x80
0041 #define  TOPIC_SLOT_SLOTEN      0x40
0042 #define  TOPIC_SLOT_ID_LOCK     0x20
0043 #define  TOPIC_SLOT_ID_WP       0x10
0044 #define  TOPIC_SLOT_PORT_MASK       0x0c
0045 #define  TOPIC_SLOT_PORT_SHIFT      2
0046 #define  TOPIC_SLOT_OFS_MASK        0x03
0047
0048 #define TOPIC_CARD_CONTROL      0x00a1  /* 8 bit */
0049 #define  TOPIC_CCR_INTB         0x20
0050 #define  TOPIC_CCR_INTA         0x10
0051 #define  TOPIC_CCR_CLOCK        0x0c
0052 #define  TOPIC_CCR_PCICLK       0x0c
0053 #define  TOPIC_CCR_PCICLK_2     0x08
0054 #define  TOPIC_CCR_CCLK         0x04
0055
0056 #define TOPIC97_INT_CONTROL     0x00a1  /* 8 bit */
0057 #define  TOPIC97_ICR_INTB       0x20
0058 #define  TOPIC97_ICR_INTA       0x10
0059 #define  TOPIC97_ICR_STSIRQNP       0x04
0060 #define  TOPIC97_ICR_IRQNP      0x02
0061 #define  TOPIC97_ICR_IRQSEL     0x01
0062
0063 #define TOPIC_CARD_DETECT       0x00a3  /* 8 bit */
0064 #define  TOPIC_CDR_MODE_PC32        0x80
0065 #define  TOPIC_CDR_VS1          0x04
0066 #define  TOPIC_CDR_VS2          0x02
0067 #define  TOPIC_CDR_SW_DETECT        0x01
0068
0069 #define TOPIC_REGISTER_CONTROL      0x00a4  /* 32 bit */
0070 #define  TOPIC_RCR_RESUME_RESET     0x80000000
0071 #define  TOPIC_RCR_REMOVE_RESET     0x40000000
0072 #define  TOPIC97_RCR_CLKRUN_ENA     0x20000000
0073 #define  TOPIC97_RCR_TESTMODE       0x10000000
0074 #define  TOPIC97_RCR_IOPLUP     0x08000000
0075 #define  TOPIC_RCR_BUFOFF_PWROFF    0x02000000
0076 #define  TOPIC_RCR_BUFOFF_SIGOFF    0x01000000
0077 #define  TOPIC97_RCR_CB_DEV_MASK    0x0000f800
0078 #define  TOPIC97_RCR_CB_DEV_SHIFT   11
0079 #define  TOPIC97_RCR_RI_DISABLE     0x00000004
0080 #define  TOPIC97_RCR_CAUDIO_OFF     0x00000002
0081 #define  TOPIC_RCR_CAUDIO_INVERT    0x00000001
0082
0083 #define TOPIC97_MISC1           0x00ad  /* 8bit */
0084 #define  TOPIC97_MISC1_CLOCKRUN_ENABLE  0x80
0085 #define  TOPIC97_MISC1_CLOCKRUN_MODE    0x40
0086 #define  TOPIC97_MISC1_DETECT_REQ_ENA   0x10
0087 #define  TOPIC97_MISC1_SCK_CLEAR_DIS    0x04
0088 #define  TOPIC97_MISC1_R2_LOW_ENABLE    0x10
0089
0090 #define TOPIC97_MISC2           0x00ae  /* 8 bit */
0091 #define  TOPIC97_MISC2_SPWRCLK_MASK 0x70
0092 #define  TOPIC97_MISC2_SPWRMOD      0x08
0093 #define  TOPIC97_MISC2_SPWR_ENABLE  0x04
0094 #define  TOPIC97_MISC2_ZV_MODE      0x02
0095 #define  TOPIC97_MISC2_ZV_ENABLE    0x01
0096
0097 #define TOPIC97_ZOOM_VIDEO_CONTROL  0x009c  /* 8 bit */
0098 #define  TOPIC97_ZV_CONTROL_ENABLE  0x01
0099
0100 #define TOPIC97_AUDIO_VIDEO_SWITCH  0x003c  /* 8 bit */
0101 #define  TOPIC97_AVS_AUDIO_CONTROL  0x02
0102 #define  TOPIC97_AVS_VIDEO_CONTROL  0x01
0103
0104 #define TOPIC_EXCA_IF_CONTROL       0x3e    /* 8 bit */
0105 #define TOPIC_EXCA_IFC_33V_ENA      0x01
0106
0107 #define TOPIC_PCI_CFG_PPBCN     0x3e    /* 16-bit */
0108 #define TOPIC_PCI_CFG_PPBCN_WBEN    0x0400
0109
0110 static void topic97_zoom_video(struct pcmcia_socket *sock, int onoff)
0111 {
0112     struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
0113     u8 reg_zv, reg;
0114
0115     reg_zv = config_readb(socket, TOPIC97_ZOOM_VIDEO_CONTROL);
0116     if (onoff) {
0117         reg_zv |= TOPIC97_ZV_CONTROL_ENABLE;
0118         config_writeb(socket, TOPIC97_ZOOM_VIDEO_CONTROL, reg_zv);
0119
0120         reg = config_readb(socket, TOPIC97_AUDIO_VIDEO_SWITCH);
0121         reg |= TOPIC97_AVS_AUDIO_CONTROL | TOPIC97_AVS_VIDEO_CONTROL;
0122         config_writeb(socket, TOPIC97_AUDIO_VIDEO_SWITCH, reg);
0123     } else {
0124         reg_zv &= ~TOPIC97_ZV_CONTROL_ENABLE;
0125         config_writeb(socket, TOPIC97_ZOOM_VIDEO_CONTROL, reg_zv);
0126
0127         reg = config_readb(socket, TOPIC97_AUDIO_VIDEO_SWITCH);
0128         reg &= ~(TOPIC97_AVS_AUDIO_CONTROL | TOPIC97_AVS_VIDEO_CONTROL);
0129         config_writeb(socket, TOPIC97_AUDIO_VIDEO_SWITCH, reg);
0130     }
0131 }
0132
0133 static int topic97_override(struct yenta_socket *socket)
0134 {
0135     /* ToPIC97/100 support ZV */
0136     socket->socket.zoom_video = topic97_zoom_video;
0137     return 0;
0138 }
0139
0140
0141 static int topic95_override(struct yenta_socket *socket)
0142 {
0143     u8 fctrl;
0144     u16 ppbcn;
0145
0146     /* enable 3.3V support for 16bit cards */
0147     fctrl = exca_readb(socket, TOPIC_EXCA_IF_CONTROL);
0148     exca_writeb(socket, TOPIC_EXCA_IF_CONTROL, fctrl | TOPIC_EXCA_IFC_33V_ENA);
0149
0150     /* tell yenta to use exca registers to power 16bit cards */
0151     socket->flags |= YENTA_16BIT_POWER_EXCA | YENTA_16BIT_POWER_DF;
0152
0153     /* Disable write buffers to prevent lockups under load with numerous
0154        Cardbus cards, observed on Tecra 500CDT and reported elsewhere on the
0155        net.  This is not a power-on default according to the datasheet
0156        but some BIOSes seem to set it. */
0157     if (pci_read_config_word(socket->dev, TOPIC_PCI_CFG_PPBCN, &ppbcn) == 0
0158         && socket->dev->revision <= 7
0159         && (ppbcn & TOPIC_PCI_CFG_PPBCN_WBEN)) {
0160         ppbcn &= ~TOPIC_PCI_CFG_PPBCN_WBEN;
0161         pci_write_config_word(socket->dev, TOPIC_PCI_CFG_PPBCN, ppbcn);
0162         dev_info(&socket->dev->dev, "Disabled ToPIC95 Cardbus write buffers.\n");
0163     }
0164
0165     return 0;
0166 }
0167
0168 #endif /* _LINUX_TOPIC_H */