drivers/pcmcia/soc_common.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * linux/drivers/pcmcia/soc_common.h
0004  *
0005  * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
0006  *
0007  * This file contains definitions for the PCMCIA support code common to
0008  * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
0009  */
0010 #ifndef _ASM_ARCH_PCMCIA
0011 #define _ASM_ARCH_PCMCIA
0012
0013 /* include the world */
0014 #include <linux/clk.h>
0015 #include <linux/cpufreq.h>
0016 #include <pcmcia/cistpl.h>
0017 #include <pcmcia/soc_common.h>
0018
0019 struct device;
0020 struct gpio_desc;
0021 struct pcmcia_low_level;
0022 struct regulator;
0023
0024 struct skt_dev_info {
0025     int nskt;
0026     struct soc_pcmcia_socket skt[];
0027 };
0028
0029 struct soc_pcmcia_timing {
0030     unsigned short io;
0031     unsigned short mem;
0032     unsigned short attr;
0033 };
0034
0035 extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
0036
0037 void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt,
0038     const struct pcmcia_low_level *ops, struct device *dev);
0039 void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
0040 int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
0041 int soc_pcmcia_request_gpiods(struct soc_pcmcia_socket *skt);
0042
0043 void soc_common_cf_socket_state(struct soc_pcmcia_socket *skt,
0044     struct pcmcia_state *state);
0045
0046 int soc_pcmcia_regulator_set(struct soc_pcmcia_socket *skt,
0047     struct soc_pcmcia_regulator *r, int v);
0048
0049 #ifdef CONFIG_PCMCIA_DEBUG
0050
0051 extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
0052                  int lvl, const char *fmt, ...);
0053
0054 #define debug(skt, lvl, fmt, arg...) \
0055     soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
0056
0057 #else
0058 #define debug(skt, lvl, fmt, arg...) do { } while (0)
0059 #endif
0060
0061
0062 /*
0063  * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
0064  * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
0065  * a minimum value of 165ns, as well. Section 4.7.2 (describing
0066  * common and attribute memory write timing) says that twWE has a
0067  * minimum value of 150ns for a 250ns cycle time (for 5V operation;
0068  * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
0069  * operation, also section 4.7.4). Section 4.7.3 says that taOE
0070  * has a maximum value of 150ns for a 300ns cycle time (for 5V
0071  * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
0072  *
0073  * When configuring memory maps, Card Services appears to adopt the policy
0074  * that a memory access time of "0" means "use the default." The default
0075  * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
0076  * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
0077  * memory command width time is 300ns.
0078  */
0079 #define SOC_PCMCIA_IO_ACCESS        (165)
0080 #define SOC_PCMCIA_5V_MEM_ACCESS    (150)
0081 #define SOC_PCMCIA_3V_MEM_ACCESS    (300)
0082 #define SOC_PCMCIA_ATTR_MEM_ACCESS  (300)
0083
0084 /*
0085  * The socket driver actually works nicely in interrupt-driven form,
0086  * so the (relatively infrequent) polling is "just to be sure."
0087  */
0088 #define SOC_PCMCIA_POLL_PERIOD    (2*HZ)
0089
0090
0091 /* I/O pins replacing memory pins
0092  * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
0093  *
0094  * These signals change meaning when going from memory-only to
0095  * memory-or-I/O interface:
0096  */
0097 #define iostschg bvd1
0098 #define iospkr   bvd2
0099
0100 #endif