drivers/pcmcia/pxa2xx_base.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*======================================================================
0003
0004   Device driver for the PCMCIA control functionality of PXA2xx
0005   microprocessors.
0006
0007
0008     (c) Ian Molton (spyro@f2s.com) 2003
0009     (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
0010
0011     derived from sa11xx_base.c
0012
0013      Portions created by John G. Dorsey are
0014      Copyright (C) 1999 John G. Dorsey.
0015
0016   ======================================================================*/
0017
0018 #include <linux/module.h>
0019 #include <linux/slab.h>
0020 #include <linux/init.h>
0021 #include <linux/cpufreq.h>
0022 #include <linux/ioport.h>
0023 #include <linux/kernel.h>
0024 #include <linux/spinlock.h>
0025 #include <linux/platform_device.h>
0026 #include <linux/soc/pxa/cpu.h>
0027 #include <linux/soc/pxa/smemc.h>
0028
0029 #include <asm/io.h>
0030 #include <asm/irq.h>
0031 #include <asm/mach-types.h>
0032
0033 #include <pcmcia/ss.h>
0034 #include <pcmcia/cistpl.h>
0035
0036 #include "soc_common.h"
0037 #include "pxa2xx_base.h"
0038
0039 /*
0040  * Personal Computer Memory Card International Association (PCMCIA) sockets
0041  */
0042
0043 #define PCMCIAPrtSp 0x04000000  /* PCMCIA Partition Space [byte]   */
0044 #define PCMCIASp    (4*PCMCIAPrtSp) /* PCMCIA Space [byte]             */
0045 #define PCMCIAIOSp  PCMCIAPrtSp /* PCMCIA I/O Space [byte]         */
0046 #define PCMCIAAttrSp    PCMCIAPrtSp /* PCMCIA Attribute Space [byte]   */
0047 #define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte]      */
0048
0049 #define PCMCIA0Sp   PCMCIASp    /* PCMCIA 0 Space [byte]           */
0050 #define PCMCIA0IOSp PCMCIAIOSp  /* PCMCIA 0 I/O Space [byte]       */
0051 #define PCMCIA0AttrSp   PCMCIAAttrSp    /* PCMCIA 0 Attribute Space [byte] */
0052 #define PCMCIA0MemSp    PCMCIAMemSp /* PCMCIA 0 Memory Space [byte]    */
0053
0054 #define PCMCIA1Sp   PCMCIASp    /* PCMCIA 1 Space [byte]           */
0055 #define PCMCIA1IOSp PCMCIAIOSp  /* PCMCIA 1 I/O Space [byte]       */
0056 #define PCMCIA1AttrSp   PCMCIAAttrSp    /* PCMCIA 1 Attribute Space [byte] */
0057 #define PCMCIA1MemSp    PCMCIAMemSp /* PCMCIA 1 Memory Space [byte]    */
0058
0059 #define _PCMCIA(Nb)         /* PCMCIA [0..1]                   */ \
0060             (0x20000000 + (Nb) * PCMCIASp)
0061 #define _PCMCIAIO(Nb)   _PCMCIA(Nb) /* PCMCIA I/O [0..1]               */
0062 #define _PCMCIAAttr(Nb)         /* PCMCIA Attribute [0..1]         */ \
0063             (_PCMCIA(Nb) + 2 * PCMCIAPrtSp)
0064 #define _PCMCIAMem(Nb)          /* PCMCIA Memory [0..1]            */ \
0065             (_PCMCIA(Nb) + 3 * PCMCIAPrtSp)
0066
0067 #define _PCMCIA0    _PCMCIA(0)  /* PCMCIA 0                        */
0068 #define _PCMCIA0IO  _PCMCIAIO(0)    /* PCMCIA 0 I/O                    */
0069 #define _PCMCIA0Attr    _PCMCIAAttr(0)  /* PCMCIA 0 Attribute              */
0070 #define _PCMCIA0Mem _PCMCIAMem(0)   /* PCMCIA 0 Memory                 */
0071
0072 #define _PCMCIA1    _PCMCIA(1)  /* PCMCIA 1                        */
0073 #define _PCMCIA1IO  _PCMCIAIO(1)    /* PCMCIA 1 I/O                    */
0074 #define _PCMCIA1Attr    _PCMCIAAttr(1)  /* PCMCIA 1 Attribute              */
0075 #define _PCMCIA1Mem _PCMCIAMem(1)   /* PCMCIA 1 Memory                 */
0076
0077
0078 #define MCXX_SETUP_MASK     (0x7f)
0079 #define MCXX_ASST_MASK      (0x1f)
0080 #define MCXX_HOLD_MASK      (0x3f)
0081 #define MCXX_SETUP_SHIFT    (0)
0082 #define MCXX_ASST_SHIFT     (7)
0083 #define MCXX_HOLD_SHIFT     (14)
0084
0085 static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
0086                      u_int mem_clk_10khz)
0087 {
0088     u_int code = pcmcia_cycle_ns * mem_clk_10khz;
0089     return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
0090 }
0091
0092 static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
0093                      u_int mem_clk_10khz)
0094 {
0095     u_int code = pcmcia_cycle_ns * mem_clk_10khz;
0096     return (code / 300000) + ((code % 300000) ? 1 : 0) + 1;
0097 }
0098
0099 static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
0100                       u_int mem_clk_10khz)
0101 {
0102     u_int code = pcmcia_cycle_ns * mem_clk_10khz;
0103     return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
0104 }
0105
0106 /* This function returns the (approximate) command assertion period, in
0107  * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
0108  */
0109 static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
0110                        u_int pcmcia_mcxx_asst)
0111 {
0112     return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
0113 }
0114
0115 static uint32_t pxa2xx_pcmcia_mcmem(int sock, int speed, int clock)
0116 {
0117     uint32_t val;
0118
0119     val = ((pxa2xx_mcxx_setup(speed, clock)
0120         & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
0121         | ((pxa2xx_mcxx_asst(speed, clock)
0122         & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
0123         | ((pxa2xx_mcxx_hold(speed, clock)
0124         & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
0125
0126     return val;
0127 }
0128
0129 static int pxa2xx_pcmcia_mcio(int sock, int speed, int clock)
0130 {
0131     uint32_t val;
0132
0133     val = ((pxa2xx_mcxx_setup(speed, clock)
0134         & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
0135         | ((pxa2xx_mcxx_asst(speed, clock)
0136         & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
0137         | ((pxa2xx_mcxx_hold(speed, clock)
0138         & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
0139
0140
0141     return val;
0142 }
0143
0144 static int pxa2xx_pcmcia_mcatt(int sock, int speed, int clock)
0145 {
0146     uint32_t val;
0147
0148     val = ((pxa2xx_mcxx_setup(speed, clock)
0149         & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
0150         | ((pxa2xx_mcxx_asst(speed, clock)
0151         & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
0152         | ((pxa2xx_mcxx_hold(speed, clock)
0153         & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
0154
0155
0156     return val;
0157 }
0158
0159 static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
0160 {
0161     unsigned long clk = clk_get_rate(skt->clk) / 10000;
0162     struct soc_pcmcia_timing timing;
0163     int sock = skt->nr;
0164
0165     soc_common_pcmcia_get_timing(skt, &timing);
0166
0167     pxa_smemc_set_pcmcia_timing(sock,
0168         pxa2xx_pcmcia_mcmem(sock, timing.mem, clk),
0169         pxa2xx_pcmcia_mcatt(sock, timing.attr, clk),
0170         pxa2xx_pcmcia_mcio(sock, timing.io, clk));
0171
0172     return 0;
0173 }
0174
0175 #ifdef CONFIG_CPU_FREQ
0176
0177 static int
0178 pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
0179                    unsigned long val,
0180                    struct cpufreq_freqs *freqs)
0181 {
0182     switch (val) {
0183     case CPUFREQ_PRECHANGE:
0184         if (freqs->new > freqs->old) {
0185             debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
0186                    "pre-updating\n",
0187                    freqs->new / 1000, (freqs->new / 100) % 10,
0188                    freqs->old / 1000, (freqs->old / 100) % 10);
0189             pxa2xx_pcmcia_set_timing(skt);
0190         }
0191         break;
0192
0193     case CPUFREQ_POSTCHANGE:
0194         if (freqs->new < freqs->old) {
0195             debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
0196                    "post-updating\n",
0197                    freqs->new / 1000, (freqs->new / 100) % 10,
0198                    freqs->old / 1000, (freqs->old / 100) % 10);
0199             pxa2xx_pcmcia_set_timing(skt);
0200         }
0201         break;
0202     }
0203     return 0;
0204 }
0205 #endif
0206
0207 void pxa2xx_configure_sockets(struct device *dev, struct pcmcia_low_level *ops)
0208 {
0209     int nr = 1;
0210
0211     if ((ops->first + ops->nr) > 1 ||
0212         machine_is_viper() || machine_is_arcom_zeus())
0213         nr = 2;
0214
0215     pxa_smemc_set_pcmcia_socket(nr);
0216 }
0217 EXPORT_SYMBOL(pxa2xx_configure_sockets);
0218
0219 static const char *skt_names[] = {
0220     "PCMCIA socket 0",
0221     "PCMCIA socket 1",
0222 };
0223
0224 #define SKT_DEV_INFO_SIZE(n) \
0225     (sizeof(struct skt_dev_info) + (n)*sizeof(struct soc_pcmcia_socket))
0226
0227 int pxa2xx_drv_pcmcia_add_one(struct soc_pcmcia_socket *skt)
0228 {
0229     skt->res_skt.start = _PCMCIA(skt->nr);
0230     skt->res_skt.end = _PCMCIA(skt->nr) + PCMCIASp - 1;
0231     skt->res_skt.name = skt_names[skt->nr];
0232     skt->res_skt.flags = IORESOURCE_MEM;
0233
0234     skt->res_io.start = _PCMCIAIO(skt->nr);
0235     skt->res_io.end = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1;
0236     skt->res_io.name = "io";
0237     skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
0238
0239     skt->res_mem.start = _PCMCIAMem(skt->nr);
0240     skt->res_mem.end = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1;
0241     skt->res_mem.name = "memory";
0242     skt->res_mem.flags = IORESOURCE_MEM;
0243
0244     skt->res_attr.start = _PCMCIAAttr(skt->nr);
0245     skt->res_attr.end = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1;
0246     skt->res_attr.name = "attribute";
0247     skt->res_attr.flags = IORESOURCE_MEM;
0248
0249     return soc_pcmcia_add_one(skt);
0250 }
0251 EXPORT_SYMBOL(pxa2xx_drv_pcmcia_add_one);
0252
0253 void pxa2xx_drv_pcmcia_ops(struct pcmcia_low_level *ops)
0254 {
0255     /* Provide our PXA2xx specific timing routines. */
0256     ops->set_timing  = pxa2xx_pcmcia_set_timing;
0257 #ifdef CONFIG_CPU_FREQ
0258     ops->frequency_change = pxa2xx_pcmcia_frequency_change;
0259 #endif
0260 }
0261 EXPORT_SYMBOL(pxa2xx_drv_pcmcia_ops);
0262
0263 static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
0264 {
0265     int i, ret = 0;
0266     struct pcmcia_low_level *ops;
0267     struct skt_dev_info *sinfo;
0268     struct soc_pcmcia_socket *skt;
0269     struct clk *clk;
0270
0271     ops = (struct pcmcia_low_level *)dev->dev.platform_data;
0272     if (!ops) {
0273         ret = -ENODEV;
0274         goto err0;
0275     }
0276
0277     if (cpu_is_pxa320() && ops->nr > 1) {
0278         dev_err(&dev->dev, "pxa320 supports only one pcmcia slot");
0279         ret = -EINVAL;
0280         goto err0;
0281     }
0282
0283     clk = devm_clk_get(&dev->dev, NULL);
0284     if (IS_ERR(clk))
0285         return -ENODEV;
0286
0287     pxa2xx_drv_pcmcia_ops(ops);
0288
0289     sinfo = devm_kzalloc(&dev->dev, SKT_DEV_INFO_SIZE(ops->nr),
0290                  GFP_KERNEL);
0291     if (!sinfo)
0292         return -ENOMEM;
0293
0294     sinfo->nskt = ops->nr;
0295
0296     /* Initialize processor specific parameters */
0297     for (i = 0; i < ops->nr; i++) {
0298         skt = &sinfo->skt[i];
0299
0300         skt->nr = ops->first + i;
0301         skt->clk = clk;
0302         soc_pcmcia_init_one(skt, ops, &dev->dev);
0303
0304         ret = pxa2xx_drv_pcmcia_add_one(skt);
0305         if (ret)
0306             goto err1;
0307     }
0308
0309     pxa2xx_configure_sockets(&dev->dev, ops);
0310     dev_set_drvdata(&dev->dev, sinfo);
0311
0312     return 0;
0313
0314 err1:
0315     while (--i >= 0)
0316         soc_pcmcia_remove_one(&sinfo->skt[i]);
0317
0318 err0:
0319     return ret;
0320 }
0321
0322 static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
0323 {
0324     struct skt_dev_info *sinfo = platform_get_drvdata(dev);
0325     int i;
0326
0327     for (i = 0; i < sinfo->nskt; i++)
0328         soc_pcmcia_remove_one(&sinfo->skt[i]);
0329
0330     return 0;
0331 }
0332
0333 static int pxa2xx_drv_pcmcia_resume(struct device *dev)
0334 {
0335     struct pcmcia_low_level *ops = (struct pcmcia_low_level *)dev->platform_data;
0336
0337     pxa2xx_configure_sockets(dev, ops);
0338     return 0;
0339 }
0340
0341 static const struct dev_pm_ops pxa2xx_drv_pcmcia_pm_ops = {
0342     .resume     = pxa2xx_drv_pcmcia_resume,
0343 };
0344
0345 static struct platform_driver pxa2xx_pcmcia_driver = {
0346     .probe      = pxa2xx_drv_pcmcia_probe,
0347     .remove     = pxa2xx_drv_pcmcia_remove,
0348     .driver     = {
0349         .name   = "pxa2xx-pcmcia",
0350         .pm = &pxa2xx_drv_pcmcia_pm_ops,
0351     },
0352 };
0353
0354 static int __init pxa2xx_pcmcia_init(void)
0355 {
0356     return platform_driver_register(&pxa2xx_pcmcia_driver);
0357 }
0358
0359 static void __exit pxa2xx_pcmcia_exit(void)
0360 {
0361     platform_driver_unregister(&pxa2xx_pcmcia_driver);
0362 }
0363
0364 fs_initcall(pxa2xx_pcmcia_init);
0365 module_exit(pxa2xx_pcmcia_exit);
0366
0367 MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
0368 MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
0369 MODULE_LICENSE("GPL");
0370 MODULE_ALIAS("platform:pxa2xx-pcmcia");