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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Microsemi Switchtec(tm) PCIe Management Driver
0004  * Copyright (c) 2017, Microsemi Corporation
0005  */
0006 
0007 #include <linux/switchtec.h>
0008 #include <linux/switchtec_ioctl.h>
0009 
0010 #include <linux/interrupt.h>
0011 #include <linux/module.h>
0012 #include <linux/fs.h>
0013 #include <linux/uaccess.h>
0014 #include <linux/poll.h>
0015 #include <linux/wait.h>
0016 #include <linux/io-64-nonatomic-lo-hi.h>
0017 #include <linux/nospec.h>
0018 
0019 MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver");
0020 MODULE_VERSION("0.1");
0021 MODULE_LICENSE("GPL");
0022 MODULE_AUTHOR("Microsemi Corporation");
0023 
0024 static int max_devices = 16;
0025 module_param(max_devices, int, 0644);
0026 MODULE_PARM_DESC(max_devices, "max number of switchtec device instances");
0027 
0028 static bool use_dma_mrpc = true;
0029 module_param(use_dma_mrpc, bool, 0644);
0030 MODULE_PARM_DESC(use_dma_mrpc,
0031          "Enable the use of the DMA MRPC feature");
0032 
0033 static int nirqs = 32;
0034 module_param(nirqs, int, 0644);
0035 MODULE_PARM_DESC(nirqs, "number of interrupts to allocate (more may be useful for NTB applications)");
0036 
0037 static dev_t switchtec_devt;
0038 static DEFINE_IDA(switchtec_minor_ida);
0039 
0040 struct class *switchtec_class;
0041 EXPORT_SYMBOL_GPL(switchtec_class);
0042 
0043 enum mrpc_state {
0044     MRPC_IDLE = 0,
0045     MRPC_QUEUED,
0046     MRPC_RUNNING,
0047     MRPC_DONE,
0048     MRPC_IO_ERROR,
0049 };
0050 
0051 struct switchtec_user {
0052     struct switchtec_dev *stdev;
0053 
0054     enum mrpc_state state;
0055 
0056     wait_queue_head_t cmd_comp;
0057     struct kref kref;
0058     struct list_head list;
0059 
0060     bool cmd_done;
0061     u32 cmd;
0062     u32 status;
0063     u32 return_code;
0064     size_t data_len;
0065     size_t read_len;
0066     unsigned char data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
0067     int event_cnt;
0068 };
0069 
0070 /*
0071  * The MMIO reads to the device_id register should always return the device ID
0072  * of the device, otherwise the firmware is probably stuck or unreachable
0073  * due to a firmware reset which clears PCI state including the BARs and Memory
0074  * Space Enable bits.
0075  */
0076 static int is_firmware_running(struct switchtec_dev *stdev)
0077 {
0078     u32 device = ioread32(&stdev->mmio_sys_info->device_id);
0079 
0080     return stdev->pdev->device == device;
0081 }
0082 
0083 static struct switchtec_user *stuser_create(struct switchtec_dev *stdev)
0084 {
0085     struct switchtec_user *stuser;
0086 
0087     stuser = kzalloc(sizeof(*stuser), GFP_KERNEL);
0088     if (!stuser)
0089         return ERR_PTR(-ENOMEM);
0090 
0091     get_device(&stdev->dev);
0092     stuser->stdev = stdev;
0093     kref_init(&stuser->kref);
0094     INIT_LIST_HEAD(&stuser->list);
0095     init_waitqueue_head(&stuser->cmd_comp);
0096     stuser->event_cnt = atomic_read(&stdev->event_cnt);
0097 
0098     dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
0099 
0100     return stuser;
0101 }
0102 
0103 static void stuser_free(struct kref *kref)
0104 {
0105     struct switchtec_user *stuser;
0106 
0107     stuser = container_of(kref, struct switchtec_user, kref);
0108 
0109     dev_dbg(&stuser->stdev->dev, "%s: %p\n", __func__, stuser);
0110 
0111     put_device(&stuser->stdev->dev);
0112     kfree(stuser);
0113 }
0114 
0115 static void stuser_put(struct switchtec_user *stuser)
0116 {
0117     kref_put(&stuser->kref, stuser_free);
0118 }
0119 
0120 static void stuser_set_state(struct switchtec_user *stuser,
0121                  enum mrpc_state state)
0122 {
0123     /* requires the mrpc_mutex to already be held when called */
0124 
0125     static const char * const state_names[] = {
0126         [MRPC_IDLE] = "IDLE",
0127         [MRPC_QUEUED] = "QUEUED",
0128         [MRPC_RUNNING] = "RUNNING",
0129         [MRPC_DONE] = "DONE",
0130         [MRPC_IO_ERROR] = "IO_ERROR",
0131     };
0132 
0133     stuser->state = state;
0134 
0135     dev_dbg(&stuser->stdev->dev, "stuser state %p -> %s",
0136         stuser, state_names[state]);
0137 }
0138 
0139 static void mrpc_complete_cmd(struct switchtec_dev *stdev);
0140 
0141 static void flush_wc_buf(struct switchtec_dev *stdev)
0142 {
0143     struct ntb_dbmsg_regs __iomem *mmio_dbmsg;
0144 
0145     /*
0146      * odb (outbound doorbell) register is processed by low latency
0147      * hardware and w/o side effect
0148      */
0149     mmio_dbmsg = (void __iomem *)stdev->mmio_ntb +
0150         SWITCHTEC_NTB_REG_DBMSG_OFFSET;
0151     ioread32(&mmio_dbmsg->odb);
0152 }
0153 
0154 static void mrpc_cmd_submit(struct switchtec_dev *stdev)
0155 {
0156     /* requires the mrpc_mutex to already be held when called */
0157 
0158     struct switchtec_user *stuser;
0159 
0160     if (stdev->mrpc_busy)
0161         return;
0162 
0163     if (list_empty(&stdev->mrpc_queue))
0164         return;
0165 
0166     stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
0167                 list);
0168 
0169     if (stdev->dma_mrpc) {
0170         stdev->dma_mrpc->status = SWITCHTEC_MRPC_STATUS_INPROGRESS;
0171         memset(stdev->dma_mrpc->data, 0xFF, SWITCHTEC_MRPC_PAYLOAD_SIZE);
0172     }
0173 
0174     stuser_set_state(stuser, MRPC_RUNNING);
0175     stdev->mrpc_busy = 1;
0176     memcpy_toio(&stdev->mmio_mrpc->input_data,
0177             stuser->data, stuser->data_len);
0178     flush_wc_buf(stdev);
0179     iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd);
0180 
0181     schedule_delayed_work(&stdev->mrpc_timeout,
0182                   msecs_to_jiffies(500));
0183 }
0184 
0185 static int mrpc_queue_cmd(struct switchtec_user *stuser)
0186 {
0187     /* requires the mrpc_mutex to already be held when called */
0188 
0189     struct switchtec_dev *stdev = stuser->stdev;
0190 
0191     kref_get(&stuser->kref);
0192     stuser->read_len = sizeof(stuser->data);
0193     stuser_set_state(stuser, MRPC_QUEUED);
0194     stuser->cmd_done = false;
0195     list_add_tail(&stuser->list, &stdev->mrpc_queue);
0196 
0197     mrpc_cmd_submit(stdev);
0198 
0199     return 0;
0200 }
0201 
0202 static void mrpc_cleanup_cmd(struct switchtec_dev *stdev)
0203 {
0204     /* requires the mrpc_mutex to already be held when called */
0205 
0206     struct switchtec_user *stuser = list_entry(stdev->mrpc_queue.next,
0207                            struct switchtec_user, list);
0208 
0209     stuser->cmd_done = true;
0210     wake_up_interruptible(&stuser->cmd_comp);
0211     list_del_init(&stuser->list);
0212     stuser_put(stuser);
0213     stdev->mrpc_busy = 0;
0214 
0215     mrpc_cmd_submit(stdev);
0216 }
0217 
0218 static void mrpc_complete_cmd(struct switchtec_dev *stdev)
0219 {
0220     /* requires the mrpc_mutex to already be held when called */
0221 
0222     struct switchtec_user *stuser;
0223 
0224     if (list_empty(&stdev->mrpc_queue))
0225         return;
0226 
0227     stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
0228                 list);
0229 
0230     if (stdev->dma_mrpc)
0231         stuser->status = stdev->dma_mrpc->status;
0232     else
0233         stuser->status = ioread32(&stdev->mmio_mrpc->status);
0234 
0235     if (stuser->status == SWITCHTEC_MRPC_STATUS_INPROGRESS)
0236         return;
0237 
0238     stuser_set_state(stuser, MRPC_DONE);
0239     stuser->return_code = 0;
0240 
0241     if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE &&
0242         stuser->status != SWITCHTEC_MRPC_STATUS_ERROR)
0243         goto out;
0244 
0245     if (stdev->dma_mrpc)
0246         stuser->return_code = stdev->dma_mrpc->rtn_code;
0247     else
0248         stuser->return_code = ioread32(&stdev->mmio_mrpc->ret_value);
0249     if (stuser->return_code != 0)
0250         goto out;
0251 
0252     if (stdev->dma_mrpc)
0253         memcpy(stuser->data, &stdev->dma_mrpc->data,
0254                   stuser->read_len);
0255     else
0256         memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data,
0257                   stuser->read_len);
0258 out:
0259     mrpc_cleanup_cmd(stdev);
0260 }
0261 
0262 static void mrpc_event_work(struct work_struct *work)
0263 {
0264     struct switchtec_dev *stdev;
0265 
0266     stdev = container_of(work, struct switchtec_dev, mrpc_work);
0267 
0268     dev_dbg(&stdev->dev, "%s\n", __func__);
0269 
0270     mutex_lock(&stdev->mrpc_mutex);
0271     cancel_delayed_work(&stdev->mrpc_timeout);
0272     mrpc_complete_cmd(stdev);
0273     mutex_unlock(&stdev->mrpc_mutex);
0274 }
0275 
0276 static void mrpc_error_complete_cmd(struct switchtec_dev *stdev)
0277 {
0278     /* requires the mrpc_mutex to already be held when called */
0279 
0280     struct switchtec_user *stuser;
0281 
0282     if (list_empty(&stdev->mrpc_queue))
0283         return;
0284 
0285     stuser = list_entry(stdev->mrpc_queue.next,
0286                 struct switchtec_user, list);
0287 
0288     stuser_set_state(stuser, MRPC_IO_ERROR);
0289 
0290     mrpc_cleanup_cmd(stdev);
0291 }
0292 
0293 static void mrpc_timeout_work(struct work_struct *work)
0294 {
0295     struct switchtec_dev *stdev;
0296     u32 status;
0297 
0298     stdev = container_of(work, struct switchtec_dev, mrpc_timeout.work);
0299 
0300     dev_dbg(&stdev->dev, "%s\n", __func__);
0301 
0302     mutex_lock(&stdev->mrpc_mutex);
0303 
0304     if (!is_firmware_running(stdev)) {
0305         mrpc_error_complete_cmd(stdev);
0306         goto out;
0307     }
0308 
0309     if (stdev->dma_mrpc)
0310         status = stdev->dma_mrpc->status;
0311     else
0312         status = ioread32(&stdev->mmio_mrpc->status);
0313     if (status == SWITCHTEC_MRPC_STATUS_INPROGRESS) {
0314         schedule_delayed_work(&stdev->mrpc_timeout,
0315                       msecs_to_jiffies(500));
0316         goto out;
0317     }
0318 
0319     mrpc_complete_cmd(stdev);
0320 out:
0321     mutex_unlock(&stdev->mrpc_mutex);
0322 }
0323 
0324 static ssize_t device_version_show(struct device *dev,
0325     struct device_attribute *attr, char *buf)
0326 {
0327     struct switchtec_dev *stdev = to_stdev(dev);
0328     u32 ver;
0329 
0330     ver = ioread32(&stdev->mmio_sys_info->device_version);
0331 
0332     return sysfs_emit(buf, "%x\n", ver);
0333 }
0334 static DEVICE_ATTR_RO(device_version);
0335 
0336 static ssize_t fw_version_show(struct device *dev,
0337     struct device_attribute *attr, char *buf)
0338 {
0339     struct switchtec_dev *stdev = to_stdev(dev);
0340     u32 ver;
0341 
0342     ver = ioread32(&stdev->mmio_sys_info->firmware_version);
0343 
0344     return sysfs_emit(buf, "%08x\n", ver);
0345 }
0346 static DEVICE_ATTR_RO(fw_version);
0347 
0348 static ssize_t io_string_show(char *buf, void __iomem *attr, size_t len)
0349 {
0350     int i;
0351 
0352     memcpy_fromio(buf, attr, len);
0353     buf[len] = '\n';
0354     buf[len + 1] = 0;
0355 
0356     for (i = len - 1; i > 0; i--) {
0357         if (buf[i] != ' ')
0358             break;
0359         buf[i] = '\n';
0360         buf[i + 1] = 0;
0361     }
0362 
0363     return strlen(buf);
0364 }
0365 
0366 #define DEVICE_ATTR_SYS_INFO_STR(field) \
0367 static ssize_t field ## _show(struct device *dev, \
0368     struct device_attribute *attr, char *buf) \
0369 { \
0370     struct switchtec_dev *stdev = to_stdev(dev); \
0371     struct sys_info_regs __iomem *si = stdev->mmio_sys_info; \
0372     if (stdev->gen == SWITCHTEC_GEN3) \
0373         return io_string_show(buf, &si->gen3.field, \
0374                       sizeof(si->gen3.field)); \
0375     else if (stdev->gen == SWITCHTEC_GEN4) \
0376         return io_string_show(buf, &si->gen4.field, \
0377                       sizeof(si->gen4.field)); \
0378     else \
0379         return -EOPNOTSUPP; \
0380 } \
0381 \
0382 static DEVICE_ATTR_RO(field)
0383 
0384 DEVICE_ATTR_SYS_INFO_STR(vendor_id);
0385 DEVICE_ATTR_SYS_INFO_STR(product_id);
0386 DEVICE_ATTR_SYS_INFO_STR(product_revision);
0387 
0388 static ssize_t component_vendor_show(struct device *dev,
0389                      struct device_attribute *attr, char *buf)
0390 {
0391     struct switchtec_dev *stdev = to_stdev(dev);
0392     struct sys_info_regs __iomem *si = stdev->mmio_sys_info;
0393 
0394     /* component_vendor field not supported after gen3 */
0395     if (stdev->gen != SWITCHTEC_GEN3)
0396         return sysfs_emit(buf, "none\n");
0397 
0398     return io_string_show(buf, &si->gen3.component_vendor,
0399                   sizeof(si->gen3.component_vendor));
0400 }
0401 static DEVICE_ATTR_RO(component_vendor);
0402 
0403 static ssize_t component_id_show(struct device *dev,
0404     struct device_attribute *attr, char *buf)
0405 {
0406     struct switchtec_dev *stdev = to_stdev(dev);
0407     int id = ioread16(&stdev->mmio_sys_info->gen3.component_id);
0408 
0409     /* component_id field not supported after gen3 */
0410     if (stdev->gen != SWITCHTEC_GEN3)
0411         return sysfs_emit(buf, "none\n");
0412 
0413     return sysfs_emit(buf, "PM%04X\n", id);
0414 }
0415 static DEVICE_ATTR_RO(component_id);
0416 
0417 static ssize_t component_revision_show(struct device *dev,
0418     struct device_attribute *attr, char *buf)
0419 {
0420     struct switchtec_dev *stdev = to_stdev(dev);
0421     int rev = ioread8(&stdev->mmio_sys_info->gen3.component_revision);
0422 
0423     /* component_revision field not supported after gen3 */
0424     if (stdev->gen != SWITCHTEC_GEN3)
0425         return sysfs_emit(buf, "255\n");
0426 
0427     return sysfs_emit(buf, "%d\n", rev);
0428 }
0429 static DEVICE_ATTR_RO(component_revision);
0430 
0431 static ssize_t partition_show(struct device *dev,
0432     struct device_attribute *attr, char *buf)
0433 {
0434     struct switchtec_dev *stdev = to_stdev(dev);
0435 
0436     return sysfs_emit(buf, "%d\n", stdev->partition);
0437 }
0438 static DEVICE_ATTR_RO(partition);
0439 
0440 static ssize_t partition_count_show(struct device *dev,
0441     struct device_attribute *attr, char *buf)
0442 {
0443     struct switchtec_dev *stdev = to_stdev(dev);
0444 
0445     return sysfs_emit(buf, "%d\n", stdev->partition_count);
0446 }
0447 static DEVICE_ATTR_RO(partition_count);
0448 
0449 static struct attribute *switchtec_device_attrs[] = {
0450     &dev_attr_device_version.attr,
0451     &dev_attr_fw_version.attr,
0452     &dev_attr_vendor_id.attr,
0453     &dev_attr_product_id.attr,
0454     &dev_attr_product_revision.attr,
0455     &dev_attr_component_vendor.attr,
0456     &dev_attr_component_id.attr,
0457     &dev_attr_component_revision.attr,
0458     &dev_attr_partition.attr,
0459     &dev_attr_partition_count.attr,
0460     NULL,
0461 };
0462 
0463 ATTRIBUTE_GROUPS(switchtec_device);
0464 
0465 static int switchtec_dev_open(struct inode *inode, struct file *filp)
0466 {
0467     struct switchtec_dev *stdev;
0468     struct switchtec_user *stuser;
0469 
0470     stdev = container_of(inode->i_cdev, struct switchtec_dev, cdev);
0471 
0472     stuser = stuser_create(stdev);
0473     if (IS_ERR(stuser))
0474         return PTR_ERR(stuser);
0475 
0476     filp->private_data = stuser;
0477     stream_open(inode, filp);
0478 
0479     dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
0480 
0481     return 0;
0482 }
0483 
0484 static int switchtec_dev_release(struct inode *inode, struct file *filp)
0485 {
0486     struct switchtec_user *stuser = filp->private_data;
0487 
0488     stuser_put(stuser);
0489 
0490     return 0;
0491 }
0492 
0493 static int lock_mutex_and_test_alive(struct switchtec_dev *stdev)
0494 {
0495     if (mutex_lock_interruptible(&stdev->mrpc_mutex))
0496         return -EINTR;
0497 
0498     if (!stdev->alive) {
0499         mutex_unlock(&stdev->mrpc_mutex);
0500         return -ENODEV;
0501     }
0502 
0503     return 0;
0504 }
0505 
0506 static ssize_t switchtec_dev_write(struct file *filp, const char __user *data,
0507                    size_t size, loff_t *off)
0508 {
0509     struct switchtec_user *stuser = filp->private_data;
0510     struct switchtec_dev *stdev = stuser->stdev;
0511     int rc;
0512 
0513     if (size < sizeof(stuser->cmd) ||
0514         size > sizeof(stuser->cmd) + sizeof(stuser->data))
0515         return -EINVAL;
0516 
0517     stuser->data_len = size - sizeof(stuser->cmd);
0518 
0519     rc = lock_mutex_and_test_alive(stdev);
0520     if (rc)
0521         return rc;
0522 
0523     if (stuser->state != MRPC_IDLE) {
0524         rc = -EBADE;
0525         goto out;
0526     }
0527 
0528     rc = copy_from_user(&stuser->cmd, data, sizeof(stuser->cmd));
0529     if (rc) {
0530         rc = -EFAULT;
0531         goto out;
0532     }
0533     if (((MRPC_CMD_ID(stuser->cmd) == MRPC_GAS_WRITE) ||
0534          (MRPC_CMD_ID(stuser->cmd) == MRPC_GAS_READ)) &&
0535         !capable(CAP_SYS_ADMIN)) {
0536         rc = -EPERM;
0537         goto out;
0538     }
0539 
0540     data += sizeof(stuser->cmd);
0541     rc = copy_from_user(&stuser->data, data, size - sizeof(stuser->cmd));
0542     if (rc) {
0543         rc = -EFAULT;
0544         goto out;
0545     }
0546 
0547     rc = mrpc_queue_cmd(stuser);
0548 
0549 out:
0550     mutex_unlock(&stdev->mrpc_mutex);
0551 
0552     if (rc)
0553         return rc;
0554 
0555     return size;
0556 }
0557 
0558 static ssize_t switchtec_dev_read(struct file *filp, char __user *data,
0559                   size_t size, loff_t *off)
0560 {
0561     struct switchtec_user *stuser = filp->private_data;
0562     struct switchtec_dev *stdev = stuser->stdev;
0563     int rc;
0564 
0565     if (size < sizeof(stuser->cmd) ||
0566         size > sizeof(stuser->cmd) + sizeof(stuser->data))
0567         return -EINVAL;
0568 
0569     rc = lock_mutex_and_test_alive(stdev);
0570     if (rc)
0571         return rc;
0572 
0573     if (stuser->state == MRPC_IDLE) {
0574         mutex_unlock(&stdev->mrpc_mutex);
0575         return -EBADE;
0576     }
0577 
0578     stuser->read_len = size - sizeof(stuser->return_code);
0579 
0580     mutex_unlock(&stdev->mrpc_mutex);
0581 
0582     if (filp->f_flags & O_NONBLOCK) {
0583         if (!stuser->cmd_done)
0584             return -EAGAIN;
0585     } else {
0586         rc = wait_event_interruptible(stuser->cmd_comp,
0587                           stuser->cmd_done);
0588         if (rc < 0)
0589             return rc;
0590     }
0591 
0592     rc = lock_mutex_and_test_alive(stdev);
0593     if (rc)
0594         return rc;
0595 
0596     if (stuser->state == MRPC_IO_ERROR) {
0597         mutex_unlock(&stdev->mrpc_mutex);
0598         return -EIO;
0599     }
0600 
0601     if (stuser->state != MRPC_DONE) {
0602         mutex_unlock(&stdev->mrpc_mutex);
0603         return -EBADE;
0604     }
0605 
0606     rc = copy_to_user(data, &stuser->return_code,
0607               sizeof(stuser->return_code));
0608     if (rc) {
0609         rc = -EFAULT;
0610         goto out;
0611     }
0612 
0613     data += sizeof(stuser->return_code);
0614     rc = copy_to_user(data, &stuser->data,
0615               size - sizeof(stuser->return_code));
0616     if (rc) {
0617         rc = -EFAULT;
0618         goto out;
0619     }
0620 
0621     stuser_set_state(stuser, MRPC_IDLE);
0622 
0623 out:
0624     mutex_unlock(&stdev->mrpc_mutex);
0625 
0626     if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE ||
0627         stuser->status == SWITCHTEC_MRPC_STATUS_ERROR)
0628         return size;
0629     else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED)
0630         return -ENXIO;
0631     else
0632         return -EBADMSG;
0633 }
0634 
0635 static __poll_t switchtec_dev_poll(struct file *filp, poll_table *wait)
0636 {
0637     struct switchtec_user *stuser = filp->private_data;
0638     struct switchtec_dev *stdev = stuser->stdev;
0639     __poll_t ret = 0;
0640 
0641     poll_wait(filp, &stuser->cmd_comp, wait);
0642     poll_wait(filp, &stdev->event_wq, wait);
0643 
0644     if (lock_mutex_and_test_alive(stdev))
0645         return EPOLLIN | EPOLLRDHUP | EPOLLOUT | EPOLLERR | EPOLLHUP;
0646 
0647     mutex_unlock(&stdev->mrpc_mutex);
0648 
0649     if (stuser->cmd_done)
0650         ret |= EPOLLIN | EPOLLRDNORM;
0651 
0652     if (stuser->event_cnt != atomic_read(&stdev->event_cnt))
0653         ret |= EPOLLPRI | EPOLLRDBAND;
0654 
0655     return ret;
0656 }
0657 
0658 static int ioctl_flash_info(struct switchtec_dev *stdev,
0659                 struct switchtec_ioctl_flash_info __user *uinfo)
0660 {
0661     struct switchtec_ioctl_flash_info info = {0};
0662     struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
0663 
0664     if (stdev->gen == SWITCHTEC_GEN3) {
0665         info.flash_length = ioread32(&fi->gen3.flash_length);
0666         info.num_partitions = SWITCHTEC_NUM_PARTITIONS_GEN3;
0667     } else if (stdev->gen == SWITCHTEC_GEN4) {
0668         info.flash_length = ioread32(&fi->gen4.flash_length);
0669         info.num_partitions = SWITCHTEC_NUM_PARTITIONS_GEN4;
0670     } else {
0671         return -EOPNOTSUPP;
0672     }
0673 
0674     if (copy_to_user(uinfo, &info, sizeof(info)))
0675         return -EFAULT;
0676 
0677     return 0;
0678 }
0679 
0680 static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info,
0681                  struct partition_info __iomem *pi)
0682 {
0683     info->address = ioread32(&pi->address);
0684     info->length = ioread32(&pi->length);
0685 }
0686 
0687 static int flash_part_info_gen3(struct switchtec_dev *stdev,
0688         struct switchtec_ioctl_flash_part_info *info)
0689 {
0690     struct flash_info_regs_gen3 __iomem *fi =
0691         &stdev->mmio_flash_info->gen3;
0692     struct sys_info_regs_gen3 __iomem *si = &stdev->mmio_sys_info->gen3;
0693     u32 active_addr = -1;
0694 
0695     switch (info->flash_partition) {
0696     case SWITCHTEC_IOCTL_PART_CFG0:
0697         active_addr = ioread32(&fi->active_cfg);
0698         set_fw_info_part(info, &fi->cfg0);
0699         if (ioread16(&si->cfg_running) == SWITCHTEC_GEN3_CFG0_RUNNING)
0700             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0701         break;
0702     case SWITCHTEC_IOCTL_PART_CFG1:
0703         active_addr = ioread32(&fi->active_cfg);
0704         set_fw_info_part(info, &fi->cfg1);
0705         if (ioread16(&si->cfg_running) == SWITCHTEC_GEN3_CFG1_RUNNING)
0706             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0707         break;
0708     case SWITCHTEC_IOCTL_PART_IMG0:
0709         active_addr = ioread32(&fi->active_img);
0710         set_fw_info_part(info, &fi->img0);
0711         if (ioread16(&si->img_running) == SWITCHTEC_GEN3_IMG0_RUNNING)
0712             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0713         break;
0714     case SWITCHTEC_IOCTL_PART_IMG1:
0715         active_addr = ioread32(&fi->active_img);
0716         set_fw_info_part(info, &fi->img1);
0717         if (ioread16(&si->img_running) == SWITCHTEC_GEN3_IMG1_RUNNING)
0718             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0719         break;
0720     case SWITCHTEC_IOCTL_PART_NVLOG:
0721         set_fw_info_part(info, &fi->nvlog);
0722         break;
0723     case SWITCHTEC_IOCTL_PART_VENDOR0:
0724         set_fw_info_part(info, &fi->vendor[0]);
0725         break;
0726     case SWITCHTEC_IOCTL_PART_VENDOR1:
0727         set_fw_info_part(info, &fi->vendor[1]);
0728         break;
0729     case SWITCHTEC_IOCTL_PART_VENDOR2:
0730         set_fw_info_part(info, &fi->vendor[2]);
0731         break;
0732     case SWITCHTEC_IOCTL_PART_VENDOR3:
0733         set_fw_info_part(info, &fi->vendor[3]);
0734         break;
0735     case SWITCHTEC_IOCTL_PART_VENDOR4:
0736         set_fw_info_part(info, &fi->vendor[4]);
0737         break;
0738     case SWITCHTEC_IOCTL_PART_VENDOR5:
0739         set_fw_info_part(info, &fi->vendor[5]);
0740         break;
0741     case SWITCHTEC_IOCTL_PART_VENDOR6:
0742         set_fw_info_part(info, &fi->vendor[6]);
0743         break;
0744     case SWITCHTEC_IOCTL_PART_VENDOR7:
0745         set_fw_info_part(info, &fi->vendor[7]);
0746         break;
0747     default:
0748         return -EINVAL;
0749     }
0750 
0751     if (info->address == active_addr)
0752         info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0753 
0754     return 0;
0755 }
0756 
0757 static int flash_part_info_gen4(struct switchtec_dev *stdev,
0758         struct switchtec_ioctl_flash_part_info *info)
0759 {
0760     struct flash_info_regs_gen4 __iomem *fi = &stdev->mmio_flash_info->gen4;
0761     struct sys_info_regs_gen4 __iomem *si = &stdev->mmio_sys_info->gen4;
0762     struct active_partition_info_gen4 __iomem *af = &fi->active_flag;
0763 
0764     switch (info->flash_partition) {
0765     case SWITCHTEC_IOCTL_PART_MAP_0:
0766         set_fw_info_part(info, &fi->map0);
0767         break;
0768     case SWITCHTEC_IOCTL_PART_MAP_1:
0769         set_fw_info_part(info, &fi->map1);
0770         break;
0771     case SWITCHTEC_IOCTL_PART_KEY_0:
0772         set_fw_info_part(info, &fi->key0);
0773         if (ioread8(&af->key) == SWITCHTEC_GEN4_KEY0_ACTIVE)
0774             info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0775         if (ioread16(&si->key_running) == SWITCHTEC_GEN4_KEY0_RUNNING)
0776             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0777         break;
0778     case SWITCHTEC_IOCTL_PART_KEY_1:
0779         set_fw_info_part(info, &fi->key1);
0780         if (ioread8(&af->key) == SWITCHTEC_GEN4_KEY1_ACTIVE)
0781             info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0782         if (ioread16(&si->key_running) == SWITCHTEC_GEN4_KEY1_RUNNING)
0783             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0784         break;
0785     case SWITCHTEC_IOCTL_PART_BL2_0:
0786         set_fw_info_part(info, &fi->bl2_0);
0787         if (ioread8(&af->bl2) == SWITCHTEC_GEN4_BL2_0_ACTIVE)
0788             info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0789         if (ioread16(&si->bl2_running) == SWITCHTEC_GEN4_BL2_0_RUNNING)
0790             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0791         break;
0792     case SWITCHTEC_IOCTL_PART_BL2_1:
0793         set_fw_info_part(info, &fi->bl2_1);
0794         if (ioread8(&af->bl2) == SWITCHTEC_GEN4_BL2_1_ACTIVE)
0795             info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0796         if (ioread16(&si->bl2_running) == SWITCHTEC_GEN4_BL2_1_RUNNING)
0797             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0798         break;
0799     case SWITCHTEC_IOCTL_PART_CFG0:
0800         set_fw_info_part(info, &fi->cfg0);
0801         if (ioread8(&af->cfg) == SWITCHTEC_GEN4_CFG0_ACTIVE)
0802             info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0803         if (ioread16(&si->cfg_running) == SWITCHTEC_GEN4_CFG0_RUNNING)
0804             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0805         break;
0806     case SWITCHTEC_IOCTL_PART_CFG1:
0807         set_fw_info_part(info, &fi->cfg1);
0808         if (ioread8(&af->cfg) == SWITCHTEC_GEN4_CFG1_ACTIVE)
0809             info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0810         if (ioread16(&si->cfg_running) == SWITCHTEC_GEN4_CFG1_RUNNING)
0811             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0812         break;
0813     case SWITCHTEC_IOCTL_PART_IMG0:
0814         set_fw_info_part(info, &fi->img0);
0815         if (ioread8(&af->img) == SWITCHTEC_GEN4_IMG0_ACTIVE)
0816             info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0817         if (ioread16(&si->img_running) == SWITCHTEC_GEN4_IMG0_RUNNING)
0818             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0819         break;
0820     case SWITCHTEC_IOCTL_PART_IMG1:
0821         set_fw_info_part(info, &fi->img1);
0822         if (ioread8(&af->img) == SWITCHTEC_GEN4_IMG1_ACTIVE)
0823             info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
0824         if (ioread16(&si->img_running) == SWITCHTEC_GEN4_IMG1_RUNNING)
0825             info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
0826         break;
0827     case SWITCHTEC_IOCTL_PART_NVLOG:
0828         set_fw_info_part(info, &fi->nvlog);
0829         break;
0830     case SWITCHTEC_IOCTL_PART_VENDOR0:
0831         set_fw_info_part(info, &fi->vendor[0]);
0832         break;
0833     case SWITCHTEC_IOCTL_PART_VENDOR1:
0834         set_fw_info_part(info, &fi->vendor[1]);
0835         break;
0836     case SWITCHTEC_IOCTL_PART_VENDOR2:
0837         set_fw_info_part(info, &fi->vendor[2]);
0838         break;
0839     case SWITCHTEC_IOCTL_PART_VENDOR3:
0840         set_fw_info_part(info, &fi->vendor[3]);
0841         break;
0842     case SWITCHTEC_IOCTL_PART_VENDOR4:
0843         set_fw_info_part(info, &fi->vendor[4]);
0844         break;
0845     case SWITCHTEC_IOCTL_PART_VENDOR5:
0846         set_fw_info_part(info, &fi->vendor[5]);
0847         break;
0848     case SWITCHTEC_IOCTL_PART_VENDOR6:
0849         set_fw_info_part(info, &fi->vendor[6]);
0850         break;
0851     case SWITCHTEC_IOCTL_PART_VENDOR7:
0852         set_fw_info_part(info, &fi->vendor[7]);
0853         break;
0854     default:
0855         return -EINVAL;
0856     }
0857 
0858     return 0;
0859 }
0860 
0861 static int ioctl_flash_part_info(struct switchtec_dev *stdev,
0862         struct switchtec_ioctl_flash_part_info __user *uinfo)
0863 {
0864     int ret;
0865     struct switchtec_ioctl_flash_part_info info = {0};
0866 
0867     if (copy_from_user(&info, uinfo, sizeof(info)))
0868         return -EFAULT;
0869 
0870     if (stdev->gen == SWITCHTEC_GEN3) {
0871         ret = flash_part_info_gen3(stdev, &info);
0872         if (ret)
0873             return ret;
0874     } else if (stdev->gen == SWITCHTEC_GEN4) {
0875         ret = flash_part_info_gen4(stdev, &info);
0876         if (ret)
0877             return ret;
0878     } else {
0879         return -EOPNOTSUPP;
0880     }
0881 
0882     if (copy_to_user(uinfo, &info, sizeof(info)))
0883         return -EFAULT;
0884 
0885     return 0;
0886 }
0887 
0888 static int ioctl_event_summary(struct switchtec_dev *stdev,
0889     struct switchtec_user *stuser,
0890     struct switchtec_ioctl_event_summary __user *usum,
0891     size_t size)
0892 {
0893     struct switchtec_ioctl_event_summary *s;
0894     int i;
0895     u32 reg;
0896     int ret = 0;
0897 
0898     s = kzalloc(sizeof(*s), GFP_KERNEL);
0899     if (!s)
0900         return -ENOMEM;
0901 
0902     s->global = ioread32(&stdev->mmio_sw_event->global_summary);
0903     s->part_bitmap = ioread64(&stdev->mmio_sw_event->part_event_bitmap);
0904     s->local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
0905 
0906     for (i = 0; i < stdev->partition_count; i++) {
0907         reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary);
0908         s->part[i] = reg;
0909     }
0910 
0911     for (i = 0; i < stdev->pff_csr_count; i++) {
0912         reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary);
0913         s->pff[i] = reg;
0914     }
0915 
0916     if (copy_to_user(usum, s, size)) {
0917         ret = -EFAULT;
0918         goto error_case;
0919     }
0920 
0921     stuser->event_cnt = atomic_read(&stdev->event_cnt);
0922 
0923 error_case:
0924     kfree(s);
0925     return ret;
0926 }
0927 
0928 static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev,
0929                   size_t offset, int index)
0930 {
0931     return (void __iomem *)stdev->mmio_sw_event + offset;
0932 }
0933 
0934 static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev,
0935                 size_t offset, int index)
0936 {
0937     return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset;
0938 }
0939 
0940 static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev,
0941                    size_t offset, int index)
0942 {
0943     return (void __iomem *)&stdev->mmio_pff_csr[index] + offset;
0944 }
0945 
0946 #define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg}
0947 #define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg}
0948 #define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg}
0949 
0950 static const struct event_reg {
0951     size_t offset;
0952     u32 __iomem *(*map_reg)(struct switchtec_dev *stdev,
0953                 size_t offset, int index);
0954 } event_regs[] = {
0955     EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr),
0956     EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr),
0957     EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr),
0958     EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr),
0959     EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr),
0960     EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr),
0961     EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr),
0962     EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr),
0963     EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr),
0964     EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC,
0965            twi_mrpc_comp_async_hdr),
0966     EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr),
0967     EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC,
0968            cli_mrpc_comp_async_hdr),
0969     EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr),
0970     EV_GLB(SWITCHTEC_IOCTL_EVENT_GFMS, gfms_event_hdr),
0971     EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr),
0972     EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr),
0973     EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
0974     EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr),
0975     EV_PAR(SWITCHTEC_IOCTL_EVENT_INTERCOMM_REQ_NOTIFY,
0976            intercomm_notify_hdr),
0977     EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr),
0978     EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr),
0979     EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr),
0980     EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr),
0981     EV_PFF(SWITCHTEC_IOCTL_EVENT_UEC, uec_hdr),
0982     EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr),
0983     EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr),
0984     EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr),
0985     EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr),
0986     EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr),
0987     EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr),
0988     EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr),
0989     EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr),
0990 };
0991 
0992 static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev,
0993                    int event_id, int index)
0994 {
0995     size_t off;
0996 
0997     if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
0998         return (u32 __iomem *)ERR_PTR(-EINVAL);
0999 
1000     off = event_regs[event_id].offset;
1001 
1002     if (event_regs[event_id].map_reg == part_ev_reg) {
1003         if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
1004             index = stdev->partition;
1005         else if (index < 0 || index >= stdev->partition_count)
1006             return (u32 __iomem *)ERR_PTR(-EINVAL);
1007     } else if (event_regs[event_id].map_reg == pff_ev_reg) {
1008         if (index < 0 || index >= stdev->pff_csr_count)
1009             return (u32 __iomem *)ERR_PTR(-EINVAL);
1010     }
1011 
1012     return event_regs[event_id].map_reg(stdev, off, index);
1013 }
1014 
1015 static int event_ctl(struct switchtec_dev *stdev,
1016              struct switchtec_ioctl_event_ctl *ctl)
1017 {
1018     int i;
1019     u32 __iomem *reg;
1020     u32 hdr;
1021 
1022     reg = event_hdr_addr(stdev, ctl->event_id, ctl->index);
1023     if (IS_ERR(reg))
1024         return PTR_ERR(reg);
1025 
1026     hdr = ioread32(reg);
1027     if (hdr & SWITCHTEC_EVENT_NOT_SUPP)
1028         return -EOPNOTSUPP;
1029 
1030     for (i = 0; i < ARRAY_SIZE(ctl->data); i++)
1031         ctl->data[i] = ioread32(&reg[i + 1]);
1032 
1033     ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED;
1034     ctl->count = (hdr >> 5) & 0xFF;
1035 
1036     if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR))
1037         hdr &= ~SWITCHTEC_EVENT_CLEAR;
1038     if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL)
1039         hdr |= SWITCHTEC_EVENT_EN_IRQ;
1040     if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL)
1041         hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
1042     if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG)
1043         hdr |= SWITCHTEC_EVENT_EN_LOG;
1044     if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG)
1045         hdr &= ~SWITCHTEC_EVENT_EN_LOG;
1046     if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI)
1047         hdr |= SWITCHTEC_EVENT_EN_CLI;
1048     if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI)
1049         hdr &= ~SWITCHTEC_EVENT_EN_CLI;
1050     if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL)
1051         hdr |= SWITCHTEC_EVENT_FATAL;
1052     if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL)
1053         hdr &= ~SWITCHTEC_EVENT_FATAL;
1054 
1055     if (ctl->flags)
1056         iowrite32(hdr, reg);
1057 
1058     ctl->flags = 0;
1059     if (hdr & SWITCHTEC_EVENT_EN_IRQ)
1060         ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL;
1061     if (hdr & SWITCHTEC_EVENT_EN_LOG)
1062         ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG;
1063     if (hdr & SWITCHTEC_EVENT_EN_CLI)
1064         ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI;
1065     if (hdr & SWITCHTEC_EVENT_FATAL)
1066         ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL;
1067 
1068     return 0;
1069 }
1070 
1071 static int ioctl_event_ctl(struct switchtec_dev *stdev,
1072     struct switchtec_ioctl_event_ctl __user *uctl)
1073 {
1074     int ret;
1075     int nr_idxs;
1076     unsigned int event_flags;
1077     struct switchtec_ioctl_event_ctl ctl;
1078 
1079     if (copy_from_user(&ctl, uctl, sizeof(ctl)))
1080         return -EFAULT;
1081 
1082     if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
1083         return -EINVAL;
1084 
1085     if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED)
1086         return -EINVAL;
1087 
1088     if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) {
1089         if (event_regs[ctl.event_id].map_reg == global_ev_reg)
1090             nr_idxs = 1;
1091         else if (event_regs[ctl.event_id].map_reg == part_ev_reg)
1092             nr_idxs = stdev->partition_count;
1093         else if (event_regs[ctl.event_id].map_reg == pff_ev_reg)
1094             nr_idxs = stdev->pff_csr_count;
1095         else
1096             return -EINVAL;
1097 
1098         event_flags = ctl.flags;
1099         for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) {
1100             ctl.flags = event_flags;
1101             ret = event_ctl(stdev, &ctl);
1102             if (ret < 0 && ret != -EOPNOTSUPP)
1103                 return ret;
1104         }
1105     } else {
1106         ret = event_ctl(stdev, &ctl);
1107         if (ret < 0)
1108             return ret;
1109     }
1110 
1111     if (copy_to_user(uctl, &ctl, sizeof(ctl)))
1112         return -EFAULT;
1113 
1114     return 0;
1115 }
1116 
1117 static int ioctl_pff_to_port(struct switchtec_dev *stdev,
1118                  struct switchtec_ioctl_pff_port __user *up)
1119 {
1120     int i, part;
1121     u32 reg;
1122     struct part_cfg_regs __iomem *pcfg;
1123     struct switchtec_ioctl_pff_port p;
1124 
1125     if (copy_from_user(&p, up, sizeof(p)))
1126         return -EFAULT;
1127 
1128     p.port = -1;
1129     for (part = 0; part < stdev->partition_count; part++) {
1130         pcfg = &stdev->mmio_part_cfg_all[part];
1131         p.partition = part;
1132 
1133         reg = ioread32(&pcfg->usp_pff_inst_id);
1134         if (reg == p.pff) {
1135             p.port = 0;
1136             break;
1137         }
1138 
1139         reg = ioread32(&pcfg->vep_pff_inst_id) & 0xFF;
1140         if (reg == p.pff) {
1141             p.port = SWITCHTEC_IOCTL_PFF_VEP;
1142             break;
1143         }
1144 
1145         for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1146             reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1147             if (reg != p.pff)
1148                 continue;
1149 
1150             p.port = i + 1;
1151             break;
1152         }
1153 
1154         if (p.port != -1)
1155             break;
1156     }
1157 
1158     if (copy_to_user(up, &p, sizeof(p)))
1159         return -EFAULT;
1160 
1161     return 0;
1162 }
1163 
1164 static int ioctl_port_to_pff(struct switchtec_dev *stdev,
1165                  struct switchtec_ioctl_pff_port __user *up)
1166 {
1167     struct switchtec_ioctl_pff_port p;
1168     struct part_cfg_regs __iomem *pcfg;
1169 
1170     if (copy_from_user(&p, up, sizeof(p)))
1171         return -EFAULT;
1172 
1173     if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
1174         pcfg = stdev->mmio_part_cfg;
1175     else if (p.partition < stdev->partition_count)
1176         pcfg = &stdev->mmio_part_cfg_all[p.partition];
1177     else
1178         return -EINVAL;
1179 
1180     switch (p.port) {
1181     case 0:
1182         p.pff = ioread32(&pcfg->usp_pff_inst_id);
1183         break;
1184     case SWITCHTEC_IOCTL_PFF_VEP:
1185         p.pff = ioread32(&pcfg->vep_pff_inst_id) & 0xFF;
1186         break;
1187     default:
1188         if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
1189             return -EINVAL;
1190         p.port = array_index_nospec(p.port,
1191                     ARRAY_SIZE(pcfg->dsp_pff_inst_id) + 1);
1192         p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
1193         break;
1194     }
1195 
1196     if (copy_to_user(up, &p, sizeof(p)))
1197         return -EFAULT;
1198 
1199     return 0;
1200 }
1201 
1202 static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd,
1203                 unsigned long arg)
1204 {
1205     struct switchtec_user *stuser = filp->private_data;
1206     struct switchtec_dev *stdev = stuser->stdev;
1207     int rc;
1208     void __user *argp = (void __user *)arg;
1209 
1210     rc = lock_mutex_and_test_alive(stdev);
1211     if (rc)
1212         return rc;
1213 
1214     switch (cmd) {
1215     case SWITCHTEC_IOCTL_FLASH_INFO:
1216         rc = ioctl_flash_info(stdev, argp);
1217         break;
1218     case SWITCHTEC_IOCTL_FLASH_PART_INFO:
1219         rc = ioctl_flash_part_info(stdev, argp);
1220         break;
1221     case SWITCHTEC_IOCTL_EVENT_SUMMARY_LEGACY:
1222         rc = ioctl_event_summary(stdev, stuser, argp,
1223                      sizeof(struct switchtec_ioctl_event_summary_legacy));
1224         break;
1225     case SWITCHTEC_IOCTL_EVENT_CTL:
1226         rc = ioctl_event_ctl(stdev, argp);
1227         break;
1228     case SWITCHTEC_IOCTL_PFF_TO_PORT:
1229         rc = ioctl_pff_to_port(stdev, argp);
1230         break;
1231     case SWITCHTEC_IOCTL_PORT_TO_PFF:
1232         rc = ioctl_port_to_pff(stdev, argp);
1233         break;
1234     case SWITCHTEC_IOCTL_EVENT_SUMMARY:
1235         rc = ioctl_event_summary(stdev, stuser, argp,
1236                      sizeof(struct switchtec_ioctl_event_summary));
1237         break;
1238     default:
1239         rc = -ENOTTY;
1240         break;
1241     }
1242 
1243     mutex_unlock(&stdev->mrpc_mutex);
1244     return rc;
1245 }
1246 
1247 static const struct file_operations switchtec_fops = {
1248     .owner = THIS_MODULE,
1249     .open = switchtec_dev_open,
1250     .release = switchtec_dev_release,
1251     .write = switchtec_dev_write,
1252     .read = switchtec_dev_read,
1253     .poll = switchtec_dev_poll,
1254     .unlocked_ioctl = switchtec_dev_ioctl,
1255     .compat_ioctl = compat_ptr_ioctl,
1256 };
1257 
1258 static void link_event_work(struct work_struct *work)
1259 {
1260     struct switchtec_dev *stdev;
1261 
1262     stdev = container_of(work, struct switchtec_dev, link_event_work);
1263 
1264     if (stdev->link_notifier)
1265         stdev->link_notifier(stdev);
1266 }
1267 
1268 static void check_link_state_events(struct switchtec_dev *stdev)
1269 {
1270     int idx;
1271     u32 reg;
1272     int count;
1273     int occurred = 0;
1274 
1275     for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1276         reg = ioread32(&stdev->mmio_pff_csr[idx].link_state_hdr);
1277         dev_dbg(&stdev->dev, "link_state: %d->%08x\n", idx, reg);
1278         count = (reg >> 5) & 0xFF;
1279 
1280         if (count != stdev->link_event_count[idx]) {
1281             occurred = 1;
1282             stdev->link_event_count[idx] = count;
1283         }
1284     }
1285 
1286     if (occurred)
1287         schedule_work(&stdev->link_event_work);
1288 }
1289 
1290 static void enable_link_state_events(struct switchtec_dev *stdev)
1291 {
1292     int idx;
1293 
1294     for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1295         iowrite32(SWITCHTEC_EVENT_CLEAR |
1296               SWITCHTEC_EVENT_EN_IRQ,
1297               &stdev->mmio_pff_csr[idx].link_state_hdr);
1298     }
1299 }
1300 
1301 static void enable_dma_mrpc(struct switchtec_dev *stdev)
1302 {
1303     writeq(stdev->dma_mrpc_dma_addr, &stdev->mmio_mrpc->dma_addr);
1304     flush_wc_buf(stdev);
1305     iowrite32(SWITCHTEC_DMA_MRPC_EN, &stdev->mmio_mrpc->dma_en);
1306 }
1307 
1308 static void stdev_release(struct device *dev)
1309 {
1310     struct switchtec_dev *stdev = to_stdev(dev);
1311 
1312     if (stdev->dma_mrpc) {
1313         iowrite32(0, &stdev->mmio_mrpc->dma_en);
1314         flush_wc_buf(stdev);
1315         writeq(0, &stdev->mmio_mrpc->dma_addr);
1316         dma_free_coherent(&stdev->pdev->dev, sizeof(*stdev->dma_mrpc),
1317                 stdev->dma_mrpc, stdev->dma_mrpc_dma_addr);
1318     }
1319     kfree(stdev);
1320 }
1321 
1322 static void stdev_kill(struct switchtec_dev *stdev)
1323 {
1324     struct switchtec_user *stuser, *tmpuser;
1325 
1326     pci_clear_master(stdev->pdev);
1327 
1328     cancel_delayed_work_sync(&stdev->mrpc_timeout);
1329 
1330     /* Mark the hardware as unavailable and complete all completions */
1331     mutex_lock(&stdev->mrpc_mutex);
1332     stdev->alive = false;
1333 
1334     /* Wake up and kill any users waiting on an MRPC request */
1335     list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) {
1336         stuser->cmd_done = true;
1337         wake_up_interruptible(&stuser->cmd_comp);
1338         list_del_init(&stuser->list);
1339         stuser_put(stuser);
1340     }
1341 
1342     mutex_unlock(&stdev->mrpc_mutex);
1343 
1344     /* Wake up any users waiting on event_wq */
1345     wake_up_interruptible(&stdev->event_wq);
1346 }
1347 
1348 static struct switchtec_dev *stdev_create(struct pci_dev *pdev)
1349 {
1350     struct switchtec_dev *stdev;
1351     int minor;
1352     struct device *dev;
1353     struct cdev *cdev;
1354     int rc;
1355 
1356     stdev = kzalloc_node(sizeof(*stdev), GFP_KERNEL,
1357                  dev_to_node(&pdev->dev));
1358     if (!stdev)
1359         return ERR_PTR(-ENOMEM);
1360 
1361     stdev->alive = true;
1362     stdev->pdev = pdev;
1363     INIT_LIST_HEAD(&stdev->mrpc_queue);
1364     mutex_init(&stdev->mrpc_mutex);
1365     stdev->mrpc_busy = 0;
1366     INIT_WORK(&stdev->mrpc_work, mrpc_event_work);
1367     INIT_DELAYED_WORK(&stdev->mrpc_timeout, mrpc_timeout_work);
1368     INIT_WORK(&stdev->link_event_work, link_event_work);
1369     init_waitqueue_head(&stdev->event_wq);
1370     atomic_set(&stdev->event_cnt, 0);
1371 
1372     dev = &stdev->dev;
1373     device_initialize(dev);
1374     dev->class = switchtec_class;
1375     dev->parent = &pdev->dev;
1376     dev->groups = switchtec_device_groups;
1377     dev->release = stdev_release;
1378 
1379     minor = ida_alloc(&switchtec_minor_ida, GFP_KERNEL);
1380     if (minor < 0) {
1381         rc = minor;
1382         goto err_put;
1383     }
1384 
1385     dev->devt = MKDEV(MAJOR(switchtec_devt), minor);
1386     dev_set_name(dev, "switchtec%d", minor);
1387 
1388     cdev = &stdev->cdev;
1389     cdev_init(cdev, &switchtec_fops);
1390     cdev->owner = THIS_MODULE;
1391 
1392     return stdev;
1393 
1394 err_put:
1395     put_device(&stdev->dev);
1396     return ERR_PTR(rc);
1397 }
1398 
1399 static int mask_event(struct switchtec_dev *stdev, int eid, int idx)
1400 {
1401     size_t off = event_regs[eid].offset;
1402     u32 __iomem *hdr_reg;
1403     u32 hdr;
1404 
1405     hdr_reg = event_regs[eid].map_reg(stdev, off, idx);
1406     hdr = ioread32(hdr_reg);
1407 
1408     if (hdr & SWITCHTEC_EVENT_NOT_SUPP)
1409         return 0;
1410 
1411     if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ))
1412         return 0;
1413 
1414     dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr);
1415     hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED);
1416     iowrite32(hdr, hdr_reg);
1417 
1418     return 1;
1419 }
1420 
1421 static int mask_all_events(struct switchtec_dev *stdev, int eid)
1422 {
1423     int idx;
1424     int count = 0;
1425 
1426     if (event_regs[eid].map_reg == part_ev_reg) {
1427         for (idx = 0; idx < stdev->partition_count; idx++)
1428             count += mask_event(stdev, eid, idx);
1429     } else if (event_regs[eid].map_reg == pff_ev_reg) {
1430         for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1431             if (!stdev->pff_local[idx])
1432                 continue;
1433 
1434             count += mask_event(stdev, eid, idx);
1435         }
1436     } else {
1437         count += mask_event(stdev, eid, 0);
1438     }
1439 
1440     return count;
1441 }
1442 
1443 static irqreturn_t switchtec_event_isr(int irq, void *dev)
1444 {
1445     struct switchtec_dev *stdev = dev;
1446     u32 reg;
1447     irqreturn_t ret = IRQ_NONE;
1448     int eid, event_count = 0;
1449 
1450     reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr);
1451     if (reg & SWITCHTEC_EVENT_OCCURRED) {
1452         dev_dbg(&stdev->dev, "%s: mrpc comp\n", __func__);
1453         ret = IRQ_HANDLED;
1454         schedule_work(&stdev->mrpc_work);
1455         iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr);
1456     }
1457 
1458     check_link_state_events(stdev);
1459 
1460     for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++) {
1461         if (eid == SWITCHTEC_IOCTL_EVENT_LINK_STATE ||
1462             eid == SWITCHTEC_IOCTL_EVENT_MRPC_COMP)
1463             continue;
1464 
1465         event_count += mask_all_events(stdev, eid);
1466     }
1467 
1468     if (event_count) {
1469         atomic_inc(&stdev->event_cnt);
1470         wake_up_interruptible(&stdev->event_wq);
1471         dev_dbg(&stdev->dev, "%s: %d events\n", __func__,
1472             event_count);
1473         return IRQ_HANDLED;
1474     }
1475 
1476     return ret;
1477 }
1478 
1479 
1480 static irqreturn_t switchtec_dma_mrpc_isr(int irq, void *dev)
1481 {
1482     struct switchtec_dev *stdev = dev;
1483     irqreturn_t ret = IRQ_NONE;
1484 
1485     iowrite32(SWITCHTEC_EVENT_CLEAR |
1486           SWITCHTEC_EVENT_EN_IRQ,
1487           &stdev->mmio_part_cfg->mrpc_comp_hdr);
1488     schedule_work(&stdev->mrpc_work);
1489 
1490     ret = IRQ_HANDLED;
1491     return ret;
1492 }
1493 
1494 static int switchtec_init_isr(struct switchtec_dev *stdev)
1495 {
1496     int nvecs;
1497     int event_irq;
1498     int dma_mrpc_irq;
1499     int rc;
1500 
1501     if (nirqs < 4)
1502         nirqs = 4;
1503 
1504     nvecs = pci_alloc_irq_vectors(stdev->pdev, 1, nirqs,
1505                       PCI_IRQ_MSIX | PCI_IRQ_MSI |
1506                       PCI_IRQ_VIRTUAL);
1507     if (nvecs < 0)
1508         return nvecs;
1509 
1510     event_irq = ioread16(&stdev->mmio_part_cfg->vep_vector_number);
1511     if (event_irq < 0 || event_irq >= nvecs)
1512         return -EFAULT;
1513 
1514     event_irq = pci_irq_vector(stdev->pdev, event_irq);
1515     if (event_irq < 0)
1516         return event_irq;
1517 
1518     rc = devm_request_irq(&stdev->pdev->dev, event_irq,
1519                 switchtec_event_isr, 0,
1520                 KBUILD_MODNAME, stdev);
1521 
1522     if (rc)
1523         return rc;
1524 
1525     if (!stdev->dma_mrpc)
1526         return rc;
1527 
1528     dma_mrpc_irq = ioread32(&stdev->mmio_mrpc->dma_vector);
1529     if (dma_mrpc_irq < 0 || dma_mrpc_irq >= nvecs)
1530         return -EFAULT;
1531 
1532     dma_mrpc_irq  = pci_irq_vector(stdev->pdev, dma_mrpc_irq);
1533     if (dma_mrpc_irq < 0)
1534         return dma_mrpc_irq;
1535 
1536     rc = devm_request_irq(&stdev->pdev->dev, dma_mrpc_irq,
1537                 switchtec_dma_mrpc_isr, 0,
1538                 KBUILD_MODNAME, stdev);
1539 
1540     return rc;
1541 }
1542 
1543 static void init_pff(struct switchtec_dev *stdev)
1544 {
1545     int i;
1546     u32 reg;
1547     struct part_cfg_regs __iomem *pcfg = stdev->mmio_part_cfg;
1548 
1549     for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
1550         reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
1551         if (reg != PCI_VENDOR_ID_MICROSEMI)
1552             break;
1553     }
1554 
1555     stdev->pff_csr_count = i;
1556 
1557     reg = ioread32(&pcfg->usp_pff_inst_id);
1558     if (reg < stdev->pff_csr_count)
1559         stdev->pff_local[reg] = 1;
1560 
1561     reg = ioread32(&pcfg->vep_pff_inst_id) & 0xFF;
1562     if (reg < stdev->pff_csr_count)
1563         stdev->pff_local[reg] = 1;
1564 
1565     for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1566         reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1567         if (reg < stdev->pff_csr_count)
1568             stdev->pff_local[reg] = 1;
1569     }
1570 }
1571 
1572 static int switchtec_init_pci(struct switchtec_dev *stdev,
1573                   struct pci_dev *pdev)
1574 {
1575     int rc;
1576     void __iomem *map;
1577     unsigned long res_start, res_len;
1578     u32 __iomem *part_id;
1579 
1580     rc = pcim_enable_device(pdev);
1581     if (rc)
1582         return rc;
1583 
1584     rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1585     if (rc)
1586         return rc;
1587 
1588     pci_set_master(pdev);
1589 
1590     res_start = pci_resource_start(pdev, 0);
1591     res_len = pci_resource_len(pdev, 0);
1592 
1593     if (!devm_request_mem_region(&pdev->dev, res_start,
1594                      res_len, KBUILD_MODNAME))
1595         return -EBUSY;
1596 
1597     stdev->mmio_mrpc = devm_ioremap_wc(&pdev->dev, res_start,
1598                        SWITCHTEC_GAS_TOP_CFG_OFFSET);
1599     if (!stdev->mmio_mrpc)
1600         return -ENOMEM;
1601 
1602     map = devm_ioremap(&pdev->dev,
1603                res_start + SWITCHTEC_GAS_TOP_CFG_OFFSET,
1604                res_len - SWITCHTEC_GAS_TOP_CFG_OFFSET);
1605     if (!map)
1606         return -ENOMEM;
1607 
1608     stdev->mmio = map - SWITCHTEC_GAS_TOP_CFG_OFFSET;
1609     stdev->mmio_sw_event = stdev->mmio + SWITCHTEC_GAS_SW_EVENT_OFFSET;
1610     stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
1611     stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET;
1612     stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET;
1613 
1614     if (stdev->gen == SWITCHTEC_GEN3)
1615         part_id = &stdev->mmio_sys_info->gen3.partition_id;
1616     else if (stdev->gen == SWITCHTEC_GEN4)
1617         part_id = &stdev->mmio_sys_info->gen4.partition_id;
1618     else
1619         return -EOPNOTSUPP;
1620 
1621     stdev->partition = ioread8(part_id);
1622     stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count);
1623     stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET;
1624     stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition];
1625     stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET;
1626 
1627     if (stdev->partition_count < 1)
1628         stdev->partition_count = 1;
1629 
1630     init_pff(stdev);
1631 
1632     pci_set_drvdata(pdev, stdev);
1633 
1634     if (!use_dma_mrpc)
1635         return 0;
1636 
1637     if (ioread32(&stdev->mmio_mrpc->dma_ver) == 0)
1638         return 0;
1639 
1640     stdev->dma_mrpc = dma_alloc_coherent(&stdev->pdev->dev,
1641                          sizeof(*stdev->dma_mrpc),
1642                          &stdev->dma_mrpc_dma_addr,
1643                          GFP_KERNEL);
1644     if (stdev->dma_mrpc == NULL)
1645         return -ENOMEM;
1646 
1647     return 0;
1648 }
1649 
1650 static int switchtec_pci_probe(struct pci_dev *pdev,
1651                    const struct pci_device_id *id)
1652 {
1653     struct switchtec_dev *stdev;
1654     int rc;
1655 
1656     if (pdev->class == (PCI_CLASS_BRIDGE_OTHER << 8))
1657         request_module_nowait("ntb_hw_switchtec");
1658 
1659     stdev = stdev_create(pdev);
1660     if (IS_ERR(stdev))
1661         return PTR_ERR(stdev);
1662 
1663     stdev->gen = id->driver_data;
1664 
1665     rc = switchtec_init_pci(stdev, pdev);
1666     if (rc)
1667         goto err_put;
1668 
1669     rc = switchtec_init_isr(stdev);
1670     if (rc) {
1671         dev_err(&stdev->dev, "failed to init isr.\n");
1672         goto err_put;
1673     }
1674 
1675     iowrite32(SWITCHTEC_EVENT_CLEAR |
1676           SWITCHTEC_EVENT_EN_IRQ,
1677           &stdev->mmio_part_cfg->mrpc_comp_hdr);
1678     enable_link_state_events(stdev);
1679 
1680     if (stdev->dma_mrpc)
1681         enable_dma_mrpc(stdev);
1682 
1683     rc = cdev_device_add(&stdev->cdev, &stdev->dev);
1684     if (rc)
1685         goto err_devadd;
1686 
1687     dev_info(&stdev->dev, "Management device registered.\n");
1688 
1689     return 0;
1690 
1691 err_devadd:
1692     stdev_kill(stdev);
1693 err_put:
1694     ida_free(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1695     put_device(&stdev->dev);
1696     return rc;
1697 }
1698 
1699 static void switchtec_pci_remove(struct pci_dev *pdev)
1700 {
1701     struct switchtec_dev *stdev = pci_get_drvdata(pdev);
1702 
1703     pci_set_drvdata(pdev, NULL);
1704 
1705     cdev_device_del(&stdev->cdev, &stdev->dev);
1706     ida_free(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1707     dev_info(&stdev->dev, "unregistered.\n");
1708     stdev_kill(stdev);
1709     put_device(&stdev->dev);
1710 }
1711 
1712 #define SWITCHTEC_PCI_DEVICE(device_id, gen) \
1713     { \
1714         .vendor     = PCI_VENDOR_ID_MICROSEMI, \
1715         .device     = device_id, \
1716         .subvendor  = PCI_ANY_ID, \
1717         .subdevice  = PCI_ANY_ID, \
1718         .class      = (PCI_CLASS_MEMORY_OTHER << 8), \
1719         .class_mask = 0xFFFFFFFF, \
1720         .driver_data = gen, \
1721     }, \
1722     { \
1723         .vendor     = PCI_VENDOR_ID_MICROSEMI, \
1724         .device     = device_id, \
1725         .subvendor  = PCI_ANY_ID, \
1726         .subdevice  = PCI_ANY_ID, \
1727         .class      = (PCI_CLASS_BRIDGE_OTHER << 8), \
1728         .class_mask = 0xFFFFFFFF, \
1729         .driver_data = gen, \
1730     }
1731 
1732 static const struct pci_device_id switchtec_pci_tbl[] = {
1733     SWITCHTEC_PCI_DEVICE(0x8531, SWITCHTEC_GEN3),  //PFX 24xG3
1734     SWITCHTEC_PCI_DEVICE(0x8532, SWITCHTEC_GEN3),  //PFX 32xG3
1735     SWITCHTEC_PCI_DEVICE(0x8533, SWITCHTEC_GEN3),  //PFX 48xG3
1736     SWITCHTEC_PCI_DEVICE(0x8534, SWITCHTEC_GEN3),  //PFX 64xG3
1737     SWITCHTEC_PCI_DEVICE(0x8535, SWITCHTEC_GEN3),  //PFX 80xG3
1738     SWITCHTEC_PCI_DEVICE(0x8536, SWITCHTEC_GEN3),  //PFX 96xG3
1739     SWITCHTEC_PCI_DEVICE(0x8541, SWITCHTEC_GEN3),  //PSX 24xG3
1740     SWITCHTEC_PCI_DEVICE(0x8542, SWITCHTEC_GEN3),  //PSX 32xG3
1741     SWITCHTEC_PCI_DEVICE(0x8543, SWITCHTEC_GEN3),  //PSX 48xG3
1742     SWITCHTEC_PCI_DEVICE(0x8544, SWITCHTEC_GEN3),  //PSX 64xG3
1743     SWITCHTEC_PCI_DEVICE(0x8545, SWITCHTEC_GEN3),  //PSX 80xG3
1744     SWITCHTEC_PCI_DEVICE(0x8546, SWITCHTEC_GEN3),  //PSX 96xG3
1745     SWITCHTEC_PCI_DEVICE(0x8551, SWITCHTEC_GEN3),  //PAX 24XG3
1746     SWITCHTEC_PCI_DEVICE(0x8552, SWITCHTEC_GEN3),  //PAX 32XG3
1747     SWITCHTEC_PCI_DEVICE(0x8553, SWITCHTEC_GEN3),  //PAX 48XG3
1748     SWITCHTEC_PCI_DEVICE(0x8554, SWITCHTEC_GEN3),  //PAX 64XG3
1749     SWITCHTEC_PCI_DEVICE(0x8555, SWITCHTEC_GEN3),  //PAX 80XG3
1750     SWITCHTEC_PCI_DEVICE(0x8556, SWITCHTEC_GEN3),  //PAX 96XG3
1751     SWITCHTEC_PCI_DEVICE(0x8561, SWITCHTEC_GEN3),  //PFXL 24XG3
1752     SWITCHTEC_PCI_DEVICE(0x8562, SWITCHTEC_GEN3),  //PFXL 32XG3
1753     SWITCHTEC_PCI_DEVICE(0x8563, SWITCHTEC_GEN3),  //PFXL 48XG3
1754     SWITCHTEC_PCI_DEVICE(0x8564, SWITCHTEC_GEN3),  //PFXL 64XG3
1755     SWITCHTEC_PCI_DEVICE(0x8565, SWITCHTEC_GEN3),  //PFXL 80XG3
1756     SWITCHTEC_PCI_DEVICE(0x8566, SWITCHTEC_GEN3),  //PFXL 96XG3
1757     SWITCHTEC_PCI_DEVICE(0x8571, SWITCHTEC_GEN3),  //PFXI 24XG3
1758     SWITCHTEC_PCI_DEVICE(0x8572, SWITCHTEC_GEN3),  //PFXI 32XG3
1759     SWITCHTEC_PCI_DEVICE(0x8573, SWITCHTEC_GEN3),  //PFXI 48XG3
1760     SWITCHTEC_PCI_DEVICE(0x8574, SWITCHTEC_GEN3),  //PFXI 64XG3
1761     SWITCHTEC_PCI_DEVICE(0x8575, SWITCHTEC_GEN3),  //PFXI 80XG3
1762     SWITCHTEC_PCI_DEVICE(0x8576, SWITCHTEC_GEN3),  //PFXI 96XG3
1763     SWITCHTEC_PCI_DEVICE(0x4000, SWITCHTEC_GEN4),  //PFX 100XG4
1764     SWITCHTEC_PCI_DEVICE(0x4084, SWITCHTEC_GEN4),  //PFX 84XG4
1765     SWITCHTEC_PCI_DEVICE(0x4068, SWITCHTEC_GEN4),  //PFX 68XG4
1766     SWITCHTEC_PCI_DEVICE(0x4052, SWITCHTEC_GEN4),  //PFX 52XG4
1767     SWITCHTEC_PCI_DEVICE(0x4036, SWITCHTEC_GEN4),  //PFX 36XG4
1768     SWITCHTEC_PCI_DEVICE(0x4028, SWITCHTEC_GEN4),  //PFX 28XG4
1769     SWITCHTEC_PCI_DEVICE(0x4100, SWITCHTEC_GEN4),  //PSX 100XG4
1770     SWITCHTEC_PCI_DEVICE(0x4184, SWITCHTEC_GEN4),  //PSX 84XG4
1771     SWITCHTEC_PCI_DEVICE(0x4168, SWITCHTEC_GEN4),  //PSX 68XG4
1772     SWITCHTEC_PCI_DEVICE(0x4152, SWITCHTEC_GEN4),  //PSX 52XG4
1773     SWITCHTEC_PCI_DEVICE(0x4136, SWITCHTEC_GEN4),  //PSX 36XG4
1774     SWITCHTEC_PCI_DEVICE(0x4128, SWITCHTEC_GEN4),  //PSX 28XG4
1775     SWITCHTEC_PCI_DEVICE(0x4200, SWITCHTEC_GEN4),  //PAX 100XG4
1776     SWITCHTEC_PCI_DEVICE(0x4284, SWITCHTEC_GEN4),  //PAX 84XG4
1777     SWITCHTEC_PCI_DEVICE(0x4268, SWITCHTEC_GEN4),  //PAX 68XG4
1778     SWITCHTEC_PCI_DEVICE(0x4252, SWITCHTEC_GEN4),  //PAX 52XG4
1779     SWITCHTEC_PCI_DEVICE(0x4236, SWITCHTEC_GEN4),  //PAX 36XG4
1780     SWITCHTEC_PCI_DEVICE(0x4228, SWITCHTEC_GEN4),  //PAX 28XG4
1781     SWITCHTEC_PCI_DEVICE(0x4352, SWITCHTEC_GEN4),  //PFXA 52XG4
1782     SWITCHTEC_PCI_DEVICE(0x4336, SWITCHTEC_GEN4),  //PFXA 36XG4
1783     SWITCHTEC_PCI_DEVICE(0x4328, SWITCHTEC_GEN4),  //PFXA 28XG4
1784     SWITCHTEC_PCI_DEVICE(0x4452, SWITCHTEC_GEN4),  //PSXA 52XG4
1785     SWITCHTEC_PCI_DEVICE(0x4436, SWITCHTEC_GEN4),  //PSXA 36XG4
1786     SWITCHTEC_PCI_DEVICE(0x4428, SWITCHTEC_GEN4),  //PSXA 28XG4
1787     SWITCHTEC_PCI_DEVICE(0x4552, SWITCHTEC_GEN4),  //PAXA 52XG4
1788     SWITCHTEC_PCI_DEVICE(0x4536, SWITCHTEC_GEN4),  //PAXA 36XG4
1789     SWITCHTEC_PCI_DEVICE(0x4528, SWITCHTEC_GEN4),  //PAXA 28XG4
1790     {0}
1791 };
1792 MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl);
1793 
1794 static struct pci_driver switchtec_pci_driver = {
1795     .name       = KBUILD_MODNAME,
1796     .id_table   = switchtec_pci_tbl,
1797     .probe      = switchtec_pci_probe,
1798     .remove     = switchtec_pci_remove,
1799 };
1800 
1801 static int __init switchtec_init(void)
1802 {
1803     int rc;
1804 
1805     rc = alloc_chrdev_region(&switchtec_devt, 0, max_devices,
1806                  "switchtec");
1807     if (rc)
1808         return rc;
1809 
1810     switchtec_class = class_create(THIS_MODULE, "switchtec");
1811     if (IS_ERR(switchtec_class)) {
1812         rc = PTR_ERR(switchtec_class);
1813         goto err_create_class;
1814     }
1815 
1816     rc = pci_register_driver(&switchtec_pci_driver);
1817     if (rc)
1818         goto err_pci_register;
1819 
1820     pr_info(KBUILD_MODNAME ": loaded.\n");
1821 
1822     return 0;
1823 
1824 err_pci_register:
1825     class_destroy(switchtec_class);
1826 
1827 err_create_class:
1828     unregister_chrdev_region(switchtec_devt, max_devices);
1829 
1830     return rc;
1831 }
1832 module_init(switchtec_init);
1833 
1834 static void __exit switchtec_exit(void)
1835 {
1836     pci_unregister_driver(&switchtec_pci_driver);
1837     class_destroy(switchtec_class);
1838     unregister_chrdev_region(switchtec_devt, max_devices);
1839     ida_destroy(&switchtec_minor_ida);
1840 
1841     pr_info(KBUILD_MODNAME ": unloaded.\n");
1842 }
1843 module_exit(switchtec_exit);
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