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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * PCI <-> OF mapping helpers
0004  *
0005  * Copyright 2011 IBM Corp.
0006  */
0007 #define pr_fmt(fmt) "PCI: OF: " fmt
0008 
0009 #include <linux/irqdomain.h>
0010 #include <linux/kernel.h>
0011 #include <linux/pci.h>
0012 #include <linux/of.h>
0013 #include <linux/of_irq.h>
0014 #include <linux/of_address.h>
0015 #include <linux/of_pci.h>
0016 #include "pci.h"
0017 
0018 #ifdef CONFIG_PCI
0019 void pci_set_of_node(struct pci_dev *dev)
0020 {
0021     if (!dev->bus->dev.of_node)
0022         return;
0023     dev->dev.of_node = of_pci_find_child_device(dev->bus->dev.of_node,
0024                             dev->devfn);
0025     if (dev->dev.of_node)
0026         dev->dev.fwnode = &dev->dev.of_node->fwnode;
0027 }
0028 
0029 void pci_release_of_node(struct pci_dev *dev)
0030 {
0031     of_node_put(dev->dev.of_node);
0032     dev->dev.of_node = NULL;
0033     dev->dev.fwnode = NULL;
0034 }
0035 
0036 void pci_set_bus_of_node(struct pci_bus *bus)
0037 {
0038     struct device_node *node;
0039 
0040     if (bus->self == NULL) {
0041         node = pcibios_get_phb_of_node(bus);
0042     } else {
0043         node = of_node_get(bus->self->dev.of_node);
0044         if (node && of_property_read_bool(node, "external-facing"))
0045             bus->self->external_facing = true;
0046     }
0047 
0048     bus->dev.of_node = node;
0049 
0050     if (bus->dev.of_node)
0051         bus->dev.fwnode = &bus->dev.of_node->fwnode;
0052 }
0053 
0054 void pci_release_bus_of_node(struct pci_bus *bus)
0055 {
0056     of_node_put(bus->dev.of_node);
0057     bus->dev.of_node = NULL;
0058     bus->dev.fwnode = NULL;
0059 }
0060 
0061 struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus)
0062 {
0063     /* This should only be called for PHBs */
0064     if (WARN_ON(bus->self || bus->parent))
0065         return NULL;
0066 
0067     /*
0068      * Look for a node pointer in either the intermediary device we
0069      * create above the root bus or its own parent. Normally only
0070      * the later is populated.
0071      */
0072     if (bus->bridge->of_node)
0073         return of_node_get(bus->bridge->of_node);
0074     if (bus->bridge->parent && bus->bridge->parent->of_node)
0075         return of_node_get(bus->bridge->parent->of_node);
0076     return NULL;
0077 }
0078 
0079 struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus)
0080 {
0081 #ifdef CONFIG_IRQ_DOMAIN
0082     struct irq_domain *d;
0083 
0084     if (!bus->dev.of_node)
0085         return NULL;
0086 
0087     /* Start looking for a phandle to an MSI controller. */
0088     d = of_msi_get_domain(&bus->dev, bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
0089     if (d)
0090         return d;
0091 
0092     /*
0093      * If we don't have an msi-parent property, look for a domain
0094      * directly attached to the host bridge.
0095      */
0096     d = irq_find_matching_host(bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
0097     if (d)
0098         return d;
0099 
0100     return irq_find_host(bus->dev.of_node);
0101 #else
0102     return NULL;
0103 #endif
0104 }
0105 
0106 bool pci_host_of_has_msi_map(struct device *dev)
0107 {
0108     if (dev && dev->of_node)
0109         return of_get_property(dev->of_node, "msi-map", NULL);
0110     return false;
0111 }
0112 
0113 static inline int __of_pci_pci_compare(struct device_node *node,
0114                        unsigned int data)
0115 {
0116     int devfn;
0117 
0118     devfn = of_pci_get_devfn(node);
0119     if (devfn < 0)
0120         return 0;
0121 
0122     return devfn == data;
0123 }
0124 
0125 struct device_node *of_pci_find_child_device(struct device_node *parent,
0126                          unsigned int devfn)
0127 {
0128     struct device_node *node, *node2;
0129 
0130     for_each_child_of_node(parent, node) {
0131         if (__of_pci_pci_compare(node, devfn))
0132             return node;
0133         /*
0134          * Some OFs create a parent node "multifunc-device" as
0135          * a fake root for all functions of a multi-function
0136          * device we go down them as well.
0137          */
0138         if (of_node_name_eq(node, "multifunc-device")) {
0139             for_each_child_of_node(node, node2) {
0140                 if (__of_pci_pci_compare(node2, devfn)) {
0141                     of_node_put(node);
0142                     return node2;
0143                 }
0144             }
0145         }
0146     }
0147     return NULL;
0148 }
0149 EXPORT_SYMBOL_GPL(of_pci_find_child_device);
0150 
0151 /**
0152  * of_pci_get_devfn() - Get device and function numbers for a device node
0153  * @np: device node
0154  *
0155  * Parses a standard 5-cell PCI resource and returns an 8-bit value that can
0156  * be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device
0157  * and function numbers respectively. On error a negative error code is
0158  * returned.
0159  */
0160 int of_pci_get_devfn(struct device_node *np)
0161 {
0162     u32 reg[5];
0163     int error;
0164 
0165     error = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));
0166     if (error)
0167         return error;
0168 
0169     return (reg[0] >> 8) & 0xff;
0170 }
0171 EXPORT_SYMBOL_GPL(of_pci_get_devfn);
0172 
0173 /**
0174  * of_pci_parse_bus_range() - parse the bus-range property of a PCI device
0175  * @node: device node
0176  * @res: address to a struct resource to return the bus-range
0177  *
0178  * Returns 0 on success or a negative error-code on failure.
0179  */
0180 int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
0181 {
0182     u32 bus_range[2];
0183     int error;
0184 
0185     error = of_property_read_u32_array(node, "bus-range", bus_range,
0186                        ARRAY_SIZE(bus_range));
0187     if (error)
0188         return error;
0189 
0190     res->name = node->name;
0191     res->start = bus_range[0];
0192     res->end = bus_range[1];
0193     res->flags = IORESOURCE_BUS;
0194 
0195     return 0;
0196 }
0197 EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
0198 
0199 /**
0200  * of_get_pci_domain_nr - Find the host bridge domain number
0201  *            of the given device node.
0202  * @node: Device tree node with the domain information.
0203  *
0204  * This function will try to obtain the host bridge domain number by finding
0205  * a property called "linux,pci-domain" of the given device node.
0206  *
0207  * Return:
0208  * * > 0    - On success, an associated domain number.
0209  * * -EINVAL    - The property "linux,pci-domain" does not exist.
0210  * * -ENODATA   - The linux,pci-domain" property does not have value.
0211  * * -EOVERFLOW - Invalid "linux,pci-domain" property value.
0212  *
0213  * Returns the associated domain number from DT in the range [0-0xffff], or
0214  * a negative value if the required property is not found.
0215  */
0216 int of_get_pci_domain_nr(struct device_node *node)
0217 {
0218     u32 domain;
0219     int error;
0220 
0221     error = of_property_read_u32(node, "linux,pci-domain", &domain);
0222     if (error)
0223         return error;
0224 
0225     return (u16)domain;
0226 }
0227 EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
0228 
0229 /**
0230  * of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
0231  *                           is present and valid
0232  */
0233 void of_pci_check_probe_only(void)
0234 {
0235     u32 val;
0236     int ret;
0237 
0238     ret = of_property_read_u32(of_chosen, "linux,pci-probe-only", &val);
0239     if (ret) {
0240         if (ret == -ENODATA || ret == -EOVERFLOW)
0241             pr_warn("linux,pci-probe-only without valid value, ignoring\n");
0242         return;
0243     }
0244 
0245     if (val)
0246         pci_add_flags(PCI_PROBE_ONLY);
0247     else
0248         pci_clear_flags(PCI_PROBE_ONLY);
0249 
0250     pr_info("PROBE_ONLY %s\n", val ? "enabled" : "disabled");
0251 }
0252 EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
0253 
0254 /**
0255  * devm_of_pci_get_host_bridge_resources() - Resource-managed parsing of PCI
0256  *                                           host bridge resources from DT
0257  * @dev: host bridge device
0258  * @busno: bus number associated with the bridge root bus
0259  * @bus_max: maximum number of buses for this bridge
0260  * @resources: list where the range of resources will be added after DT parsing
0261  * @ib_resources: list where the range of inbound resources (with addresses
0262  *                from 'dma-ranges') will be added after DT parsing
0263  * @io_base: pointer to a variable that will contain on return the physical
0264  * address for the start of the I/O range. Can be NULL if the caller doesn't
0265  * expect I/O ranges to be present in the device tree.
0266  *
0267  * This function will parse the "ranges" property of a PCI host bridge device
0268  * node and setup the resource mapping based on its content. It is expected
0269  * that the property conforms with the Power ePAPR document.
0270  *
0271  * It returns zero if the range parsing has been successful or a standard error
0272  * value if it failed.
0273  */
0274 static int devm_of_pci_get_host_bridge_resources(struct device *dev,
0275             unsigned char busno, unsigned char bus_max,
0276             struct list_head *resources,
0277             struct list_head *ib_resources,
0278             resource_size_t *io_base)
0279 {
0280     struct device_node *dev_node = dev->of_node;
0281     struct resource *res, tmp_res;
0282     struct resource *bus_range;
0283     struct of_pci_range range;
0284     struct of_pci_range_parser parser;
0285     const char *range_type;
0286     int err;
0287 
0288     if (io_base)
0289         *io_base = (resource_size_t)OF_BAD_ADDR;
0290 
0291     bus_range = devm_kzalloc(dev, sizeof(*bus_range), GFP_KERNEL);
0292     if (!bus_range)
0293         return -ENOMEM;
0294 
0295     dev_info(dev, "host bridge %pOF ranges:\n", dev_node);
0296 
0297     err = of_pci_parse_bus_range(dev_node, bus_range);
0298     if (err) {
0299         bus_range->start = busno;
0300         bus_range->end = bus_max;
0301         bus_range->flags = IORESOURCE_BUS;
0302         dev_info(dev, "  No bus range found for %pOF, using %pR\n",
0303              dev_node, bus_range);
0304     } else {
0305         if (bus_range->end > bus_range->start + bus_max)
0306             bus_range->end = bus_range->start + bus_max;
0307     }
0308     pci_add_resource(resources, bus_range);
0309 
0310     /* Check for ranges property */
0311     err = of_pci_range_parser_init(&parser, dev_node);
0312     if (err)
0313         return 0;
0314 
0315     dev_dbg(dev, "Parsing ranges property...\n");
0316     for_each_of_pci_range(&parser, &range) {
0317         /* Read next ranges element */
0318         if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
0319             range_type = "IO";
0320         else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
0321             range_type = "MEM";
0322         else
0323             range_type = "err";
0324         dev_info(dev, "  %6s %#012llx..%#012llx -> %#012llx\n",
0325              range_type, range.cpu_addr,
0326              range.cpu_addr + range.size - 1, range.pci_addr);
0327 
0328         /*
0329          * If we failed translation or got a zero-sized region
0330          * then skip this range
0331          */
0332         if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
0333             continue;
0334 
0335         err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
0336         if (err)
0337             continue;
0338 
0339         res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
0340         if (!res) {
0341             err = -ENOMEM;
0342             goto failed;
0343         }
0344 
0345         if (resource_type(res) == IORESOURCE_IO) {
0346             if (!io_base) {
0347                 dev_err(dev, "I/O range found for %pOF. Please provide an io_base pointer to save CPU base address\n",
0348                     dev_node);
0349                 err = -EINVAL;
0350                 goto failed;
0351             }
0352             if (*io_base != (resource_size_t)OF_BAD_ADDR)
0353                 dev_warn(dev, "More than one I/O resource converted for %pOF. CPU base address for old range lost!\n",
0354                      dev_node);
0355             *io_base = range.cpu_addr;
0356         } else if (resource_type(res) == IORESOURCE_MEM) {
0357             res->flags &= ~IORESOURCE_MEM_64;
0358         }
0359 
0360         pci_add_resource_offset(resources, res, res->start - range.pci_addr);
0361     }
0362 
0363     /* Check for dma-ranges property */
0364     if (!ib_resources)
0365         return 0;
0366     err = of_pci_dma_range_parser_init(&parser, dev_node);
0367     if (err)
0368         return 0;
0369 
0370     dev_dbg(dev, "Parsing dma-ranges property...\n");
0371     for_each_of_pci_range(&parser, &range) {
0372         /*
0373          * If we failed translation or got a zero-sized region
0374          * then skip this range
0375          */
0376         if (((range.flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM) ||
0377             range.cpu_addr == OF_BAD_ADDR || range.size == 0)
0378             continue;
0379 
0380         dev_info(dev, "  %6s %#012llx..%#012llx -> %#012llx\n",
0381              "IB MEM", range.cpu_addr,
0382              range.cpu_addr + range.size - 1, range.pci_addr);
0383 
0384 
0385         err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
0386         if (err)
0387             continue;
0388 
0389         res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
0390         if (!res) {
0391             err = -ENOMEM;
0392             goto failed;
0393         }
0394 
0395         pci_add_resource_offset(ib_resources, res,
0396                     res->start - range.pci_addr);
0397     }
0398 
0399     return 0;
0400 
0401 failed:
0402     pci_free_resource_list(resources);
0403     return err;
0404 }
0405 
0406 #if IS_ENABLED(CONFIG_OF_IRQ)
0407 /**
0408  * of_irq_parse_pci - Resolve the interrupt for a PCI device
0409  * @pdev:       the device whose interrupt is to be resolved
0410  * @out_irq:    structure of_phandle_args filled by this function
0411  *
0412  * This function resolves the PCI interrupt for a given PCI device. If a
0413  * device-node exists for a given pci_dev, it will use normal OF tree
0414  * walking. If not, it will implement standard swizzling and walk up the
0415  * PCI tree until an device-node is found, at which point it will finish
0416  * resolving using the OF tree walking.
0417  */
0418 static int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
0419 {
0420     struct device_node *dn, *ppnode = NULL;
0421     struct pci_dev *ppdev;
0422     __be32 laddr[3];
0423     u8 pin;
0424     int rc;
0425 
0426     /*
0427      * Check if we have a device node, if yes, fallback to standard
0428      * device tree parsing
0429      */
0430     dn = pci_device_to_OF_node(pdev);
0431     if (dn) {
0432         rc = of_irq_parse_one(dn, 0, out_irq);
0433         if (!rc)
0434             return rc;
0435     }
0436 
0437     /*
0438      * Ok, we don't, time to have fun. Let's start by building up an
0439      * interrupt spec.  we assume #interrupt-cells is 1, which is standard
0440      * for PCI. If you do different, then don't use that routine.
0441      */
0442     rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
0443     if (rc != 0)
0444         goto err;
0445     /* No pin, exit with no error message. */
0446     if (pin == 0)
0447         return -ENODEV;
0448 
0449     /* Local interrupt-map in the device node? Use it! */
0450     if (of_get_property(dn, "interrupt-map", NULL)) {
0451         pin = pci_swizzle_interrupt_pin(pdev, pin);
0452         ppnode = dn;
0453     }
0454 
0455     /* Now we walk up the PCI tree */
0456     while (!ppnode) {
0457         /* Get the pci_dev of our parent */
0458         ppdev = pdev->bus->self;
0459 
0460         /* Ouch, it's a host bridge... */
0461         if (ppdev == NULL) {
0462             ppnode = pci_bus_to_OF_node(pdev->bus);
0463 
0464             /* No node for host bridge ? give up */
0465             if (ppnode == NULL) {
0466                 rc = -EINVAL;
0467                 goto err;
0468             }
0469         } else {
0470             /* We found a P2P bridge, check if it has a node */
0471             ppnode = pci_device_to_OF_node(ppdev);
0472         }
0473 
0474         /*
0475          * Ok, we have found a parent with a device-node, hand over to
0476          * the OF parsing code.
0477          * We build a unit address from the linux device to be used for
0478          * resolution. Note that we use the linux bus number which may
0479          * not match your firmware bus numbering.
0480          * Fortunately, in most cases, interrupt-map-mask doesn't
0481          * include the bus number as part of the matching.
0482          * You should still be careful about that though if you intend
0483          * to rely on this function (you ship a firmware that doesn't
0484          * create device nodes for all PCI devices).
0485          */
0486         if (ppnode)
0487             break;
0488 
0489         /*
0490          * We can only get here if we hit a P2P bridge with no node;
0491          * let's do standard swizzling and try again
0492          */
0493         pin = pci_swizzle_interrupt_pin(pdev, pin);
0494         pdev = ppdev;
0495     }
0496 
0497     out_irq->np = ppnode;
0498     out_irq->args_count = 1;
0499     out_irq->args[0] = pin;
0500     laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
0501     laddr[1] = laddr[2] = cpu_to_be32(0);
0502     rc = of_irq_parse_raw(laddr, out_irq);
0503     if (rc)
0504         goto err;
0505     return 0;
0506 err:
0507     if (rc == -ENOENT) {
0508         dev_warn(&pdev->dev,
0509             "%s: no interrupt-map found, INTx interrupts not available\n",
0510             __func__);
0511         pr_warn_once("%s: possibly some PCI slots don't have level triggered interrupts capability\n",
0512             __func__);
0513     } else {
0514         dev_err(&pdev->dev, "%s: failed with rc=%d\n", __func__, rc);
0515     }
0516     return rc;
0517 }
0518 
0519 /**
0520  * of_irq_parse_and_map_pci() - Decode a PCI IRQ from the device tree and map to a VIRQ
0521  * @dev: The PCI device needing an IRQ
0522  * @slot: PCI slot number; passed when used as map_irq callback. Unused
0523  * @pin: PCI IRQ pin number; passed when used as map_irq callback. Unused
0524  *
0525  * @slot and @pin are unused, but included in the function so that this
0526  * function can be used directly as the map_irq callback to
0527  * pci_assign_irq() and struct pci_host_bridge.map_irq pointer
0528  */
0529 int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
0530 {
0531     struct of_phandle_args oirq;
0532     int ret;
0533 
0534     ret = of_irq_parse_pci(dev, &oirq);
0535     if (ret)
0536         return 0; /* Proper return code 0 == NO_IRQ */
0537 
0538     return irq_create_of_mapping(&oirq);
0539 }
0540 EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci);
0541 #endif  /* CONFIG_OF_IRQ */
0542 
0543 static int pci_parse_request_of_pci_ranges(struct device *dev,
0544                        struct pci_host_bridge *bridge)
0545 {
0546     int err, res_valid = 0;
0547     resource_size_t iobase;
0548     struct resource_entry *win, *tmp;
0549 
0550     INIT_LIST_HEAD(&bridge->windows);
0551     INIT_LIST_HEAD(&bridge->dma_ranges);
0552 
0553     err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &bridge->windows,
0554                             &bridge->dma_ranges, &iobase);
0555     if (err)
0556         return err;
0557 
0558     err = devm_request_pci_bus_resources(dev, &bridge->windows);
0559     if (err)
0560         return err;
0561 
0562     resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
0563         struct resource *res = win->res;
0564 
0565         switch (resource_type(res)) {
0566         case IORESOURCE_IO:
0567             err = devm_pci_remap_iospace(dev, res, iobase);
0568             if (err) {
0569                 dev_warn(dev, "error %d: failed to map resource %pR\n",
0570                      err, res);
0571                 resource_list_destroy_entry(win);
0572             }
0573             break;
0574         case IORESOURCE_MEM:
0575             res_valid |= !(res->flags & IORESOURCE_PREFETCH);
0576 
0577             if (!(res->flags & IORESOURCE_PREFETCH))
0578                 if (upper_32_bits(resource_size(res)))
0579                     dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
0580 
0581             break;
0582         }
0583     }
0584 
0585     if (!res_valid)
0586         dev_warn(dev, "non-prefetchable memory resource required\n");
0587 
0588     return 0;
0589 }
0590 
0591 int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge)
0592 {
0593     if (!dev->of_node)
0594         return 0;
0595 
0596     bridge->swizzle_irq = pci_common_swizzle;
0597     bridge->map_irq = of_irq_parse_and_map_pci;
0598 
0599     return pci_parse_request_of_pci_ranges(dev, bridge);
0600 }
0601 
0602 #endif /* CONFIG_PCI */
0603 
0604 /**
0605  * of_pci_get_max_link_speed - Find the maximum link speed of the given device node.
0606  * @node: Device tree node with the maximum link speed information.
0607  *
0608  * This function will try to find the limitation of link speed by finding
0609  * a property called "max-link-speed" of the given device node.
0610  *
0611  * Return:
0612  * * > 0    - On success, a maximum link speed.
0613  * * -EINVAL    - Invalid "max-link-speed" property value, or failure to access
0614  *        the property of the device tree node.
0615  *
0616  * Returns the associated max link speed from DT, or a negative value if the
0617  * required property is not found or is invalid.
0618  */
0619 int of_pci_get_max_link_speed(struct device_node *node)
0620 {
0621     u32 max_link_speed;
0622 
0623     if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
0624         max_link_speed == 0 || max_link_speed > 4)
0625         return -EINVAL;
0626 
0627     return max_link_speed;
0628 }
0629 EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed);
0630 
0631 /**
0632  * of_pci_get_slot_power_limit - Parses the "slot-power-limit-milliwatt"
0633  *               property.
0634  *
0635  * @node: device tree node with the slot power limit information
0636  * @slot_power_limit_value: pointer where the value should be stored in PCIe
0637  *              Slot Capabilities Register format
0638  * @slot_power_limit_scale: pointer where the scale should be stored in PCIe
0639  *              Slot Capabilities Register format
0640  *
0641  * Returns the slot power limit in milliwatts and if @slot_power_limit_value
0642  * and @slot_power_limit_scale pointers are non-NULL, fills in the value and
0643  * scale in format used by PCIe Slot Capabilities Register.
0644  *
0645  * If the property is not found or is invalid, returns 0.
0646  */
0647 u32 of_pci_get_slot_power_limit(struct device_node *node,
0648                 u8 *slot_power_limit_value,
0649                 u8 *slot_power_limit_scale)
0650 {
0651     u32 slot_power_limit_mw;
0652     u8 value, scale;
0653 
0654     if (of_property_read_u32(node, "slot-power-limit-milliwatt",
0655                  &slot_power_limit_mw))
0656         slot_power_limit_mw = 0;
0657 
0658     /* Calculate Slot Power Limit Value and Slot Power Limit Scale */
0659     if (slot_power_limit_mw == 0) {
0660         value = 0x00;
0661         scale = 0;
0662     } else if (slot_power_limit_mw <= 255) {
0663         value = slot_power_limit_mw;
0664         scale = 3;
0665     } else if (slot_power_limit_mw <= 255*10) {
0666         value = slot_power_limit_mw / 10;
0667         scale = 2;
0668         slot_power_limit_mw = slot_power_limit_mw / 10 * 10;
0669     } else if (slot_power_limit_mw <= 255*100) {
0670         value = slot_power_limit_mw / 100;
0671         scale = 1;
0672         slot_power_limit_mw = slot_power_limit_mw / 100 * 100;
0673     } else if (slot_power_limit_mw <= 239*1000) {
0674         value = slot_power_limit_mw / 1000;
0675         scale = 0;
0676         slot_power_limit_mw = slot_power_limit_mw / 1000 * 1000;
0677     } else if (slot_power_limit_mw < 250*1000) {
0678         value = 0xEF;
0679         scale = 0;
0680         slot_power_limit_mw = 239*1000;
0681     } else if (slot_power_limit_mw <= 600*1000) {
0682         value = 0xF0 + (slot_power_limit_mw / 1000 - 250) / 25;
0683         scale = 0;
0684         slot_power_limit_mw = slot_power_limit_mw / (1000*25) * (1000*25);
0685     } else {
0686         value = 0xFE;
0687         scale = 0;
0688         slot_power_limit_mw = 600*1000;
0689     }
0690 
0691     if (slot_power_limit_value)
0692         *slot_power_limit_value = value;
0693 
0694     if (slot_power_limit_scale)
0695         *slot_power_limit_scale = scale;
0696 
0697     return slot_power_limit_mw;
0698 }
0699 EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit);
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