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0010 #include <linux/pci.h>
0011 #include <linux/slab.h>
0012 #include <linux/export.h>
0013 #include <linux/string.h>
0014 #include <linux/delay.h>
0015 #include "pci.h"
0016
0017 #define VIRTFN_ID_LEN 16
0018
0019 int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
0020 {
0021 if (!dev->is_physfn)
0022 return -EINVAL;
0023 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
0024 dev->sriov->stride * vf_id) >> 8);
0025 }
0026
0027 int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
0028 {
0029 if (!dev->is_physfn)
0030 return -EINVAL;
0031 return (dev->devfn + dev->sriov->offset +
0032 dev->sriov->stride * vf_id) & 0xff;
0033 }
0034 EXPORT_SYMBOL_GPL(pci_iov_virtfn_devfn);
0035
0036 int pci_iov_vf_id(struct pci_dev *dev)
0037 {
0038 struct pci_dev *pf;
0039
0040 if (!dev->is_virtfn)
0041 return -EINVAL;
0042
0043 pf = pci_physfn(dev);
0044 return (((dev->bus->number << 8) + dev->devfn) -
0045 ((pf->bus->number << 8) + pf->devfn + pf->sriov->offset)) /
0046 pf->sriov->stride;
0047 }
0048 EXPORT_SYMBOL_GPL(pci_iov_vf_id);
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
0061
0062
0063
0064
0065
0066 void *pci_iov_get_pf_drvdata(struct pci_dev *dev, struct pci_driver *pf_driver)
0067 {
0068 struct pci_dev *pf_dev;
0069
0070 if (!dev->is_virtfn)
0071 return ERR_PTR(-EINVAL);
0072 pf_dev = dev->physfn;
0073 if (pf_dev->driver != pf_driver)
0074 return ERR_PTR(-EINVAL);
0075 return pci_get_drvdata(pf_dev);
0076 }
0077 EXPORT_SYMBOL_GPL(pci_iov_get_pf_drvdata);
0078
0079
0080
0081
0082
0083
0084
0085 static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
0086 {
0087 struct pci_sriov *iov = dev->sriov;
0088
0089 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
0090 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
0091 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
0092 }
0093
0094
0095
0096
0097
0098
0099
0100
0101 static int compute_max_vf_buses(struct pci_dev *dev)
0102 {
0103 struct pci_sriov *iov = dev->sriov;
0104 int nr_virtfn, busnr, rc = 0;
0105
0106 for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
0107 pci_iov_set_numvfs(dev, nr_virtfn);
0108 if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
0109 rc = -EIO;
0110 goto out;
0111 }
0112
0113 busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
0114 if (busnr > iov->max_VF_buses)
0115 iov->max_VF_buses = busnr;
0116 }
0117
0118 out:
0119 pci_iov_set_numvfs(dev, 0);
0120 return rc;
0121 }
0122
0123 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
0124 {
0125 struct pci_bus *child;
0126
0127 if (bus->number == busnr)
0128 return bus;
0129
0130 child = pci_find_bus(pci_domain_nr(bus), busnr);
0131 if (child)
0132 return child;
0133
0134 child = pci_add_new_bus(bus, NULL, busnr);
0135 if (!child)
0136 return NULL;
0137
0138 pci_bus_insert_busn_res(child, busnr, busnr);
0139
0140 return child;
0141 }
0142
0143 static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
0144 {
0145 if (physbus != virtbus && list_empty(&virtbus->devices))
0146 pci_remove_bus(virtbus);
0147 }
0148
0149 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
0150 {
0151 if (!dev->is_physfn)
0152 return 0;
0153
0154 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
0155 }
0156
0157 static void pci_read_vf_config_common(struct pci_dev *virtfn)
0158 {
0159 struct pci_dev *physfn = virtfn->physfn;
0160
0161
0162
0163
0164
0165
0166
0167
0168
0169
0170 pci_read_config_dword(virtfn, PCI_CLASS_REVISION,
0171 &physfn->sriov->class);
0172 pci_read_config_byte(virtfn, PCI_HEADER_TYPE,
0173 &physfn->sriov->hdr_type);
0174 pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID,
0175 &physfn->sriov->subsystem_vendor);
0176 pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID,
0177 &physfn->sriov->subsystem_device);
0178 }
0179
0180 int pci_iov_sysfs_link(struct pci_dev *dev,
0181 struct pci_dev *virtfn, int id)
0182 {
0183 char buf[VIRTFN_ID_LEN];
0184 int rc;
0185
0186 sprintf(buf, "virtfn%u", id);
0187 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
0188 if (rc)
0189 goto failed;
0190 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
0191 if (rc)
0192 goto failed1;
0193
0194 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
0195
0196 return 0;
0197
0198 failed1:
0199 sysfs_remove_link(&dev->dev.kobj, buf);
0200 failed:
0201 return rc;
0202 }
0203
0204 #ifdef CONFIG_PCI_MSI
0205 static ssize_t sriov_vf_total_msix_show(struct device *dev,
0206 struct device_attribute *attr,
0207 char *buf)
0208 {
0209 struct pci_dev *pdev = to_pci_dev(dev);
0210 u32 vf_total_msix = 0;
0211
0212 device_lock(dev);
0213 if (!pdev->driver || !pdev->driver->sriov_get_vf_total_msix)
0214 goto unlock;
0215
0216 vf_total_msix = pdev->driver->sriov_get_vf_total_msix(pdev);
0217 unlock:
0218 device_unlock(dev);
0219 return sysfs_emit(buf, "%u\n", vf_total_msix);
0220 }
0221 static DEVICE_ATTR_RO(sriov_vf_total_msix);
0222
0223 static ssize_t sriov_vf_msix_count_store(struct device *dev,
0224 struct device_attribute *attr,
0225 const char *buf, size_t count)
0226 {
0227 struct pci_dev *vf_dev = to_pci_dev(dev);
0228 struct pci_dev *pdev = pci_physfn(vf_dev);
0229 int val, ret = 0;
0230
0231 if (kstrtoint(buf, 0, &val) < 0)
0232 return -EINVAL;
0233
0234 if (val < 0)
0235 return -EINVAL;
0236
0237 device_lock(&pdev->dev);
0238 if (!pdev->driver || !pdev->driver->sriov_set_msix_vec_count) {
0239 ret = -EOPNOTSUPP;
0240 goto err_pdev;
0241 }
0242
0243 device_lock(&vf_dev->dev);
0244 if (vf_dev->driver) {
0245
0246
0247
0248
0249
0250 ret = -EBUSY;
0251 goto err_dev;
0252 }
0253
0254 ret = pdev->driver->sriov_set_msix_vec_count(vf_dev, val);
0255
0256 err_dev:
0257 device_unlock(&vf_dev->dev);
0258 err_pdev:
0259 device_unlock(&pdev->dev);
0260 return ret ? : count;
0261 }
0262 static DEVICE_ATTR_WO(sriov_vf_msix_count);
0263 #endif
0264
0265 static struct attribute *sriov_vf_dev_attrs[] = {
0266 #ifdef CONFIG_PCI_MSI
0267 &dev_attr_sriov_vf_msix_count.attr,
0268 #endif
0269 NULL,
0270 };
0271
0272 static umode_t sriov_vf_attrs_are_visible(struct kobject *kobj,
0273 struct attribute *a, int n)
0274 {
0275 struct device *dev = kobj_to_dev(kobj);
0276 struct pci_dev *pdev = to_pci_dev(dev);
0277
0278 if (!pdev->is_virtfn)
0279 return 0;
0280
0281 return a->mode;
0282 }
0283
0284 const struct attribute_group sriov_vf_dev_attr_group = {
0285 .attrs = sriov_vf_dev_attrs,
0286 .is_visible = sriov_vf_attrs_are_visible,
0287 };
0288
0289 int pci_iov_add_virtfn(struct pci_dev *dev, int id)
0290 {
0291 int i;
0292 int rc = -ENOMEM;
0293 u64 size;
0294 struct pci_dev *virtfn;
0295 struct resource *res;
0296 struct pci_sriov *iov = dev->sriov;
0297 struct pci_bus *bus;
0298
0299 bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
0300 if (!bus)
0301 goto failed;
0302
0303 virtfn = pci_alloc_dev(bus);
0304 if (!virtfn)
0305 goto failed0;
0306
0307 virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
0308 virtfn->vendor = dev->vendor;
0309 virtfn->device = iov->vf_device;
0310 virtfn->is_virtfn = 1;
0311 virtfn->physfn = pci_dev_get(dev);
0312 virtfn->no_command_memory = 1;
0313
0314 if (id == 0)
0315 pci_read_vf_config_common(virtfn);
0316
0317 rc = pci_setup_device(virtfn);
0318 if (rc)
0319 goto failed1;
0320
0321 virtfn->dev.parent = dev->dev.parent;
0322 virtfn->multifunction = 0;
0323
0324 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
0325 res = &dev->resource[i + PCI_IOV_RESOURCES];
0326 if (!res->parent)
0327 continue;
0328 virtfn->resource[i].name = pci_name(virtfn);
0329 virtfn->resource[i].flags = res->flags;
0330 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
0331 virtfn->resource[i].start = res->start + size * id;
0332 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
0333 rc = request_resource(res, &virtfn->resource[i]);
0334 BUG_ON(rc);
0335 }
0336
0337 pci_device_add(virtfn, virtfn->bus);
0338 rc = pci_iov_sysfs_link(dev, virtfn, id);
0339 if (rc)
0340 goto failed1;
0341
0342 pci_bus_add_device(virtfn);
0343
0344 return 0;
0345
0346 failed1:
0347 pci_stop_and_remove_bus_device(virtfn);
0348 pci_dev_put(dev);
0349 failed0:
0350 virtfn_remove_bus(dev->bus, bus);
0351 failed:
0352
0353 return rc;
0354 }
0355
0356 void pci_iov_remove_virtfn(struct pci_dev *dev, int id)
0357 {
0358 char buf[VIRTFN_ID_LEN];
0359 struct pci_dev *virtfn;
0360
0361 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
0362 pci_iov_virtfn_bus(dev, id),
0363 pci_iov_virtfn_devfn(dev, id));
0364 if (!virtfn)
0365 return;
0366
0367 sprintf(buf, "virtfn%u", id);
0368 sysfs_remove_link(&dev->dev.kobj, buf);
0369
0370
0371
0372
0373
0374 if (virtfn->dev.kobj.sd)
0375 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
0376
0377 pci_stop_and_remove_bus_device(virtfn);
0378 virtfn_remove_bus(dev->bus, virtfn->bus);
0379
0380
0381 pci_dev_put(virtfn);
0382 pci_dev_put(dev);
0383 }
0384
0385 static ssize_t sriov_totalvfs_show(struct device *dev,
0386 struct device_attribute *attr,
0387 char *buf)
0388 {
0389 struct pci_dev *pdev = to_pci_dev(dev);
0390
0391 return sysfs_emit(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
0392 }
0393
0394 static ssize_t sriov_numvfs_show(struct device *dev,
0395 struct device_attribute *attr,
0396 char *buf)
0397 {
0398 struct pci_dev *pdev = to_pci_dev(dev);
0399 u16 num_vfs;
0400
0401
0402 device_lock(&pdev->dev);
0403 num_vfs = pdev->sriov->num_VFs;
0404 device_unlock(&pdev->dev);
0405
0406 return sysfs_emit(buf, "%u\n", num_vfs);
0407 }
0408
0409
0410
0411
0412
0413
0414
0415
0416 static ssize_t sriov_numvfs_store(struct device *dev,
0417 struct device_attribute *attr,
0418 const char *buf, size_t count)
0419 {
0420 struct pci_dev *pdev = to_pci_dev(dev);
0421 int ret = 0;
0422 u16 num_vfs;
0423
0424 if (kstrtou16(buf, 0, &num_vfs) < 0)
0425 return -EINVAL;
0426
0427 if (num_vfs > pci_sriov_get_totalvfs(pdev))
0428 return -ERANGE;
0429
0430 device_lock(&pdev->dev);
0431
0432 if (num_vfs == pdev->sriov->num_VFs)
0433 goto exit;
0434
0435
0436 if (!pdev->driver) {
0437 pci_info(pdev, "no driver bound to device; cannot configure SR-IOV\n");
0438 ret = -ENOENT;
0439 goto exit;
0440 }
0441
0442
0443 if (!pdev->driver->sriov_configure) {
0444 pci_info(pdev, "driver does not support SR-IOV configuration via sysfs\n");
0445 ret = -ENOENT;
0446 goto exit;
0447 }
0448
0449 if (num_vfs == 0) {
0450
0451 ret = pdev->driver->sriov_configure(pdev, 0);
0452 goto exit;
0453 }
0454
0455
0456 if (pdev->sriov->num_VFs) {
0457 pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
0458 pdev->sriov->num_VFs, num_vfs);
0459 ret = -EBUSY;
0460 goto exit;
0461 }
0462
0463 ret = pdev->driver->sriov_configure(pdev, num_vfs);
0464 if (ret < 0)
0465 goto exit;
0466
0467 if (ret != num_vfs)
0468 pci_warn(pdev, "%d VFs requested; only %d enabled\n",
0469 num_vfs, ret);
0470
0471 exit:
0472 device_unlock(&pdev->dev);
0473
0474 if (ret < 0)
0475 return ret;
0476
0477 return count;
0478 }
0479
0480 static ssize_t sriov_offset_show(struct device *dev,
0481 struct device_attribute *attr,
0482 char *buf)
0483 {
0484 struct pci_dev *pdev = to_pci_dev(dev);
0485
0486 return sysfs_emit(buf, "%u\n", pdev->sriov->offset);
0487 }
0488
0489 static ssize_t sriov_stride_show(struct device *dev,
0490 struct device_attribute *attr,
0491 char *buf)
0492 {
0493 struct pci_dev *pdev = to_pci_dev(dev);
0494
0495 return sysfs_emit(buf, "%u\n", pdev->sriov->stride);
0496 }
0497
0498 static ssize_t sriov_vf_device_show(struct device *dev,
0499 struct device_attribute *attr,
0500 char *buf)
0501 {
0502 struct pci_dev *pdev = to_pci_dev(dev);
0503
0504 return sysfs_emit(buf, "%x\n", pdev->sriov->vf_device);
0505 }
0506
0507 static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
0508 struct device_attribute *attr,
0509 char *buf)
0510 {
0511 struct pci_dev *pdev = to_pci_dev(dev);
0512
0513 return sysfs_emit(buf, "%u\n", pdev->sriov->drivers_autoprobe);
0514 }
0515
0516 static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
0517 struct device_attribute *attr,
0518 const char *buf, size_t count)
0519 {
0520 struct pci_dev *pdev = to_pci_dev(dev);
0521 bool drivers_autoprobe;
0522
0523 if (kstrtobool(buf, &drivers_autoprobe) < 0)
0524 return -EINVAL;
0525
0526 pdev->sriov->drivers_autoprobe = drivers_autoprobe;
0527
0528 return count;
0529 }
0530
0531 static DEVICE_ATTR_RO(sriov_totalvfs);
0532 static DEVICE_ATTR_RW(sriov_numvfs);
0533 static DEVICE_ATTR_RO(sriov_offset);
0534 static DEVICE_ATTR_RO(sriov_stride);
0535 static DEVICE_ATTR_RO(sriov_vf_device);
0536 static DEVICE_ATTR_RW(sriov_drivers_autoprobe);
0537
0538 static struct attribute *sriov_pf_dev_attrs[] = {
0539 &dev_attr_sriov_totalvfs.attr,
0540 &dev_attr_sriov_numvfs.attr,
0541 &dev_attr_sriov_offset.attr,
0542 &dev_attr_sriov_stride.attr,
0543 &dev_attr_sriov_vf_device.attr,
0544 &dev_attr_sriov_drivers_autoprobe.attr,
0545 #ifdef CONFIG_PCI_MSI
0546 &dev_attr_sriov_vf_total_msix.attr,
0547 #endif
0548 NULL,
0549 };
0550
0551 static umode_t sriov_pf_attrs_are_visible(struct kobject *kobj,
0552 struct attribute *a, int n)
0553 {
0554 struct device *dev = kobj_to_dev(kobj);
0555
0556 if (!dev_is_pf(dev))
0557 return 0;
0558
0559 return a->mode;
0560 }
0561
0562 const struct attribute_group sriov_pf_dev_attr_group = {
0563 .attrs = sriov_pf_dev_attrs,
0564 .is_visible = sriov_pf_attrs_are_visible,
0565 };
0566
0567 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
0568 {
0569 return 0;
0570 }
0571
0572 int __weak pcibios_sriov_disable(struct pci_dev *pdev)
0573 {
0574 return 0;
0575 }
0576
0577 static int sriov_add_vfs(struct pci_dev *dev, u16 num_vfs)
0578 {
0579 unsigned int i;
0580 int rc;
0581
0582 if (dev->no_vf_scan)
0583 return 0;
0584
0585 for (i = 0; i < num_vfs; i++) {
0586 rc = pci_iov_add_virtfn(dev, i);
0587 if (rc)
0588 goto failed;
0589 }
0590 return 0;
0591 failed:
0592 while (i--)
0593 pci_iov_remove_virtfn(dev, i);
0594
0595 return rc;
0596 }
0597
0598 static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
0599 {
0600 int rc;
0601 int i;
0602 int nres;
0603 u16 initial;
0604 struct resource *res;
0605 struct pci_dev *pdev;
0606 struct pci_sriov *iov = dev->sriov;
0607 int bars = 0;
0608 int bus;
0609
0610 if (!nr_virtfn)
0611 return 0;
0612
0613 if (iov->num_VFs)
0614 return -EINVAL;
0615
0616 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
0617 if (initial > iov->total_VFs ||
0618 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
0619 return -EIO;
0620
0621 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
0622 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
0623 return -EINVAL;
0624
0625 nres = 0;
0626 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
0627 bars |= (1 << (i + PCI_IOV_RESOURCES));
0628 res = &dev->resource[i + PCI_IOV_RESOURCES];
0629 if (res->parent)
0630 nres++;
0631 }
0632 if (nres != iov->nres) {
0633 pci_err(dev, "not enough MMIO resources for SR-IOV\n");
0634 return -ENOMEM;
0635 }
0636
0637 bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
0638 if (bus > dev->bus->busn_res.end) {
0639 pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
0640 nr_virtfn, bus, &dev->bus->busn_res);
0641 return -ENOMEM;
0642 }
0643
0644 if (pci_enable_resources(dev, bars)) {
0645 pci_err(dev, "SR-IOV: IOV BARS not allocated\n");
0646 return -ENOMEM;
0647 }
0648
0649 if (iov->link != dev->devfn) {
0650 pdev = pci_get_slot(dev->bus, iov->link);
0651 if (!pdev)
0652 return -ENODEV;
0653
0654 if (!pdev->is_physfn) {
0655 pci_dev_put(pdev);
0656 return -ENOSYS;
0657 }
0658
0659 rc = sysfs_create_link(&dev->dev.kobj,
0660 &pdev->dev.kobj, "dep_link");
0661 pci_dev_put(pdev);
0662 if (rc)
0663 return rc;
0664 }
0665
0666 iov->initial_VFs = initial;
0667 if (nr_virtfn < initial)
0668 initial = nr_virtfn;
0669
0670 rc = pcibios_sriov_enable(dev, initial);
0671 if (rc) {
0672 pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc);
0673 goto err_pcibios;
0674 }
0675
0676 pci_iov_set_numvfs(dev, nr_virtfn);
0677 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
0678 pci_cfg_access_lock(dev);
0679 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
0680 msleep(100);
0681 pci_cfg_access_unlock(dev);
0682
0683 rc = sriov_add_vfs(dev, initial);
0684 if (rc)
0685 goto err_pcibios;
0686
0687 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
0688 iov->num_VFs = nr_virtfn;
0689
0690 return 0;
0691
0692 err_pcibios:
0693 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
0694 pci_cfg_access_lock(dev);
0695 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
0696 ssleep(1);
0697 pci_cfg_access_unlock(dev);
0698
0699 pcibios_sriov_disable(dev);
0700
0701 if (iov->link != dev->devfn)
0702 sysfs_remove_link(&dev->dev.kobj, "dep_link");
0703
0704 pci_iov_set_numvfs(dev, 0);
0705 return rc;
0706 }
0707
0708 static void sriov_del_vfs(struct pci_dev *dev)
0709 {
0710 struct pci_sriov *iov = dev->sriov;
0711 int i;
0712
0713 for (i = 0; i < iov->num_VFs; i++)
0714 pci_iov_remove_virtfn(dev, i);
0715 }
0716
0717 static void sriov_disable(struct pci_dev *dev)
0718 {
0719 struct pci_sriov *iov = dev->sriov;
0720
0721 if (!iov->num_VFs)
0722 return;
0723
0724 sriov_del_vfs(dev);
0725 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
0726 pci_cfg_access_lock(dev);
0727 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
0728 ssleep(1);
0729 pci_cfg_access_unlock(dev);
0730
0731 pcibios_sriov_disable(dev);
0732
0733 if (iov->link != dev->devfn)
0734 sysfs_remove_link(&dev->dev.kobj, "dep_link");
0735
0736 iov->num_VFs = 0;
0737 pci_iov_set_numvfs(dev, 0);
0738 }
0739
0740 static int sriov_init(struct pci_dev *dev, int pos)
0741 {
0742 int i, bar64;
0743 int rc;
0744 int nres;
0745 u32 pgsz;
0746 u16 ctrl, total;
0747 struct pci_sriov *iov;
0748 struct resource *res;
0749 struct pci_dev *pdev;
0750
0751 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
0752 if (ctrl & PCI_SRIOV_CTRL_VFE) {
0753 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
0754 ssleep(1);
0755 }
0756
0757 ctrl = 0;
0758 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
0759 if (pdev->is_physfn)
0760 goto found;
0761
0762 pdev = NULL;
0763 if (pci_ari_enabled(dev->bus))
0764 ctrl |= PCI_SRIOV_CTRL_ARI;
0765
0766 found:
0767 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
0768
0769 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
0770 if (!total)
0771 return 0;
0772
0773 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
0774 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
0775 pgsz &= ~((1 << i) - 1);
0776 if (!pgsz)
0777 return -EIO;
0778
0779 pgsz &= ~(pgsz - 1);
0780 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
0781
0782 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
0783 if (!iov)
0784 return -ENOMEM;
0785
0786 nres = 0;
0787 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
0788 res = &dev->resource[i + PCI_IOV_RESOURCES];
0789
0790
0791
0792
0793 if (res->flags & IORESOURCE_PCI_FIXED)
0794 bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
0795 else
0796 bar64 = __pci_read_base(dev, pci_bar_unknown, res,
0797 pos + PCI_SRIOV_BAR + i * 4);
0798 if (!res->flags)
0799 continue;
0800 if (resource_size(res) & (PAGE_SIZE - 1)) {
0801 rc = -EIO;
0802 goto failed;
0803 }
0804 iov->barsz[i] = resource_size(res);
0805 res->end = res->start + resource_size(res) * total - 1;
0806 pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
0807 i, res, i, total);
0808 i += bar64;
0809 nres++;
0810 }
0811
0812 iov->pos = pos;
0813 iov->nres = nres;
0814 iov->ctrl = ctrl;
0815 iov->total_VFs = total;
0816 iov->driver_max_VFs = total;
0817 pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device);
0818 iov->pgsz = pgsz;
0819 iov->self = dev;
0820 iov->drivers_autoprobe = true;
0821 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
0822 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
0823 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
0824 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
0825
0826 if (pdev)
0827 iov->dev = pci_dev_get(pdev);
0828 else
0829 iov->dev = dev;
0830
0831 dev->sriov = iov;
0832 dev->is_physfn = 1;
0833 rc = compute_max_vf_buses(dev);
0834 if (rc)
0835 goto fail_max_buses;
0836
0837 return 0;
0838
0839 fail_max_buses:
0840 dev->sriov = NULL;
0841 dev->is_physfn = 0;
0842 failed:
0843 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
0844 res = &dev->resource[i + PCI_IOV_RESOURCES];
0845 res->flags = 0;
0846 }
0847
0848 kfree(iov);
0849 return rc;
0850 }
0851
0852 static void sriov_release(struct pci_dev *dev)
0853 {
0854 BUG_ON(dev->sriov->num_VFs);
0855
0856 if (dev != dev->sriov->dev)
0857 pci_dev_put(dev->sriov->dev);
0858
0859 kfree(dev->sriov);
0860 dev->sriov = NULL;
0861 }
0862
0863 static void sriov_restore_state(struct pci_dev *dev)
0864 {
0865 int i;
0866 u16 ctrl;
0867 struct pci_sriov *iov = dev->sriov;
0868
0869 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
0870 if (ctrl & PCI_SRIOV_CTRL_VFE)
0871 return;
0872
0873
0874
0875
0876
0877 ctrl &= ~PCI_SRIOV_CTRL_ARI;
0878 ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI;
0879 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl);
0880
0881 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
0882 pci_update_resource(dev, i + PCI_IOV_RESOURCES);
0883
0884 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
0885 pci_iov_set_numvfs(dev, iov->num_VFs);
0886 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
0887 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
0888 msleep(100);
0889 }
0890
0891
0892
0893
0894
0895
0896
0897 int pci_iov_init(struct pci_dev *dev)
0898 {
0899 int pos;
0900
0901 if (!pci_is_pcie(dev))
0902 return -ENODEV;
0903
0904 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
0905 if (pos)
0906 return sriov_init(dev, pos);
0907
0908 return -ENODEV;
0909 }
0910
0911
0912
0913
0914
0915 void pci_iov_release(struct pci_dev *dev)
0916 {
0917 if (dev->is_physfn)
0918 sriov_release(dev);
0919 }
0920
0921
0922
0923
0924
0925 void pci_iov_remove(struct pci_dev *dev)
0926 {
0927 struct pci_sriov *iov = dev->sriov;
0928
0929 if (!dev->is_physfn)
0930 return;
0931
0932 iov->driver_max_VFs = iov->total_VFs;
0933 if (iov->num_VFs)
0934 pci_warn(dev, "driver left SR-IOV enabled after remove\n");
0935 }
0936
0937
0938
0939
0940
0941
0942
0943
0944 void pci_iov_update_resource(struct pci_dev *dev, int resno)
0945 {
0946 struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
0947 struct resource *res = dev->resource + resno;
0948 int vf_bar = resno - PCI_IOV_RESOURCES;
0949 struct pci_bus_region region;
0950 u16 cmd;
0951 u32 new;
0952 int reg;
0953
0954
0955
0956
0957
0958
0959 if (!iov)
0960 return;
0961
0962 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
0963 if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
0964 dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
0965 vf_bar, res);
0966 return;
0967 }
0968
0969
0970
0971
0972
0973
0974 if (!res->flags)
0975 return;
0976
0977 if (res->flags & IORESOURCE_UNSET)
0978 return;
0979
0980 if (res->flags & IORESOURCE_PCI_FIXED)
0981 return;
0982
0983 pcibios_resource_to_bus(dev->bus, ®ion, res);
0984 new = region.start;
0985 new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
0986
0987 reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
0988 pci_write_config_dword(dev, reg, new);
0989 if (res->flags & IORESOURCE_MEM_64) {
0990 new = region.start >> 16 >> 16;
0991 pci_write_config_dword(dev, reg + 4, new);
0992 }
0993 }
0994
0995 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
0996 int resno)
0997 {
0998 return pci_iov_resource_size(dev, resno);
0999 }
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
1012 {
1013 return pcibios_iov_resource_alignment(dev, resno);
1014 }
1015
1016
1017
1018
1019
1020 void pci_restore_iov_state(struct pci_dev *dev)
1021 {
1022 if (dev->is_physfn)
1023 sriov_restore_state(dev);
1024 }
1025
1026
1027
1028
1029
1030
1031 void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe)
1032 {
1033 if (dev->is_physfn)
1034 dev->sriov->drivers_autoprobe = auto_probe;
1035 }
1036
1037
1038
1039
1040
1041
1042
1043
1044 int pci_iov_bus_range(struct pci_bus *bus)
1045 {
1046 int max = 0;
1047 struct pci_dev *dev;
1048
1049 list_for_each_entry(dev, &bus->devices, bus_list) {
1050 if (!dev->is_physfn)
1051 continue;
1052 if (dev->sriov->max_VF_buses > max)
1053 max = dev->sriov->max_VF_buses;
1054 }
1055
1056 return max ? max - bus->number : 0;
1057 }
1058
1059
1060
1061
1062
1063
1064
1065
1066 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1067 {
1068 might_sleep();
1069
1070 if (!dev->is_physfn)
1071 return -ENOSYS;
1072
1073 return sriov_enable(dev, nr_virtfn);
1074 }
1075 EXPORT_SYMBOL_GPL(pci_enable_sriov);
1076
1077
1078
1079
1080
1081 void pci_disable_sriov(struct pci_dev *dev)
1082 {
1083 might_sleep();
1084
1085 if (!dev->is_physfn)
1086 return;
1087
1088 sriov_disable(dev);
1089 }
1090 EXPORT_SYMBOL_GPL(pci_disable_sriov);
1091
1092
1093
1094
1095
1096
1097
1098 int pci_num_vf(struct pci_dev *dev)
1099 {
1100 if (!dev->is_physfn)
1101 return 0;
1102
1103 return dev->sriov->num_VFs;
1104 }
1105 EXPORT_SYMBOL_GPL(pci_num_vf);
1106
1107
1108
1109
1110
1111
1112
1113
1114 int pci_vfs_assigned(struct pci_dev *dev)
1115 {
1116 struct pci_dev *vfdev;
1117 unsigned int vfs_assigned = 0;
1118 unsigned short dev_id;
1119
1120
1121 if (!dev->is_physfn)
1122 return 0;
1123
1124
1125
1126
1127
1128 dev_id = dev->sriov->vf_device;
1129
1130
1131 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
1132 while (vfdev) {
1133
1134
1135
1136
1137 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
1138 pci_is_dev_assigned(vfdev))
1139 vfs_assigned++;
1140
1141 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
1142 }
1143
1144 return vfs_assigned;
1145 }
1146 EXPORT_SYMBOL_GPL(pci_vfs_assigned);
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
1162 {
1163 if (!dev->is_physfn)
1164 return -ENOSYS;
1165
1166 if (numvfs > dev->sriov->total_VFs)
1167 return -EINVAL;
1168
1169
1170 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
1171 return -EBUSY;
1172
1173 dev->sriov->driver_max_VFs = numvfs;
1174 return 0;
1175 }
1176 EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186 int pci_sriov_get_totalvfs(struct pci_dev *dev)
1187 {
1188 if (!dev->is_physfn)
1189 return 0;
1190
1191 return dev->sriov->driver_max_VFs;
1192 }
1193 EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204 int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn)
1205 {
1206 int rc;
1207
1208 might_sleep();
1209
1210 if (!dev->is_physfn)
1211 return -ENODEV;
1212
1213 if (pci_vfs_assigned(dev)) {
1214 pci_warn(dev, "Cannot modify SR-IOV while VFs are assigned\n");
1215 return -EPERM;
1216 }
1217
1218 if (nr_virtfn == 0) {
1219 sriov_disable(dev);
1220 return 0;
1221 }
1222
1223 rc = sriov_enable(dev, nr_virtfn);
1224 if (rc < 0)
1225 return rc;
1226
1227 return nr_virtfn;
1228 }
1229 EXPORT_SYMBOL_GPL(pci_sriov_configure_simple);