0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015 #include <linux/module.h>
0016 #include <linux/kernel.h>
0017 #include <linux/types.h>
0018 #include <linux/slab.h>
0019 #include <linux/workqueue.h>
0020 #include <linux/interrupt.h>
0021 #include <linux/delay.h>
0022 #include <linux/wait.h>
0023 #include <linux/pci.h>
0024 #include <linux/pci_hotplug.h>
0025 #include <linux/kthread.h>
0026 #include "cpqphp.h"
0027
0028 static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
0029 u8 behind_bridge, struct resource_lists *resources);
0030 static int configure_new_function(struct controller *ctrl, struct pci_func *func,
0031 u8 behind_bridge, struct resource_lists *resources);
0032 static void interrupt_event_handler(struct controller *ctrl);
0033
0034
0035 static struct task_struct *cpqhp_event_thread;
0036 static struct timer_list *pushbutton_pending;
0037
0038
0039 static void long_delay(int delay)
0040 {
0041
0042
0043
0044
0045
0046
0047 msleep_interruptible(jiffies_to_msecs(delay));
0048 }
0049
0050
0051
0052 #define WRONG_BUS_FREQUENCY 0x07
0053 static u8 handle_switch_change(u8 change, struct controller *ctrl)
0054 {
0055 int hp_slot;
0056 u8 rc = 0;
0057 u16 temp_word;
0058 struct pci_func *func;
0059 struct event_info *taskInfo;
0060
0061 if (!change)
0062 return 0;
0063
0064
0065 dbg("cpqsbd: Switch interrupt received.\n");
0066
0067 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
0068 if (change & (0x1L << hp_slot)) {
0069
0070
0071
0072 func = cpqhp_slot_find(ctrl->bus,
0073 (hp_slot + ctrl->slot_device_offset), 0);
0074
0075
0076
0077
0078 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
0079 ctrl->next_event = (ctrl->next_event + 1) % 10;
0080 taskInfo->hp_slot = hp_slot;
0081
0082 rc++;
0083
0084 temp_word = ctrl->ctrl_int_comp >> 16;
0085 func->presence_save = (temp_word >> hp_slot) & 0x01;
0086 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
0087
0088 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
0089
0090
0091
0092
0093 func->switch_save = 0;
0094
0095 taskInfo->event_type = INT_SWITCH_OPEN;
0096 } else {
0097
0098
0099
0100
0101 func->switch_save = 0x10;
0102
0103 taskInfo->event_type = INT_SWITCH_CLOSE;
0104 }
0105 }
0106 }
0107
0108 return rc;
0109 }
0110
0111
0112
0113
0114
0115
0116 static struct slot *cpqhp_find_slot(struct controller *ctrl, u8 device)
0117 {
0118 struct slot *slot = ctrl->slot;
0119
0120 while (slot && (slot->device != device))
0121 slot = slot->next;
0122
0123 return slot;
0124 }
0125
0126
0127 static u8 handle_presence_change(u16 change, struct controller *ctrl)
0128 {
0129 int hp_slot;
0130 u8 rc = 0;
0131 u8 temp_byte;
0132 u16 temp_word;
0133 struct pci_func *func;
0134 struct event_info *taskInfo;
0135 struct slot *p_slot;
0136
0137 if (!change)
0138 return 0;
0139
0140
0141
0142
0143 dbg("cpqsbd: Presence/Notify input change.\n");
0144 dbg(" Changed bits are 0x%4.4x\n", change);
0145
0146 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
0147 if (change & (0x0101 << hp_slot)) {
0148
0149
0150
0151 func = cpqhp_slot_find(ctrl->bus,
0152 (hp_slot + ctrl->slot_device_offset), 0);
0153
0154 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
0155 ctrl->next_event = (ctrl->next_event + 1) % 10;
0156 taskInfo->hp_slot = hp_slot;
0157
0158 rc++;
0159
0160 p_slot = cpqhp_find_slot(ctrl, hp_slot + (readb(ctrl->hpc_reg + SLOT_MASK) >> 4));
0161 if (!p_slot)
0162 return 0;
0163
0164
0165
0166
0167 if (func->switch_save && (ctrl->push_button == 1)) {
0168 temp_word = ctrl->ctrl_int_comp >> 16;
0169 temp_byte = (temp_word >> hp_slot) & 0x01;
0170 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02;
0171
0172 if (temp_byte != func->presence_save) {
0173
0174
0175
0176 dbg("hp_slot %d button pressed\n", hp_slot);
0177 taskInfo->event_type = INT_BUTTON_PRESS;
0178 } else {
0179
0180
0181
0182 dbg("hp_slot %d button released\n", hp_slot);
0183 taskInfo->event_type = INT_BUTTON_RELEASE;
0184
0185
0186 if ((p_slot->state == BLINKINGON_STATE)
0187 || (p_slot->state == BLINKINGOFF_STATE)) {
0188 taskInfo->event_type = INT_BUTTON_CANCEL;
0189 dbg("hp_slot %d button cancel\n", hp_slot);
0190 } else if ((p_slot->state == POWERON_STATE)
0191 || (p_slot->state == POWEROFF_STATE)) {
0192
0193 taskInfo->event_type = INT_BUTTON_IGNORE;
0194 dbg("hp_slot %d button ignore\n", hp_slot);
0195 }
0196 }
0197 } else {
0198
0199
0200
0201 temp_word = ctrl->ctrl_int_comp >> 16;
0202 func->presence_save = (temp_word >> hp_slot) & 0x01;
0203 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
0204
0205 if ((!(ctrl->ctrl_int_comp & (0x010000 << hp_slot))) ||
0206 (!(ctrl->ctrl_int_comp & (0x01000000 << hp_slot)))) {
0207
0208 taskInfo->event_type = INT_PRESENCE_ON;
0209 } else {
0210
0211 taskInfo->event_type = INT_PRESENCE_OFF;
0212 }
0213 }
0214 }
0215 }
0216
0217 return rc;
0218 }
0219
0220
0221 static u8 handle_power_fault(u8 change, struct controller *ctrl)
0222 {
0223 int hp_slot;
0224 u8 rc = 0;
0225 struct pci_func *func;
0226 struct event_info *taskInfo;
0227
0228 if (!change)
0229 return 0;
0230
0231
0232
0233
0234
0235 info("power fault interrupt\n");
0236
0237 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
0238 if (change & (0x01 << hp_slot)) {
0239
0240
0241
0242 func = cpqhp_slot_find(ctrl->bus,
0243 (hp_slot + ctrl->slot_device_offset), 0);
0244
0245 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
0246 ctrl->next_event = (ctrl->next_event + 1) % 10;
0247 taskInfo->hp_slot = hp_slot;
0248
0249 rc++;
0250
0251 if (ctrl->ctrl_int_comp & (0x00000100 << hp_slot)) {
0252
0253
0254
0255 func->status = 0x00;
0256
0257 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
0258 } else {
0259
0260
0261
0262 taskInfo->event_type = INT_POWER_FAULT;
0263
0264 if (ctrl->rev < 4) {
0265 amber_LED_on(ctrl, hp_slot);
0266 green_LED_off(ctrl, hp_slot);
0267 set_SOGO(ctrl);
0268
0269
0270
0271
0272
0273
0274
0275
0276
0277
0278
0279
0280
0281 } else {
0282
0283 func->status = 0xFF;
0284 info("power fault bit %x set\n", hp_slot);
0285 }
0286 }
0287 }
0288 }
0289
0290 return rc;
0291 }
0292
0293
0294
0295
0296
0297
0298 static int sort_by_size(struct pci_resource **head)
0299 {
0300 struct pci_resource *current_res;
0301 struct pci_resource *next_res;
0302 int out_of_order = 1;
0303
0304 if (!(*head))
0305 return 1;
0306
0307 if (!((*head)->next))
0308 return 0;
0309
0310 while (out_of_order) {
0311 out_of_order = 0;
0312
0313
0314 if (((*head)->next) &&
0315 ((*head)->length > (*head)->next->length)) {
0316 out_of_order++;
0317 current_res = *head;
0318 *head = (*head)->next;
0319 current_res->next = (*head)->next;
0320 (*head)->next = current_res;
0321 }
0322
0323 current_res = *head;
0324
0325 while (current_res->next && current_res->next->next) {
0326 if (current_res->next->length > current_res->next->next->length) {
0327 out_of_order++;
0328 next_res = current_res->next;
0329 current_res->next = current_res->next->next;
0330 current_res = current_res->next;
0331 next_res->next = current_res->next;
0332 current_res->next = next_res;
0333 } else
0334 current_res = current_res->next;
0335 }
0336 }
0337
0338 return 0;
0339 }
0340
0341
0342
0343
0344
0345
0346 static int sort_by_max_size(struct pci_resource **head)
0347 {
0348 struct pci_resource *current_res;
0349 struct pci_resource *next_res;
0350 int out_of_order = 1;
0351
0352 if (!(*head))
0353 return 1;
0354
0355 if (!((*head)->next))
0356 return 0;
0357
0358 while (out_of_order) {
0359 out_of_order = 0;
0360
0361
0362 if (((*head)->next) &&
0363 ((*head)->length < (*head)->next->length)) {
0364 out_of_order++;
0365 current_res = *head;
0366 *head = (*head)->next;
0367 current_res->next = (*head)->next;
0368 (*head)->next = current_res;
0369 }
0370
0371 current_res = *head;
0372
0373 while (current_res->next && current_res->next->next) {
0374 if (current_res->next->length < current_res->next->next->length) {
0375 out_of_order++;
0376 next_res = current_res->next;
0377 current_res->next = current_res->next->next;
0378 current_res = current_res->next;
0379 next_res->next = current_res->next;
0380 current_res->next = next_res;
0381 } else
0382 current_res = current_res->next;
0383 }
0384 }
0385
0386 return 0;
0387 }
0388
0389
0390
0391
0392
0393
0394
0395
0396 static struct pci_resource *do_pre_bridge_resource_split(struct pci_resource **head,
0397 struct pci_resource **orig_head, u32 alignment)
0398 {
0399 struct pci_resource *prevnode = NULL;
0400 struct pci_resource *node;
0401 struct pci_resource *split_node;
0402 u32 rc;
0403 u32 temp_dword;
0404 dbg("do_pre_bridge_resource_split\n");
0405
0406 if (!(*head) || !(*orig_head))
0407 return NULL;
0408
0409 rc = cpqhp_resource_sort_and_combine(head);
0410
0411 if (rc)
0412 return NULL;
0413
0414 if ((*head)->base != (*orig_head)->base)
0415 return NULL;
0416
0417 if ((*head)->length == (*orig_head)->length)
0418 return NULL;
0419
0420
0421
0422
0423
0424
0425 node = *head;
0426
0427 if (node->length & (alignment - 1)) {
0428
0429
0430
0431 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
0432
0433 if (!split_node)
0434 return NULL;
0435
0436 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
0437
0438 split_node->base = node->base;
0439 split_node->length = temp_dword;
0440
0441 node->length -= temp_dword;
0442 node->base += split_node->length;
0443
0444
0445 *head = split_node;
0446 split_node->next = node;
0447 }
0448
0449 if (node->length < alignment)
0450 return NULL;
0451
0452
0453 if (*head == node) {
0454 *head = node->next;
0455 } else {
0456 prevnode = *head;
0457 while (prevnode->next != node)
0458 prevnode = prevnode->next;
0459
0460 prevnode->next = node->next;
0461 }
0462 node->next = NULL;
0463
0464 return node;
0465 }
0466
0467
0468
0469
0470
0471
0472
0473 static struct pci_resource *do_bridge_resource_split(struct pci_resource **head, u32 alignment)
0474 {
0475 struct pci_resource *prevnode = NULL;
0476 struct pci_resource *node;
0477 u32 rc;
0478 u32 temp_dword;
0479
0480 rc = cpqhp_resource_sort_and_combine(head);
0481
0482 if (rc)
0483 return NULL;
0484
0485 node = *head;
0486
0487 while (node->next) {
0488 prevnode = node;
0489 node = node->next;
0490 kfree(prevnode);
0491 }
0492
0493 if (node->length < alignment)
0494 goto error;
0495
0496 if (node->base & (alignment - 1)) {
0497
0498 temp_dword = (node->base | (alignment-1)) + 1;
0499 if ((node->length - (temp_dword - node->base)) < alignment)
0500 goto error;
0501
0502 node->length -= (temp_dword - node->base);
0503 node->base = temp_dword;
0504 }
0505
0506 if (node->length & (alignment - 1))
0507
0508 goto error;
0509
0510 return node;
0511 error:
0512 kfree(node);
0513 return NULL;
0514 }
0515
0516
0517
0518
0519
0520
0521
0522
0523
0524
0525
0526 static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
0527 {
0528 struct pci_resource *prevnode;
0529 struct pci_resource *node;
0530 struct pci_resource *split_node;
0531 u32 temp_dword;
0532
0533 if (!(*head))
0534 return NULL;
0535
0536 if (cpqhp_resource_sort_and_combine(head))
0537 return NULL;
0538
0539 if (sort_by_size(head))
0540 return NULL;
0541
0542 for (node = *head; node; node = node->next) {
0543 if (node->length < size)
0544 continue;
0545
0546 if (node->base & (size - 1)) {
0547
0548
0549
0550 temp_dword = (node->base | (size-1)) + 1;
0551
0552
0553 if ((node->length - (temp_dword - node->base)) < size)
0554 continue;
0555
0556 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
0557
0558 if (!split_node)
0559 return NULL;
0560
0561 split_node->base = node->base;
0562 split_node->length = temp_dword - node->base;
0563 node->base = temp_dword;
0564 node->length -= split_node->length;
0565
0566
0567 split_node->next = node->next;
0568 node->next = split_node;
0569 }
0570
0571
0572 if (node->length > size) {
0573
0574
0575
0576 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
0577
0578 if (!split_node)
0579 return NULL;
0580
0581 split_node->base = node->base + size;
0582 split_node->length = node->length - size;
0583 node->length = size;
0584
0585
0586 split_node->next = node->next;
0587 node->next = split_node;
0588 }
0589
0590
0591 if (node->base & 0x300L)
0592 continue;
0593
0594
0595
0596
0597 if (*head == node) {
0598 *head = node->next;
0599 } else {
0600 prevnode = *head;
0601 while (prevnode->next != node)
0602 prevnode = prevnode->next;
0603
0604 prevnode->next = node->next;
0605 }
0606 node->next = NULL;
0607 break;
0608 }
0609
0610 return node;
0611 }
0612
0613
0614
0615
0616
0617
0618
0619
0620
0621
0622
0623 static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
0624 {
0625 struct pci_resource *max;
0626 struct pci_resource *temp;
0627 struct pci_resource *split_node;
0628 u32 temp_dword;
0629
0630 if (cpqhp_resource_sort_and_combine(head))
0631 return NULL;
0632
0633 if (sort_by_max_size(head))
0634 return NULL;
0635
0636 for (max = *head; max; max = max->next) {
0637
0638
0639
0640 if (max->length < size)
0641 continue;
0642
0643 if (max->base & (size - 1)) {
0644
0645
0646
0647 temp_dword = (max->base | (size-1)) + 1;
0648
0649
0650 if ((max->length - (temp_dword - max->base)) < size)
0651 continue;
0652
0653 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
0654
0655 if (!split_node)
0656 return NULL;
0657
0658 split_node->base = max->base;
0659 split_node->length = temp_dword - max->base;
0660 max->base = temp_dword;
0661 max->length -= split_node->length;
0662
0663 split_node->next = max->next;
0664 max->next = split_node;
0665 }
0666
0667 if ((max->base + max->length) & (size - 1)) {
0668
0669
0670
0671 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
0672
0673 if (!split_node)
0674 return NULL;
0675 temp_dword = ((max->base + max->length) & ~(size - 1));
0676 split_node->base = temp_dword;
0677 split_node->length = max->length + max->base
0678 - split_node->base;
0679 max->length -= split_node->length;
0680
0681 split_node->next = max->next;
0682 max->next = split_node;
0683 }
0684
0685
0686 if (max->length < size)
0687 continue;
0688
0689
0690 temp = *head;
0691 if (temp == max) {
0692 *head = max->next;
0693 } else {
0694 while (temp && temp->next != max)
0695 temp = temp->next;
0696
0697 if (temp)
0698 temp->next = max->next;
0699 }
0700
0701 max->next = NULL;
0702 break;
0703 }
0704
0705 return max;
0706 }
0707
0708
0709
0710
0711
0712
0713
0714
0715
0716
0717
0718
0719
0720 static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
0721 {
0722 struct pci_resource *prevnode;
0723 struct pci_resource *node;
0724 struct pci_resource *split_node;
0725 u32 temp_dword;
0726
0727 if (cpqhp_resource_sort_and_combine(head))
0728 return NULL;
0729
0730 if (sort_by_size(head))
0731 return NULL;
0732
0733 for (node = *head; node; node = node->next) {
0734 dbg("%s: req_size =%x node=%p, base=%x, length=%x\n",
0735 __func__, size, node, node->base, node->length);
0736 if (node->length < size)
0737 continue;
0738
0739 if (node->base & (size - 1)) {
0740 dbg("%s: not aligned\n", __func__);
0741
0742
0743
0744 temp_dword = (node->base | (size-1)) + 1;
0745
0746
0747 if ((node->length - (temp_dword - node->base)) < size)
0748 continue;
0749
0750 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
0751
0752 if (!split_node)
0753 return NULL;
0754
0755 split_node->base = node->base;
0756 split_node->length = temp_dword - node->base;
0757 node->base = temp_dword;
0758 node->length -= split_node->length;
0759
0760 split_node->next = node->next;
0761 node->next = split_node;
0762 }
0763
0764
0765 if (node->length > size) {
0766 dbg("%s: too big\n", __func__);
0767
0768
0769
0770 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
0771
0772 if (!split_node)
0773 return NULL;
0774
0775 split_node->base = node->base + size;
0776 split_node->length = node->length - size;
0777 node->length = size;
0778
0779
0780 split_node->next = node->next;
0781 node->next = split_node;
0782 }
0783
0784 dbg("%s: got one!!!\n", __func__);
0785
0786
0787 if (*head == node) {
0788 *head = node->next;
0789 } else {
0790 prevnode = *head;
0791 while (prevnode->next != node)
0792 prevnode = prevnode->next;
0793
0794 prevnode->next = node->next;
0795 }
0796 node->next = NULL;
0797 break;
0798 }
0799 return node;
0800 }
0801
0802
0803
0804
0805
0806
0807
0808
0809
0810
0811
0812
0813 int cpqhp_resource_sort_and_combine(struct pci_resource **head)
0814 {
0815 struct pci_resource *node1;
0816 struct pci_resource *node2;
0817 int out_of_order = 1;
0818
0819 dbg("%s: head = %p, *head = %p\n", __func__, head, *head);
0820
0821 if (!(*head))
0822 return 1;
0823
0824 dbg("*head->next = %p\n", (*head)->next);
0825
0826 if (!(*head)->next)
0827 return 0;
0828
0829 dbg("*head->base = 0x%x\n", (*head)->base);
0830 dbg("*head->next->base = 0x%x\n", (*head)->next->base);
0831 while (out_of_order) {
0832 out_of_order = 0;
0833
0834
0835 if (((*head)->next) &&
0836 ((*head)->base > (*head)->next->base)) {
0837 node1 = *head;
0838 (*head) = (*head)->next;
0839 node1->next = (*head)->next;
0840 (*head)->next = node1;
0841 out_of_order++;
0842 }
0843
0844 node1 = (*head);
0845
0846 while (node1->next && node1->next->next) {
0847 if (node1->next->base > node1->next->next->base) {
0848 out_of_order++;
0849 node2 = node1->next;
0850 node1->next = node1->next->next;
0851 node1 = node1->next;
0852 node2->next = node1->next;
0853 node1->next = node2;
0854 } else
0855 node1 = node1->next;
0856 }
0857 }
0858
0859 node1 = *head;
0860
0861 while (node1 && node1->next) {
0862 if ((node1->base + node1->length) == node1->next->base) {
0863
0864 dbg("8..\n");
0865 node1->length += node1->next->length;
0866 node2 = node1->next;
0867 node1->next = node1->next->next;
0868 kfree(node2);
0869 } else
0870 node1 = node1->next;
0871 }
0872
0873 return 0;
0874 }
0875
0876
0877 irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
0878 {
0879 struct controller *ctrl = data;
0880 u8 schedule_flag = 0;
0881 u8 reset;
0882 u16 misc;
0883 u32 Diff;
0884
0885
0886 misc = readw(ctrl->hpc_reg + MISC);
0887
0888
0889
0890 if (!(misc & 0x000C))
0891 return IRQ_NONE;
0892
0893 if (misc & 0x0004) {
0894
0895
0896
0897
0898
0899 misc |= 0x0004;
0900 writew(misc, ctrl->hpc_reg + MISC);
0901
0902
0903 misc = readw(ctrl->hpc_reg + MISC);
0904
0905 dbg("%s - waking up\n", __func__);
0906 wake_up_interruptible(&ctrl->queue);
0907 }
0908
0909 if (misc & 0x0008) {
0910
0911 Diff = readl(ctrl->hpc_reg + INT_INPUT_CLEAR) ^ ctrl->ctrl_int_comp;
0912
0913 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
0914
0915
0916 writel(Diff, ctrl->hpc_reg + INT_INPUT_CLEAR);
0917
0918
0919 readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
0920
0921 if (!Diff)
0922
0923 writel(0xFFFFFFFF, ctrl->hpc_reg + INT_INPUT_CLEAR);
0924
0925 schedule_flag += handle_switch_change((u8)(Diff & 0xFFL), ctrl);
0926 schedule_flag += handle_presence_change((u16)((Diff & 0xFFFF0000L) >> 16), ctrl);
0927 schedule_flag += handle_power_fault((u8)((Diff & 0xFF00L) >> 8), ctrl);
0928 }
0929
0930 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
0931 if (reset & 0x40) {
0932
0933 reset &= 0xCF;
0934 writeb(reset, ctrl->hpc_reg + RESET_FREQ_MODE);
0935 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
0936 wake_up_interruptible(&ctrl->queue);
0937 }
0938
0939 if (schedule_flag) {
0940 wake_up_process(cpqhp_event_thread);
0941 dbg("Waking even thread");
0942 }
0943 return IRQ_HANDLED;
0944 }
0945
0946
0947
0948
0949
0950
0951
0952
0953 struct pci_func *cpqhp_slot_create(u8 busnumber)
0954 {
0955 struct pci_func *new_slot;
0956 struct pci_func *next;
0957
0958 new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL);
0959 if (new_slot == NULL)
0960 return new_slot;
0961
0962 new_slot->next = NULL;
0963 new_slot->configured = 1;
0964
0965 if (cpqhp_slot_list[busnumber] == NULL) {
0966 cpqhp_slot_list[busnumber] = new_slot;
0967 } else {
0968 next = cpqhp_slot_list[busnumber];
0969 while (next->next != NULL)
0970 next = next->next;
0971 next->next = new_slot;
0972 }
0973 return new_slot;
0974 }
0975
0976
0977
0978
0979
0980
0981
0982
0983 static int slot_remove(struct pci_func *old_slot)
0984 {
0985 struct pci_func *next;
0986
0987 if (old_slot == NULL)
0988 return 1;
0989
0990 next = cpqhp_slot_list[old_slot->bus];
0991 if (next == NULL)
0992 return 1;
0993
0994 if (next == old_slot) {
0995 cpqhp_slot_list[old_slot->bus] = old_slot->next;
0996 cpqhp_destroy_board_resources(old_slot);
0997 kfree(old_slot);
0998 return 0;
0999 }
1000
1001 while ((next->next != old_slot) && (next->next != NULL))
1002 next = next->next;
1003
1004 if (next->next == old_slot) {
1005 next->next = old_slot->next;
1006 cpqhp_destroy_board_resources(old_slot);
1007 kfree(old_slot);
1008 return 0;
1009 } else
1010 return 2;
1011 }
1012
1013
1014
1015
1016
1017
1018
1019
1020 static int bridge_slot_remove(struct pci_func *bridge)
1021 {
1022 u8 subordinateBus, secondaryBus;
1023 u8 tempBus;
1024 struct pci_func *next;
1025
1026 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
1027 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
1028
1029 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
1030 next = cpqhp_slot_list[tempBus];
1031
1032 while (!slot_remove(next))
1033 next = cpqhp_slot_list[tempBus];
1034 }
1035
1036 next = cpqhp_slot_list[bridge->bus];
1037
1038 if (next == NULL)
1039 return 1;
1040
1041 if (next == bridge) {
1042 cpqhp_slot_list[bridge->bus] = bridge->next;
1043 goto out;
1044 }
1045
1046 while ((next->next != bridge) && (next->next != NULL))
1047 next = next->next;
1048
1049 if (next->next != bridge)
1050 return 2;
1051 next->next = bridge->next;
1052 out:
1053 kfree(bridge);
1054 return 0;
1055 }
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066 struct pci_func *cpqhp_slot_find(u8 bus, u8 device, u8 index)
1067 {
1068 int found = -1;
1069 struct pci_func *func;
1070
1071 func = cpqhp_slot_list[bus];
1072
1073 if ((func == NULL) || ((func->device == device) && (index == 0)))
1074 return func;
1075
1076 if (func->device == device)
1077 found++;
1078
1079 while (func->next != NULL) {
1080 func = func->next;
1081
1082 if (func->device == device)
1083 found++;
1084
1085 if (found == index)
1086 return func;
1087 }
1088
1089 return NULL;
1090 }
1091
1092
1093
1094
1095 static int is_bridge(struct pci_func *func)
1096 {
1097
1098 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1099 return 1;
1100 else
1101 return 0;
1102 }
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114 static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_slot)
1115 {
1116 struct slot *slot;
1117 struct pci_bus *bus = ctrl->pci_bus;
1118 u8 reg;
1119 u8 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
1120 u16 reg16;
1121 u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
1122
1123 if (bus->cur_bus_speed == adapter_speed)
1124 return 0;
1125
1126
1127
1128
1129 for (slot = ctrl->slot; slot; slot = slot->next) {
1130 if (slot->device == (hp_slot + ctrl->slot_device_offset))
1131 continue;
1132 if (get_presence_status(ctrl, slot) == 0)
1133 continue;
1134
1135
1136
1137
1138 if (bus->cur_bus_speed < adapter_speed)
1139 return 0;
1140
1141 return 1;
1142 }
1143
1144
1145
1146
1147 if ((bus->cur_bus_speed > adapter_speed) && (!ctrl->pcix_speed_capability))
1148 return 1;
1149
1150
1151 if ((bus->cur_bus_speed < adapter_speed) && (!ctrl->pcix_speed_capability))
1152 return 0;
1153
1154
1155
1156
1157 if (bus->max_bus_speed < adapter_speed) {
1158 if (bus->cur_bus_speed == bus->max_bus_speed)
1159 return 0;
1160 adapter_speed = bus->max_bus_speed;
1161 }
1162
1163 writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
1164 writeb(0x00, ctrl->hpc_reg + SLOT_ENABLE);
1165
1166 set_SOGO(ctrl);
1167 wait_for_ctrl_irq(ctrl);
1168
1169 if (adapter_speed != PCI_SPEED_133MHz_PCIX)
1170 reg = 0xF5;
1171 else
1172 reg = 0xF4;
1173 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1174
1175 reg16 = readw(ctrl->hpc_reg + NEXT_CURR_FREQ);
1176 reg16 &= ~0x000F;
1177 switch (adapter_speed) {
1178 case(PCI_SPEED_133MHz_PCIX):
1179 reg = 0x75;
1180 reg16 |= 0xB;
1181 break;
1182 case(PCI_SPEED_100MHz_PCIX):
1183 reg = 0x74;
1184 reg16 |= 0xA;
1185 break;
1186 case(PCI_SPEED_66MHz_PCIX):
1187 reg = 0x73;
1188 reg16 |= 0x9;
1189 break;
1190 case(PCI_SPEED_66MHz):
1191 reg = 0x73;
1192 reg16 |= 0x1;
1193 break;
1194 default:
1195 reg = 0x71;
1196 break;
1197
1198 }
1199 reg16 |= 0xB << 12;
1200 writew(reg16, ctrl->hpc_reg + NEXT_CURR_FREQ);
1201
1202 mdelay(5);
1203
1204
1205 writel(0, ctrl->hpc_reg + INT_MASK);
1206
1207 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1208
1209
1210 reg = ~0xF;
1211 pci_read_config_byte(ctrl->pci_dev, 0x43, ®);
1212 pci_write_config_byte(ctrl->pci_dev, 0x43, reg);
1213
1214
1215 if (((bus->cur_bus_speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
1216 ((bus->cur_bus_speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz)))
1217 set_SOGO(ctrl);
1218
1219 wait_for_ctrl_irq(ctrl);
1220 mdelay(1100);
1221
1222
1223 writel(leds, ctrl->hpc_reg + LED_CONTROL);
1224 writeb(slot_power, ctrl->hpc_reg + SLOT_ENABLE);
1225
1226 set_SOGO(ctrl);
1227 wait_for_ctrl_irq(ctrl);
1228
1229 bus->cur_bus_speed = adapter_speed;
1230 slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1231
1232 info("Successfully changed frequency/mode for adapter in slot %d\n",
1233 slot->number);
1234 return 0;
1235 }
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253 static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1254 {
1255 struct pci_bus *bus = ctrl->pci_bus;
1256 u8 hp_slot;
1257 u8 temp_byte;
1258 u8 adapter_speed;
1259 u32 rc = 0;
1260
1261 hp_slot = func->device - ctrl->slot_device_offset;
1262
1263
1264
1265
1266 if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot))
1267 rc = INTERLOCK_OPEN;
1268
1269
1270
1271 else if (is_slot_enabled(ctrl, hp_slot))
1272 rc = CARD_FUNCTIONING;
1273 else {
1274 mutex_lock(&ctrl->crit_sect);
1275
1276
1277 enable_slot_power(ctrl, hp_slot);
1278
1279 set_SOGO(ctrl);
1280
1281
1282 wait_for_ctrl_irq(ctrl);
1283
1284
1285
1286 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1287 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1288 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1289
1290 set_SOGO(ctrl);
1291
1292
1293 wait_for_ctrl_irq(ctrl);
1294
1295 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1296 if (bus->cur_bus_speed != adapter_speed)
1297 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1298 rc = WRONG_BUS_FREQUENCY;
1299
1300
1301 disable_slot_power(ctrl, hp_slot);
1302
1303 set_SOGO(ctrl);
1304
1305
1306 wait_for_ctrl_irq(ctrl);
1307
1308 mutex_unlock(&ctrl->crit_sect);
1309
1310 if (rc)
1311 return rc;
1312
1313 mutex_lock(&ctrl->crit_sect);
1314
1315 slot_enable(ctrl, hp_slot);
1316 green_LED_blink(ctrl, hp_slot);
1317
1318 amber_LED_off(ctrl, hp_slot);
1319
1320 set_SOGO(ctrl);
1321
1322
1323 wait_for_ctrl_irq(ctrl);
1324
1325 mutex_unlock(&ctrl->crit_sect);
1326
1327
1328 long_delay(1*HZ);
1329
1330
1331 if (func->status == 0xFF) {
1332
1333 rc = POWER_FAILURE;
1334 func->status = 0;
1335 } else
1336 rc = cpqhp_valid_replace(ctrl, func);
1337
1338 if (!rc) {
1339
1340
1341 rc = cpqhp_configure_board(ctrl, func);
1342
1343
1344
1345
1346
1347
1348
1349
1350 mutex_lock(&ctrl->crit_sect);
1351
1352 amber_LED_on(ctrl, hp_slot);
1353 green_LED_off(ctrl, hp_slot);
1354 slot_disable(ctrl, hp_slot);
1355
1356 set_SOGO(ctrl);
1357
1358
1359 wait_for_ctrl_irq(ctrl);
1360
1361 mutex_unlock(&ctrl->crit_sect);
1362
1363 if (rc)
1364 return rc;
1365 else
1366 return 1;
1367
1368 } else {
1369
1370
1371
1372
1373
1374
1375
1376 mutex_lock(&ctrl->crit_sect);
1377
1378 amber_LED_on(ctrl, hp_slot);
1379 green_LED_off(ctrl, hp_slot);
1380 slot_disable(ctrl, hp_slot);
1381
1382 set_SOGO(ctrl);
1383
1384
1385 wait_for_ctrl_irq(ctrl);
1386
1387 mutex_unlock(&ctrl->crit_sect);
1388 }
1389
1390 }
1391 return rc;
1392
1393 }
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404 static u32 board_added(struct pci_func *func, struct controller *ctrl)
1405 {
1406 u8 hp_slot;
1407 u8 temp_byte;
1408 u8 adapter_speed;
1409 int index;
1410 u32 temp_register = 0xFFFFFFFF;
1411 u32 rc = 0;
1412 struct pci_func *new_slot = NULL;
1413 struct pci_bus *bus = ctrl->pci_bus;
1414 struct resource_lists res_lists;
1415
1416 hp_slot = func->device - ctrl->slot_device_offset;
1417 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n",
1418 __func__, func->device, ctrl->slot_device_offset, hp_slot);
1419
1420 mutex_lock(&ctrl->crit_sect);
1421
1422
1423 enable_slot_power(ctrl, hp_slot);
1424
1425 set_SOGO(ctrl);
1426
1427
1428 wait_for_ctrl_irq(ctrl);
1429
1430
1431
1432
1433 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1434 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1435 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1436
1437 set_SOGO(ctrl);
1438
1439
1440 wait_for_ctrl_irq(ctrl);
1441
1442 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1443 if (bus->cur_bus_speed != adapter_speed)
1444 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1445 rc = WRONG_BUS_FREQUENCY;
1446
1447
1448 disable_slot_power(ctrl, hp_slot);
1449
1450 set_SOGO(ctrl);
1451
1452
1453 wait_for_ctrl_irq(ctrl);
1454
1455 mutex_unlock(&ctrl->crit_sect);
1456
1457 if (rc)
1458 return rc;
1459
1460 cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1461
1462
1463
1464 dbg("%s: before down\n", __func__);
1465 mutex_lock(&ctrl->crit_sect);
1466 dbg("%s: after down\n", __func__);
1467
1468 dbg("%s: before slot_enable\n", __func__);
1469 slot_enable(ctrl, hp_slot);
1470
1471 dbg("%s: before green_LED_blink\n", __func__);
1472 green_LED_blink(ctrl, hp_slot);
1473
1474 dbg("%s: before amber_LED_blink\n", __func__);
1475 amber_LED_off(ctrl, hp_slot);
1476
1477 dbg("%s: before set_SOGO\n", __func__);
1478 set_SOGO(ctrl);
1479
1480
1481 dbg("%s: before wait_for_ctrl_irq\n", __func__);
1482 wait_for_ctrl_irq(ctrl);
1483 dbg("%s: after wait_for_ctrl_irq\n", __func__);
1484
1485 dbg("%s: before up\n", __func__);
1486 mutex_unlock(&ctrl->crit_sect);
1487 dbg("%s: after up\n", __func__);
1488
1489
1490 dbg("%s: before long_delay\n", __func__);
1491 long_delay(1*HZ);
1492 dbg("%s: after long_delay\n", __func__);
1493
1494 dbg("%s: func status = %x\n", __func__, func->status);
1495
1496 if (func->status == 0xFF) {
1497
1498 temp_register = 0xFFFFFFFF;
1499 dbg("%s: temp register set to %x by power fault\n", __func__, temp_register);
1500 rc = POWER_FAILURE;
1501 func->status = 0;
1502 } else {
1503
1504 ctrl->pci_bus->number = func->bus;
1505 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), PCI_VENDOR_ID, &temp_register);
1506 dbg("%s: pci_read_config_dword returns %d\n", __func__, rc);
1507 dbg("%s: temp_register is %x\n", __func__, temp_register);
1508
1509 if (rc != 0) {
1510
1511 temp_register = 0xFFFFFFFF;
1512 dbg("%s: temp register set to %x by error\n", __func__, temp_register);
1513 }
1514
1515 rc = NO_ADAPTER_PRESENT;
1516 }
1517
1518
1519 if (temp_register != 0xFFFFFFFF) {
1520 res_lists.io_head = ctrl->io_head;
1521 res_lists.mem_head = ctrl->mem_head;
1522 res_lists.p_mem_head = ctrl->p_mem_head;
1523 res_lists.bus_head = ctrl->bus_head;
1524 res_lists.irqs = NULL;
1525
1526 rc = configure_new_device(ctrl, func, 0, &res_lists);
1527
1528 dbg("%s: back from configure_new_device\n", __func__);
1529 ctrl->io_head = res_lists.io_head;
1530 ctrl->mem_head = res_lists.mem_head;
1531 ctrl->p_mem_head = res_lists.p_mem_head;
1532 ctrl->bus_head = res_lists.bus_head;
1533
1534 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1535 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1536 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1537 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1538
1539 if (rc) {
1540 mutex_lock(&ctrl->crit_sect);
1541
1542 amber_LED_on(ctrl, hp_slot);
1543 green_LED_off(ctrl, hp_slot);
1544 slot_disable(ctrl, hp_slot);
1545
1546 set_SOGO(ctrl);
1547
1548
1549 wait_for_ctrl_irq(ctrl);
1550
1551 mutex_unlock(&ctrl->crit_sect);
1552 return rc;
1553 } else {
1554 cpqhp_save_slot_config(ctrl, func);
1555 }
1556
1557
1558 func->status = 0;
1559 func->switch_save = 0x10;
1560 func->is_a_board = 0x01;
1561
1562
1563
1564 dbg("%s: configure linux pci_dev structure\n", __func__);
1565 index = 0;
1566 do {
1567 new_slot = cpqhp_slot_find(ctrl->bus, func->device, index++);
1568 if (new_slot && !new_slot->pci_dev)
1569 cpqhp_configure_device(ctrl, new_slot);
1570 } while (new_slot);
1571
1572 mutex_lock(&ctrl->crit_sect);
1573
1574 green_LED_on(ctrl, hp_slot);
1575
1576 set_SOGO(ctrl);
1577
1578
1579 wait_for_ctrl_irq(ctrl);
1580
1581 mutex_unlock(&ctrl->crit_sect);
1582 } else {
1583 mutex_lock(&ctrl->crit_sect);
1584
1585 amber_LED_on(ctrl, hp_slot);
1586 green_LED_off(ctrl, hp_slot);
1587 slot_disable(ctrl, hp_slot);
1588
1589 set_SOGO(ctrl);
1590
1591
1592 wait_for_ctrl_irq(ctrl);
1593
1594 mutex_unlock(&ctrl->crit_sect);
1595
1596 return rc;
1597 }
1598 return 0;
1599 }
1600
1601
1602
1603
1604
1605
1606
1607
1608 static u32 remove_board(struct pci_func *func, u32 replace_flag, struct controller *ctrl)
1609 {
1610 int index;
1611 u8 skip = 0;
1612 u8 device;
1613 u8 hp_slot;
1614 u8 temp_byte;
1615 struct resource_lists res_lists;
1616 struct pci_func *temp_func;
1617
1618 if (cpqhp_unconfigure_device(func))
1619 return 1;
1620
1621 device = func->device;
1622
1623 hp_slot = func->device - ctrl->slot_device_offset;
1624 dbg("In %s, hp_slot = %d\n", __func__, hp_slot);
1625
1626
1627
1628 if (replace_flag || !ctrl->add_support)
1629 cpqhp_save_base_addr_length(ctrl, func);
1630 else if (!func->bus_head && !func->mem_head &&
1631 !func->p_mem_head && !func->io_head) {
1632
1633
1634
1635 index = 0;
1636 temp_func = cpqhp_slot_find(func->bus, func->device, index++);
1637 while (temp_func) {
1638 if (temp_func->bus_head || temp_func->mem_head
1639 || temp_func->p_mem_head || temp_func->io_head) {
1640 skip = 1;
1641 break;
1642 }
1643 temp_func = cpqhp_slot_find(temp_func->bus, temp_func->device, index++);
1644 }
1645
1646 if (!skip)
1647 cpqhp_save_used_resources(ctrl, func);
1648 }
1649
1650 if (func->is_a_board)
1651 func->status = 0x01;
1652 func->configured = 0;
1653
1654 mutex_lock(&ctrl->crit_sect);
1655
1656 green_LED_off(ctrl, hp_slot);
1657 slot_disable(ctrl, hp_slot);
1658
1659 set_SOGO(ctrl);
1660
1661
1662 temp_byte = readb(ctrl->hpc_reg + SLOT_SERR);
1663 temp_byte &= ~(0x01 << hp_slot);
1664 writeb(temp_byte, ctrl->hpc_reg + SLOT_SERR);
1665
1666
1667 wait_for_ctrl_irq(ctrl);
1668
1669 mutex_unlock(&ctrl->crit_sect);
1670
1671 if (!replace_flag && ctrl->add_support) {
1672 while (func) {
1673 res_lists.io_head = ctrl->io_head;
1674 res_lists.mem_head = ctrl->mem_head;
1675 res_lists.p_mem_head = ctrl->p_mem_head;
1676 res_lists.bus_head = ctrl->bus_head;
1677
1678 cpqhp_return_board_resources(func, &res_lists);
1679
1680 ctrl->io_head = res_lists.io_head;
1681 ctrl->mem_head = res_lists.mem_head;
1682 ctrl->p_mem_head = res_lists.p_mem_head;
1683 ctrl->bus_head = res_lists.bus_head;
1684
1685 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1686 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1687 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1688 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1689
1690 if (is_bridge(func)) {
1691 bridge_slot_remove(func);
1692 } else
1693 slot_remove(func);
1694
1695 func = cpqhp_slot_find(ctrl->bus, device, 0);
1696 }
1697
1698
1699 func = cpqhp_slot_create(ctrl->bus);
1700
1701 if (func == NULL)
1702 return 1;
1703
1704 func->bus = ctrl->bus;
1705 func->device = device;
1706 func->function = 0;
1707 func->configured = 0;
1708 func->switch_save = 0x10;
1709 func->is_a_board = 0;
1710 func->p_task_event = NULL;
1711 }
1712
1713 return 0;
1714 }
1715
1716 static void pushbutton_helper_thread(struct timer_list *t)
1717 {
1718 pushbutton_pending = t;
1719
1720 wake_up_process(cpqhp_event_thread);
1721 }
1722
1723
1724
1725 static int event_thread(void *data)
1726 {
1727 struct controller *ctrl;
1728
1729 while (1) {
1730 dbg("!!!!event_thread sleeping\n");
1731 set_current_state(TASK_INTERRUPTIBLE);
1732 schedule();
1733
1734 if (kthread_should_stop())
1735 break;
1736
1737 if (pushbutton_pending)
1738 cpqhp_pushbutton_thread(pushbutton_pending);
1739 else
1740 for (ctrl = cpqhp_ctrl_list; ctrl; ctrl = ctrl->next)
1741 interrupt_event_handler(ctrl);
1742 }
1743 dbg("event_thread signals exit\n");
1744 return 0;
1745 }
1746
1747 int cpqhp_event_start_thread(void)
1748 {
1749 cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event");
1750 if (IS_ERR(cpqhp_event_thread)) {
1751 err("Can't start up our event thread\n");
1752 return PTR_ERR(cpqhp_event_thread);
1753 }
1754
1755 return 0;
1756 }
1757
1758
1759 void cpqhp_event_stop_thread(void)
1760 {
1761 kthread_stop(cpqhp_event_thread);
1762 }
1763
1764
1765 static void interrupt_event_handler(struct controller *ctrl)
1766 {
1767 int loop;
1768 int change = 1;
1769 struct pci_func *func;
1770 u8 hp_slot;
1771 struct slot *p_slot;
1772
1773 while (change) {
1774 change = 0;
1775
1776 for (loop = 0; loop < 10; loop++) {
1777
1778 if (ctrl->event_queue[loop].event_type != 0) {
1779 hp_slot = ctrl->event_queue[loop].hp_slot;
1780
1781 func = cpqhp_slot_find(ctrl->bus, (hp_slot + ctrl->slot_device_offset), 0);
1782 if (!func)
1783 return;
1784
1785 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1786 if (!p_slot)
1787 return;
1788
1789 dbg("hp_slot %d, func %p, p_slot %p\n",
1790 hp_slot, func, p_slot);
1791
1792 if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
1793 dbg("button pressed\n");
1794 } else if (ctrl->event_queue[loop].event_type ==
1795 INT_BUTTON_CANCEL) {
1796 dbg("button cancel\n");
1797 del_timer(&p_slot->task_event);
1798
1799 mutex_lock(&ctrl->crit_sect);
1800
1801 if (p_slot->state == BLINKINGOFF_STATE) {
1802
1803 dbg("turn on green LED\n");
1804 green_LED_on(ctrl, hp_slot);
1805 } else if (p_slot->state == BLINKINGON_STATE) {
1806
1807 dbg("turn off green LED\n");
1808 green_LED_off(ctrl, hp_slot);
1809 }
1810
1811 info(msg_button_cancel, p_slot->number);
1812
1813 p_slot->state = STATIC_STATE;
1814
1815 amber_LED_off(ctrl, hp_slot);
1816
1817 set_SOGO(ctrl);
1818
1819
1820 wait_for_ctrl_irq(ctrl);
1821
1822 mutex_unlock(&ctrl->crit_sect);
1823 }
1824
1825 else if (ctrl->event_queue[loop].event_type == INT_BUTTON_RELEASE) {
1826 dbg("button release\n");
1827
1828 if (is_slot_enabled(ctrl, hp_slot)) {
1829 dbg("slot is on\n");
1830 p_slot->state = BLINKINGOFF_STATE;
1831 info(msg_button_off, p_slot->number);
1832 } else {
1833 dbg("slot is off\n");
1834 p_slot->state = BLINKINGON_STATE;
1835 info(msg_button_on, p_slot->number);
1836 }
1837 mutex_lock(&ctrl->crit_sect);
1838
1839 dbg("blink green LED and turn off amber\n");
1840
1841 amber_LED_off(ctrl, hp_slot);
1842 green_LED_blink(ctrl, hp_slot);
1843
1844 set_SOGO(ctrl);
1845
1846
1847 wait_for_ctrl_irq(ctrl);
1848
1849 mutex_unlock(&ctrl->crit_sect);
1850 timer_setup(&p_slot->task_event,
1851 pushbutton_helper_thread,
1852 0);
1853 p_slot->hp_slot = hp_slot;
1854 p_slot->ctrl = ctrl;
1855
1856 p_slot->task_event.expires = jiffies + 5 * HZ;
1857
1858 dbg("add_timer p_slot = %p\n", p_slot);
1859 add_timer(&p_slot->task_event);
1860 }
1861
1862 else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
1863 dbg("power fault\n");
1864 }
1865
1866 ctrl->event_queue[loop].event_type = 0;
1867
1868 change = 1;
1869 }
1870 }
1871 }
1872 }
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882 void cpqhp_pushbutton_thread(struct timer_list *t)
1883 {
1884 u8 hp_slot;
1885 struct pci_func *func;
1886 struct slot *p_slot = from_timer(p_slot, t, task_event);
1887 struct controller *ctrl = (struct controller *) p_slot->ctrl;
1888
1889 pushbutton_pending = NULL;
1890 hp_slot = p_slot->hp_slot;
1891
1892 if (is_slot_enabled(ctrl, hp_slot)) {
1893 p_slot->state = POWEROFF_STATE;
1894
1895 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1896 dbg("In power_down_board, func = %p, ctrl = %p\n", func, ctrl);
1897 if (!func) {
1898 dbg("Error! func NULL in %s\n", __func__);
1899 return;
1900 }
1901
1902 if (cpqhp_process_SS(ctrl, func) != 0) {
1903 amber_LED_on(ctrl, hp_slot);
1904 green_LED_on(ctrl, hp_slot);
1905
1906 set_SOGO(ctrl);
1907
1908
1909 wait_for_ctrl_irq(ctrl);
1910 }
1911
1912 p_slot->state = STATIC_STATE;
1913 } else {
1914 p_slot->state = POWERON_STATE;
1915
1916
1917 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1918 dbg("In add_board, func = %p, ctrl = %p\n", func, ctrl);
1919 if (!func) {
1920 dbg("Error! func NULL in %s\n", __func__);
1921 return;
1922 }
1923
1924 if (ctrl != NULL) {
1925 if (cpqhp_process_SI(ctrl, func) != 0) {
1926 amber_LED_on(ctrl, hp_slot);
1927 green_LED_off(ctrl, hp_slot);
1928
1929 set_SOGO(ctrl);
1930
1931
1932 wait_for_ctrl_irq(ctrl);
1933 }
1934 }
1935
1936 p_slot->state = STATIC_STATE;
1937 }
1938 }
1939
1940
1941 int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func)
1942 {
1943 u8 device, hp_slot;
1944 u16 temp_word;
1945 u32 tempdword;
1946 int rc;
1947 struct slot *p_slot;
1948
1949 tempdword = 0;
1950
1951 device = func->device;
1952 hp_slot = device - ctrl->slot_device_offset;
1953 p_slot = cpqhp_find_slot(ctrl, device);
1954
1955
1956 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1957
1958 if (tempdword & (0x01 << hp_slot))
1959 return 1;
1960
1961 if (func->is_a_board) {
1962 rc = board_replaced(func, ctrl);
1963 } else {
1964
1965 slot_remove(func);
1966
1967 func = cpqhp_slot_create(ctrl->bus);
1968 if (func == NULL)
1969 return 1;
1970
1971 func->bus = ctrl->bus;
1972 func->device = device;
1973 func->function = 0;
1974 func->configured = 0;
1975 func->is_a_board = 1;
1976
1977
1978 temp_word = ctrl->ctrl_int_comp >> 16;
1979 func->presence_save = (temp_word >> hp_slot) & 0x01;
1980 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1981
1982 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1983 func->switch_save = 0;
1984 } else {
1985 func->switch_save = 0x10;
1986 }
1987
1988 rc = board_added(func, ctrl);
1989 if (rc) {
1990 if (is_bridge(func)) {
1991 bridge_slot_remove(func);
1992 } else
1993 slot_remove(func);
1994
1995
1996 func = cpqhp_slot_create(ctrl->bus);
1997
1998 if (func == NULL)
1999 return 1;
2000
2001 func->bus = ctrl->bus;
2002 func->device = device;
2003 func->function = 0;
2004 func->configured = 0;
2005 func->is_a_board = 0;
2006
2007
2008 temp_word = ctrl->ctrl_int_comp >> 16;
2009 func->presence_save = (temp_word >> hp_slot) & 0x01;
2010 func->presence_save |=
2011 (temp_word >> (hp_slot + 7)) & 0x02;
2012
2013 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2014 func->switch_save = 0;
2015 } else {
2016 func->switch_save = 0x10;
2017 }
2018 }
2019 }
2020
2021 if (rc)
2022 dbg("%s: rc = %d\n", __func__, rc);
2023
2024 return rc;
2025 }
2026
2027
2028 int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func)
2029 {
2030 u8 device, class_code, header_type, BCR;
2031 u8 index = 0;
2032 u8 replace_flag;
2033 u32 rc = 0;
2034 unsigned int devfn;
2035 struct slot *p_slot;
2036 struct pci_bus *pci_bus = ctrl->pci_bus;
2037
2038 device = func->device;
2039 func = cpqhp_slot_find(ctrl->bus, device, index++);
2040 p_slot = cpqhp_find_slot(ctrl, device);
2041
2042
2043 while (func && !rc) {
2044 pci_bus->number = func->bus;
2045 devfn = PCI_DEVFN(func->device, func->function);
2046
2047
2048 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2049 if (rc)
2050 return rc;
2051
2052 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2053
2054 rc = REMOVE_NOT_SUPPORTED;
2055 } else {
2056
2057 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
2058 if (rc)
2059 return rc;
2060
2061
2062 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2063 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
2064 if (rc)
2065 return rc;
2066
2067
2068
2069 if (BCR & PCI_BRIDGE_CTL_VGA)
2070 rc = REMOVE_NOT_SUPPORTED;
2071 }
2072 }
2073
2074 func = cpqhp_slot_find(ctrl->bus, device, index++);
2075 }
2076
2077 func = cpqhp_slot_find(ctrl->bus, device, 0);
2078 if ((func != NULL) && !rc) {
2079
2080 replace_flag = !(ctrl->add_support);
2081 rc = remove_board(func, replace_flag, ctrl);
2082 } else if (!rc) {
2083 rc = 1;
2084 }
2085
2086 return rc;
2087 }
2088
2089
2090
2091
2092
2093
2094
2095
2096 static void switch_leds(struct controller *ctrl, const int num_of_slots,
2097 u32 *work_LED, const int direction)
2098 {
2099 int loop;
2100
2101 for (loop = 0; loop < num_of_slots; loop++) {
2102 if (direction)
2103 *work_LED = *work_LED >> 1;
2104 else
2105 *work_LED = *work_LED << 1;
2106 writel(*work_LED, ctrl->hpc_reg + LED_CONTROL);
2107
2108 set_SOGO(ctrl);
2109
2110
2111 wait_for_ctrl_irq(ctrl);
2112
2113
2114 long_delay((2*HZ)/10);
2115 }
2116 }
2117
2118
2119
2120
2121
2122
2123
2124
2125 int cpqhp_hardware_test(struct controller *ctrl, int test_num)
2126 {
2127 u32 save_LED;
2128 u32 work_LED;
2129 int loop;
2130 int num_of_slots;
2131
2132 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0f;
2133
2134 switch (test_num) {
2135 case 1:
2136
2137
2138
2139
2140 save_LED = readl(ctrl->hpc_reg + LED_CONTROL);
2141 work_LED = 0x01010101;
2142 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2143 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2144 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2145 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2146
2147 work_LED = 0x01010000;
2148 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2149 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2150 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2151 work_LED = 0x00000101;
2152 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2153 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2154 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2155
2156 work_LED = 0x01010000;
2157 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2158 for (loop = 0; loop < num_of_slots; loop++) {
2159 set_SOGO(ctrl);
2160
2161
2162 wait_for_ctrl_irq(ctrl);
2163
2164
2165 long_delay((3*HZ)/10);
2166 work_LED = work_LED >> 16;
2167 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2168
2169 set_SOGO(ctrl);
2170
2171
2172 wait_for_ctrl_irq(ctrl);
2173
2174
2175 long_delay((3*HZ)/10);
2176 work_LED = work_LED << 16;
2177 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2178 work_LED = work_LED << 1;
2179 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2180 }
2181
2182
2183 writel(save_LED, ctrl->hpc_reg + LED_CONTROL);
2184
2185 set_SOGO(ctrl);
2186
2187
2188 wait_for_ctrl_irq(ctrl);
2189 break;
2190 case 2:
2191
2192 break;
2193 case 3:
2194
2195 break;
2196 }
2197 return 0;
2198 }
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210 static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
2211 u8 behind_bridge, struct resource_lists *resources)
2212 {
2213 u8 temp_byte, function, max_functions, stop_it;
2214 int rc;
2215 u32 ID;
2216 struct pci_func *new_slot;
2217 int index;
2218
2219 new_slot = func;
2220
2221 dbg("%s\n", __func__);
2222
2223 ctrl->pci_bus->number = func->bus;
2224 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2225 if (rc) {
2226 dbg("%s: rc = %d\n", __func__, rc);
2227 return rc;
2228 }
2229
2230 if (temp_byte & 0x80)
2231 max_functions = 8;
2232 else
2233 max_functions = 1;
2234
2235 function = 0;
2236
2237 do {
2238 rc = configure_new_function(ctrl, new_slot, behind_bridge, resources);
2239
2240 if (rc) {
2241 dbg("configure_new_function failed %d\n", rc);
2242 index = 0;
2243
2244 while (new_slot) {
2245 new_slot = cpqhp_slot_find(new_slot->bus, new_slot->device, index++);
2246
2247 if (new_slot)
2248 cpqhp_return_board_resources(new_slot, resources);
2249 }
2250
2251 return rc;
2252 }
2253
2254 function++;
2255
2256 stop_it = 0;
2257
2258
2259
2260
2261 while ((function < max_functions) && (!stop_it)) {
2262 pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
2263
2264 if (PCI_POSSIBLE_ERROR(ID)) {
2265 function++;
2266 } else {
2267
2268 new_slot = cpqhp_slot_create(func->bus);
2269
2270 if (new_slot == NULL)
2271 return 1;
2272
2273 new_slot->bus = func->bus;
2274 new_slot->device = func->device;
2275 new_slot->function = function;
2276 new_slot->is_a_board = 1;
2277 new_slot->status = 0;
2278
2279 stop_it++;
2280 }
2281 }
2282
2283 } while (function < max_functions);
2284 dbg("returning from configure_new_device\n");
2285
2286 return 0;
2287 }
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306 static int configure_new_function(struct controller *ctrl, struct pci_func *func,
2307 u8 behind_bridge,
2308 struct resource_lists *resources)
2309 {
2310 int cloop;
2311 u8 IRQ = 0;
2312 u8 temp_byte;
2313 u8 device;
2314 u8 class_code;
2315 u16 command;
2316 u16 temp_word;
2317 u32 temp_dword;
2318 u32 rc;
2319 u32 temp_register;
2320 u32 base;
2321 u32 ID;
2322 unsigned int devfn;
2323 struct pci_resource *mem_node;
2324 struct pci_resource *p_mem_node;
2325 struct pci_resource *io_node;
2326 struct pci_resource *bus_node;
2327 struct pci_resource *hold_mem_node;
2328 struct pci_resource *hold_p_mem_node;
2329 struct pci_resource *hold_IO_node;
2330 struct pci_resource *hold_bus_node;
2331 struct irq_mapping irqs;
2332 struct pci_func *new_slot;
2333 struct pci_bus *pci_bus;
2334 struct resource_lists temp_resources;
2335
2336 pci_bus = ctrl->pci_bus;
2337 pci_bus->number = func->bus;
2338 devfn = PCI_DEVFN(func->device, func->function);
2339
2340
2341 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2342 if (rc)
2343 return rc;
2344
2345 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2346
2347 dbg("set Primary bus = %d\n", func->bus);
2348 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2349 if (rc)
2350 return rc;
2351
2352
2353 dbg("find ranges of buses to use\n");
2354 bus_node = get_max_resource(&(resources->bus_head), 1);
2355
2356
2357 if (!bus_node)
2358 return -ENOMEM;
2359
2360
2361 temp_byte = bus_node->base;
2362 dbg("set Secondary bus = %d\n", bus_node->base);
2363 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2364 if (rc)
2365 return rc;
2366
2367
2368 temp_byte = bus_node->base + bus_node->length - 1;
2369 dbg("set subordinate bus = %d\n", bus_node->base + bus_node->length - 1);
2370 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2371 if (rc)
2372 return rc;
2373
2374
2375 temp_byte = 0x40;
2376 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
2377 if (rc)
2378 return rc;
2379 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
2380 if (rc)
2381 return rc;
2382
2383
2384 temp_byte = 0x08;
2385 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
2386 if (rc)
2387 return rc;
2388
2389
2390 io_node = get_max_resource(&(resources->io_head), 0x1000);
2391 if (!io_node)
2392 return -ENOMEM;
2393 mem_node = get_max_resource(&(resources->mem_head), 0x100000);
2394 if (!mem_node)
2395 return -ENOMEM;
2396 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000);
2397 if (!p_mem_node)
2398 return -ENOMEM;
2399 dbg("Setup the IO, memory, and prefetchable windows\n");
2400 dbg("io_node\n");
2401 dbg("(base, len, next) (%x, %x, %p)\n", io_node->base,
2402 io_node->length, io_node->next);
2403 dbg("mem_node\n");
2404 dbg("(base, len, next) (%x, %x, %p)\n", mem_node->base,
2405 mem_node->length, mem_node->next);
2406 dbg("p_mem_node\n");
2407 dbg("(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
2408 p_mem_node->length, p_mem_node->next);
2409
2410
2411 if (!resources->irqs) {
2412 irqs.barber_pole = 0;
2413 irqs.interrupt[0] = 0;
2414 irqs.interrupt[1] = 0;
2415 irqs.interrupt[2] = 0;
2416 irqs.interrupt[3] = 0;
2417 irqs.valid_INT = 0;
2418 } else {
2419 irqs.barber_pole = resources->irqs->barber_pole;
2420 irqs.interrupt[0] = resources->irqs->interrupt[0];
2421 irqs.interrupt[1] = resources->irqs->interrupt[1];
2422 irqs.interrupt[2] = resources->irqs->interrupt[2];
2423 irqs.interrupt[3] = resources->irqs->interrupt[3];
2424 irqs.valid_INT = resources->irqs->valid_INT;
2425 }
2426
2427
2428
2429 temp_resources.bus_head = bus_node;
2430 temp_resources.io_head = io_node;
2431 temp_resources.mem_head = mem_node;
2432 temp_resources.p_mem_head = p_mem_node;
2433 temp_resources.irqs = &irqs;
2434
2435
2436
2437
2438 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2439 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2440 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
2441 hold_p_mem_node = kmalloc(sizeof(*hold_p_mem_node), GFP_KERNEL);
2442
2443 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2444 kfree(hold_bus_node);
2445 kfree(hold_IO_node);
2446 kfree(hold_mem_node);
2447 kfree(hold_p_mem_node);
2448
2449 return 1;
2450 }
2451
2452 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2453
2454 bus_node->base += 1;
2455 bus_node->length -= 1;
2456 bus_node->next = NULL;
2457
2458
2459
2460 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2461 io_node->next = NULL;
2462
2463
2464 temp_byte = io_node->base >> 8;
2465 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2466
2467 temp_byte = (io_node->base + io_node->length - 1) >> 8;
2468 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2469
2470
2471
2472
2473 memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2474 mem_node->next = NULL;
2475
2476
2477 temp_word = mem_node->base >> 16;
2478 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2479
2480 temp_word = (mem_node->base + mem_node->length - 1) >> 16;
2481 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2482
2483 memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2484 p_mem_node->next = NULL;
2485
2486
2487 temp_word = p_mem_node->base >> 16;
2488 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2489
2490 temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16;
2491 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2492
2493
2494
2495 irqs.barber_pole--;
2496
2497 rc = 0;
2498
2499
2500 for (device = 0; (device <= 0x1F) && !rc; device++) {
2501 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2502
2503 ID = 0xFFFFFFFF;
2504 pci_bus->number = hold_bus_node->base;
2505 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0), 0x00, &ID);
2506 pci_bus->number = func->bus;
2507
2508 if (!PCI_POSSIBLE_ERROR(ID)) {
2509
2510 new_slot = cpqhp_slot_create(hold_bus_node->base);
2511
2512 if (new_slot == NULL) {
2513 rc = -ENOMEM;
2514 continue;
2515 }
2516
2517 new_slot->bus = hold_bus_node->base;
2518 new_slot->device = device;
2519 new_slot->function = 0;
2520 new_slot->is_a_board = 1;
2521 new_slot->status = 0;
2522
2523 rc = configure_new_device(ctrl, new_slot, 1, &temp_resources);
2524 dbg("configure_new_device rc=0x%x\n", rc);
2525 }
2526 }
2527
2528 if (rc)
2529 goto free_and_out;
2530
2531 if (resources->irqs) {
2532 resources->irqs->interrupt[0] = irqs.interrupt[0];
2533 resources->irqs->interrupt[1] = irqs.interrupt[1];
2534 resources->irqs->interrupt[2] = irqs.interrupt[2];
2535 resources->irqs->interrupt[3] = irqs.interrupt[3];
2536 resources->irqs->valid_INT = irqs.valid_INT;
2537 } else if (!behind_bridge) {
2538
2539 for (cloop = 0; cloop < 4; cloop++) {
2540 if (irqs.valid_INT & (0x01 << cloop)) {
2541 rc = cpqhp_set_irq(func->bus, func->device,
2542 cloop + 1, irqs.interrupt[cloop]);
2543 if (rc)
2544 goto free_and_out;
2545 }
2546 }
2547 }
2548
2549
2550
2551 if (bus_node && temp_resources.bus_head) {
2552 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2553
2554 hold_bus_node->next = func->bus_head;
2555 func->bus_head = hold_bus_node;
2556
2557 temp_byte = temp_resources.bus_head->base - 1;
2558
2559
2560 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2561
2562 if (temp_resources.bus_head->length == 0) {
2563 kfree(temp_resources.bus_head);
2564 temp_resources.bus_head = NULL;
2565 } else {
2566 return_resource(&(resources->bus_head), temp_resources.bus_head);
2567 }
2568 }
2569
2570
2571
2572 if (hold_IO_node && temp_resources.io_head) {
2573 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2574 &hold_IO_node, 0x1000);
2575
2576
2577 if (io_node) {
2578 hold_IO_node->base = io_node->base + io_node->length;
2579
2580 temp_byte = (hold_IO_node->base) >> 8;
2581 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2582
2583 return_resource(&(resources->io_head), io_node);
2584 }
2585
2586 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2587
2588
2589 if (io_node) {
2590
2591
2592 hold_IO_node->length = io_node->base - hold_IO_node->base;
2593
2594
2595 if (hold_IO_node->length) {
2596 hold_IO_node->next = func->io_head;
2597 func->io_head = hold_IO_node;
2598
2599 temp_byte = (io_node->base - 1) >> 8;
2600 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2601
2602 return_resource(&(resources->io_head), io_node);
2603 } else {
2604
2605 temp_word = 0x0000;
2606 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_LIMIT, temp_word);
2607
2608 return_resource(&(resources->io_head), io_node);
2609 kfree(hold_IO_node);
2610 }
2611 } else {
2612
2613 hold_IO_node->next = func->io_head;
2614 func->io_head = hold_IO_node;
2615 }
2616 } else if (hold_IO_node) {
2617
2618 hold_IO_node->next = func->io_head;
2619 func->io_head = hold_IO_node;
2620 }
2621
2622
2623 if (hold_mem_node && temp_resources.mem_head) {
2624 mem_node = do_pre_bridge_resource_split(&(temp_resources. mem_head),
2625 &hold_mem_node, 0x100000);
2626
2627
2628 if (mem_node) {
2629 hold_mem_node->base = mem_node->base + mem_node->length;
2630
2631 temp_word = (hold_mem_node->base) >> 16;
2632 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2633
2634 return_resource(&(resources->mem_head), mem_node);
2635 }
2636
2637 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000);
2638
2639
2640 if (mem_node) {
2641
2642
2643 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2644
2645 if (hold_mem_node->length) {
2646 hold_mem_node->next = func->mem_head;
2647 func->mem_head = hold_mem_node;
2648
2649
2650 temp_word = (mem_node->base - 1) >> 16;
2651 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2652
2653
2654 return_resource(&(resources->mem_head), mem_node);
2655 } else {
2656
2657 temp_word = 0x0000;
2658 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2659
2660 return_resource(&(resources->mem_head), mem_node);
2661 kfree(hold_mem_node);
2662 }
2663 } else {
2664
2665 hold_mem_node->next = func->mem_head;
2666 func->mem_head = hold_mem_node;
2667 }
2668 } else if (hold_mem_node) {
2669
2670 hold_mem_node->next = func->mem_head;
2671 func->mem_head = hold_mem_node;
2672 }
2673
2674
2675 if (temp_resources.p_mem_head) {
2676 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2677 &hold_p_mem_node, 0x100000);
2678
2679
2680 if (p_mem_node) {
2681 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2682
2683 temp_word = (hold_p_mem_node->base) >> 16;
2684 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2685
2686 return_resource(&(resources->p_mem_head), p_mem_node);
2687 }
2688
2689 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000);
2690
2691
2692 if (p_mem_node) {
2693
2694
2695 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2696
2697
2698 if (hold_p_mem_node->length) {
2699 hold_p_mem_node->next = func->p_mem_head;
2700 func->p_mem_head = hold_p_mem_node;
2701
2702 temp_word = (p_mem_node->base - 1) >> 16;
2703 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2704
2705 return_resource(&(resources->p_mem_head), p_mem_node);
2706 } else {
2707
2708 temp_word = 0x0000;
2709 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2710
2711 return_resource(&(resources->p_mem_head), p_mem_node);
2712 kfree(hold_p_mem_node);
2713 }
2714 } else {
2715
2716 hold_p_mem_node->next = func->p_mem_head;
2717 func->p_mem_head = hold_p_mem_node;
2718 }
2719 } else if (hold_p_mem_node) {
2720
2721 hold_p_mem_node->next = func->p_mem_head;
2722 func->p_mem_head = hold_p_mem_node;
2723 }
2724
2725
2726
2727
2728
2729 command = 0x0157;
2730
2731
2732
2733
2734
2735 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
2736
2737
2738 command = 0x07;
2739
2740
2741 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
2742 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2743
2744 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2745
2746 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2747
2748 return DEVICE_TYPE_NOT_SUPPORTED;
2749 }
2750
2751 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
2752 temp_register = 0xFFFFFFFF;
2753
2754 dbg("CND: bus=%d, devfn=%d, offset=%d\n", pci_bus->number, devfn, cloop);
2755 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
2756
2757 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2758 dbg("CND: base = 0x%x\n", temp_register);
2759
2760 if (temp_register) {
2761 if ((temp_register & 0x03L) == 0x01) {
2762
2763
2764
2765 base = temp_register & 0xFFFFFFFC;
2766 base = ~base + 1;
2767
2768 dbg("CND: length = 0x%x\n", base);
2769 io_node = get_io_resource(&(resources->io_head), base);
2770 if (!io_node)
2771 return -ENOMEM;
2772 dbg("Got io_node start = %8.8x, length = %8.8x next (%p)\n",
2773 io_node->base, io_node->length, io_node->next);
2774 dbg("func (%p) io_head (%p)\n", func, func->io_head);
2775
2776
2777 base = io_node->base;
2778 io_node->next = func->io_head;
2779 func->io_head = io_node;
2780 } else if ((temp_register & 0x0BL) == 0x08) {
2781
2782 base = temp_register & 0xFFFFFFF0;
2783 base = ~base + 1;
2784
2785 dbg("CND: length = 0x%x\n", base);
2786 p_mem_node = get_resource(&(resources->p_mem_head), base);
2787
2788
2789 if (p_mem_node) {
2790 base = p_mem_node->base;
2791
2792 p_mem_node->next = func->p_mem_head;
2793 func->p_mem_head = p_mem_node;
2794 } else
2795 return -ENOMEM;
2796 } else if ((temp_register & 0x0BL) == 0x00) {
2797
2798 base = temp_register & 0xFFFFFFF0;
2799 base = ~base + 1;
2800
2801 dbg("CND: length = 0x%x\n", base);
2802 mem_node = get_resource(&(resources->mem_head), base);
2803
2804
2805 if (mem_node) {
2806 base = mem_node->base;
2807
2808 mem_node->next = func->mem_head;
2809 func->mem_head = mem_node;
2810 } else
2811 return -ENOMEM;
2812 } else {
2813
2814 return NOT_ENOUGH_RESOURCES;
2815 }
2816
2817 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2818
2819
2820 if ((temp_register & 0x07L) == 0x04) {
2821 cloop += 4;
2822
2823
2824
2825
2826
2827 base = 0;
2828 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2829 }
2830 }
2831 }
2832 if (cpqhp_legacy_mode) {
2833
2834 rc = pci_bus_read_config_byte(pci_bus, devfn,
2835 PCI_INTERRUPT_PIN, &temp_byte);
2836
2837
2838
2839
2840 if (temp_byte && resources->irqs &&
2841 (resources->irqs->valid_INT &
2842 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2843
2844 IRQ = resources->irqs->interrupt[(temp_byte +
2845 resources->irqs->barber_pole - 1) & 0x03];
2846 } else {
2847
2848 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2849
2850 if (class_code == PCI_BASE_CLASS_STORAGE)
2851 IRQ = cpqhp_disk_irq;
2852 else
2853 IRQ = cpqhp_nic_irq;
2854 }
2855
2856
2857 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
2858 }
2859
2860 if (!behind_bridge) {
2861 rc = cpqhp_set_irq(func->bus, func->device, temp_byte, IRQ);
2862 if (rc)
2863 return 1;
2864 } else {
2865
2866
2867 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2868 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2869 }
2870
2871
2872 temp_byte = 0x40;
2873 rc = pci_bus_write_config_byte(pci_bus, devfn,
2874 PCI_LATENCY_TIMER, temp_byte);
2875
2876
2877 temp_byte = 0x08;
2878 rc = pci_bus_write_config_byte(pci_bus, devfn,
2879 PCI_CACHE_LINE_SIZE, temp_byte);
2880
2881
2882 temp_dword = 0x00L;
2883 rc = pci_bus_write_config_word(pci_bus, devfn,
2884 PCI_ROM_ADDRESS, temp_dword);
2885
2886
2887 temp_word = 0x0157;
2888
2889
2890
2891
2892
2893 rc = pci_bus_write_config_word(pci_bus, devfn,
2894 PCI_COMMAND, temp_word);
2895 } else {
2896
2897 return DEVICE_TYPE_NOT_SUPPORTED;
2898 }
2899
2900 func->configured = 1;
2901
2902 return 0;
2903 free_and_out:
2904 cpqhp_destroy_resource_list(&temp_resources);
2905
2906 return_resource(&(resources->bus_head), hold_bus_node);
2907 return_resource(&(resources->io_head), hold_IO_node);
2908 return_resource(&(resources->mem_head), hold_mem_node);
2909 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2910 return rc;
2911 }