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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Compaq Hot Plug Controller Driver
0004  *
0005  * Copyright (C) 1995,2001 Compaq Computer Corporation
0006  * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
0007  * Copyright (C) 2001 IBM Corp.
0008  *
0009  * All rights reserved.
0010  *
0011  * Send feedback to <greg@kroah.com>
0012  *
0013  * Jan 12, 2003 -   Added 66/100/133MHz PCI-X support,
0014  *          Torben Mathiasen <torben.mathiasen@hp.com>
0015  */
0016 
0017 #include <linux/module.h>
0018 #include <linux/moduleparam.h>
0019 #include <linux/kernel.h>
0020 #include <linux/types.h>
0021 #include <linux/proc_fs.h>
0022 #include <linux/slab.h>
0023 #include <linux/workqueue.h>
0024 #include <linux/pci.h>
0025 #include <linux/pci_hotplug.h>
0026 #include <linux/init.h>
0027 #include <linux/interrupt.h>
0028 
0029 #include <linux/uaccess.h>
0030 
0031 #include "cpqphp.h"
0032 #include "cpqphp_nvram.h"
0033 
0034 
0035 /* Global variables */
0036 int cpqhp_debug;
0037 int cpqhp_legacy_mode;
0038 struct controller *cpqhp_ctrl_list; /* = NULL */
0039 struct pci_func *cpqhp_slot_list[256];
0040 struct irq_routing_table *cpqhp_routing_table;
0041 
0042 /* local variables */
0043 static void __iomem *smbios_table;
0044 static void __iomem *smbios_start;
0045 static void __iomem *cpqhp_rom_start;
0046 static bool power_mode;
0047 static bool debug;
0048 static int initialized;
0049 
0050 #define DRIVER_VERSION  "0.9.8"
0051 #define DRIVER_AUTHOR   "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
0052 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
0053 
0054 MODULE_AUTHOR(DRIVER_AUTHOR);
0055 MODULE_DESCRIPTION(DRIVER_DESC);
0056 MODULE_LICENSE("GPL");
0057 
0058 module_param(power_mode, bool, 0644);
0059 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
0060 
0061 module_param(debug, bool, 0644);
0062 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
0063 
0064 #define CPQHPC_MODULE_MINOR 208
0065 
0066 static inline int is_slot64bit(struct slot *slot)
0067 {
0068     return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
0069 }
0070 
0071 static inline int is_slot66mhz(struct slot *slot)
0072 {
0073     return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
0074 }
0075 
0076 /**
0077  * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
0078  * @begin: begin pointer for region to be scanned.
0079  * @end: end pointer for region to be scanned.
0080  *
0081  * Returns pointer to the head of the SMBIOS tables (or %NULL).
0082  */
0083 static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
0084 {
0085     void __iomem *fp;
0086     void __iomem *endp;
0087     u8 temp1, temp2, temp3, temp4;
0088     int status = 0;
0089 
0090     endp = (end - sizeof(u32) + 1);
0091 
0092     for (fp = begin; fp <= endp; fp += 16) {
0093         temp1 = readb(fp);
0094         temp2 = readb(fp+1);
0095         temp3 = readb(fp+2);
0096         temp4 = readb(fp+3);
0097         if (temp1 == '_' &&
0098             temp2 == 'S' &&
0099             temp3 == 'M' &&
0100             temp4 == '_') {
0101             status = 1;
0102             break;
0103         }
0104     }
0105 
0106     if (!status)
0107         fp = NULL;
0108 
0109     dbg("Discovered SMBIOS Entry point at %p\n", fp);
0110 
0111     return fp;
0112 }
0113 
0114 /**
0115  * init_SERR - Initializes the per slot SERR generation.
0116  * @ctrl: controller to use
0117  *
0118  * For unexpected switch opens
0119  */
0120 static int init_SERR(struct controller *ctrl)
0121 {
0122     u32 tempdword;
0123     u32 number_of_slots;
0124 
0125     if (!ctrl)
0126         return 1;
0127 
0128     tempdword = ctrl->first_slot;
0129 
0130     number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
0131     /* Loop through slots */
0132     while (number_of_slots) {
0133         writeb(0, ctrl->hpc_reg + SLOT_SERR);
0134         tempdword++;
0135         number_of_slots--;
0136     }
0137 
0138     return 0;
0139 }
0140 
0141 static int init_cpqhp_routing_table(void)
0142 {
0143     int len;
0144 
0145     cpqhp_routing_table = pcibios_get_irq_routing_table();
0146     if (cpqhp_routing_table == NULL)
0147         return -ENOMEM;
0148 
0149     len = cpqhp_routing_table_length();
0150     if (len == 0) {
0151         kfree(cpqhp_routing_table);
0152         cpqhp_routing_table = NULL;
0153         return -1;
0154     }
0155 
0156     return 0;
0157 }
0158 
0159 /* nice debugging output */
0160 static void pci_print_IRQ_route(void)
0161 {
0162     int len;
0163     int loop;
0164     u8 tbus, tdevice, tslot;
0165 
0166     len = cpqhp_routing_table_length();
0167 
0168     dbg("bus dev func slot\n");
0169     for (loop = 0; loop < len; ++loop) {
0170         tbus = cpqhp_routing_table->slots[loop].bus;
0171         tdevice = cpqhp_routing_table->slots[loop].devfn;
0172         tslot = cpqhp_routing_table->slots[loop].slot;
0173         dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
0174 
0175     }
0176 }
0177 
0178 
0179 /**
0180  * get_subsequent_smbios_entry: get the next entry from bios table.
0181  * @smbios_start: where to start in the SMBIOS table
0182  * @smbios_table: location of the SMBIOS table
0183  * @curr: %NULL or pointer to previously returned structure
0184  *
0185  * Gets the first entry if previous == NULL;
0186  * otherwise, returns the next entry.
0187  * Uses global SMBIOS Table pointer.
0188  *
0189  * Returns a pointer to an SMBIOS structure or NULL if none found.
0190  */
0191 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
0192                         void __iomem *smbios_table,
0193                         void __iomem *curr)
0194 {
0195     u8 bail = 0;
0196     u8 previous_byte = 1;
0197     void __iomem *p_temp;
0198     void __iomem *p_max;
0199 
0200     if (!smbios_table || !curr)
0201         return NULL;
0202 
0203     /* set p_max to the end of the table */
0204     p_max = smbios_start + readw(smbios_table + ST_LENGTH);
0205 
0206     p_temp = curr;
0207     p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
0208 
0209     while ((p_temp < p_max) && !bail) {
0210         /* Look for the double NULL terminator
0211          * The first condition is the previous byte
0212          * and the second is the curr
0213          */
0214         if (!previous_byte && !(readb(p_temp)))
0215             bail = 1;
0216 
0217         previous_byte = readb(p_temp);
0218         p_temp++;
0219     }
0220 
0221     if (p_temp < p_max)
0222         return p_temp;
0223     else
0224         return NULL;
0225 }
0226 
0227 
0228 /**
0229  * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
0230  * @smbios_start: where to start in the SMBIOS table
0231  * @smbios_table: location of the SMBIOS table
0232  * @type: SMBIOS structure type to be returned
0233  * @previous: %NULL or pointer to previously returned structure
0234  *
0235  * Gets the first entry of the specified type if previous == %NULL;
0236  * Otherwise, returns the next entry of the given type.
0237  * Uses global SMBIOS Table pointer.
0238  * Uses get_subsequent_smbios_entry.
0239  *
0240  * Returns a pointer to an SMBIOS structure or %NULL if none found.
0241  */
0242 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
0243                     void __iomem *smbios_table,
0244                     u8 type,
0245                     void __iomem *previous)
0246 {
0247     if (!smbios_table)
0248         return NULL;
0249 
0250     if (!previous)
0251         previous = smbios_start;
0252     else
0253         previous = get_subsequent_smbios_entry(smbios_start,
0254                     smbios_table, previous);
0255 
0256     while (previous)
0257         if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
0258             previous = get_subsequent_smbios_entry(smbios_start,
0259                         smbios_table, previous);
0260         else
0261             break;
0262 
0263     return previous;
0264 }
0265 
0266 static int ctrl_slot_cleanup(struct controller *ctrl)
0267 {
0268     struct slot *old_slot, *next_slot;
0269 
0270     old_slot = ctrl->slot;
0271     ctrl->slot = NULL;
0272 
0273     while (old_slot) {
0274         next_slot = old_slot->next;
0275         pci_hp_deregister(&old_slot->hotplug_slot);
0276         kfree(old_slot);
0277         old_slot = next_slot;
0278     }
0279 
0280     cpqhp_remove_debugfs_files(ctrl);
0281 
0282     /* Free IRQ associated with hot plug device */
0283     free_irq(ctrl->interrupt, ctrl);
0284     /* Unmap the memory */
0285     iounmap(ctrl->hpc_reg);
0286     /* Finally reclaim PCI mem */
0287     release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
0288                pci_resource_len(ctrl->pci_dev, 0));
0289 
0290     return 0;
0291 }
0292 
0293 
0294 /**
0295  * get_slot_mapping - determine logical slot mapping for PCI device
0296  *
0297  * Won't work for more than one PCI-PCI bridge in a slot.
0298  *
0299  * @bus: pointer to the PCI bus structure
0300  * @bus_num: bus number of PCI device
0301  * @dev_num: device number of PCI device
0302  * @slot: Pointer to u8 where slot number will  be returned
0303  *
0304  * Output:  SUCCESS or FAILURE
0305  */
0306 static int
0307 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
0308 {
0309     u32 work;
0310     long len;
0311     long loop;
0312 
0313     u8 tbus, tdevice, tslot, bridgeSlot;
0314 
0315     dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
0316 
0317     bridgeSlot = 0xFF;
0318 
0319     len = cpqhp_routing_table_length();
0320     for (loop = 0; loop < len; ++loop) {
0321         tbus = cpqhp_routing_table->slots[loop].bus;
0322         tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
0323         tslot = cpqhp_routing_table->slots[loop].slot;
0324 
0325         if ((tbus == bus_num) && (tdevice == dev_num)) {
0326             *slot = tslot;
0327             return 0;
0328         } else {
0329             /* Did not get a match on the target PCI device. Check
0330              * if the current IRQ table entry is a PCI-to-PCI
0331              * bridge device.  If so, and it's secondary bus
0332              * matches the bus number for the target device, I need
0333              * to save the bridge's slot number.  If I can not find
0334              * an entry for the target device, I will have to
0335              * assume it's on the other side of the bridge, and
0336              * assign it the bridge's slot.
0337              */
0338             bus->number = tbus;
0339             pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
0340                         PCI_CLASS_REVISION, &work);
0341 
0342             if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
0343                 pci_bus_read_config_dword(bus,
0344                             PCI_DEVFN(tdevice, 0),
0345                             PCI_PRIMARY_BUS, &work);
0346                 // See if bridge's secondary bus matches target bus.
0347                 if (((work >> 8) & 0x000000FF) == (long) bus_num)
0348                     bridgeSlot = tslot;
0349             }
0350         }
0351 
0352     }
0353 
0354     /* If we got here, we didn't find an entry in the IRQ mapping table for
0355      * the target PCI device.  If we did determine that the target device
0356      * is on the other side of a PCI-to-PCI bridge, return the slot number
0357      * for the bridge.
0358      */
0359     if (bridgeSlot != 0xFF) {
0360         *slot = bridgeSlot;
0361         return 0;
0362     }
0363     /* Couldn't find an entry in the routing table for this PCI device */
0364     return -1;
0365 }
0366 
0367 
0368 /**
0369  * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
0370  * @ctrl: struct controller to use
0371  * @func: PCI device/function info
0372  * @status: LED control flag: 1 = LED on, 0 = LED off
0373  */
0374 static int
0375 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
0376                 u32 status)
0377 {
0378     u8 hp_slot;
0379 
0380     if (func == NULL)
0381         return 1;
0382 
0383     hp_slot = func->device - ctrl->slot_device_offset;
0384 
0385     /* Wait for exclusive access to hardware */
0386     mutex_lock(&ctrl->crit_sect);
0387 
0388     if (status == 1)
0389         amber_LED_on(ctrl, hp_slot);
0390     else if (status == 0)
0391         amber_LED_off(ctrl, hp_slot);
0392     else {
0393         /* Done with exclusive hardware access */
0394         mutex_unlock(&ctrl->crit_sect);
0395         return 1;
0396     }
0397 
0398     set_SOGO(ctrl);
0399 
0400     /* Wait for SOBS to be unset */
0401     wait_for_ctrl_irq(ctrl);
0402 
0403     /* Done with exclusive hardware access */
0404     mutex_unlock(&ctrl->crit_sect);
0405 
0406     return 0;
0407 }
0408 
0409 
0410 /**
0411  * set_attention_status - Turns the Amber LED for a slot on or off
0412  * @hotplug_slot: slot to change LED on
0413  * @status: LED control flag
0414  */
0415 static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
0416 {
0417     struct pci_func *slot_func;
0418     struct slot *slot = to_slot(hotplug_slot);
0419     struct controller *ctrl = slot->ctrl;
0420     u8 bus;
0421     u8 devfn;
0422     u8 device;
0423     u8 function;
0424 
0425     dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
0426 
0427     if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
0428         return -ENODEV;
0429 
0430     device = devfn >> 3;
0431     function = devfn & 0x7;
0432     dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
0433 
0434     slot_func = cpqhp_slot_find(bus, device, function);
0435     if (!slot_func)
0436         return -ENODEV;
0437 
0438     return cpqhp_set_attention_status(ctrl, slot_func, status);
0439 }
0440 
0441 
0442 static int process_SI(struct hotplug_slot *hotplug_slot)
0443 {
0444     struct pci_func *slot_func;
0445     struct slot *slot = to_slot(hotplug_slot);
0446     struct controller *ctrl = slot->ctrl;
0447     u8 bus;
0448     u8 devfn;
0449     u8 device;
0450     u8 function;
0451 
0452     dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
0453 
0454     if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
0455         return -ENODEV;
0456 
0457     device = devfn >> 3;
0458     function = devfn & 0x7;
0459     dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
0460 
0461     slot_func = cpqhp_slot_find(bus, device, function);
0462     if (!slot_func)
0463         return -ENODEV;
0464 
0465     slot_func->bus = bus;
0466     slot_func->device = device;
0467     slot_func->function = function;
0468     slot_func->configured = 0;
0469     dbg("board_added(%p, %p)\n", slot_func, ctrl);
0470     return cpqhp_process_SI(ctrl, slot_func);
0471 }
0472 
0473 
0474 static int process_SS(struct hotplug_slot *hotplug_slot)
0475 {
0476     struct pci_func *slot_func;
0477     struct slot *slot = to_slot(hotplug_slot);
0478     struct controller *ctrl = slot->ctrl;
0479     u8 bus;
0480     u8 devfn;
0481     u8 device;
0482     u8 function;
0483 
0484     dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
0485 
0486     if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
0487         return -ENODEV;
0488 
0489     device = devfn >> 3;
0490     function = devfn & 0x7;
0491     dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
0492 
0493     slot_func = cpqhp_slot_find(bus, device, function);
0494     if (!slot_func)
0495         return -ENODEV;
0496 
0497     dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
0498     return cpqhp_process_SS(ctrl, slot_func);
0499 }
0500 
0501 
0502 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
0503 {
0504     struct slot *slot = to_slot(hotplug_slot);
0505     struct controller *ctrl = slot->ctrl;
0506 
0507     dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
0508 
0509     return cpqhp_hardware_test(ctrl, value);
0510 }
0511 
0512 
0513 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
0514 {
0515     struct slot *slot = to_slot(hotplug_slot);
0516     struct controller *ctrl = slot->ctrl;
0517 
0518     dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
0519 
0520     *value = get_slot_enabled(ctrl, slot);
0521     return 0;
0522 }
0523 
0524 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
0525 {
0526     struct slot *slot = to_slot(hotplug_slot);
0527     struct controller *ctrl = slot->ctrl;
0528 
0529     dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
0530 
0531     *value = cpq_get_attention_status(ctrl, slot);
0532     return 0;
0533 }
0534 
0535 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
0536 {
0537     struct slot *slot = to_slot(hotplug_slot);
0538     struct controller *ctrl = slot->ctrl;
0539 
0540     dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
0541 
0542     *value = cpq_get_latch_status(ctrl, slot);
0543 
0544     return 0;
0545 }
0546 
0547 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
0548 {
0549     struct slot *slot = to_slot(hotplug_slot);
0550     struct controller *ctrl = slot->ctrl;
0551 
0552     dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
0553 
0554     *value = get_presence_status(ctrl, slot);
0555 
0556     return 0;
0557 }
0558 
0559 static const struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
0560     .set_attention_status = set_attention_status,
0561     .enable_slot =      process_SI,
0562     .disable_slot =     process_SS,
0563     .hardware_test =    hardware_test,
0564     .get_power_status = get_power_status,
0565     .get_attention_status = get_attention_status,
0566     .get_latch_status = get_latch_status,
0567     .get_adapter_status =   get_adapter_status,
0568 };
0569 
0570 #define SLOT_NAME_SIZE 10
0571 
0572 static int ctrl_slot_setup(struct controller *ctrl,
0573             void __iomem *smbios_start,
0574             void __iomem *smbios_table)
0575 {
0576     struct slot *slot;
0577     struct pci_bus *bus = ctrl->pci_bus;
0578     u8 number_of_slots;
0579     u8 slot_device;
0580     u8 slot_number;
0581     u8 ctrl_slot;
0582     u32 tempdword;
0583     char name[SLOT_NAME_SIZE];
0584     void __iomem *slot_entry = NULL;
0585     int result;
0586 
0587     dbg("%s\n", __func__);
0588 
0589     tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
0590 
0591     number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
0592     slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
0593     slot_number = ctrl->first_slot;
0594 
0595     while (number_of_slots) {
0596         slot = kzalloc(sizeof(*slot), GFP_KERNEL);
0597         if (!slot) {
0598             result = -ENOMEM;
0599             goto error;
0600         }
0601 
0602         slot->ctrl = ctrl;
0603         slot->bus = ctrl->bus;
0604         slot->device = slot_device;
0605         slot->number = slot_number;
0606         dbg("slot->number = %u\n", slot->number);
0607 
0608         slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
0609                     slot_entry);
0610 
0611         while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
0612                 slot->number)) {
0613             slot_entry = get_SMBIOS_entry(smbios_start,
0614                         smbios_table, 9, slot_entry);
0615         }
0616 
0617         slot->p_sm_slot = slot_entry;
0618 
0619         timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0);
0620         slot->task_event.expires = jiffies + 5 * HZ;
0621 
0622         /*FIXME: these capabilities aren't used but if they are
0623          *   they need to be correctly implemented
0624          */
0625         slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
0626         slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
0627 
0628         if (is_slot64bit(slot))
0629             slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
0630         if (is_slot66mhz(slot))
0631             slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
0632         if (bus->cur_bus_speed == PCI_SPEED_66MHz)
0633             slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
0634 
0635         ctrl_slot =
0636             slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
0637 
0638         /* Check presence */
0639         slot->capabilities |=
0640             ((((~tempdword) >> 23) |
0641              ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
0642         /* Check the switch state */
0643         slot->capabilities |=
0644             ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
0645         /* Check the slot enable */
0646         slot->capabilities |=
0647             ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
0648 
0649         /* register this slot with the hotplug pci core */
0650         snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
0651         slot->hotplug_slot.ops = &cpqphp_hotplug_slot_ops;
0652 
0653         dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
0654                 slot->bus, slot->device,
0655                 slot->number, ctrl->slot_device_offset,
0656                 slot_number);
0657         result = pci_hp_register(&slot->hotplug_slot,
0658                      ctrl->pci_dev->bus,
0659                      slot->device,
0660                      name);
0661         if (result) {
0662             err("pci_hp_register failed with error %d\n", result);
0663             goto error_slot;
0664         }
0665 
0666         slot->next = ctrl->slot;
0667         ctrl->slot = slot;
0668 
0669         number_of_slots--;
0670         slot_device++;
0671         slot_number++;
0672     }
0673 
0674     return 0;
0675 error_slot:
0676     kfree(slot);
0677 error:
0678     return result;
0679 }
0680 
0681 static int one_time_init(void)
0682 {
0683     int loop;
0684     int retval = 0;
0685 
0686     if (initialized)
0687         return 0;
0688 
0689     power_mode = 0;
0690 
0691     retval = init_cpqhp_routing_table();
0692     if (retval)
0693         goto error;
0694 
0695     if (cpqhp_debug)
0696         pci_print_IRQ_route();
0697 
0698     dbg("Initialize + Start the notification mechanism\n");
0699 
0700     retval = cpqhp_event_start_thread();
0701     if (retval)
0702         goto error;
0703 
0704     dbg("Initialize slot lists\n");
0705     for (loop = 0; loop < 256; loop++)
0706         cpqhp_slot_list[loop] = NULL;
0707 
0708     /* FIXME: We also need to hook the NMI handler eventually.
0709      * this also needs to be worked with Christoph
0710      * register_NMI_handler();
0711      */
0712     /* Map rom address */
0713     cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
0714     if (!cpqhp_rom_start) {
0715         err("Could not ioremap memory region for ROM\n");
0716         retval = -EIO;
0717         goto error;
0718     }
0719 
0720     /* Now, map the int15 entry point if we are on compaq specific
0721      * hardware
0722      */
0723     compaq_nvram_init(cpqhp_rom_start);
0724 
0725     /* Map smbios table entry point structure */
0726     smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
0727                     cpqhp_rom_start + ROM_PHY_LEN);
0728     if (!smbios_table) {
0729         err("Could not find the SMBIOS pointer in memory\n");
0730         retval = -EIO;
0731         goto error_rom_start;
0732     }
0733 
0734     smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
0735                     readw(smbios_table + ST_LENGTH));
0736     if (!smbios_start) {
0737         err("Could not ioremap memory region taken from SMBIOS values\n");
0738         retval = -EIO;
0739         goto error_smbios_start;
0740     }
0741 
0742     initialized = 1;
0743 
0744     return retval;
0745 
0746 error_smbios_start:
0747     iounmap(smbios_start);
0748 error_rom_start:
0749     iounmap(cpqhp_rom_start);
0750 error:
0751     return retval;
0752 }
0753 
0754 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
0755 {
0756     u8 num_of_slots = 0;
0757     u8 hp_slot = 0;
0758     u8 device;
0759     u8 bus_cap;
0760     u16 temp_word;
0761     u16 vendor_id;
0762     u16 subsystem_vid;
0763     u16 subsystem_deviceid;
0764     u32 rc;
0765     struct controller *ctrl;
0766     struct pci_func *func;
0767     struct pci_bus *bus;
0768     int err;
0769 
0770     err = pci_enable_device(pdev);
0771     if (err) {
0772         printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
0773             pci_name(pdev), err);
0774         return err;
0775     }
0776 
0777     bus = pdev->subordinate;
0778     if (!bus) {
0779         pci_notice(pdev, "the device is not a bridge, skipping\n");
0780         rc = -ENODEV;
0781         goto err_disable_device;
0782     }
0783 
0784     /* Need to read VID early b/c it's used to differentiate CPQ and INTC
0785      * discovery
0786      */
0787     vendor_id = pdev->vendor;
0788     if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
0789         (vendor_id != PCI_VENDOR_ID_INTEL)) {
0790         err(msg_HPC_non_compaq_or_intel);
0791         rc = -ENODEV;
0792         goto err_disable_device;
0793     }
0794     dbg("Vendor ID: %x\n", vendor_id);
0795 
0796     dbg("revision: %d\n", pdev->revision);
0797     if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
0798         err(msg_HPC_rev_error);
0799         rc = -ENODEV;
0800         goto err_disable_device;
0801     }
0802 
0803     /* Check for the proper subsystem IDs
0804      * Intel uses a different SSID programming model than Compaq.
0805      * For Intel, each SSID bit identifies a PHP capability.
0806      * Also Intel HPCs may have RID=0.
0807      */
0808     if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
0809         err(msg_HPC_not_supported);
0810         rc = -ENODEV;
0811         goto err_disable_device;
0812     }
0813 
0814     /* TODO: This code can be made to support non-Compaq or Intel
0815      * subsystem IDs
0816      */
0817     subsystem_vid = pdev->subsystem_vendor;
0818     dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
0819     if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
0820         err(msg_HPC_non_compaq_or_intel);
0821         rc = -ENODEV;
0822         goto err_disable_device;
0823     }
0824 
0825     ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
0826     if (!ctrl) {
0827         rc = -ENOMEM;
0828         goto err_disable_device;
0829     }
0830 
0831     subsystem_deviceid = pdev->subsystem_device;
0832 
0833     info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
0834 
0835     /* Set Vendor ID, so it can be accessed later from other
0836      * functions
0837      */
0838     ctrl->vendor_id = vendor_id;
0839 
0840     switch (subsystem_vid) {
0841     case PCI_VENDOR_ID_COMPAQ:
0842         if (pdev->revision >= 0x13) { /* CIOBX */
0843             ctrl->push_flag = 1;
0844             ctrl->slot_switch_type = 1;
0845             ctrl->push_button = 1;
0846             ctrl->pci_config_space = 1;
0847             ctrl->defeature_PHP = 1;
0848             ctrl->pcix_support = 1;
0849             ctrl->pcix_speed_capability = 1;
0850             pci_read_config_byte(pdev, 0x41, &bus_cap);
0851             if (bus_cap & 0x80) {
0852                 dbg("bus max supports 133MHz PCI-X\n");
0853                 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
0854                 break;
0855             }
0856             if (bus_cap & 0x40) {
0857                 dbg("bus max supports 100MHz PCI-X\n");
0858                 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
0859                 break;
0860             }
0861             if (bus_cap & 0x20) {
0862                 dbg("bus max supports 66MHz PCI-X\n");
0863                 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
0864                 break;
0865             }
0866             if (bus_cap & 0x10) {
0867                 dbg("bus max supports 66MHz PCI\n");
0868                 bus->max_bus_speed = PCI_SPEED_66MHz;
0869                 break;
0870             }
0871 
0872             break;
0873         }
0874 
0875         switch (subsystem_deviceid) {
0876         case PCI_SUB_HPC_ID:
0877             /* Original 6500/7000 implementation */
0878             ctrl->slot_switch_type = 1;
0879             bus->max_bus_speed = PCI_SPEED_33MHz;
0880             ctrl->push_button = 0;
0881             ctrl->pci_config_space = 1;
0882             ctrl->defeature_PHP = 1;
0883             ctrl->pcix_support = 0;
0884             ctrl->pcix_speed_capability = 0;
0885             break;
0886         case PCI_SUB_HPC_ID2:
0887             /* First Pushbutton implementation */
0888             ctrl->push_flag = 1;
0889             ctrl->slot_switch_type = 1;
0890             bus->max_bus_speed = PCI_SPEED_33MHz;
0891             ctrl->push_button = 1;
0892             ctrl->pci_config_space = 1;
0893             ctrl->defeature_PHP = 1;
0894             ctrl->pcix_support = 0;
0895             ctrl->pcix_speed_capability = 0;
0896             break;
0897         case PCI_SUB_HPC_ID_INTC:
0898             /* Third party (6500/7000) */
0899             ctrl->slot_switch_type = 1;
0900             bus->max_bus_speed = PCI_SPEED_33MHz;
0901             ctrl->push_button = 0;
0902             ctrl->pci_config_space = 1;
0903             ctrl->defeature_PHP = 1;
0904             ctrl->pcix_support = 0;
0905             ctrl->pcix_speed_capability = 0;
0906             break;
0907         case PCI_SUB_HPC_ID3:
0908             /* First 66 Mhz implementation */
0909             ctrl->push_flag = 1;
0910             ctrl->slot_switch_type = 1;
0911             bus->max_bus_speed = PCI_SPEED_66MHz;
0912             ctrl->push_button = 1;
0913             ctrl->pci_config_space = 1;
0914             ctrl->defeature_PHP = 1;
0915             ctrl->pcix_support = 0;
0916             ctrl->pcix_speed_capability = 0;
0917             break;
0918         case PCI_SUB_HPC_ID4:
0919             /* First PCI-X implementation, 100MHz */
0920             ctrl->push_flag = 1;
0921             ctrl->slot_switch_type = 1;
0922             bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
0923             ctrl->push_button = 1;
0924             ctrl->pci_config_space = 1;
0925             ctrl->defeature_PHP = 1;
0926             ctrl->pcix_support = 1;
0927             ctrl->pcix_speed_capability = 0;
0928             break;
0929         default:
0930             err(msg_HPC_not_supported);
0931             rc = -ENODEV;
0932             goto err_free_ctrl;
0933         }
0934         break;
0935 
0936     case PCI_VENDOR_ID_INTEL:
0937         /* Check for speed capability (0=33, 1=66) */
0938         if (subsystem_deviceid & 0x0001)
0939             bus->max_bus_speed = PCI_SPEED_66MHz;
0940         else
0941             bus->max_bus_speed = PCI_SPEED_33MHz;
0942 
0943         /* Check for push button */
0944         if (subsystem_deviceid & 0x0002)
0945             ctrl->push_button = 0;
0946         else
0947             ctrl->push_button = 1;
0948 
0949         /* Check for slot switch type (0=mechanical, 1=not mechanical) */
0950         if (subsystem_deviceid & 0x0004)
0951             ctrl->slot_switch_type = 0;
0952         else
0953             ctrl->slot_switch_type = 1;
0954 
0955         /* PHP Status (0=De-feature PHP, 1=Normal operation) */
0956         if (subsystem_deviceid & 0x0008)
0957             ctrl->defeature_PHP = 1;    /* PHP supported */
0958         else
0959             ctrl->defeature_PHP = 0;    /* PHP not supported */
0960 
0961         /* Alternate Base Address Register Interface
0962          * (0=not supported, 1=supported)
0963          */
0964         if (subsystem_deviceid & 0x0010)
0965             ctrl->alternate_base_address = 1;
0966         else
0967             ctrl->alternate_base_address = 0;
0968 
0969         /* PCI Config Space Index (0=not supported, 1=supported) */
0970         if (subsystem_deviceid & 0x0020)
0971             ctrl->pci_config_space = 1;
0972         else
0973             ctrl->pci_config_space = 0;
0974 
0975         /* PCI-X support */
0976         if (subsystem_deviceid & 0x0080) {
0977             ctrl->pcix_support = 1;
0978             if (subsystem_deviceid & 0x0040)
0979                 /* 133MHz PCI-X if bit 7 is 1 */
0980                 ctrl->pcix_speed_capability = 1;
0981             else
0982                 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
0983                 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
0984                 ctrl->pcix_speed_capability = 0;
0985         } else {
0986             /* Conventional PCI */
0987             ctrl->pcix_support = 0;
0988             ctrl->pcix_speed_capability = 0;
0989         }
0990         break;
0991 
0992     default:
0993         err(msg_HPC_not_supported);
0994         rc = -ENODEV;
0995         goto err_free_ctrl;
0996     }
0997 
0998     /* Tell the user that we found one. */
0999     info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1000                     pdev->bus->number);
1001 
1002     dbg("Hotplug controller capabilities:\n");
1003     dbg("    speed_capability       %d\n", bus->max_bus_speed);
1004     dbg("    slot_switch_type       %s\n", ctrl->slot_switch_type ?
1005                     "switch present" : "no switch");
1006     dbg("    defeature_PHP          %s\n", ctrl->defeature_PHP ?
1007                     "PHP supported" : "PHP not supported");
1008     dbg("    alternate_base_address %s\n", ctrl->alternate_base_address ?
1009                     "supported" : "not supported");
1010     dbg("    pci_config_space       %s\n", ctrl->pci_config_space ?
1011                     "supported" : "not supported");
1012     dbg("    pcix_speed_capability  %s\n", ctrl->pcix_speed_capability ?
1013                     "supported" : "not supported");
1014     dbg("    pcix_support           %s\n", ctrl->pcix_support ?
1015                     "supported" : "not supported");
1016 
1017     ctrl->pci_dev = pdev;
1018     pci_set_drvdata(pdev, ctrl);
1019 
1020     /* make our own copy of the pci bus structure,
1021      * as we like tweaking it a lot */
1022     ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
1023     if (!ctrl->pci_bus) {
1024         err("out of memory\n");
1025         rc = -ENOMEM;
1026         goto err_free_ctrl;
1027     }
1028 
1029     ctrl->bus = pdev->bus->number;
1030     ctrl->rev = pdev->revision;
1031     dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1032         PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1033 
1034     mutex_init(&ctrl->crit_sect);
1035     init_waitqueue_head(&ctrl->queue);
1036 
1037     /* initialize our threads if they haven't already been started up */
1038     rc = one_time_init();
1039     if (rc)
1040         goto err_free_bus;
1041 
1042     dbg("pdev = %p\n", pdev);
1043     dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1044     dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1045 
1046     if (!request_mem_region(pci_resource_start(pdev, 0),
1047                 pci_resource_len(pdev, 0), MY_NAME)) {
1048         err("cannot reserve MMIO region\n");
1049         rc = -ENOMEM;
1050         goto err_free_bus;
1051     }
1052 
1053     ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1054                     pci_resource_len(pdev, 0));
1055     if (!ctrl->hpc_reg) {
1056         err("cannot remap MMIO region %llx @ %llx\n",
1057             (unsigned long long)pci_resource_len(pdev, 0),
1058             (unsigned long long)pci_resource_start(pdev, 0));
1059         rc = -ENODEV;
1060         goto err_free_mem_region;
1061     }
1062 
1063     /* Check for 66Mhz operation */
1064     bus->cur_bus_speed = get_controller_speed(ctrl);
1065 
1066 
1067     /********************************************************
1068      *
1069      *              Save configuration headers for this and
1070      *              subordinate PCI buses
1071      *
1072      ********************************************************/
1073 
1074     /* find the physical slot number of the first hot plug slot */
1075 
1076     /* Get slot won't work for devices behind bridges, but
1077      * in this case it will always be called for the "base"
1078      * bus/dev/func of a slot.
1079      * CS: this is leveraging the PCIIRQ routing code from the kernel
1080      * (pci-pc.c: get_irq_routing_table) */
1081     rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1082                 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1083                 &(ctrl->first_slot));
1084     dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1085                 ctrl->first_slot, rc);
1086     if (rc) {
1087         err(msg_initialization_err, rc);
1088         goto err_iounmap;
1089     }
1090 
1091     /* Store PCI Config Space for all devices on this bus */
1092     rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1093     if (rc) {
1094         err("%s: unable to save PCI configuration data, error %d\n",
1095                 __func__, rc);
1096         goto err_iounmap;
1097     }
1098 
1099     /*
1100      * Get IO, memory, and IRQ resources for new devices
1101      */
1102     /* The next line is required for cpqhp_find_available_resources */
1103     ctrl->interrupt = pdev->irq;
1104     if (ctrl->interrupt < 0x10) {
1105         cpqhp_legacy_mode = 1;
1106         dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1107     }
1108 
1109     ctrl->cfgspc_irq = 0;
1110     pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1111 
1112     rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1113     ctrl->add_support = !rc;
1114     if (rc) {
1115         dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1116         err("unable to locate PCI configuration resources for hot plug add.\n");
1117         goto err_iounmap;
1118     }
1119 
1120     /*
1121      * Finish setting up the hot plug ctrl device
1122      */
1123     ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1124     dbg("NumSlots %d\n", ctrl->slot_device_offset);
1125 
1126     ctrl->next_event = 0;
1127 
1128     /* Setup the slot information structures */
1129     rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1130     if (rc) {
1131         err(msg_initialization_err, 6);
1132         err("%s: unable to save PCI configuration data, error %d\n",
1133             __func__, rc);
1134         goto err_iounmap;
1135     }
1136 
1137     /* Mask all general input interrupts */
1138     writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1139 
1140     /* set up the interrupt */
1141     dbg("HPC interrupt = %d\n", ctrl->interrupt);
1142     if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1143             IRQF_SHARED, MY_NAME, ctrl)) {
1144         err("Can't get irq %d for the hotplug pci controller\n",
1145             ctrl->interrupt);
1146         rc = -ENODEV;
1147         goto err_iounmap;
1148     }
1149 
1150     /* Enable Shift Out interrupt and clear it, also enable SERR on power
1151      * fault
1152      */
1153     temp_word = readw(ctrl->hpc_reg + MISC);
1154     temp_word |= 0x4006;
1155     writew(temp_word, ctrl->hpc_reg + MISC);
1156 
1157     /* Changed 05/05/97 to clear all interrupts at start */
1158     writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1159 
1160     ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1161 
1162     writel(0x0L, ctrl->hpc_reg + INT_MASK);
1163 
1164     if (!cpqhp_ctrl_list) {
1165         cpqhp_ctrl_list = ctrl;
1166         ctrl->next = NULL;
1167     } else {
1168         ctrl->next = cpqhp_ctrl_list;
1169         cpqhp_ctrl_list = ctrl;
1170     }
1171 
1172     /* turn off empty slots here unless command line option "ON" set
1173      * Wait for exclusive access to hardware
1174      */
1175     mutex_lock(&ctrl->crit_sect);
1176 
1177     num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1178 
1179     /* find first device number for the ctrl */
1180     device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1181 
1182     while (num_of_slots) {
1183         dbg("num_of_slots: %d\n", num_of_slots);
1184         func = cpqhp_slot_find(ctrl->bus, device, 0);
1185         if (!func)
1186             break;
1187 
1188         hp_slot = func->device - ctrl->slot_device_offset;
1189         dbg("hp_slot: %d\n", hp_slot);
1190 
1191         /* We have to save the presence info for these slots */
1192         temp_word = ctrl->ctrl_int_comp >> 16;
1193         func->presence_save = (temp_word >> hp_slot) & 0x01;
1194         func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1195 
1196         if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1197             func->switch_save = 0;
1198         else
1199             func->switch_save = 0x10;
1200 
1201         if (!power_mode)
1202             if (!func->is_a_board) {
1203                 green_LED_off(ctrl, hp_slot);
1204                 slot_disable(ctrl, hp_slot);
1205             }
1206 
1207         device++;
1208         num_of_slots--;
1209     }
1210 
1211     if (!power_mode) {
1212         set_SOGO(ctrl);
1213         /* Wait for SOBS to be unset */
1214         wait_for_ctrl_irq(ctrl);
1215     }
1216 
1217     rc = init_SERR(ctrl);
1218     if (rc) {
1219         err("init_SERR failed\n");
1220         mutex_unlock(&ctrl->crit_sect);
1221         goto err_free_irq;
1222     }
1223 
1224     /* Done with exclusive hardware access */
1225     mutex_unlock(&ctrl->crit_sect);
1226 
1227     cpqhp_create_debugfs_files(ctrl);
1228 
1229     return 0;
1230 
1231 err_free_irq:
1232     free_irq(ctrl->interrupt, ctrl);
1233 err_iounmap:
1234     iounmap(ctrl->hpc_reg);
1235 err_free_mem_region:
1236     release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1237 err_free_bus:
1238     kfree(ctrl->pci_bus);
1239 err_free_ctrl:
1240     kfree(ctrl);
1241 err_disable_device:
1242     pci_disable_device(pdev);
1243     return rc;
1244 }
1245 
1246 static void __exit unload_cpqphpd(void)
1247 {
1248     struct pci_func *next;
1249     struct pci_func *TempSlot;
1250     int loop;
1251     u32 rc;
1252     struct controller *ctrl;
1253     struct controller *tctrl;
1254     struct pci_resource *res;
1255     struct pci_resource *tres;
1256 
1257     compaq_nvram_store(cpqhp_rom_start);
1258 
1259     ctrl = cpqhp_ctrl_list;
1260 
1261     while (ctrl) {
1262         if (ctrl->hpc_reg) {
1263             u16 misc;
1264             rc = read_slot_enable(ctrl);
1265 
1266             writeb(0, ctrl->hpc_reg + SLOT_SERR);
1267             writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1268 
1269             misc = readw(ctrl->hpc_reg + MISC);
1270             misc &= 0xFFFD;
1271             writew(misc, ctrl->hpc_reg + MISC);
1272         }
1273 
1274         ctrl_slot_cleanup(ctrl);
1275 
1276         res = ctrl->io_head;
1277         while (res) {
1278             tres = res;
1279             res = res->next;
1280             kfree(tres);
1281         }
1282 
1283         res = ctrl->mem_head;
1284         while (res) {
1285             tres = res;
1286             res = res->next;
1287             kfree(tres);
1288         }
1289 
1290         res = ctrl->p_mem_head;
1291         while (res) {
1292             tres = res;
1293             res = res->next;
1294             kfree(tres);
1295         }
1296 
1297         res = ctrl->bus_head;
1298         while (res) {
1299             tres = res;
1300             res = res->next;
1301             kfree(tres);
1302         }
1303 
1304         kfree(ctrl->pci_bus);
1305 
1306         tctrl = ctrl;
1307         ctrl = ctrl->next;
1308         kfree(tctrl);
1309     }
1310 
1311     for (loop = 0; loop < 256; loop++) {
1312         next = cpqhp_slot_list[loop];
1313         while (next != NULL) {
1314             res = next->io_head;
1315             while (res) {
1316                 tres = res;
1317                 res = res->next;
1318                 kfree(tres);
1319             }
1320 
1321             res = next->mem_head;
1322             while (res) {
1323                 tres = res;
1324                 res = res->next;
1325                 kfree(tres);
1326             }
1327 
1328             res = next->p_mem_head;
1329             while (res) {
1330                 tres = res;
1331                 res = res->next;
1332                 kfree(tres);
1333             }
1334 
1335             res = next->bus_head;
1336             while (res) {
1337                 tres = res;
1338                 res = res->next;
1339                 kfree(tres);
1340             }
1341 
1342             TempSlot = next;
1343             next = next->next;
1344             kfree(TempSlot);
1345         }
1346     }
1347 
1348     /* Stop the notification mechanism */
1349     if (initialized)
1350         cpqhp_event_stop_thread();
1351 
1352     /* unmap the rom address */
1353     if (cpqhp_rom_start)
1354         iounmap(cpqhp_rom_start);
1355     if (smbios_start)
1356         iounmap(smbios_start);
1357 }
1358 
1359 static const struct pci_device_id hpcd_pci_tbl[] = {
1360     {
1361     /* handle any PCI Hotplug controller */
1362     .class =        ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1363     .class_mask =   ~0,
1364 
1365     /* no matter who makes it */
1366     .vendor =       PCI_ANY_ID,
1367     .device =       PCI_ANY_ID,
1368     .subvendor =    PCI_ANY_ID,
1369     .subdevice =    PCI_ANY_ID,
1370 
1371     }, { /* end: all zeroes */ }
1372 };
1373 
1374 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1375 
1376 static struct pci_driver cpqhpc_driver = {
1377     .name =     "compaq_pci_hotplug",
1378     .id_table = hpcd_pci_tbl,
1379     .probe =    cpqhpc_probe,
1380     /* remove:  cpqhpc_remove_one, */
1381 };
1382 
1383 static int __init cpqhpc_init(void)
1384 {
1385     int result;
1386 
1387     cpqhp_debug = debug;
1388 
1389     info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
1390     cpqhp_initialize_debugfs();
1391     result = pci_register_driver(&cpqhpc_driver);
1392     dbg("pci_register_driver = %d\n", result);
1393     return result;
1394 }
1395 
1396 static void __exit cpqhpc_cleanup(void)
1397 {
1398     dbg("unload_cpqphpd()\n");
1399     unload_cpqphpd();
1400 
1401     dbg("pci_unregister_driver\n");
1402     pci_unregister_driver(&cpqhpc_driver);
1403     cpqhp_shutdown_debugfs();
1404 }
1405 
1406 module_init(cpqhpc_init);
1407 module_exit(cpqhpc_cleanup);
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