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0018 #include <linux/module.h>
0019 #include <linux/parport.h>
0020 #include <linux/delay.h>
0021 #include <linux/sched/signal.h>
0022 #include <linux/uaccess.h>
0023
0024 #undef DEBUG
0025
0026 #ifdef CONFIG_LP_CONSOLE
0027 #undef DEBUG
0028 #endif
0029
0030
0031
0032
0033
0034
0035 size_t parport_ieee1284_write_compat (struct parport *port,
0036 const void *buffer, size_t len,
0037 int flags)
0038 {
0039 int no_irq = 1;
0040 ssize_t count = 0;
0041 const unsigned char *addr = buffer;
0042 unsigned char byte;
0043 struct pardevice *dev = port->physport->cad;
0044 unsigned char ctl = (PARPORT_CONTROL_SELECT
0045 | PARPORT_CONTROL_INIT);
0046
0047 if (port->irq != PARPORT_IRQ_NONE) {
0048 parport_enable_irq (port);
0049 no_irq = 0;
0050 }
0051
0052 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
0053 parport_write_control (port, ctl);
0054 parport_data_forward (port);
0055 while (count < len) {
0056 unsigned long expire = jiffies + dev->timeout;
0057 long wait = msecs_to_jiffies(10);
0058 unsigned char mask = (PARPORT_STATUS_ERROR
0059 | PARPORT_STATUS_BUSY);
0060 unsigned char val = (PARPORT_STATUS_ERROR
0061 | PARPORT_STATUS_BUSY);
0062
0063
0064 do {
0065
0066 if (!parport_wait_peripheral (port, mask, val))
0067
0068 goto ready;
0069
0070
0071 if ((parport_read_status (port) &
0072 (PARPORT_STATUS_PAPEROUT |
0073 PARPORT_STATUS_SELECT |
0074 PARPORT_STATUS_ERROR))
0075 != (PARPORT_STATUS_SELECT |
0076 PARPORT_STATUS_ERROR))
0077
0078
0079
0080
0081
0082 goto stop;
0083
0084
0085 if (!time_before (jiffies, expire))
0086 break;
0087
0088
0089
0090
0091
0092 if (count && no_irq) {
0093 parport_release (dev);
0094 schedule_timeout_interruptible(wait);
0095 parport_claim_or_block (dev);
0096 }
0097 else
0098
0099 parport_wait_event (port, wait);
0100
0101
0102 if (signal_pending (current))
0103 break;
0104
0105
0106 wait *= 2;
0107 } while (time_before (jiffies, expire));
0108
0109 if (signal_pending (current))
0110 break;
0111
0112 pr_debug("%s: Timed out\n", port->name);
0113 break;
0114
0115 ready:
0116
0117 byte = *addr++;
0118 parport_write_data (port, byte);
0119 udelay (1);
0120
0121
0122 parport_write_control (port, ctl | PARPORT_CONTROL_STROBE);
0123 udelay (1);
0124
0125 parport_write_control (port, ctl);
0126 udelay (1);
0127
0128
0129 count++;
0130
0131
0132 if (time_before (jiffies, expire))
0133 if (!parport_yield_blocking (dev)
0134 && need_resched())
0135 schedule ();
0136 }
0137 stop:
0138 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
0139
0140 return count;
0141 }
0142
0143
0144 size_t parport_ieee1284_read_nibble (struct parport *port,
0145 void *buffer, size_t len,
0146 int flags)
0147 {
0148 #ifndef CONFIG_PARPORT_1284
0149 return 0;
0150 #else
0151 unsigned char *buf = buffer;
0152 int i;
0153 unsigned char byte = 0;
0154
0155 len *= 2;
0156 for (i=0; i < len; i++) {
0157 unsigned char nibble;
0158
0159
0160 if (((i & 1) == 0) &&
0161 (parport_read_status(port) & PARPORT_STATUS_ERROR)) {
0162 goto end_of_data;
0163 }
0164
0165
0166 parport_frob_control (port,
0167 PARPORT_CONTROL_AUTOFD,
0168 PARPORT_CONTROL_AUTOFD);
0169
0170
0171 port->ieee1284.phase = IEEE1284_PH_REV_DATA;
0172 if (parport_wait_peripheral (port,
0173 PARPORT_STATUS_ACK, 0)) {
0174
0175 pr_debug("%s: Nibble timeout at event 9 (%d bytes)\n",
0176 port->name, i / 2);
0177 parport_frob_control (port, PARPORT_CONTROL_AUTOFD, 0);
0178 break;
0179 }
0180
0181
0182
0183 nibble = parport_read_status (port) >> 3;
0184 nibble &= ~8;
0185 if ((nibble & 0x10) == 0)
0186 nibble |= 8;
0187 nibble &= 0xf;
0188
0189
0190 parport_frob_control (port, PARPORT_CONTROL_AUTOFD, 0);
0191
0192
0193 if (parport_wait_peripheral (port,
0194 PARPORT_STATUS_ACK,
0195 PARPORT_STATUS_ACK)) {
0196
0197 pr_debug("%s: Nibble timeout at event 11\n",
0198 port->name);
0199 break;
0200 }
0201
0202 if (i & 1) {
0203
0204 byte |= nibble << 4;
0205 *buf++ = byte;
0206 } else
0207 byte = nibble;
0208 }
0209
0210 if (i == len) {
0211
0212 if (parport_read_status (port) & PARPORT_STATUS_ERROR) {
0213 end_of_data:
0214 pr_debug("%s: No more nibble data (%d bytes)\n",
0215 port->name, i / 2);
0216
0217
0218 parport_frob_control (port,
0219 PARPORT_CONTROL_AUTOFD,
0220 PARPORT_CONTROL_AUTOFD);
0221 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE;
0222 }
0223 else
0224 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL;
0225 }
0226
0227 return i/2;
0228 #endif
0229 }
0230
0231
0232 size_t parport_ieee1284_read_byte (struct parport *port,
0233 void *buffer, size_t len,
0234 int flags)
0235 {
0236 #ifndef CONFIG_PARPORT_1284
0237 return 0;
0238 #else
0239 unsigned char *buf = buffer;
0240 ssize_t count = 0;
0241
0242 for (count = 0; count < len; count++) {
0243 unsigned char byte;
0244
0245
0246 if (parport_read_status (port) & PARPORT_STATUS_ERROR) {
0247 goto end_of_data;
0248 }
0249
0250
0251 parport_data_reverse (port);
0252
0253
0254 parport_frob_control (port,
0255 PARPORT_CONTROL_AUTOFD,
0256 PARPORT_CONTROL_AUTOFD);
0257
0258
0259 port->physport->ieee1284.phase = IEEE1284_PH_REV_DATA;
0260 if (parport_wait_peripheral (port,
0261 PARPORT_STATUS_ACK,
0262 0)) {
0263
0264 parport_frob_control (port, PARPORT_CONTROL_AUTOFD,
0265 0);
0266 pr_debug("%s: Byte timeout at event 9\n", port->name);
0267 break;
0268 }
0269
0270 byte = parport_read_data (port);
0271 *buf++ = byte;
0272
0273
0274 parport_frob_control (port, PARPORT_CONTROL_AUTOFD, 0);
0275
0276
0277 if (parport_wait_peripheral (port,
0278 PARPORT_STATUS_ACK,
0279 PARPORT_STATUS_ACK)) {
0280
0281 pr_debug("%s: Byte timeout at event 11\n", port->name);
0282 break;
0283 }
0284
0285
0286 parport_frob_control (port,
0287 PARPORT_CONTROL_STROBE,
0288 PARPORT_CONTROL_STROBE);
0289 udelay (5);
0290
0291
0292 parport_frob_control (port, PARPORT_CONTROL_STROBE, 0);
0293 }
0294
0295 if (count == len) {
0296
0297 if (parport_read_status (port) & PARPORT_STATUS_ERROR) {
0298 end_of_data:
0299 pr_debug("%s: No more byte data (%zd bytes)\n",
0300 port->name, count);
0301
0302
0303 parport_frob_control (port,
0304 PARPORT_CONTROL_AUTOFD,
0305 PARPORT_CONTROL_AUTOFD);
0306 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE;
0307 }
0308 else
0309 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL;
0310 }
0311
0312 return count;
0313 #endif
0314 }
0315
0316
0317
0318
0319
0320 #ifdef CONFIG_PARPORT_1284
0321
0322 static inline
0323 int ecp_forward_to_reverse (struct parport *port)
0324 {
0325 int retval;
0326
0327
0328 parport_frob_control (port,
0329 PARPORT_CONTROL_AUTOFD,
0330 PARPORT_CONTROL_AUTOFD);
0331 parport_data_reverse (port);
0332 udelay (5);
0333
0334
0335 parport_frob_control (port,
0336 PARPORT_CONTROL_INIT,
0337 0);
0338
0339
0340 retval = parport_wait_peripheral (port,
0341 PARPORT_STATUS_PAPEROUT, 0);
0342
0343 if (!retval) {
0344 pr_debug("%s: ECP direction: reverse\n", port->name);
0345 port->ieee1284.phase = IEEE1284_PH_REV_IDLE;
0346 } else {
0347 pr_debug("%s: ECP direction: failed to reverse\n", port->name);
0348 port->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN;
0349 }
0350
0351 return retval;
0352 }
0353
0354 static inline
0355 int ecp_reverse_to_forward (struct parport *port)
0356 {
0357 int retval;
0358
0359
0360 parport_frob_control (port,
0361 PARPORT_CONTROL_INIT
0362 | PARPORT_CONTROL_AUTOFD,
0363 PARPORT_CONTROL_INIT
0364 | PARPORT_CONTROL_AUTOFD);
0365
0366
0367 retval = parport_wait_peripheral (port,
0368 PARPORT_STATUS_PAPEROUT,
0369 PARPORT_STATUS_PAPEROUT);
0370
0371 if (!retval) {
0372 parport_data_forward (port);
0373 pr_debug("%s: ECP direction: forward\n", port->name);
0374 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
0375 } else {
0376 pr_debug("%s: ECP direction: failed to switch forward\n",
0377 port->name);
0378 port->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN;
0379 }
0380
0381
0382 return retval;
0383 }
0384
0385 #endif
0386
0387
0388 size_t parport_ieee1284_ecp_write_data (struct parport *port,
0389 const void *buffer, size_t len,
0390 int flags)
0391 {
0392 #ifndef CONFIG_PARPORT_1284
0393 return 0;
0394 #else
0395 const unsigned char *buf = buffer;
0396 size_t written;
0397 int retry;
0398
0399 port = port->physport;
0400
0401 if (port->ieee1284.phase != IEEE1284_PH_FWD_IDLE)
0402 if (ecp_reverse_to_forward (port))
0403 return 0;
0404
0405 port->ieee1284.phase = IEEE1284_PH_FWD_DATA;
0406
0407
0408 parport_frob_control (port,
0409 PARPORT_CONTROL_AUTOFD
0410 | PARPORT_CONTROL_STROBE
0411 | PARPORT_CONTROL_INIT,
0412 PARPORT_CONTROL_INIT);
0413 for (written = 0; written < len; written++, buf++) {
0414 unsigned long expire = jiffies + port->cad->timeout;
0415 unsigned char byte;
0416
0417 byte = *buf;
0418 try_again:
0419 parport_write_data (port, byte);
0420 parport_frob_control (port, PARPORT_CONTROL_STROBE,
0421 PARPORT_CONTROL_STROBE);
0422 udelay (5);
0423 for (retry = 0; retry < 100; retry++) {
0424 if (!parport_wait_peripheral (port,
0425 PARPORT_STATUS_BUSY, 0))
0426 goto success;
0427
0428 if (signal_pending (current)) {
0429 parport_frob_control (port,
0430 PARPORT_CONTROL_STROBE,
0431 0);
0432 break;
0433 }
0434 }
0435
0436
0437 pr_debug("%s: ECP transfer stalled!\n", port->name);
0438
0439 parport_frob_control (port, PARPORT_CONTROL_INIT,
0440 PARPORT_CONTROL_INIT);
0441 udelay (50);
0442 if (parport_read_status (port) & PARPORT_STATUS_PAPEROUT) {
0443
0444 parport_frob_control (port, PARPORT_CONTROL_INIT, 0);
0445 break;
0446 }
0447
0448 parport_frob_control (port, PARPORT_CONTROL_INIT, 0);
0449 udelay (50);
0450 if (!(parport_read_status (port) & PARPORT_STATUS_PAPEROUT))
0451 break;
0452
0453 pr_debug("%s: Host transfer recovered\n", port->name);
0454
0455 if (time_after_eq (jiffies, expire)) break;
0456 goto try_again;
0457 success:
0458 parport_frob_control (port, PARPORT_CONTROL_STROBE, 0);
0459 udelay (5);
0460 if (parport_wait_peripheral (port,
0461 PARPORT_STATUS_BUSY,
0462 PARPORT_STATUS_BUSY))
0463
0464 break;
0465 }
0466
0467 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
0468
0469 return written;
0470 #endif
0471 }
0472
0473
0474 size_t parport_ieee1284_ecp_read_data (struct parport *port,
0475 void *buffer, size_t len, int flags)
0476 {
0477 #ifndef CONFIG_PARPORT_1284
0478 return 0;
0479 #else
0480 struct pardevice *dev = port->cad;
0481 unsigned char *buf = buffer;
0482 int rle_count = 0;
0483 unsigned char ctl;
0484 int rle = 0;
0485 ssize_t count = 0;
0486
0487 port = port->physport;
0488
0489 if (port->ieee1284.phase != IEEE1284_PH_REV_IDLE)
0490 if (ecp_forward_to_reverse (port))
0491 return 0;
0492
0493 port->ieee1284.phase = IEEE1284_PH_REV_DATA;
0494
0495
0496 ctl = parport_read_control (port);
0497 ctl &= ~(PARPORT_CONTROL_STROBE | PARPORT_CONTROL_INIT |
0498 PARPORT_CONTROL_AUTOFD);
0499 parport_write_control (port,
0500 ctl | PARPORT_CONTROL_AUTOFD);
0501 while (count < len) {
0502 unsigned long expire = jiffies + dev->timeout;
0503 unsigned char byte;
0504 int command;
0505
0506
0507
0508 while (parport_wait_peripheral (port, PARPORT_STATUS_ACK, 0)) {
0509
0510
0511
0512 if (count)
0513 goto out;
0514
0515
0516
0517 if (!time_before (jiffies, expire))
0518 goto out;
0519
0520
0521 if (dev->port->irq != PARPORT_IRQ_NONE) {
0522 parport_release (dev);
0523 schedule_timeout_interruptible(msecs_to_jiffies(40));
0524 parport_claim_or_block (dev);
0525 }
0526 else
0527
0528 parport_wait_event (port, msecs_to_jiffies(40));
0529
0530
0531 if (signal_pending (current))
0532 goto out;
0533 }
0534
0535
0536 if (rle)
0537
0538
0539 command = 0;
0540 else
0541 command = (parport_read_status (port) &
0542 PARPORT_STATUS_BUSY) ? 1 : 0;
0543
0544
0545 byte = parport_read_data (port);
0546
0547
0548
0549 if (command) {
0550 if (byte & 0x80) {
0551 pr_debug("%s: stopping short at channel command (%02x)\n",
0552 port->name, byte);
0553 goto out;
0554 }
0555 else if (port->ieee1284.mode != IEEE1284_MODE_ECPRLE)
0556 pr_debug("%s: device illegally using RLE; accepting anyway\n",
0557 port->name);
0558
0559 rle_count = byte + 1;
0560
0561
0562 if (rle_count > (len - count)) {
0563 pr_debug("%s: leaving %d RLE bytes for next time\n",
0564 port->name, rle_count);
0565 break;
0566 }
0567
0568 rle = 1;
0569 }
0570
0571
0572 parport_write_control (port, ctl);
0573
0574
0575 if (parport_wait_peripheral (port, PARPORT_STATUS_ACK,
0576 PARPORT_STATUS_ACK)) {
0577
0578
0579 pr_debug("ECP read timed out at 45\n");
0580
0581 if (command)
0582 pr_warn("%s: command ignored (%02x)\n",
0583 port->name, byte);
0584
0585 break;
0586 }
0587
0588
0589 parport_write_control (port,
0590 ctl | PARPORT_CONTROL_AUTOFD);
0591
0592
0593 if (command)
0594 continue;
0595
0596
0597 if (rle) {
0598 rle = 0;
0599 memset (buf, byte, rle_count);
0600 buf += rle_count;
0601 count += rle_count;
0602 pr_debug("%s: decompressed to %d bytes\n",
0603 port->name, rle_count);
0604 } else {
0605
0606 *buf = byte;
0607 buf++, count++;
0608 }
0609 }
0610
0611 out:
0612 port->ieee1284.phase = IEEE1284_PH_REV_IDLE;
0613 return count;
0614 #endif
0615 }
0616
0617
0618 size_t parport_ieee1284_ecp_write_addr (struct parport *port,
0619 const void *buffer, size_t len,
0620 int flags)
0621 {
0622 #ifndef CONFIG_PARPORT_1284
0623 return 0;
0624 #else
0625 const unsigned char *buf = buffer;
0626 size_t written;
0627 int retry;
0628
0629 port = port->physport;
0630
0631 if (port->ieee1284.phase != IEEE1284_PH_FWD_IDLE)
0632 if (ecp_reverse_to_forward (port))
0633 return 0;
0634
0635 port->ieee1284.phase = IEEE1284_PH_FWD_DATA;
0636
0637
0638 parport_frob_control (port,
0639 PARPORT_CONTROL_AUTOFD
0640 | PARPORT_CONTROL_STROBE
0641 | PARPORT_CONTROL_INIT,
0642 PARPORT_CONTROL_AUTOFD
0643 | PARPORT_CONTROL_INIT);
0644 for (written = 0; written < len; written++, buf++) {
0645 unsigned long expire = jiffies + port->cad->timeout;
0646 unsigned char byte;
0647
0648 byte = *buf;
0649 try_again:
0650 parport_write_data (port, byte);
0651 parport_frob_control (port, PARPORT_CONTROL_STROBE,
0652 PARPORT_CONTROL_STROBE);
0653 udelay (5);
0654 for (retry = 0; retry < 100; retry++) {
0655 if (!parport_wait_peripheral (port,
0656 PARPORT_STATUS_BUSY, 0))
0657 goto success;
0658
0659 if (signal_pending (current)) {
0660 parport_frob_control (port,
0661 PARPORT_CONTROL_STROBE,
0662 0);
0663 break;
0664 }
0665 }
0666
0667
0668 pr_debug("%s: ECP transfer stalled!\n", port->name);
0669
0670 parport_frob_control (port, PARPORT_CONTROL_INIT,
0671 PARPORT_CONTROL_INIT);
0672 udelay (50);
0673 if (parport_read_status (port) & PARPORT_STATUS_PAPEROUT) {
0674
0675 parport_frob_control (port, PARPORT_CONTROL_INIT, 0);
0676 break;
0677 }
0678
0679 parport_frob_control (port, PARPORT_CONTROL_INIT, 0);
0680 udelay (50);
0681 if (!(parport_read_status (port) & PARPORT_STATUS_PAPEROUT))
0682 break;
0683
0684 pr_debug("%s: Host transfer recovered\n", port->name);
0685
0686 if (time_after_eq (jiffies, expire)) break;
0687 goto try_again;
0688 success:
0689 parport_frob_control (port, PARPORT_CONTROL_STROBE, 0);
0690 udelay (5);
0691 if (parport_wait_peripheral (port,
0692 PARPORT_STATUS_BUSY,
0693 PARPORT_STATUS_BUSY))
0694
0695 break;
0696 }
0697
0698 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
0699
0700 return written;
0701 #endif
0702 }
0703
0704
0705
0706
0707
0708
0709 size_t parport_ieee1284_epp_write_data (struct parport *port,
0710 const void *buffer, size_t len,
0711 int flags)
0712 {
0713 unsigned char *bp = (unsigned char *) buffer;
0714 size_t ret = 0;
0715
0716
0717 parport_frob_control (port,
0718 PARPORT_CONTROL_STROBE |
0719 PARPORT_CONTROL_AUTOFD |
0720 PARPORT_CONTROL_SELECT |
0721 PARPORT_CONTROL_INIT,
0722 PARPORT_CONTROL_STROBE |
0723 PARPORT_CONTROL_INIT);
0724 port->ops->data_forward (port);
0725 for (; len > 0; len--, bp++) {
0726
0727 parport_write_data (port, *bp);
0728 parport_frob_control (port, PARPORT_CONTROL_AUTOFD,
0729 PARPORT_CONTROL_AUTOFD);
0730
0731
0732 if (parport_poll_peripheral (port, PARPORT_STATUS_BUSY, 0, 10))
0733 break;
0734
0735
0736 parport_frob_control (port, PARPORT_CONTROL_AUTOFD, 0);
0737
0738
0739 if (parport_poll_peripheral (port, PARPORT_STATUS_BUSY,
0740 PARPORT_STATUS_BUSY, 5))
0741 break;
0742
0743 ret++;
0744 }
0745
0746
0747 parport_frob_control (port, PARPORT_CONTROL_STROBE, 0);
0748
0749 return ret;
0750 }
0751
0752
0753 size_t parport_ieee1284_epp_read_data (struct parport *port,
0754 void *buffer, size_t len,
0755 int flags)
0756 {
0757 unsigned char *bp = (unsigned char *) buffer;
0758 unsigned ret = 0;
0759
0760
0761 parport_frob_control (port,
0762 PARPORT_CONTROL_STROBE |
0763 PARPORT_CONTROL_AUTOFD |
0764 PARPORT_CONTROL_SELECT |
0765 PARPORT_CONTROL_INIT,
0766 PARPORT_CONTROL_INIT);
0767 port->ops->data_reverse (port);
0768 for (; len > 0; len--, bp++) {
0769
0770 parport_frob_control (port,
0771 PARPORT_CONTROL_AUTOFD,
0772 PARPORT_CONTROL_AUTOFD);
0773
0774 if (parport_wait_peripheral (port, PARPORT_STATUS_BUSY, 0)) {
0775 break;
0776 }
0777
0778 *bp = parport_read_data (port);
0779
0780
0781 parport_frob_control (port, PARPORT_CONTROL_AUTOFD, 0);
0782
0783
0784 if (parport_poll_peripheral (port, PARPORT_STATUS_BUSY,
0785 PARPORT_STATUS_BUSY, 5)) {
0786 break;
0787 }
0788
0789 ret++;
0790 }
0791 port->ops->data_forward (port);
0792
0793 return ret;
0794 }
0795
0796
0797 size_t parport_ieee1284_epp_write_addr (struct parport *port,
0798 const void *buffer, size_t len,
0799 int flags)
0800 {
0801 unsigned char *bp = (unsigned char *) buffer;
0802 size_t ret = 0;
0803
0804
0805 parport_frob_control (port,
0806 PARPORT_CONTROL_STROBE |
0807 PARPORT_CONTROL_AUTOFD |
0808 PARPORT_CONTROL_SELECT |
0809 PARPORT_CONTROL_INIT,
0810 PARPORT_CONTROL_STROBE |
0811 PARPORT_CONTROL_INIT);
0812 port->ops->data_forward (port);
0813 for (; len > 0; len--, bp++) {
0814
0815 parport_write_data (port, *bp);
0816 parport_frob_control (port, PARPORT_CONTROL_SELECT,
0817 PARPORT_CONTROL_SELECT);
0818
0819
0820 if (parport_poll_peripheral (port, PARPORT_STATUS_BUSY, 0, 10))
0821 break;
0822
0823
0824 parport_frob_control (port, PARPORT_CONTROL_SELECT, 0);
0825
0826
0827 if (parport_poll_peripheral (port, PARPORT_STATUS_BUSY,
0828 PARPORT_STATUS_BUSY, 5))
0829 break;
0830
0831 ret++;
0832 }
0833
0834
0835 parport_frob_control (port, PARPORT_CONTROL_STROBE, 0);
0836
0837 return ret;
0838 }
0839
0840
0841 size_t parport_ieee1284_epp_read_addr (struct parport *port,
0842 void *buffer, size_t len,
0843 int flags)
0844 {
0845 unsigned char *bp = (unsigned char *) buffer;
0846 unsigned ret = 0;
0847
0848
0849 parport_frob_control (port,
0850 PARPORT_CONTROL_STROBE |
0851 PARPORT_CONTROL_AUTOFD |
0852 PARPORT_CONTROL_SELECT |
0853 PARPORT_CONTROL_INIT,
0854 PARPORT_CONTROL_INIT);
0855 port->ops->data_reverse (port);
0856 for (; len > 0; len--, bp++) {
0857
0858 parport_frob_control (port, PARPORT_CONTROL_SELECT,
0859 PARPORT_CONTROL_SELECT);
0860
0861
0862 if (parport_wait_peripheral (port, PARPORT_STATUS_BUSY, 0)) {
0863 break;
0864 }
0865
0866 *bp = parport_read_data (port);
0867
0868
0869 parport_frob_control (port, PARPORT_CONTROL_SELECT,
0870 0);
0871
0872
0873 if (parport_poll_peripheral (port, PARPORT_STATUS_BUSY,
0874 PARPORT_STATUS_BUSY, 5))
0875 break;
0876
0877 ret++;
0878 }
0879 port->ops->data_forward (port);
0880
0881 return ret;
0882 }
0883
0884 EXPORT_SYMBOL(parport_ieee1284_ecp_write_data);
0885 EXPORT_SYMBOL(parport_ieee1284_ecp_read_data);
0886 EXPORT_SYMBOL(parport_ieee1284_ecp_write_addr);
0887 EXPORT_SYMBOL(parport_ieee1284_write_compat);
0888 EXPORT_SYMBOL(parport_ieee1284_read_nibble);
0889 EXPORT_SYMBOL(parport_ieee1284_read_byte);
0890 EXPORT_SYMBOL(parport_ieee1284_epp_write_data);
0891 EXPORT_SYMBOL(parport_ieee1284_epp_read_data);
0892 EXPORT_SYMBOL(parport_ieee1284_epp_write_addr);
0893 EXPORT_SYMBOL(parport_ieee1284_epp_read_addr);