drivers/parisc/gsc.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Interrupt management for most GSC and related devices.
0004  *
0005  * (c) Copyright 1999 Alex deVries for The Puffin Group
0006  * (c) Copyright 1999 Grant Grundler for Hewlett-Packard
0007  * (c) Copyright 1999 Matthew Wilcox
0008  * (c) Copyright 2000 Helge Deller
0009  * (c) Copyright 2001 Matthew Wilcox for Hewlett-Packard
0010  */
0011
0012 #include <linux/bitops.h>
0013 #include <linux/errno.h>
0014 #include <linux/init.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/ioport.h>
0017 #include <linux/module.h>
0018 #include <linux/types.h>
0019
0020 #include <asm/hardware.h>
0021 #include <asm/io.h>
0022
0023 #include "gsc.h"
0024
0025 #undef DEBUG
0026
0027 #ifdef DEBUG
0028 #define DEBPRINTK printk
0029 #else
0030 #define DEBPRINTK(x,...)
0031 #endif
0032
0033 int gsc_alloc_irq(struct gsc_irq *i)
0034 {
0035     int irq = txn_alloc_irq(GSC_EIM_WIDTH);
0036     if (irq < 0) {
0037         printk("cannot get irq\n");
0038         return irq;
0039     }
0040
0041     i->txn_addr = txn_alloc_addr(irq);
0042     i->txn_data = txn_alloc_data(irq);
0043     i->irq = irq;
0044
0045     return irq;
0046 }
0047
0048 int gsc_claim_irq(struct gsc_irq *i, int irq)
0049 {
0050     int c = irq;
0051
0052     irq += CPU_IRQ_BASE; /* virtualize the IRQ first */
0053
0054     irq = txn_claim_irq(irq);
0055     if (irq < 0) {
0056         printk("cannot claim irq %d\n", c);
0057         return irq;
0058     }
0059
0060     i->txn_addr = txn_alloc_addr(irq);
0061     i->txn_data = txn_alloc_data(irq);
0062     i->irq = irq;
0063
0064     return irq;
0065 }
0066
0067 EXPORT_SYMBOL(gsc_alloc_irq);
0068 EXPORT_SYMBOL(gsc_claim_irq);
0069
0070 /* Common interrupt demultiplexer used by Asp, Lasi & Wax.  */
0071 irqreturn_t gsc_asic_intr(int gsc_asic_irq, void *dev)
0072 {
0073     unsigned long irr;
0074     struct gsc_asic *gsc_asic = dev;
0075
0076     irr = gsc_readl(gsc_asic->hpa + OFFSET_IRR);
0077     if (irr == 0)
0078         return IRQ_NONE;
0079
0080     DEBPRINTK("%s intr, mask=0x%x\n", gsc_asic->name, irr);
0081
0082     do {
0083         int local_irq = __ffs(irr);
0084         unsigned int irq = gsc_asic->global_irq[local_irq];
0085         generic_handle_irq(irq);
0086         irr &= ~(1 << local_irq);
0087     } while (irr);
0088
0089     return IRQ_HANDLED;
0090 }
0091
0092 int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit)
0093 {
0094     int local_irq;
0095
0096     for (local_irq = 0; local_irq < limit; local_irq++) {
0097         if (global_irqs[local_irq] == irq)
0098             return local_irq;
0099     }
0100
0101     return NO_IRQ;
0102 }
0103
0104 static void gsc_asic_mask_irq(struct irq_data *d)
0105 {
0106     struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
0107     int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
0108     u32 imr;
0109
0110     DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
0111             irq_dev->name, imr);
0112
0113     /* Disable the IRQ line by clearing the bit in the IMR */
0114     imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);
0115     imr &= ~(1 << local_irq);
0116     gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
0117 }
0118
0119 static void gsc_asic_unmask_irq(struct irq_data *d)
0120 {
0121     struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
0122     int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
0123     u32 imr;
0124
0125     DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
0126             irq_dev->name, imr);
0127
0128     /* Enable the IRQ line by setting the bit in the IMR */
0129     imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);
0130     imr |= 1 << local_irq;
0131     gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
0132     /*
0133      * FIXME: read IPR to make sure the IRQ isn't already pending.
0134      *   If so, we need to read IRR and manually call do_irq().
0135      */
0136 }
0137
0138 #ifdef CONFIG_SMP
0139 static int gsc_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
0140                 bool force)
0141 {
0142     struct gsc_asic *gsc_dev = irq_data_get_irq_chip_data(d);
0143     struct cpumask tmask;
0144     int cpu_irq;
0145
0146     if (!cpumask_and(&tmask, dest, cpu_online_mask))
0147         return -EINVAL;
0148
0149     cpu_irq = cpu_check_affinity(d, &tmask);
0150     if (cpu_irq < 0)
0151         return cpu_irq;
0152
0153     gsc_dev->gsc_irq.txn_addr = txn_affinity_addr(d->irq, cpu_irq);
0154     gsc_dev->eim = ((u32) gsc_dev->gsc_irq.txn_addr) | gsc_dev->gsc_irq.txn_data;
0155
0156     /* switch IRQ's for devices below LASI/WAX to other CPU */
0157     gsc_writel(gsc_dev->eim, gsc_dev->hpa + OFFSET_IAR);
0158
0159     irq_data_update_effective_affinity(d, &tmask);
0160
0161     return IRQ_SET_MASK_OK;
0162 }
0163 #endif
0164
0165
0166 static struct irq_chip gsc_asic_interrupt_type = {
0167     .name       =   "GSC-ASIC",
0168     .irq_unmask =   gsc_asic_unmask_irq,
0169     .irq_mask   =   gsc_asic_mask_irq,
0170 #ifdef CONFIG_SMP
0171     .irq_set_affinity = gsc_set_affinity_irq,
0172 #endif
0173 };
0174
0175 int gsc_assign_irq(struct irq_chip *type, void *data)
0176 {
0177     static int irq = GSC_IRQ_BASE;
0178
0179     if (irq > GSC_IRQ_MAX)
0180         return NO_IRQ;
0181
0182     irq_set_chip_and_handler(irq, type, handle_simple_irq);
0183     irq_set_chip_data(irq, data);
0184
0185     return irq++;
0186 }
0187
0188 void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp)
0189 {
0190     int irq = asic->global_irq[local_irq];
0191
0192     if (irq <= 0) {
0193         irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic);
0194         if (irq == NO_IRQ)
0195             return;
0196
0197         asic->global_irq[local_irq] = irq;
0198     }
0199     *irqp = irq;
0200 }
0201
0202 struct gsc_fixup_struct {
0203     void (*choose_irq)(struct parisc_device *, void *);
0204     void *ctrl;
0205 };
0206
0207 static int gsc_fixup_irqs_callback(struct device *dev, void *data)
0208 {
0209     struct parisc_device *padev = to_parisc_device(dev);
0210     struct gsc_fixup_struct *gf = data;
0211
0212     /* work-around for 715/64 and others which have parent
0213        at path [5] and children at path [5/0/x] */
0214     if (padev->id.hw_type == HPHW_FAULTY)
0215         gsc_fixup_irqs(padev, gf->ctrl, gf->choose_irq);
0216     gf->choose_irq(padev, gf->ctrl);
0217
0218     return 0;
0219 }
0220
0221 void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl,
0222             void (*choose_irq)(struct parisc_device *, void *))
0223 {
0224     struct gsc_fixup_struct data = {
0225         .choose_irq = choose_irq,
0226         .ctrl       = ctrl,
0227     };
0228
0229     device_for_each_child(&parent->dev, &data, gsc_fixup_irqs_callback);
0230 }
0231
0232 int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic)
0233 {
0234     struct resource *res;
0235     int i;
0236
0237     gsc_asic->gsc = parent;
0238
0239     /* Initialise local irq -> global irq mapping */
0240     for (i = 0; i < 32; i++) {
0241         gsc_asic->global_irq[i] = NO_IRQ;
0242     }
0243
0244     /* allocate resource region */
0245     res = request_mem_region(gsc_asic->hpa, 0x100000, gsc_asic->name);
0246     if (res) {
0247         res->flags = IORESOURCE_MEM;    /* do not mark it busy ! */
0248     }
0249
0250 #if 0
0251     printk(KERN_WARNING "%s IRQ %d EIM 0x%x", gsc_asic->name,
0252             parent->irq, gsc_asic->eim);
0253     if (gsc_readl(gsc_asic->hpa + OFFSET_IMR))
0254         printk("  IMR is non-zero! (0x%x)",
0255                 gsc_readl(gsc_asic->hpa + OFFSET_IMR));
0256     printk("\n");
0257 #endif
0258
0259     return 0;
0260 }
0261
0262 extern struct parisc_driver lasi_driver;
0263 extern struct parisc_driver asp_driver;
0264 extern struct parisc_driver wax_driver;
0265
0266 void __init gsc_init(void)
0267 {
0268 #ifdef CONFIG_GSC_LASI
0269     register_parisc_driver(&lasi_driver);
0270     register_parisc_driver(&asp_driver);
0271 #endif
0272 #ifdef CONFIG_GSC_WAX
0273     register_parisc_driver(&wax_driver);
0274 #endif
0275 }