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0050 #include <linux/debugfs.h>
0051 #include <linux/delay.h>
0052 #include <linux/dmaengine.h>
0053 #include <linux/dma-mapping.h>
0054 #include <linux/errno.h>
0055 #include <linux/export.h>
0056 #include <linux/interrupt.h>
0057 #include <linux/module.h>
0058 #include <linux/pci.h>
0059 #include <linux/slab.h>
0060 #include <linux/types.h>
0061 #include <linux/uaccess.h>
0062 #include "linux/ntb.h"
0063 #include "linux/ntb_transport.h"
0064
0065 #define NTB_TRANSPORT_VERSION 4
0066 #define NTB_TRANSPORT_VER "4"
0067 #define NTB_TRANSPORT_NAME "ntb_transport"
0068 #define NTB_TRANSPORT_DESC "Software Queue-Pair Transport over NTB"
0069 #define NTB_TRANSPORT_MIN_SPADS (MW0_SZ_HIGH + 2)
0070
0071 MODULE_DESCRIPTION(NTB_TRANSPORT_DESC);
0072 MODULE_VERSION(NTB_TRANSPORT_VER);
0073 MODULE_LICENSE("Dual BSD/GPL");
0074 MODULE_AUTHOR("Intel Corporation");
0075
0076 static unsigned long max_mw_size;
0077 module_param(max_mw_size, ulong, 0644);
0078 MODULE_PARM_DESC(max_mw_size, "Limit size of large memory windows");
0079
0080 static unsigned int transport_mtu = 0x10000;
0081 module_param(transport_mtu, uint, 0644);
0082 MODULE_PARM_DESC(transport_mtu, "Maximum size of NTB transport packets");
0083
0084 static unsigned char max_num_clients;
0085 module_param(max_num_clients, byte, 0644);
0086 MODULE_PARM_DESC(max_num_clients, "Maximum number of NTB transport clients");
0087
0088 static unsigned int copy_bytes = 1024;
0089 module_param(copy_bytes, uint, 0644);
0090 MODULE_PARM_DESC(copy_bytes, "Threshold under which NTB will use the CPU to copy instead of DMA");
0091
0092 static bool use_dma;
0093 module_param(use_dma, bool, 0644);
0094 MODULE_PARM_DESC(use_dma, "Use DMA engine to perform large data copy");
0095
0096 static bool use_msi;
0097 #ifdef CONFIG_NTB_MSI
0098 module_param(use_msi, bool, 0644);
0099 MODULE_PARM_DESC(use_msi, "Use MSI interrupts instead of doorbells");
0100 #endif
0101
0102 static struct dentry *nt_debugfs_dir;
0103
0104
0105 #define PIDX NTB_DEF_PEER_IDX
0106
0107 struct ntb_queue_entry {
0108
0109 struct list_head entry;
0110
0111 void *cb_data;
0112 void *buf;
0113 unsigned int len;
0114 unsigned int flags;
0115 int retries;
0116 int errors;
0117 unsigned int tx_index;
0118 unsigned int rx_index;
0119
0120 struct ntb_transport_qp *qp;
0121 union {
0122 struct ntb_payload_header __iomem *tx_hdr;
0123 struct ntb_payload_header *rx_hdr;
0124 };
0125 };
0126
0127 struct ntb_rx_info {
0128 unsigned int entry;
0129 };
0130
0131 struct ntb_transport_qp {
0132 struct ntb_transport_ctx *transport;
0133 struct ntb_dev *ndev;
0134 void *cb_data;
0135 struct dma_chan *tx_dma_chan;
0136 struct dma_chan *rx_dma_chan;
0137
0138 bool client_ready;
0139 bool link_is_up;
0140 bool active;
0141
0142 u8 qp_num;
0143 u64 qp_bit;
0144
0145 struct ntb_rx_info __iomem *rx_info;
0146 struct ntb_rx_info *remote_rx_info;
0147
0148 void (*tx_handler)(struct ntb_transport_qp *qp, void *qp_data,
0149 void *data, int len);
0150 struct list_head tx_free_q;
0151 spinlock_t ntb_tx_free_q_lock;
0152 void __iomem *tx_mw;
0153 phys_addr_t tx_mw_phys;
0154 size_t tx_mw_size;
0155 dma_addr_t tx_mw_dma_addr;
0156 unsigned int tx_index;
0157 unsigned int tx_max_entry;
0158 unsigned int tx_max_frame;
0159
0160 void (*rx_handler)(struct ntb_transport_qp *qp, void *qp_data,
0161 void *data, int len);
0162 struct list_head rx_post_q;
0163 struct list_head rx_pend_q;
0164 struct list_head rx_free_q;
0165
0166 spinlock_t ntb_rx_q_lock;
0167 void *rx_buff;
0168 unsigned int rx_index;
0169 unsigned int rx_max_entry;
0170 unsigned int rx_max_frame;
0171 unsigned int rx_alloc_entry;
0172 dma_cookie_t last_cookie;
0173 struct tasklet_struct rxc_db_work;
0174
0175 void (*event_handler)(void *data, int status);
0176 struct delayed_work link_work;
0177 struct work_struct link_cleanup;
0178
0179 struct dentry *debugfs_dir;
0180 struct dentry *debugfs_stats;
0181
0182
0183 u64 rx_bytes;
0184 u64 rx_pkts;
0185 u64 rx_ring_empty;
0186 u64 rx_err_no_buf;
0187 u64 rx_err_oflow;
0188 u64 rx_err_ver;
0189 u64 rx_memcpy;
0190 u64 rx_async;
0191 u64 tx_bytes;
0192 u64 tx_pkts;
0193 u64 tx_ring_full;
0194 u64 tx_err_no_buf;
0195 u64 tx_memcpy;
0196 u64 tx_async;
0197
0198 bool use_msi;
0199 int msi_irq;
0200 struct ntb_msi_desc msi_desc;
0201 struct ntb_msi_desc peer_msi_desc;
0202 };
0203
0204 struct ntb_transport_mw {
0205 phys_addr_t phys_addr;
0206 resource_size_t phys_size;
0207 void __iomem *vbase;
0208 size_t xlat_size;
0209 size_t buff_size;
0210 size_t alloc_size;
0211 void *alloc_addr;
0212 void *virt_addr;
0213 dma_addr_t dma_addr;
0214 };
0215
0216 struct ntb_transport_client_dev {
0217 struct list_head entry;
0218 struct ntb_transport_ctx *nt;
0219 struct device dev;
0220 };
0221
0222 struct ntb_transport_ctx {
0223 struct list_head entry;
0224 struct list_head client_devs;
0225
0226 struct ntb_dev *ndev;
0227
0228 struct ntb_transport_mw *mw_vec;
0229 struct ntb_transport_qp *qp_vec;
0230 unsigned int mw_count;
0231 unsigned int qp_count;
0232 u64 qp_bitmap;
0233 u64 qp_bitmap_free;
0234
0235 bool use_msi;
0236 unsigned int msi_spad_offset;
0237 u64 msi_db_mask;
0238
0239 bool link_is_up;
0240 struct delayed_work link_work;
0241 struct work_struct link_cleanup;
0242
0243 struct dentry *debugfs_node_dir;
0244 };
0245
0246 enum {
0247 DESC_DONE_FLAG = BIT(0),
0248 LINK_DOWN_FLAG = BIT(1),
0249 };
0250
0251 struct ntb_payload_header {
0252 unsigned int ver;
0253 unsigned int len;
0254 unsigned int flags;
0255 };
0256
0257 enum {
0258 VERSION = 0,
0259 QP_LINKS,
0260 NUM_QPS,
0261 NUM_MWS,
0262 MW0_SZ_HIGH,
0263 MW0_SZ_LOW,
0264 };
0265
0266 #define dev_client_dev(__dev) \
0267 container_of((__dev), struct ntb_transport_client_dev, dev)
0268
0269 #define drv_client(__drv) \
0270 container_of((__drv), struct ntb_transport_client, driver)
0271
0272 #define QP_TO_MW(nt, qp) ((qp) % nt->mw_count)
0273 #define NTB_QP_DEF_NUM_ENTRIES 100
0274 #define NTB_LINK_DOWN_TIMEOUT 10
0275
0276 static void ntb_transport_rxc_db(unsigned long data);
0277 static const struct ntb_ctx_ops ntb_transport_ops;
0278 static struct ntb_client ntb_transport_client;
0279 static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
0280 struct ntb_queue_entry *entry);
0281 static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset);
0282 static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset);
0283 static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset);
0284
0285
0286 static int ntb_transport_bus_match(struct device *dev,
0287 struct device_driver *drv)
0288 {
0289 return !strncmp(dev_name(dev), drv->name, strlen(drv->name));
0290 }
0291
0292 static int ntb_transport_bus_probe(struct device *dev)
0293 {
0294 const struct ntb_transport_client *client;
0295 int rc;
0296
0297 get_device(dev);
0298
0299 client = drv_client(dev->driver);
0300 rc = client->probe(dev);
0301 if (rc)
0302 put_device(dev);
0303
0304 return rc;
0305 }
0306
0307 static void ntb_transport_bus_remove(struct device *dev)
0308 {
0309 const struct ntb_transport_client *client;
0310
0311 client = drv_client(dev->driver);
0312 client->remove(dev);
0313
0314 put_device(dev);
0315 }
0316
0317 static struct bus_type ntb_transport_bus = {
0318 .name = "ntb_transport",
0319 .match = ntb_transport_bus_match,
0320 .probe = ntb_transport_bus_probe,
0321 .remove = ntb_transport_bus_remove,
0322 };
0323
0324 static LIST_HEAD(ntb_transport_list);
0325
0326 static int ntb_bus_init(struct ntb_transport_ctx *nt)
0327 {
0328 list_add_tail(&nt->entry, &ntb_transport_list);
0329 return 0;
0330 }
0331
0332 static void ntb_bus_remove(struct ntb_transport_ctx *nt)
0333 {
0334 struct ntb_transport_client_dev *client_dev, *cd;
0335
0336 list_for_each_entry_safe(client_dev, cd, &nt->client_devs, entry) {
0337 dev_err(client_dev->dev.parent, "%s still attached to bus, removing\n",
0338 dev_name(&client_dev->dev));
0339 list_del(&client_dev->entry);
0340 device_unregister(&client_dev->dev);
0341 }
0342
0343 list_del(&nt->entry);
0344 }
0345
0346 static void ntb_transport_client_release(struct device *dev)
0347 {
0348 struct ntb_transport_client_dev *client_dev;
0349
0350 client_dev = dev_client_dev(dev);
0351 kfree(client_dev);
0352 }
0353
0354
0355
0356
0357
0358
0359
0360 void ntb_transport_unregister_client_dev(char *device_name)
0361 {
0362 struct ntb_transport_client_dev *client, *cd;
0363 struct ntb_transport_ctx *nt;
0364
0365 list_for_each_entry(nt, &ntb_transport_list, entry)
0366 list_for_each_entry_safe(client, cd, &nt->client_devs, entry)
0367 if (!strncmp(dev_name(&client->dev), device_name,
0368 strlen(device_name))) {
0369 list_del(&client->entry);
0370 device_unregister(&client->dev);
0371 }
0372 }
0373 EXPORT_SYMBOL_GPL(ntb_transport_unregister_client_dev);
0374
0375
0376
0377
0378
0379
0380
0381 int ntb_transport_register_client_dev(char *device_name)
0382 {
0383 struct ntb_transport_client_dev *client_dev;
0384 struct ntb_transport_ctx *nt;
0385 int node;
0386 int rc, i = 0;
0387
0388 if (list_empty(&ntb_transport_list))
0389 return -ENODEV;
0390
0391 list_for_each_entry(nt, &ntb_transport_list, entry) {
0392 struct device *dev;
0393
0394 node = dev_to_node(&nt->ndev->dev);
0395
0396 client_dev = kzalloc_node(sizeof(*client_dev),
0397 GFP_KERNEL, node);
0398 if (!client_dev) {
0399 rc = -ENOMEM;
0400 goto err;
0401 }
0402
0403 dev = &client_dev->dev;
0404
0405
0406 dev_set_name(dev, "%s%d", device_name, i);
0407 dev->bus = &ntb_transport_bus;
0408 dev->release = ntb_transport_client_release;
0409 dev->parent = &nt->ndev->dev;
0410
0411 rc = device_register(dev);
0412 if (rc) {
0413 kfree(client_dev);
0414 goto err;
0415 }
0416
0417 list_add_tail(&client_dev->entry, &nt->client_devs);
0418 i++;
0419 }
0420
0421 return 0;
0422
0423 err:
0424 ntb_transport_unregister_client_dev(device_name);
0425
0426 return rc;
0427 }
0428 EXPORT_SYMBOL_GPL(ntb_transport_register_client_dev);
0429
0430
0431
0432
0433
0434
0435
0436
0437
0438 int ntb_transport_register_client(struct ntb_transport_client *drv)
0439 {
0440 drv->driver.bus = &ntb_transport_bus;
0441
0442 if (list_empty(&ntb_transport_list))
0443 return -ENODEV;
0444
0445 return driver_register(&drv->driver);
0446 }
0447 EXPORT_SYMBOL_GPL(ntb_transport_register_client);
0448
0449
0450
0451
0452
0453
0454
0455
0456
0457 void ntb_transport_unregister_client(struct ntb_transport_client *drv)
0458 {
0459 driver_unregister(&drv->driver);
0460 }
0461 EXPORT_SYMBOL_GPL(ntb_transport_unregister_client);
0462
0463 static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count,
0464 loff_t *offp)
0465 {
0466 struct ntb_transport_qp *qp;
0467 char *buf;
0468 ssize_t ret, out_offset, out_count;
0469
0470 qp = filp->private_data;
0471
0472 if (!qp || !qp->link_is_up)
0473 return 0;
0474
0475 out_count = 1000;
0476
0477 buf = kmalloc(out_count, GFP_KERNEL);
0478 if (!buf)
0479 return -ENOMEM;
0480
0481 out_offset = 0;
0482 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0483 "\nNTB QP stats:\n\n");
0484 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0485 "rx_bytes - \t%llu\n", qp->rx_bytes);
0486 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0487 "rx_pkts - \t%llu\n", qp->rx_pkts);
0488 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0489 "rx_memcpy - \t%llu\n", qp->rx_memcpy);
0490 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0491 "rx_async - \t%llu\n", qp->rx_async);
0492 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0493 "rx_ring_empty - %llu\n", qp->rx_ring_empty);
0494 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0495 "rx_err_no_buf - %llu\n", qp->rx_err_no_buf);
0496 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0497 "rx_err_oflow - \t%llu\n", qp->rx_err_oflow);
0498 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0499 "rx_err_ver - \t%llu\n", qp->rx_err_ver);
0500 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0501 "rx_buff - \t0x%p\n", qp->rx_buff);
0502 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0503 "rx_index - \t%u\n", qp->rx_index);
0504 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0505 "rx_max_entry - \t%u\n", qp->rx_max_entry);
0506 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0507 "rx_alloc_entry - \t%u\n\n", qp->rx_alloc_entry);
0508
0509 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0510 "tx_bytes - \t%llu\n", qp->tx_bytes);
0511 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0512 "tx_pkts - \t%llu\n", qp->tx_pkts);
0513 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0514 "tx_memcpy - \t%llu\n", qp->tx_memcpy);
0515 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0516 "tx_async - \t%llu\n", qp->tx_async);
0517 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0518 "tx_ring_full - \t%llu\n", qp->tx_ring_full);
0519 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0520 "tx_err_no_buf - %llu\n", qp->tx_err_no_buf);
0521 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0522 "tx_mw - \t0x%p\n", qp->tx_mw);
0523 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0524 "tx_index (H) - \t%u\n", qp->tx_index);
0525 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0526 "RRI (T) - \t%u\n",
0527 qp->remote_rx_info->entry);
0528 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0529 "tx_max_entry - \t%u\n", qp->tx_max_entry);
0530 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0531 "free tx - \t%u\n",
0532 ntb_transport_tx_free_entry(qp));
0533
0534 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0535 "\n");
0536 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0537 "Using TX DMA - \t%s\n",
0538 qp->tx_dma_chan ? "Yes" : "No");
0539 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0540 "Using RX DMA - \t%s\n",
0541 qp->rx_dma_chan ? "Yes" : "No");
0542 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0543 "QP Link - \t%s\n",
0544 qp->link_is_up ? "Up" : "Down");
0545 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
0546 "\n");
0547
0548 if (out_offset > out_count)
0549 out_offset = out_count;
0550
0551 ret = simple_read_from_buffer(ubuf, count, offp, buf, out_offset);
0552 kfree(buf);
0553 return ret;
0554 }
0555
0556 static const struct file_operations ntb_qp_debugfs_stats = {
0557 .owner = THIS_MODULE,
0558 .open = simple_open,
0559 .read = debugfs_read,
0560 };
0561
0562 static void ntb_list_add(spinlock_t *lock, struct list_head *entry,
0563 struct list_head *list)
0564 {
0565 unsigned long flags;
0566
0567 spin_lock_irqsave(lock, flags);
0568 list_add_tail(entry, list);
0569 spin_unlock_irqrestore(lock, flags);
0570 }
0571
0572 static struct ntb_queue_entry *ntb_list_rm(spinlock_t *lock,
0573 struct list_head *list)
0574 {
0575 struct ntb_queue_entry *entry;
0576 unsigned long flags;
0577
0578 spin_lock_irqsave(lock, flags);
0579 if (list_empty(list)) {
0580 entry = NULL;
0581 goto out;
0582 }
0583 entry = list_first_entry(list, struct ntb_queue_entry, entry);
0584 list_del(&entry->entry);
0585
0586 out:
0587 spin_unlock_irqrestore(lock, flags);
0588
0589 return entry;
0590 }
0591
0592 static struct ntb_queue_entry *ntb_list_mv(spinlock_t *lock,
0593 struct list_head *list,
0594 struct list_head *to_list)
0595 {
0596 struct ntb_queue_entry *entry;
0597 unsigned long flags;
0598
0599 spin_lock_irqsave(lock, flags);
0600
0601 if (list_empty(list)) {
0602 entry = NULL;
0603 } else {
0604 entry = list_first_entry(list, struct ntb_queue_entry, entry);
0605 list_move_tail(&entry->entry, to_list);
0606 }
0607
0608 spin_unlock_irqrestore(lock, flags);
0609
0610 return entry;
0611 }
0612
0613 static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,
0614 unsigned int qp_num)
0615 {
0616 struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
0617 struct ntb_transport_mw *mw;
0618 struct ntb_dev *ndev = nt->ndev;
0619 struct ntb_queue_entry *entry;
0620 unsigned int rx_size, num_qps_mw;
0621 unsigned int mw_num, mw_count, qp_count;
0622 unsigned int i;
0623 int node;
0624
0625 mw_count = nt->mw_count;
0626 qp_count = nt->qp_count;
0627
0628 mw_num = QP_TO_MW(nt, qp_num);
0629 mw = &nt->mw_vec[mw_num];
0630
0631 if (!mw->virt_addr)
0632 return -ENOMEM;
0633
0634 if (mw_num < qp_count % mw_count)
0635 num_qps_mw = qp_count / mw_count + 1;
0636 else
0637 num_qps_mw = qp_count / mw_count;
0638
0639 rx_size = (unsigned int)mw->xlat_size / num_qps_mw;
0640 qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);
0641 rx_size -= sizeof(struct ntb_rx_info);
0642
0643 qp->remote_rx_info = qp->rx_buff + rx_size;
0644
0645
0646 qp->rx_max_frame = min(transport_mtu, rx_size / 2);
0647 qp->rx_max_entry = rx_size / qp->rx_max_frame;
0648 qp->rx_index = 0;
0649
0650
0651
0652
0653
0654
0655 node = dev_to_node(&ndev->dev);
0656 for (i = qp->rx_alloc_entry; i < qp->rx_max_entry; i++) {
0657 entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
0658 if (!entry)
0659 return -ENOMEM;
0660
0661 entry->qp = qp;
0662 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
0663 &qp->rx_free_q);
0664 qp->rx_alloc_entry++;
0665 }
0666
0667 qp->remote_rx_info->entry = qp->rx_max_entry - 1;
0668
0669
0670 for (i = 0; i < qp->rx_max_entry; i++) {
0671 void *offset = (qp->rx_buff + qp->rx_max_frame * (i + 1) -
0672 sizeof(struct ntb_payload_header));
0673 memset(offset, 0, sizeof(struct ntb_payload_header));
0674 }
0675
0676 qp->rx_pkts = 0;
0677 qp->tx_pkts = 0;
0678 qp->tx_index = 0;
0679
0680 return 0;
0681 }
0682
0683 static irqreturn_t ntb_transport_isr(int irq, void *dev)
0684 {
0685 struct ntb_transport_qp *qp = dev;
0686
0687 tasklet_schedule(&qp->rxc_db_work);
0688
0689 return IRQ_HANDLED;
0690 }
0691
0692 static void ntb_transport_setup_qp_peer_msi(struct ntb_transport_ctx *nt,
0693 unsigned int qp_num)
0694 {
0695 struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
0696 int spad = qp_num * 2 + nt->msi_spad_offset;
0697
0698 if (!nt->use_msi)
0699 return;
0700
0701 if (spad >= ntb_spad_count(nt->ndev))
0702 return;
0703
0704 qp->peer_msi_desc.addr_offset =
0705 ntb_peer_spad_read(qp->ndev, PIDX, spad);
0706 qp->peer_msi_desc.data =
0707 ntb_peer_spad_read(qp->ndev, PIDX, spad + 1);
0708
0709 dev_dbg(&qp->ndev->pdev->dev, "QP%d Peer MSI addr=%x data=%x\n",
0710 qp_num, qp->peer_msi_desc.addr_offset, qp->peer_msi_desc.data);
0711
0712 if (qp->peer_msi_desc.addr_offset) {
0713 qp->use_msi = true;
0714 dev_info(&qp->ndev->pdev->dev,
0715 "Using MSI interrupts for QP%d\n", qp_num);
0716 }
0717 }
0718
0719 static void ntb_transport_setup_qp_msi(struct ntb_transport_ctx *nt,
0720 unsigned int qp_num)
0721 {
0722 struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
0723 int spad = qp_num * 2 + nt->msi_spad_offset;
0724 int rc;
0725
0726 if (!nt->use_msi)
0727 return;
0728
0729 if (spad >= ntb_spad_count(nt->ndev)) {
0730 dev_warn_once(&qp->ndev->pdev->dev,
0731 "Not enough SPADS to use MSI interrupts\n");
0732 return;
0733 }
0734
0735 ntb_spad_write(qp->ndev, spad, 0);
0736 ntb_spad_write(qp->ndev, spad + 1, 0);
0737
0738 if (!qp->msi_irq) {
0739 qp->msi_irq = ntbm_msi_request_irq(qp->ndev, ntb_transport_isr,
0740 KBUILD_MODNAME, qp,
0741 &qp->msi_desc);
0742 if (qp->msi_irq < 0) {
0743 dev_warn(&qp->ndev->pdev->dev,
0744 "Unable to allocate MSI interrupt for qp%d\n",
0745 qp_num);
0746 return;
0747 }
0748 }
0749
0750 rc = ntb_spad_write(qp->ndev, spad, qp->msi_desc.addr_offset);
0751 if (rc)
0752 goto err_free_interrupt;
0753
0754 rc = ntb_spad_write(qp->ndev, spad + 1, qp->msi_desc.data);
0755 if (rc)
0756 goto err_free_interrupt;
0757
0758 dev_dbg(&qp->ndev->pdev->dev, "QP%d MSI %d addr=%x data=%x\n",
0759 qp_num, qp->msi_irq, qp->msi_desc.addr_offset,
0760 qp->msi_desc.data);
0761
0762 return;
0763
0764 err_free_interrupt:
0765 devm_free_irq(&nt->ndev->dev, qp->msi_irq, qp);
0766 }
0767
0768 static void ntb_transport_msi_peer_desc_changed(struct ntb_transport_ctx *nt)
0769 {
0770 int i;
0771
0772 dev_dbg(&nt->ndev->pdev->dev, "Peer MSI descriptors changed");
0773
0774 for (i = 0; i < nt->qp_count; i++)
0775 ntb_transport_setup_qp_peer_msi(nt, i);
0776 }
0777
0778 static void ntb_transport_msi_desc_changed(void *data)
0779 {
0780 struct ntb_transport_ctx *nt = data;
0781 int i;
0782
0783 dev_dbg(&nt->ndev->pdev->dev, "MSI descriptors changed");
0784
0785 for (i = 0; i < nt->qp_count; i++)
0786 ntb_transport_setup_qp_msi(nt, i);
0787
0788 ntb_peer_db_set(nt->ndev, nt->msi_db_mask);
0789 }
0790
0791 static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw)
0792 {
0793 struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
0794 struct pci_dev *pdev = nt->ndev->pdev;
0795
0796 if (!mw->virt_addr)
0797 return;
0798
0799 ntb_mw_clear_trans(nt->ndev, PIDX, num_mw);
0800 dma_free_coherent(&pdev->dev, mw->alloc_size,
0801 mw->alloc_addr, mw->dma_addr);
0802 mw->xlat_size = 0;
0803 mw->buff_size = 0;
0804 mw->alloc_size = 0;
0805 mw->alloc_addr = NULL;
0806 mw->virt_addr = NULL;
0807 }
0808
0809 static int ntb_alloc_mw_buffer(struct ntb_transport_mw *mw,
0810 struct device *dma_dev, size_t align)
0811 {
0812 dma_addr_t dma_addr;
0813 void *alloc_addr, *virt_addr;
0814 int rc;
0815
0816 alloc_addr = dma_alloc_coherent(dma_dev, mw->alloc_size,
0817 &dma_addr, GFP_KERNEL);
0818 if (!alloc_addr) {
0819 dev_err(dma_dev, "Unable to alloc MW buff of size %zu\n",
0820 mw->alloc_size);
0821 return -ENOMEM;
0822 }
0823 virt_addr = alloc_addr;
0824
0825
0826
0827
0828
0829
0830
0831 if (!IS_ALIGNED(dma_addr, align)) {
0832 if (mw->alloc_size > mw->buff_size) {
0833 virt_addr = PTR_ALIGN(alloc_addr, align);
0834 dma_addr = ALIGN(dma_addr, align);
0835 } else {
0836 rc = -ENOMEM;
0837 goto err;
0838 }
0839 }
0840
0841 mw->alloc_addr = alloc_addr;
0842 mw->virt_addr = virt_addr;
0843 mw->dma_addr = dma_addr;
0844
0845 return 0;
0846
0847 err:
0848 dma_free_coherent(dma_dev, mw->alloc_size, alloc_addr, dma_addr);
0849
0850 return rc;
0851 }
0852
0853 static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,
0854 resource_size_t size)
0855 {
0856 struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
0857 struct pci_dev *pdev = nt->ndev->pdev;
0858 size_t xlat_size, buff_size;
0859 resource_size_t xlat_align;
0860 resource_size_t xlat_align_size;
0861 int rc;
0862
0863 if (!size)
0864 return -EINVAL;
0865
0866 rc = ntb_mw_get_align(nt->ndev, PIDX, num_mw, &xlat_align,
0867 &xlat_align_size, NULL);
0868 if (rc)
0869 return rc;
0870
0871 xlat_size = round_up(size, xlat_align_size);
0872 buff_size = round_up(size, xlat_align);
0873
0874
0875 if (mw->xlat_size == xlat_size)
0876 return 0;
0877
0878 if (mw->buff_size)
0879 ntb_free_mw(nt, num_mw);
0880
0881
0882 mw->xlat_size = xlat_size;
0883 mw->buff_size = buff_size;
0884 mw->alloc_size = buff_size;
0885
0886 rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);
0887 if (rc) {
0888 mw->alloc_size *= 2;
0889 rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);
0890 if (rc) {
0891 dev_err(&pdev->dev,
0892 "Unable to alloc aligned MW buff\n");
0893 mw->xlat_size = 0;
0894 mw->buff_size = 0;
0895 mw->alloc_size = 0;
0896 return rc;
0897 }
0898 }
0899
0900
0901 rc = ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr,
0902 mw->xlat_size);
0903 if (rc) {
0904 dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);
0905 ntb_free_mw(nt, num_mw);
0906 return -EIO;
0907 }
0908
0909 return 0;
0910 }
0911
0912 static void ntb_qp_link_down_reset(struct ntb_transport_qp *qp)
0913 {
0914 qp->link_is_up = false;
0915 qp->active = false;
0916
0917 qp->tx_index = 0;
0918 qp->rx_index = 0;
0919 qp->rx_bytes = 0;
0920 qp->rx_pkts = 0;
0921 qp->rx_ring_empty = 0;
0922 qp->rx_err_no_buf = 0;
0923 qp->rx_err_oflow = 0;
0924 qp->rx_err_ver = 0;
0925 qp->rx_memcpy = 0;
0926 qp->rx_async = 0;
0927 qp->tx_bytes = 0;
0928 qp->tx_pkts = 0;
0929 qp->tx_ring_full = 0;
0930 qp->tx_err_no_buf = 0;
0931 qp->tx_memcpy = 0;
0932 qp->tx_async = 0;
0933 }
0934
0935 static void ntb_qp_link_cleanup(struct ntb_transport_qp *qp)
0936 {
0937 struct ntb_transport_ctx *nt = qp->transport;
0938 struct pci_dev *pdev = nt->ndev->pdev;
0939
0940 dev_info(&pdev->dev, "qp %d: Link Cleanup\n", qp->qp_num);
0941
0942 cancel_delayed_work_sync(&qp->link_work);
0943 ntb_qp_link_down_reset(qp);
0944
0945 if (qp->event_handler)
0946 qp->event_handler(qp->cb_data, qp->link_is_up);
0947 }
0948
0949 static void ntb_qp_link_cleanup_work(struct work_struct *work)
0950 {
0951 struct ntb_transport_qp *qp = container_of(work,
0952 struct ntb_transport_qp,
0953 link_cleanup);
0954 struct ntb_transport_ctx *nt = qp->transport;
0955
0956 ntb_qp_link_cleanup(qp);
0957
0958 if (nt->link_is_up)
0959 schedule_delayed_work(&qp->link_work,
0960 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
0961 }
0962
0963 static void ntb_qp_link_down(struct ntb_transport_qp *qp)
0964 {
0965 schedule_work(&qp->link_cleanup);
0966 }
0967
0968 static void ntb_transport_link_cleanup(struct ntb_transport_ctx *nt)
0969 {
0970 struct ntb_transport_qp *qp;
0971 u64 qp_bitmap_alloc;
0972 unsigned int i, count;
0973
0974 qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
0975
0976
0977 for (i = 0; i < nt->qp_count; i++)
0978 if (qp_bitmap_alloc & BIT_ULL(i)) {
0979 qp = &nt->qp_vec[i];
0980 ntb_qp_link_cleanup(qp);
0981 cancel_work_sync(&qp->link_cleanup);
0982 cancel_delayed_work_sync(&qp->link_work);
0983 }
0984
0985 if (!nt->link_is_up)
0986 cancel_delayed_work_sync(&nt->link_work);
0987
0988 for (i = 0; i < nt->mw_count; i++)
0989 ntb_free_mw(nt, i);
0990
0991
0992
0993
0994
0995 count = ntb_spad_count(nt->ndev);
0996 for (i = 0; i < count; i++)
0997 ntb_spad_write(nt->ndev, i, 0);
0998 }
0999
1000 static void ntb_transport_link_cleanup_work(struct work_struct *work)
1001 {
1002 struct ntb_transport_ctx *nt =
1003 container_of(work, struct ntb_transport_ctx, link_cleanup);
1004
1005 ntb_transport_link_cleanup(nt);
1006 }
1007
1008 static void ntb_transport_event_callback(void *data)
1009 {
1010 struct ntb_transport_ctx *nt = data;
1011
1012 if (ntb_link_is_up(nt->ndev, NULL, NULL) == 1)
1013 schedule_delayed_work(&nt->link_work, 0);
1014 else
1015 schedule_work(&nt->link_cleanup);
1016 }
1017
1018 static void ntb_transport_link_work(struct work_struct *work)
1019 {
1020 struct ntb_transport_ctx *nt =
1021 container_of(work, struct ntb_transport_ctx, link_work.work);
1022 struct ntb_dev *ndev = nt->ndev;
1023 struct pci_dev *pdev = ndev->pdev;
1024 resource_size_t size;
1025 u32 val;
1026 int rc = 0, i, spad;
1027
1028
1029
1030 if (nt->use_msi) {
1031 rc = ntb_msi_setup_mws(ndev);
1032 if (rc) {
1033 dev_warn(&pdev->dev,
1034 "Failed to register MSI memory window: %d\n",
1035 rc);
1036 nt->use_msi = false;
1037 }
1038 }
1039
1040 for (i = 0; i < nt->qp_count; i++)
1041 ntb_transport_setup_qp_msi(nt, i);
1042
1043 for (i = 0; i < nt->mw_count; i++) {
1044 size = nt->mw_vec[i].phys_size;
1045
1046 if (max_mw_size && size > max_mw_size)
1047 size = max_mw_size;
1048
1049 spad = MW0_SZ_HIGH + (i * 2);
1050 ntb_peer_spad_write(ndev, PIDX, spad, upper_32_bits(size));
1051
1052 spad = MW0_SZ_LOW + (i * 2);
1053 ntb_peer_spad_write(ndev, PIDX, spad, lower_32_bits(size));
1054 }
1055
1056 ntb_peer_spad_write(ndev, PIDX, NUM_MWS, nt->mw_count);
1057
1058 ntb_peer_spad_write(ndev, PIDX, NUM_QPS, nt->qp_count);
1059
1060 ntb_peer_spad_write(ndev, PIDX, VERSION, NTB_TRANSPORT_VERSION);
1061
1062
1063 val = ntb_spad_read(ndev, VERSION);
1064 dev_dbg(&pdev->dev, "Remote version = %d\n", val);
1065 if (val != NTB_TRANSPORT_VERSION)
1066 goto out;
1067
1068 val = ntb_spad_read(ndev, NUM_QPS);
1069 dev_dbg(&pdev->dev, "Remote max number of qps = %d\n", val);
1070 if (val != nt->qp_count)
1071 goto out;
1072
1073 val = ntb_spad_read(ndev, NUM_MWS);
1074 dev_dbg(&pdev->dev, "Remote number of mws = %d\n", val);
1075 if (val != nt->mw_count)
1076 goto out;
1077
1078 for (i = 0; i < nt->mw_count; i++) {
1079 u64 val64;
1080
1081 val = ntb_spad_read(ndev, MW0_SZ_HIGH + (i * 2));
1082 val64 = (u64)val << 32;
1083
1084 val = ntb_spad_read(ndev, MW0_SZ_LOW + (i * 2));
1085 val64 |= val;
1086
1087 dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);
1088
1089 rc = ntb_set_mw(nt, i, val64);
1090 if (rc)
1091 goto out1;
1092 }
1093
1094 nt->link_is_up = true;
1095
1096 for (i = 0; i < nt->qp_count; i++) {
1097 struct ntb_transport_qp *qp = &nt->qp_vec[i];
1098
1099 ntb_transport_setup_qp_mw(nt, i);
1100 ntb_transport_setup_qp_peer_msi(nt, i);
1101
1102 if (qp->client_ready)
1103 schedule_delayed_work(&qp->link_work, 0);
1104 }
1105
1106 return;
1107
1108 out1:
1109 for (i = 0; i < nt->mw_count; i++)
1110 ntb_free_mw(nt, i);
1111
1112
1113 if (rc < 0)
1114 return;
1115
1116 out:
1117 if (ntb_link_is_up(ndev, NULL, NULL) == 1)
1118 schedule_delayed_work(&nt->link_work,
1119 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
1120 }
1121
1122 static void ntb_qp_link_work(struct work_struct *work)
1123 {
1124 struct ntb_transport_qp *qp = container_of(work,
1125 struct ntb_transport_qp,
1126 link_work.work);
1127 struct pci_dev *pdev = qp->ndev->pdev;
1128 struct ntb_transport_ctx *nt = qp->transport;
1129 int val;
1130
1131 WARN_ON(!nt->link_is_up);
1132
1133 val = ntb_spad_read(nt->ndev, QP_LINKS);
1134
1135 ntb_peer_spad_write(nt->ndev, PIDX, QP_LINKS, val | BIT(qp->qp_num));
1136
1137
1138 dev_dbg_ratelimited(&pdev->dev, "Remote QP link status = %x\n", val);
1139
1140
1141 if (val & BIT(qp->qp_num)) {
1142 dev_info(&pdev->dev, "qp %d: Link Up\n", qp->qp_num);
1143 qp->link_is_up = true;
1144 qp->active = true;
1145
1146 if (qp->event_handler)
1147 qp->event_handler(qp->cb_data, qp->link_is_up);
1148
1149 if (qp->active)
1150 tasklet_schedule(&qp->rxc_db_work);
1151 } else if (nt->link_is_up)
1152 schedule_delayed_work(&qp->link_work,
1153 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
1154 }
1155
1156 static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,
1157 unsigned int qp_num)
1158 {
1159 struct ntb_transport_qp *qp;
1160 phys_addr_t mw_base;
1161 resource_size_t mw_size;
1162 unsigned int num_qps_mw, tx_size;
1163 unsigned int mw_num, mw_count, qp_count;
1164 u64 qp_offset;
1165
1166 mw_count = nt->mw_count;
1167 qp_count = nt->qp_count;
1168
1169 mw_num = QP_TO_MW(nt, qp_num);
1170
1171 qp = &nt->qp_vec[qp_num];
1172 qp->qp_num = qp_num;
1173 qp->transport = nt;
1174 qp->ndev = nt->ndev;
1175 qp->client_ready = false;
1176 qp->event_handler = NULL;
1177 ntb_qp_link_down_reset(qp);
1178
1179 if (mw_num < qp_count % mw_count)
1180 num_qps_mw = qp_count / mw_count + 1;
1181 else
1182 num_qps_mw = qp_count / mw_count;
1183
1184 mw_base = nt->mw_vec[mw_num].phys_addr;
1185 mw_size = nt->mw_vec[mw_num].phys_size;
1186
1187 if (max_mw_size && mw_size > max_mw_size)
1188 mw_size = max_mw_size;
1189
1190 tx_size = (unsigned int)mw_size / num_qps_mw;
1191 qp_offset = tx_size * (qp_num / mw_count);
1192
1193 qp->tx_mw_size = tx_size;
1194 qp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset;
1195 if (!qp->tx_mw)
1196 return -EINVAL;
1197
1198 qp->tx_mw_phys = mw_base + qp_offset;
1199 if (!qp->tx_mw_phys)
1200 return -EINVAL;
1201
1202 tx_size -= sizeof(struct ntb_rx_info);
1203 qp->rx_info = qp->tx_mw + tx_size;
1204
1205
1206 qp->tx_max_frame = min(transport_mtu, tx_size / 2);
1207 qp->tx_max_entry = tx_size / qp->tx_max_frame;
1208
1209 if (nt->debugfs_node_dir) {
1210 char debugfs_name[4];
1211
1212 snprintf(debugfs_name, 4, "qp%d", qp_num);
1213 qp->debugfs_dir = debugfs_create_dir(debugfs_name,
1214 nt->debugfs_node_dir);
1215
1216 qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,
1217 qp->debugfs_dir, qp,
1218 &ntb_qp_debugfs_stats);
1219 } else {
1220 qp->debugfs_dir = NULL;
1221 qp->debugfs_stats = NULL;
1222 }
1223
1224 INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);
1225 INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);
1226
1227 spin_lock_init(&qp->ntb_rx_q_lock);
1228 spin_lock_init(&qp->ntb_tx_free_q_lock);
1229
1230 INIT_LIST_HEAD(&qp->rx_post_q);
1231 INIT_LIST_HEAD(&qp->rx_pend_q);
1232 INIT_LIST_HEAD(&qp->rx_free_q);
1233 INIT_LIST_HEAD(&qp->tx_free_q);
1234
1235 tasklet_init(&qp->rxc_db_work, ntb_transport_rxc_db,
1236 (unsigned long)qp);
1237
1238 return 0;
1239 }
1240
1241 static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev)
1242 {
1243 struct ntb_transport_ctx *nt;
1244 struct ntb_transport_mw *mw;
1245 unsigned int mw_count, qp_count, spad_count, max_mw_count_for_spads;
1246 u64 qp_bitmap;
1247 int node;
1248 int rc, i;
1249
1250 mw_count = ntb_peer_mw_count(ndev);
1251
1252 if (!ndev->ops->mw_set_trans) {
1253 dev_err(&ndev->dev, "Inbound MW based NTB API is required\n");
1254 return -EINVAL;
1255 }
1256
1257 if (ntb_db_is_unsafe(ndev))
1258 dev_dbg(&ndev->dev,
1259 "doorbell is unsafe, proceed anyway...\n");
1260 if (ntb_spad_is_unsafe(ndev))
1261 dev_dbg(&ndev->dev,
1262 "scratchpad is unsafe, proceed anyway...\n");
1263
1264 if (ntb_peer_port_count(ndev) != NTB_DEF_PEER_CNT)
1265 dev_warn(&ndev->dev, "Multi-port NTB devices unsupported\n");
1266
1267 node = dev_to_node(&ndev->dev);
1268
1269 nt = kzalloc_node(sizeof(*nt), GFP_KERNEL, node);
1270 if (!nt)
1271 return -ENOMEM;
1272
1273 nt->ndev = ndev;
1274
1275
1276
1277
1278
1279 if (use_msi && mw_count > 1) {
1280 rc = ntb_msi_init(ndev, ntb_transport_msi_desc_changed);
1281 if (!rc) {
1282 mw_count -= 1;
1283 nt->use_msi = true;
1284 }
1285 }
1286
1287 spad_count = ntb_spad_count(ndev);
1288
1289
1290
1291 if (spad_count < NTB_TRANSPORT_MIN_SPADS) {
1292 nt->mw_count = 0;
1293 rc = -EINVAL;
1294 goto err;
1295 }
1296
1297 max_mw_count_for_spads = (spad_count - MW0_SZ_HIGH) / 2;
1298 nt->mw_count = min(mw_count, max_mw_count_for_spads);
1299
1300 nt->msi_spad_offset = nt->mw_count * 2 + MW0_SZ_HIGH;
1301
1302 nt->mw_vec = kcalloc_node(mw_count, sizeof(*nt->mw_vec),
1303 GFP_KERNEL, node);
1304 if (!nt->mw_vec) {
1305 rc = -ENOMEM;
1306 goto err;
1307 }
1308
1309 for (i = 0; i < mw_count; i++) {
1310 mw = &nt->mw_vec[i];
1311
1312 rc = ntb_peer_mw_get_addr(ndev, i, &mw->phys_addr,
1313 &mw->phys_size);
1314 if (rc)
1315 goto err1;
1316
1317 mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);
1318 if (!mw->vbase) {
1319 rc = -ENOMEM;
1320 goto err1;
1321 }
1322
1323 mw->buff_size = 0;
1324 mw->xlat_size = 0;
1325 mw->virt_addr = NULL;
1326 mw->dma_addr = 0;
1327 }
1328
1329 qp_bitmap = ntb_db_valid_mask(ndev);
1330
1331 qp_count = ilog2(qp_bitmap);
1332 if (nt->use_msi) {
1333 qp_count -= 1;
1334 nt->msi_db_mask = 1 << qp_count;
1335 ntb_db_clear_mask(ndev, nt->msi_db_mask);
1336 }
1337
1338 if (max_num_clients && max_num_clients < qp_count)
1339 qp_count = max_num_clients;
1340 else if (nt->mw_count < qp_count)
1341 qp_count = nt->mw_count;
1342
1343 qp_bitmap &= BIT_ULL(qp_count) - 1;
1344
1345 nt->qp_count = qp_count;
1346 nt->qp_bitmap = qp_bitmap;
1347 nt->qp_bitmap_free = qp_bitmap;
1348
1349 nt->qp_vec = kcalloc_node(qp_count, sizeof(*nt->qp_vec),
1350 GFP_KERNEL, node);
1351 if (!nt->qp_vec) {
1352 rc = -ENOMEM;
1353 goto err1;
1354 }
1355
1356 if (nt_debugfs_dir) {
1357 nt->debugfs_node_dir =
1358 debugfs_create_dir(pci_name(ndev->pdev),
1359 nt_debugfs_dir);
1360 }
1361
1362 for (i = 0; i < qp_count; i++) {
1363 rc = ntb_transport_init_queue(nt, i);
1364 if (rc)
1365 goto err2;
1366 }
1367
1368 INIT_DELAYED_WORK(&nt->link_work, ntb_transport_link_work);
1369 INIT_WORK(&nt->link_cleanup, ntb_transport_link_cleanup_work);
1370
1371 rc = ntb_set_ctx(ndev, nt, &ntb_transport_ops);
1372 if (rc)
1373 goto err2;
1374
1375 INIT_LIST_HEAD(&nt->client_devs);
1376 rc = ntb_bus_init(nt);
1377 if (rc)
1378 goto err3;
1379
1380 nt->link_is_up = false;
1381 ntb_link_enable(ndev, NTB_SPEED_AUTO, NTB_WIDTH_AUTO);
1382 ntb_link_event(ndev);
1383
1384 return 0;
1385
1386 err3:
1387 ntb_clear_ctx(ndev);
1388 err2:
1389 kfree(nt->qp_vec);
1390 err1:
1391 while (i--) {
1392 mw = &nt->mw_vec[i];
1393 iounmap(mw->vbase);
1394 }
1395 kfree(nt->mw_vec);
1396 err:
1397 kfree(nt);
1398 return rc;
1399 }
1400
1401 static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev)
1402 {
1403 struct ntb_transport_ctx *nt = ndev->ctx;
1404 struct ntb_transport_qp *qp;
1405 u64 qp_bitmap_alloc;
1406 int i;
1407
1408 ntb_transport_link_cleanup(nt);
1409 cancel_work_sync(&nt->link_cleanup);
1410 cancel_delayed_work_sync(&nt->link_work);
1411
1412 qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
1413
1414
1415 for (i = 0; i < nt->qp_count; i++) {
1416 qp = &nt->qp_vec[i];
1417 if (qp_bitmap_alloc & BIT_ULL(i))
1418 ntb_transport_free_queue(qp);
1419 debugfs_remove_recursive(qp->debugfs_dir);
1420 }
1421
1422 ntb_link_disable(ndev);
1423 ntb_clear_ctx(ndev);
1424
1425 ntb_bus_remove(nt);
1426
1427 for (i = nt->mw_count; i--; ) {
1428 ntb_free_mw(nt, i);
1429 iounmap(nt->mw_vec[i].vbase);
1430 }
1431
1432 kfree(nt->qp_vec);
1433 kfree(nt->mw_vec);
1434 kfree(nt);
1435 }
1436
1437 static void ntb_complete_rxc(struct ntb_transport_qp *qp)
1438 {
1439 struct ntb_queue_entry *entry;
1440 void *cb_data;
1441 unsigned int len;
1442 unsigned long irqflags;
1443
1444 spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
1445
1446 while (!list_empty(&qp->rx_post_q)) {
1447 entry = list_first_entry(&qp->rx_post_q,
1448 struct ntb_queue_entry, entry);
1449 if (!(entry->flags & DESC_DONE_FLAG))
1450 break;
1451
1452 entry->rx_hdr->flags = 0;
1453 iowrite32(entry->rx_index, &qp->rx_info->entry);
1454
1455 cb_data = entry->cb_data;
1456 len = entry->len;
1457
1458 list_move_tail(&entry->entry, &qp->rx_free_q);
1459
1460 spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
1461
1462 if (qp->rx_handler && qp->client_ready)
1463 qp->rx_handler(qp, qp->cb_data, cb_data, len);
1464
1465 spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
1466 }
1467
1468 spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
1469 }
1470
1471 static void ntb_rx_copy_callback(void *data,
1472 const struct dmaengine_result *res)
1473 {
1474 struct ntb_queue_entry *entry = data;
1475
1476
1477 if (res) {
1478 enum dmaengine_tx_result dma_err = res->result;
1479
1480 switch (dma_err) {
1481 case DMA_TRANS_READ_FAILED:
1482 case DMA_TRANS_WRITE_FAILED:
1483 entry->errors++;
1484 fallthrough;
1485 case DMA_TRANS_ABORTED:
1486 {
1487 struct ntb_transport_qp *qp = entry->qp;
1488 void *offset = qp->rx_buff + qp->rx_max_frame *
1489 qp->rx_index;
1490
1491 ntb_memcpy_rx(entry, offset);
1492 qp->rx_memcpy++;
1493 return;
1494 }
1495
1496 case DMA_TRANS_NOERROR:
1497 default:
1498 break;
1499 }
1500 }
1501
1502 entry->flags |= DESC_DONE_FLAG;
1503
1504 ntb_complete_rxc(entry->qp);
1505 }
1506
1507 static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset)
1508 {
1509 void *buf = entry->buf;
1510 size_t len = entry->len;
1511
1512 memcpy(buf, offset, len);
1513
1514
1515 wmb();
1516
1517 ntb_rx_copy_callback(entry, NULL);
1518 }
1519
1520 static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset)
1521 {
1522 struct dma_async_tx_descriptor *txd;
1523 struct ntb_transport_qp *qp = entry->qp;
1524 struct dma_chan *chan = qp->rx_dma_chan;
1525 struct dma_device *device;
1526 size_t pay_off, buff_off, len;
1527 struct dmaengine_unmap_data *unmap;
1528 dma_cookie_t cookie;
1529 void *buf = entry->buf;
1530
1531 len = entry->len;
1532 device = chan->device;
1533 pay_off = (size_t)offset & ~PAGE_MASK;
1534 buff_off = (size_t)buf & ~PAGE_MASK;
1535
1536 if (!is_dma_copy_aligned(device, pay_off, buff_off, len))
1537 goto err;
1538
1539 unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
1540 if (!unmap)
1541 goto err;
1542
1543 unmap->len = len;
1544 unmap->addr[0] = dma_map_page(device->dev, virt_to_page(offset),
1545 pay_off, len, DMA_TO_DEVICE);
1546 if (dma_mapping_error(device->dev, unmap->addr[0]))
1547 goto err_get_unmap;
1548
1549 unmap->to_cnt = 1;
1550
1551 unmap->addr[1] = dma_map_page(device->dev, virt_to_page(buf),
1552 buff_off, len, DMA_FROM_DEVICE);
1553 if (dma_mapping_error(device->dev, unmap->addr[1]))
1554 goto err_get_unmap;
1555
1556 unmap->from_cnt = 1;
1557
1558 txd = device->device_prep_dma_memcpy(chan, unmap->addr[1],
1559 unmap->addr[0], len,
1560 DMA_PREP_INTERRUPT);
1561 if (!txd)
1562 goto err_get_unmap;
1563
1564 txd->callback_result = ntb_rx_copy_callback;
1565 txd->callback_param = entry;
1566 dma_set_unmap(txd, unmap);
1567
1568 cookie = dmaengine_submit(txd);
1569 if (dma_submit_error(cookie))
1570 goto err_set_unmap;
1571
1572 dmaengine_unmap_put(unmap);
1573
1574 qp->last_cookie = cookie;
1575
1576 qp->rx_async++;
1577
1578 return 0;
1579
1580 err_set_unmap:
1581 dmaengine_unmap_put(unmap);
1582 err_get_unmap:
1583 dmaengine_unmap_put(unmap);
1584 err:
1585 return -ENXIO;
1586 }
1587
1588 static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset)
1589 {
1590 struct ntb_transport_qp *qp = entry->qp;
1591 struct dma_chan *chan = qp->rx_dma_chan;
1592 int res;
1593
1594 if (!chan)
1595 goto err;
1596
1597 if (entry->len < copy_bytes)
1598 goto err;
1599
1600 res = ntb_async_rx_submit(entry, offset);
1601 if (res < 0)
1602 goto err;
1603
1604 if (!entry->retries)
1605 qp->rx_async++;
1606
1607 return;
1608
1609 err:
1610 ntb_memcpy_rx(entry, offset);
1611 qp->rx_memcpy++;
1612 }
1613
1614 static int ntb_process_rxc(struct ntb_transport_qp *qp)
1615 {
1616 struct ntb_payload_header *hdr;
1617 struct ntb_queue_entry *entry;
1618 void *offset;
1619
1620 offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;
1621 hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);
1622
1623 dev_dbg(&qp->ndev->pdev->dev, "qp %d: RX ver %u len %d flags %x\n",
1624 qp->qp_num, hdr->ver, hdr->len, hdr->flags);
1625
1626 if (!(hdr->flags & DESC_DONE_FLAG)) {
1627 dev_dbg(&qp->ndev->pdev->dev, "done flag not set\n");
1628 qp->rx_ring_empty++;
1629 return -EAGAIN;
1630 }
1631
1632 if (hdr->flags & LINK_DOWN_FLAG) {
1633 dev_dbg(&qp->ndev->pdev->dev, "link down flag set\n");
1634 ntb_qp_link_down(qp);
1635 hdr->flags = 0;
1636 return -EAGAIN;
1637 }
1638
1639 if (hdr->ver != (u32)qp->rx_pkts) {
1640 dev_dbg(&qp->ndev->pdev->dev,
1641 "version mismatch, expected %llu - got %u\n",
1642 qp->rx_pkts, hdr->ver);
1643 qp->rx_err_ver++;
1644 return -EIO;
1645 }
1646
1647 entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q);
1648 if (!entry) {
1649 dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");
1650 qp->rx_err_no_buf++;
1651 return -EAGAIN;
1652 }
1653
1654 entry->rx_hdr = hdr;
1655 entry->rx_index = qp->rx_index;
1656
1657 if (hdr->len > entry->len) {
1658 dev_dbg(&qp->ndev->pdev->dev,
1659 "receive buffer overflow! Wanted %d got %d\n",
1660 hdr->len, entry->len);
1661 qp->rx_err_oflow++;
1662
1663 entry->len = -EIO;
1664 entry->flags |= DESC_DONE_FLAG;
1665
1666 ntb_complete_rxc(qp);
1667 } else {
1668 dev_dbg(&qp->ndev->pdev->dev,
1669 "RX OK index %u ver %u size %d into buf size %d\n",
1670 qp->rx_index, hdr->ver, hdr->len, entry->len);
1671
1672 qp->rx_bytes += hdr->len;
1673 qp->rx_pkts++;
1674
1675 entry->len = hdr->len;
1676
1677 ntb_async_rx(entry, offset);
1678 }
1679
1680 qp->rx_index++;
1681 qp->rx_index %= qp->rx_max_entry;
1682
1683 return 0;
1684 }
1685
1686 static void ntb_transport_rxc_db(unsigned long data)
1687 {
1688 struct ntb_transport_qp *qp = (void *)data;
1689 int rc, i;
1690
1691 dev_dbg(&qp->ndev->pdev->dev, "%s: doorbell %d received\n",
1692 __func__, qp->qp_num);
1693
1694
1695
1696
1697 for (i = 0; i < qp->rx_max_entry; i++) {
1698 rc = ntb_process_rxc(qp);
1699 if (rc)
1700 break;
1701 }
1702
1703 if (i && qp->rx_dma_chan)
1704 dma_async_issue_pending(qp->rx_dma_chan);
1705
1706 if (i == qp->rx_max_entry) {
1707
1708 if (qp->active)
1709 tasklet_schedule(&qp->rxc_db_work);
1710 } else if (ntb_db_read(qp->ndev) & BIT_ULL(qp->qp_num)) {
1711
1712 ntb_db_clear(qp->ndev, BIT_ULL(qp->qp_num));
1713
1714 ntb_db_read(qp->ndev);
1715
1716
1717
1718
1719
1720 if (qp->active)
1721 tasklet_schedule(&qp->rxc_db_work);
1722 }
1723 }
1724
1725 static void ntb_tx_copy_callback(void *data,
1726 const struct dmaengine_result *res)
1727 {
1728 struct ntb_queue_entry *entry = data;
1729 struct ntb_transport_qp *qp = entry->qp;
1730 struct ntb_payload_header __iomem *hdr = entry->tx_hdr;
1731
1732
1733 if (res) {
1734 enum dmaengine_tx_result dma_err = res->result;
1735
1736 switch (dma_err) {
1737 case DMA_TRANS_READ_FAILED:
1738 case DMA_TRANS_WRITE_FAILED:
1739 entry->errors++;
1740 fallthrough;
1741 case DMA_TRANS_ABORTED:
1742 {
1743 void __iomem *offset =
1744 qp->tx_mw + qp->tx_max_frame *
1745 entry->tx_index;
1746
1747
1748 ntb_memcpy_tx(entry, offset);
1749 qp->tx_memcpy++;
1750 return;
1751 }
1752
1753 case DMA_TRANS_NOERROR:
1754 default:
1755 break;
1756 }
1757 }
1758
1759 iowrite32(entry->flags | DESC_DONE_FLAG, &hdr->flags);
1760
1761 if (qp->use_msi)
1762 ntb_msi_peer_trigger(qp->ndev, PIDX, &qp->peer_msi_desc);
1763 else
1764 ntb_peer_db_set(qp->ndev, BIT_ULL(qp->qp_num));
1765
1766
1767
1768
1769
1770 if (entry->len > 0) {
1771 qp->tx_bytes += entry->len;
1772
1773 if (qp->tx_handler)
1774 qp->tx_handler(qp, qp->cb_data, entry->cb_data,
1775 entry->len);
1776 }
1777
1778 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry, &qp->tx_free_q);
1779 }
1780
1781 static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset)
1782 {
1783 #ifdef ARCH_HAS_NOCACHE_UACCESS
1784
1785
1786
1787
1788 __copy_from_user_inatomic_nocache(offset, entry->buf, entry->len);
1789 #else
1790 memcpy_toio(offset, entry->buf, entry->len);
1791 #endif
1792
1793
1794 wmb();
1795
1796 ntb_tx_copy_callback(entry, NULL);
1797 }
1798
1799 static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
1800 struct ntb_queue_entry *entry)
1801 {
1802 struct dma_async_tx_descriptor *txd;
1803 struct dma_chan *chan = qp->tx_dma_chan;
1804 struct dma_device *device;
1805 size_t len = entry->len;
1806 void *buf = entry->buf;
1807 size_t dest_off, buff_off;
1808 struct dmaengine_unmap_data *unmap;
1809 dma_addr_t dest;
1810 dma_cookie_t cookie;
1811
1812 device = chan->device;
1813 dest = qp->tx_mw_dma_addr + qp->tx_max_frame * entry->tx_index;
1814 buff_off = (size_t)buf & ~PAGE_MASK;
1815 dest_off = (size_t)dest & ~PAGE_MASK;
1816
1817 if (!is_dma_copy_aligned(device, buff_off, dest_off, len))
1818 goto err;
1819
1820 unmap = dmaengine_get_unmap_data(device->dev, 1, GFP_NOWAIT);
1821 if (!unmap)
1822 goto err;
1823
1824 unmap->len = len;
1825 unmap->addr[0] = dma_map_page(device->dev, virt_to_page(buf),
1826 buff_off, len, DMA_TO_DEVICE);
1827 if (dma_mapping_error(device->dev, unmap->addr[0]))
1828 goto err_get_unmap;
1829
1830 unmap->to_cnt = 1;
1831
1832 txd = device->device_prep_dma_memcpy(chan, dest, unmap->addr[0], len,
1833 DMA_PREP_INTERRUPT);
1834 if (!txd)
1835 goto err_get_unmap;
1836
1837 txd->callback_result = ntb_tx_copy_callback;
1838 txd->callback_param = entry;
1839 dma_set_unmap(txd, unmap);
1840
1841 cookie = dmaengine_submit(txd);
1842 if (dma_submit_error(cookie))
1843 goto err_set_unmap;
1844
1845 dmaengine_unmap_put(unmap);
1846
1847 dma_async_issue_pending(chan);
1848
1849 return 0;
1850 err_set_unmap:
1851 dmaengine_unmap_put(unmap);
1852 err_get_unmap:
1853 dmaengine_unmap_put(unmap);
1854 err:
1855 return -ENXIO;
1856 }
1857
1858 static void ntb_async_tx(struct ntb_transport_qp *qp,
1859 struct ntb_queue_entry *entry)
1860 {
1861 struct ntb_payload_header __iomem *hdr;
1862 struct dma_chan *chan = qp->tx_dma_chan;
1863 void __iomem *offset;
1864 int res;
1865
1866 entry->tx_index = qp->tx_index;
1867 offset = qp->tx_mw + qp->tx_max_frame * entry->tx_index;
1868 hdr = offset + qp->tx_max_frame - sizeof(struct ntb_payload_header);
1869 entry->tx_hdr = hdr;
1870
1871 iowrite32(entry->len, &hdr->len);
1872 iowrite32((u32)qp->tx_pkts, &hdr->ver);
1873
1874 if (!chan)
1875 goto err;
1876
1877 if (entry->len < copy_bytes)
1878 goto err;
1879
1880 res = ntb_async_tx_submit(qp, entry);
1881 if (res < 0)
1882 goto err;
1883
1884 if (!entry->retries)
1885 qp->tx_async++;
1886
1887 return;
1888
1889 err:
1890 ntb_memcpy_tx(entry, offset);
1891 qp->tx_memcpy++;
1892 }
1893
1894 static int ntb_process_tx(struct ntb_transport_qp *qp,
1895 struct ntb_queue_entry *entry)
1896 {
1897 if (qp->tx_index == qp->remote_rx_info->entry) {
1898 qp->tx_ring_full++;
1899 return -EAGAIN;
1900 }
1901
1902 if (entry->len > qp->tx_max_frame - sizeof(struct ntb_payload_header)) {
1903 if (qp->tx_handler)
1904 qp->tx_handler(qp, qp->cb_data, NULL, -EIO);
1905
1906 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
1907 &qp->tx_free_q);
1908 return 0;
1909 }
1910
1911 ntb_async_tx(qp, entry);
1912
1913 qp->tx_index++;
1914 qp->tx_index %= qp->tx_max_entry;
1915
1916 qp->tx_pkts++;
1917
1918 return 0;
1919 }
1920
1921 static void ntb_send_link_down(struct ntb_transport_qp *qp)
1922 {
1923 struct pci_dev *pdev = qp->ndev->pdev;
1924 struct ntb_queue_entry *entry;
1925 int i, rc;
1926
1927 if (!qp->link_is_up)
1928 return;
1929
1930 dev_info(&pdev->dev, "qp %d: Send Link Down\n", qp->qp_num);
1931
1932 for (i = 0; i < NTB_LINK_DOWN_TIMEOUT; i++) {
1933 entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
1934 if (entry)
1935 break;
1936 msleep(100);
1937 }
1938
1939 if (!entry)
1940 return;
1941
1942 entry->cb_data = NULL;
1943 entry->buf = NULL;
1944 entry->len = 0;
1945 entry->flags = LINK_DOWN_FLAG;
1946
1947 rc = ntb_process_tx(qp, entry);
1948 if (rc)
1949 dev_err(&pdev->dev, "ntb: QP%d unable to send linkdown msg\n",
1950 qp->qp_num);
1951
1952 ntb_qp_link_down_reset(qp);
1953 }
1954
1955 static bool ntb_dma_filter_fn(struct dma_chan *chan, void *node)
1956 {
1957 return dev_to_node(&chan->dev->device) == (int)(unsigned long)node;
1958 }
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974 struct ntb_transport_qp *
1975 ntb_transport_create_queue(void *data, struct device *client_dev,
1976 const struct ntb_queue_handlers *handlers)
1977 {
1978 struct ntb_dev *ndev;
1979 struct pci_dev *pdev;
1980 struct ntb_transport_ctx *nt;
1981 struct ntb_queue_entry *entry;
1982 struct ntb_transport_qp *qp;
1983 u64 qp_bit;
1984 unsigned int free_queue;
1985 dma_cap_mask_t dma_mask;
1986 int node;
1987 int i;
1988
1989 ndev = dev_ntb(client_dev->parent);
1990 pdev = ndev->pdev;
1991 nt = ndev->ctx;
1992
1993 node = dev_to_node(&ndev->dev);
1994
1995 free_queue = ffs(nt->qp_bitmap_free);
1996 if (!free_queue)
1997 goto err;
1998
1999
2000 free_queue--;
2001
2002 qp = &nt->qp_vec[free_queue];
2003 qp_bit = BIT_ULL(qp->qp_num);
2004
2005 nt->qp_bitmap_free &= ~qp_bit;
2006
2007 qp->cb_data = data;
2008 qp->rx_handler = handlers->rx_handler;
2009 qp->tx_handler = handlers->tx_handler;
2010 qp->event_handler = handlers->event_handler;
2011
2012 dma_cap_zero(dma_mask);
2013 dma_cap_set(DMA_MEMCPY, dma_mask);
2014
2015 if (use_dma) {
2016 qp->tx_dma_chan =
2017 dma_request_channel(dma_mask, ntb_dma_filter_fn,
2018 (void *)(unsigned long)node);
2019 if (!qp->tx_dma_chan)
2020 dev_info(&pdev->dev, "Unable to allocate TX DMA channel\n");
2021
2022 qp->rx_dma_chan =
2023 dma_request_channel(dma_mask, ntb_dma_filter_fn,
2024 (void *)(unsigned long)node);
2025 if (!qp->rx_dma_chan)
2026 dev_info(&pdev->dev, "Unable to allocate RX DMA channel\n");
2027 } else {
2028 qp->tx_dma_chan = NULL;
2029 qp->rx_dma_chan = NULL;
2030 }
2031
2032 qp->tx_mw_dma_addr = 0;
2033 if (qp->tx_dma_chan) {
2034 qp->tx_mw_dma_addr =
2035 dma_map_resource(qp->tx_dma_chan->device->dev,
2036 qp->tx_mw_phys, qp->tx_mw_size,
2037 DMA_FROM_DEVICE, 0);
2038 if (dma_mapping_error(qp->tx_dma_chan->device->dev,
2039 qp->tx_mw_dma_addr)) {
2040 qp->tx_mw_dma_addr = 0;
2041 goto err1;
2042 }
2043 }
2044
2045 dev_dbg(&pdev->dev, "Using %s memcpy for TX\n",
2046 qp->tx_dma_chan ? "DMA" : "CPU");
2047
2048 dev_dbg(&pdev->dev, "Using %s memcpy for RX\n",
2049 qp->rx_dma_chan ? "DMA" : "CPU");
2050
2051 for (i = 0; i < NTB_QP_DEF_NUM_ENTRIES; i++) {
2052 entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
2053 if (!entry)
2054 goto err1;
2055
2056 entry->qp = qp;
2057 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
2058 &qp->rx_free_q);
2059 }
2060 qp->rx_alloc_entry = NTB_QP_DEF_NUM_ENTRIES;
2061
2062 for (i = 0; i < qp->tx_max_entry; i++) {
2063 entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
2064 if (!entry)
2065 goto err2;
2066
2067 entry->qp = qp;
2068 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
2069 &qp->tx_free_q);
2070 }
2071
2072 ntb_db_clear(qp->ndev, qp_bit);
2073 ntb_db_clear_mask(qp->ndev, qp_bit);
2074
2075 dev_info(&pdev->dev, "NTB Transport QP %d created\n", qp->qp_num);
2076
2077 return qp;
2078
2079 err2:
2080 while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
2081 kfree(entry);
2082 err1:
2083 qp->rx_alloc_entry = 0;
2084 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
2085 kfree(entry);
2086 if (qp->tx_mw_dma_addr)
2087 dma_unmap_resource(qp->tx_dma_chan->device->dev,
2088 qp->tx_mw_dma_addr, qp->tx_mw_size,
2089 DMA_FROM_DEVICE, 0);
2090 if (qp->tx_dma_chan)
2091 dma_release_channel(qp->tx_dma_chan);
2092 if (qp->rx_dma_chan)
2093 dma_release_channel(qp->rx_dma_chan);
2094 nt->qp_bitmap_free |= qp_bit;
2095 err:
2096 return NULL;
2097 }
2098 EXPORT_SYMBOL_GPL(ntb_transport_create_queue);
2099
2100
2101
2102
2103
2104
2105
2106 void ntb_transport_free_queue(struct ntb_transport_qp *qp)
2107 {
2108 struct pci_dev *pdev;
2109 struct ntb_queue_entry *entry;
2110 u64 qp_bit;
2111
2112 if (!qp)
2113 return;
2114
2115 pdev = qp->ndev->pdev;
2116
2117 qp->active = false;
2118
2119 if (qp->tx_dma_chan) {
2120 struct dma_chan *chan = qp->tx_dma_chan;
2121
2122
2123
2124 qp->tx_dma_chan = NULL;
2125
2126
2127
2128
2129 dma_sync_wait(chan, qp->last_cookie);
2130 dmaengine_terminate_all(chan);
2131
2132 dma_unmap_resource(chan->device->dev,
2133 qp->tx_mw_dma_addr, qp->tx_mw_size,
2134 DMA_FROM_DEVICE, 0);
2135
2136 dma_release_channel(chan);
2137 }
2138
2139 if (qp->rx_dma_chan) {
2140 struct dma_chan *chan = qp->rx_dma_chan;
2141
2142
2143
2144 qp->rx_dma_chan = NULL;
2145
2146
2147
2148
2149 dma_sync_wait(chan, qp->last_cookie);
2150 dmaengine_terminate_all(chan);
2151 dma_release_channel(chan);
2152 }
2153
2154 qp_bit = BIT_ULL(qp->qp_num);
2155
2156 ntb_db_set_mask(qp->ndev, qp_bit);
2157 tasklet_kill(&qp->rxc_db_work);
2158
2159 cancel_delayed_work_sync(&qp->link_work);
2160
2161 qp->cb_data = NULL;
2162 qp->rx_handler = NULL;
2163 qp->tx_handler = NULL;
2164 qp->event_handler = NULL;
2165
2166 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
2167 kfree(entry);
2168
2169 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) {
2170 dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n");
2171 kfree(entry);
2172 }
2173
2174 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) {
2175 dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n");
2176 kfree(entry);
2177 }
2178
2179 while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
2180 kfree(entry);
2181
2182 qp->transport->qp_bitmap_free |= qp_bit;
2183
2184 dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);
2185 }
2186 EXPORT_SYMBOL_GPL(ntb_transport_free_queue);
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198 void *ntb_transport_rx_remove(struct ntb_transport_qp *qp, unsigned int *len)
2199 {
2200 struct ntb_queue_entry *entry;
2201 void *buf;
2202
2203 if (!qp || qp->client_ready)
2204 return NULL;
2205
2206 entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q);
2207 if (!entry)
2208 return NULL;
2209
2210 buf = entry->cb_data;
2211 *len = entry->len;
2212
2213 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q);
2214
2215 return buf;
2216 }
2217 EXPORT_SYMBOL_GPL(ntb_transport_rx_remove);
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231 int ntb_transport_rx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
2232 unsigned int len)
2233 {
2234 struct ntb_queue_entry *entry;
2235
2236 if (!qp)
2237 return -EINVAL;
2238
2239 entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q);
2240 if (!entry)
2241 return -ENOMEM;
2242
2243 entry->cb_data = cb;
2244 entry->buf = data;
2245 entry->len = len;
2246 entry->flags = 0;
2247 entry->retries = 0;
2248 entry->errors = 0;
2249 entry->rx_index = 0;
2250
2251 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q);
2252
2253 if (qp->active)
2254 tasklet_schedule(&qp->rxc_db_work);
2255
2256 return 0;
2257 }
2258 EXPORT_SYMBOL_GPL(ntb_transport_rx_enqueue);
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273 int ntb_transport_tx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
2274 unsigned int len)
2275 {
2276 struct ntb_queue_entry *entry;
2277 int rc;
2278
2279 if (!qp || !qp->link_is_up || !len)
2280 return -EINVAL;
2281
2282 entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
2283 if (!entry) {
2284 qp->tx_err_no_buf++;
2285 return -EBUSY;
2286 }
2287
2288 entry->cb_data = cb;
2289 entry->buf = data;
2290 entry->len = len;
2291 entry->flags = 0;
2292 entry->errors = 0;
2293 entry->retries = 0;
2294 entry->tx_index = 0;
2295
2296 rc = ntb_process_tx(qp, entry);
2297 if (rc)
2298 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
2299 &qp->tx_free_q);
2300
2301 return rc;
2302 }
2303 EXPORT_SYMBOL_GPL(ntb_transport_tx_enqueue);
2304
2305
2306
2307
2308
2309
2310
2311 void ntb_transport_link_up(struct ntb_transport_qp *qp)
2312 {
2313 if (!qp)
2314 return;
2315
2316 qp->client_ready = true;
2317
2318 if (qp->transport->link_is_up)
2319 schedule_delayed_work(&qp->link_work, 0);
2320 }
2321 EXPORT_SYMBOL_GPL(ntb_transport_link_up);
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331 void ntb_transport_link_down(struct ntb_transport_qp *qp)
2332 {
2333 int val;
2334
2335 if (!qp)
2336 return;
2337
2338 qp->client_ready = false;
2339
2340 val = ntb_spad_read(qp->ndev, QP_LINKS);
2341
2342 ntb_peer_spad_write(qp->ndev, PIDX, QP_LINKS, val & ~BIT(qp->qp_num));
2343
2344 if (qp->link_is_up)
2345 ntb_send_link_down(qp);
2346 else
2347 cancel_delayed_work_sync(&qp->link_work);
2348 }
2349 EXPORT_SYMBOL_GPL(ntb_transport_link_down);
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359 bool ntb_transport_link_query(struct ntb_transport_qp *qp)
2360 {
2361 if (!qp)
2362 return false;
2363
2364 return qp->link_is_up;
2365 }
2366 EXPORT_SYMBOL_GPL(ntb_transport_link_query);
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376 unsigned char ntb_transport_qp_num(struct ntb_transport_qp *qp)
2377 {
2378 if (!qp)
2379 return 0;
2380
2381 return qp->qp_num;
2382 }
2383 EXPORT_SYMBOL_GPL(ntb_transport_qp_num);
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393 unsigned int ntb_transport_max_size(struct ntb_transport_qp *qp)
2394 {
2395 unsigned int max_size;
2396 unsigned int copy_align;
2397 struct dma_chan *rx_chan, *tx_chan;
2398
2399 if (!qp)
2400 return 0;
2401
2402 rx_chan = qp->rx_dma_chan;
2403 tx_chan = qp->tx_dma_chan;
2404
2405 copy_align = max(rx_chan ? rx_chan->device->copy_align : 0,
2406 tx_chan ? tx_chan->device->copy_align : 0);
2407
2408
2409 max_size = qp->tx_max_frame - sizeof(struct ntb_payload_header);
2410 max_size = round_down(max_size, 1 << copy_align);
2411
2412 return max_size;
2413 }
2414 EXPORT_SYMBOL_GPL(ntb_transport_max_size);
2415
2416 unsigned int ntb_transport_tx_free_entry(struct ntb_transport_qp *qp)
2417 {
2418 unsigned int head = qp->tx_index;
2419 unsigned int tail = qp->remote_rx_info->entry;
2420
2421 return tail > head ? tail - head : qp->tx_max_entry + tail - head;
2422 }
2423 EXPORT_SYMBOL_GPL(ntb_transport_tx_free_entry);
2424
2425 static void ntb_transport_doorbell_callback(void *data, int vector)
2426 {
2427 struct ntb_transport_ctx *nt = data;
2428 struct ntb_transport_qp *qp;
2429 u64 db_bits;
2430 unsigned int qp_num;
2431
2432 if (ntb_db_read(nt->ndev) & nt->msi_db_mask) {
2433 ntb_transport_msi_peer_desc_changed(nt);
2434 ntb_db_clear(nt->ndev, nt->msi_db_mask);
2435 }
2436
2437 db_bits = (nt->qp_bitmap & ~nt->qp_bitmap_free &
2438 ntb_db_vector_mask(nt->ndev, vector));
2439
2440 while (db_bits) {
2441 qp_num = __ffs(db_bits);
2442 qp = &nt->qp_vec[qp_num];
2443
2444 if (qp->active)
2445 tasklet_schedule(&qp->rxc_db_work);
2446
2447 db_bits &= ~BIT_ULL(qp_num);
2448 }
2449 }
2450
2451 static const struct ntb_ctx_ops ntb_transport_ops = {
2452 .link_event = ntb_transport_event_callback,
2453 .db_event = ntb_transport_doorbell_callback,
2454 };
2455
2456 static struct ntb_client ntb_transport_client = {
2457 .ops = {
2458 .probe = ntb_transport_probe,
2459 .remove = ntb_transport_free,
2460 },
2461 };
2462
2463 static int __init ntb_transport_init(void)
2464 {
2465 int rc;
2466
2467 pr_info("%s, version %s\n", NTB_TRANSPORT_DESC, NTB_TRANSPORT_VER);
2468
2469 if (debugfs_initialized())
2470 nt_debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
2471
2472 rc = bus_register(&ntb_transport_bus);
2473 if (rc)
2474 goto err_bus;
2475
2476 rc = ntb_register_client(&ntb_transport_client);
2477 if (rc)
2478 goto err_client;
2479
2480 return 0;
2481
2482 err_client:
2483 bus_unregister(&ntb_transport_bus);
2484 err_bus:
2485 debugfs_remove_recursive(nt_debugfs_dir);
2486 return rc;
2487 }
2488 module_init(ntb_transport_init);
2489
2490 static void __exit ntb_transport_exit(void)
2491 {
2492 ntb_unregister_client(&ntb_transport_client);
2493 bus_unregister(&ntb_transport_bus);
2494 debugfs_remove_recursive(nt_debugfs_dir);
2495 }
2496 module_exit(ntb_transport_exit);