wwan/t7xx/t7xx_hif_dpmaif_tx.h

0001 /* SPDX-License-Identifier: GPL-2.0-only
0002  *
0003  * Copyright (c) 2021, MediaTek Inc.
0004  * Copyright (c) 2021-2022, Intel Corporation.
0005  *
0006  * Authors:
0007  *  Haijun Liu <haijun.liu@mediatek.com>
0008  *  Eliot Lee <eliot.lee@intel.com>
0009  *  Ricardo Martinez <ricardo.martinez@linux.intel.com>
0010  *
0011  * Contributors:
0012  *  Amir Hanania <amir.hanania@intel.com>
0013  *  Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
0014  *  Moises Veleta <moises.veleta@intel.com>
0015  *  Sreehari Kancharla <sreehari.kancharla@intel.com>
0016  */
0017
0018 #ifndef __T7XX_HIF_DPMA_TX_H__
0019 #define __T7XX_HIF_DPMA_TX_H__
0020
0021 #include <linux/bits.h>
0022 #include <linux/skbuff.h>
0023 #include <linux/types.h>
0024
0025 #include "t7xx_hif_dpmaif.h"
0026
0027 #define DPMAIF_TX_DEFAULT_QUEUE 0
0028
0029 struct dpmaif_drb {
0030     __le32 header;
0031     union {
0032         struct {
0033             __le32 data_addr_l;
0034             __le32 data_addr_h;
0035         } pd;
0036         struct {
0037             __le32 msg_hdr;
0038             __le32 reserved1;
0039         } msg;
0040     };
0041     __le32 reserved2;
0042 };
0043
0044 /* Header fields */
0045 #define DRB_HDR_DATA_LEN    GENMASK(31, 16)
0046 #define DRB_HDR_RESERVED    GENMASK(15, 3)
0047 #define DRB_HDR_CONT        BIT(2)
0048 #define DRB_HDR_DTYP        GENMASK(1, 0)
0049
0050 #define DRB_MSG_DW2_RES     GENMASK(31, 30)
0051 #define DRB_MSG_L4_CHK      BIT(29)
0052 #define DRB_MSG_IP_CHK      BIT(28)
0053 #define DRB_MSG_RESERVED    BIT(27)
0054 #define DRB_MSG_NETWORK_TYPE    GENMASK(26, 24)
0055 #define DRB_MSG_CHANNEL_ID  GENMASK(23, 16)
0056 #define DRB_MSG_COUNT_L     GENMASK(15, 0)
0057
0058 struct dpmaif_drb_skb {
0059     struct sk_buff      *skb;
0060     dma_addr_t      bus_addr;
0061     unsigned int        data_len;
0062     u16         index:13;
0063     u16         is_msg:1;
0064     u16         is_frag:1;
0065     u16         is_last:1;
0066 };
0067
0068 int t7xx_dpmaif_tx_send_skb(struct dpmaif_ctrl *dpmaif_ctrl, unsigned int txq_number,
0069                 struct sk_buff *skb);
0070 void t7xx_dpmaif_tx_thread_rel(struct dpmaif_ctrl *dpmaif_ctrl);
0071 int t7xx_dpmaif_tx_thread_init(struct dpmaif_ctrl *dpmaif_ctrl);
0072 void t7xx_dpmaif_txq_free(struct dpmaif_tx_queue *txq);
0073 void t7xx_dpmaif_irq_tx_done(struct dpmaif_ctrl *dpmaif_ctrl, unsigned int que_mask);
0074 int t7xx_dpmaif_txq_init(struct dpmaif_tx_queue *txq);
0075 void t7xx_dpmaif_tx_stop(struct dpmaif_ctrl *dpmaif_ctrl);
0076 void t7xx_dpmaif_tx_clear(struct dpmaif_ctrl *dpmaif_ctrl);
0077
0078 #endif /* __T7XX_HIF_DPMA_TX_H__ */