wwan/t7xx/t7xx_hif_dpmaif.h

0001 /* SPDX-License-Identifier: GPL-2.0-only
0002  *
0003  * Copyright (c) 2021, MediaTek Inc.
0004  * Copyright (c) 2021-2022, Intel Corporation.
0005  *
0006  * Authors:
0007  *  Amir Hanania <amir.hanania@intel.com>
0008  *  Haijun Liu <haijun.liu@mediatek.com>
0009  *  Moises Veleta <moises.veleta@intel.com>
0010  *  Ricardo Martinez <ricardo.martinez@linux.intel.com>
0011  *
0012  * Contributors:
0013  *  Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
0014  *  Eliot Lee <eliot.lee@intel.com>
0015  *  Sreehari Kancharla <sreehari.kancharla@intel.com>
0016  */
0017
0018 #ifndef __T7XX_HIF_DPMAIF_H__
0019 #define __T7XX_HIF_DPMAIF_H__
0020
0021 #include <linux/bitmap.h>
0022 #include <linux/mm_types.h>
0023 #include <linux/sched.h>
0024 #include <linux/skbuff.h>
0025 #include <linux/spinlock.h>
0026 #include <linux/types.h>
0027 #include <linux/wait.h>
0028 #include <linux/workqueue.h>
0029
0030 #include "t7xx_dpmaif.h"
0031 #include "t7xx_pci.h"
0032 #include "t7xx_state_monitor.h"
0033
0034 /* SKB control buffer */
0035 struct t7xx_skb_cb {
0036     u8  netif_idx;
0037     u8  txq_number;
0038     u8  rx_pkt_type;
0039 };
0040
0041 #define T7XX_SKB_CB(__skb)  ((struct t7xx_skb_cb *)(__skb)->cb)
0042
0043 enum dpmaif_rdwr {
0044     DPMAIF_READ,
0045     DPMAIF_WRITE,
0046 };
0047
0048 /* Structure of DL BAT */
0049 struct dpmaif_cur_rx_skb_info {
0050     bool            msg_pit_received;
0051     struct sk_buff      *cur_skb;
0052     unsigned int        cur_chn_idx;
0053     unsigned int        check_sum;
0054     unsigned int        pit_dp;
0055     unsigned int        pkt_type;
0056     int         err_payload;
0057 };
0058
0059 struct dpmaif_bat {
0060     unsigned int        p_buffer_addr;
0061     unsigned int        buffer_addr_ext;
0062 };
0063
0064 struct dpmaif_bat_skb {
0065     struct sk_buff      *skb;
0066     dma_addr_t      data_bus_addr;
0067     unsigned int        data_len;
0068 };
0069
0070 struct dpmaif_bat_page {
0071     struct page     *page;
0072     dma_addr_t      data_bus_addr;
0073     unsigned int        offset;
0074     unsigned int        data_len;
0075 };
0076
0077 enum bat_type {
0078     BAT_TYPE_NORMAL,
0079     BAT_TYPE_FRAG,
0080 };
0081
0082 struct dpmaif_bat_request {
0083     void            *bat_base;
0084     dma_addr_t      bat_bus_addr;
0085     unsigned int        bat_size_cnt;
0086     unsigned int        bat_wr_idx;
0087     unsigned int        bat_release_rd_idx;
0088     void            *bat_skb;
0089     unsigned int        pkt_buf_sz;
0090     unsigned long       *bat_bitmap;
0091     atomic_t        refcnt;
0092     spinlock_t      mask_lock; /* Protects BAT mask */
0093     enum bat_type       type;
0094 };
0095
0096 struct dpmaif_rx_queue {
0097     unsigned int        index;
0098     bool            que_started;
0099     unsigned int        budget;
0100
0101     void            *pit_base;
0102     dma_addr_t      pit_bus_addr;
0103     unsigned int        pit_size_cnt;
0104
0105     unsigned int        pit_rd_idx;
0106     unsigned int        pit_wr_idx;
0107     unsigned int        pit_release_rd_idx;
0108
0109     struct dpmaif_bat_request *bat_req;
0110     struct dpmaif_bat_request *bat_frag;
0111
0112     wait_queue_head_t   rx_wq;
0113     struct task_struct  *rx_thread;
0114     struct sk_buff_head skb_list;
0115     unsigned int        skb_list_max_len;
0116
0117     struct workqueue_struct *worker;
0118     struct work_struct  dpmaif_rxq_work;
0119
0120     atomic_t        rx_processing;
0121
0122     struct dpmaif_ctrl  *dpmaif_ctrl;
0123     unsigned int        expect_pit_seq;
0124     unsigned int        pit_remain_release_cnt;
0125     struct dpmaif_cur_rx_skb_info rx_data_info;
0126 };
0127
0128 struct dpmaif_tx_queue {
0129     unsigned int        index;
0130     bool            que_started;
0131     atomic_t        tx_budget;
0132     void            *drb_base;
0133     dma_addr_t      drb_bus_addr;
0134     unsigned int        drb_size_cnt;
0135     unsigned int        drb_wr_idx;
0136     unsigned int        drb_rd_idx;
0137     unsigned int        drb_release_rd_idx;
0138     void            *drb_skb_base;
0139     wait_queue_head_t   req_wq;
0140     struct workqueue_struct *worker;
0141     struct work_struct  dpmaif_tx_work;
0142     spinlock_t      tx_lock; /* Protects txq DRB */
0143     atomic_t        tx_processing;
0144
0145     struct dpmaif_ctrl  *dpmaif_ctrl;
0146     struct sk_buff_head tx_skb_head;
0147 };
0148
0149 struct dpmaif_isr_para {
0150     struct dpmaif_ctrl  *dpmaif_ctrl;
0151     unsigned char       pcie_int;
0152     unsigned char       dlq_id;
0153 };
0154
0155 enum dpmaif_state {
0156     DPMAIF_STATE_MIN,
0157     DPMAIF_STATE_PWROFF,
0158     DPMAIF_STATE_PWRON,
0159     DPMAIF_STATE_EXCEPTION,
0160     DPMAIF_STATE_MAX
0161 };
0162
0163 enum dpmaif_txq_state {
0164     DMPAIF_TXQ_STATE_IRQ,
0165     DMPAIF_TXQ_STATE_FULL,
0166 };
0167
0168 struct dpmaif_callbacks {
0169     void (*state_notify)(struct t7xx_pci_dev *t7xx_dev,
0170                  enum dpmaif_txq_state state, int txq_number);
0171     void (*recv_skb)(struct t7xx_pci_dev *t7xx_dev, struct sk_buff *skb);
0172 };
0173
0174 struct dpmaif_ctrl {
0175     struct device           *dev;
0176     struct t7xx_pci_dev     *t7xx_dev;
0177     struct md_pm_entity     dpmaif_pm_entity;
0178     enum dpmaif_state       state;
0179     bool                dpmaif_sw_init_done;
0180     struct dpmaif_hw_info       hw_info;
0181     struct dpmaif_tx_queue      txq[DPMAIF_TXQ_NUM];
0182     struct dpmaif_rx_queue      rxq[DPMAIF_RXQ_NUM];
0183
0184     unsigned char           rxq_int_mapping[DPMAIF_RXQ_NUM];
0185     struct dpmaif_isr_para      isr_para[DPMAIF_RXQ_NUM];
0186
0187     struct dpmaif_bat_request   bat_req;
0188     struct dpmaif_bat_request   bat_frag;
0189     struct workqueue_struct     *bat_release_wq;
0190     struct work_struct      bat_release_work;
0191
0192     wait_queue_head_t       tx_wq;
0193     struct task_struct      *tx_thread;
0194
0195     struct dpmaif_callbacks     *callbacks;
0196 };
0197
0198 struct dpmaif_ctrl *t7xx_dpmaif_hif_init(struct t7xx_pci_dev *t7xx_dev,
0199                      struct dpmaif_callbacks *callbacks);
0200 void t7xx_dpmaif_hif_exit(struct dpmaif_ctrl *dpmaif_ctrl);
0201 int t7xx_dpmaif_md_state_callback(struct dpmaif_ctrl *dpmaif_ctrl, enum md_state state);
0202 unsigned int t7xx_ring_buf_get_next_wr_idx(unsigned int buf_len, unsigned int buf_idx);
0203 unsigned int t7xx_ring_buf_rd_wr_count(unsigned int total_cnt, unsigned int rd_idx,
0204                        unsigned int wr_idx, enum dpmaif_rdwr);
0205
0206 #endif /* __T7XX_HIF_DPMAIF_H__ */