wwan/iosm/iosm_ipc_chnl_cfg.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2020-21 Intel Corporation.
0004  */
0005
0006 #include <linux/wwan.h>
0007
0008 #include "iosm_ipc_chnl_cfg.h"
0009
0010 /* Max. sizes of a downlink buffers */
0011 #define IPC_MEM_MAX_DL_FLASH_BUF_SIZE (64 * 1024)
0012 #define IPC_MEM_MAX_DL_LOOPBACK_SIZE (1 * 1024 * 1024)
0013 #define IPC_MEM_MAX_DL_AT_BUF_SIZE 2048
0014 #define IPC_MEM_MAX_DL_RPC_BUF_SIZE (32 * 1024)
0015 #define IPC_MEM_MAX_DL_MBIM_BUF_SIZE IPC_MEM_MAX_DL_RPC_BUF_SIZE
0016
0017 /* Max. transfer descriptors for a pipe. */
0018 #define IPC_MEM_MAX_TDS_FLASH_DL 3
0019 #define IPC_MEM_MAX_TDS_FLASH_UL 6
0020 #define IPC_MEM_MAX_TDS_AT 4
0021 #define IPC_MEM_MAX_TDS_RPC 4
0022 #define IPC_MEM_MAX_TDS_MBIM IPC_MEM_MAX_TDS_RPC
0023 #define IPC_MEM_MAX_TDS_LOOPBACK 11
0024
0025 /* Accumulation backoff usec */
0026 #define IRQ_ACC_BACKOFF_OFF 0
0027
0028 /* MUX acc backoff 1ms */
0029 #define IRQ_ACC_BACKOFF_MUX 1000
0030
0031 /* Modem channel configuration table
0032  * Always reserve element zero for flash channel.
0033  */
0034 static struct ipc_chnl_cfg modem_cfg[] = {
0035     /* IP Mux */
0036     { IPC_MEM_IP_CHL_ID_0, IPC_MEM_PIPE_0, IPC_MEM_PIPE_1,
0037       IPC_MEM_MAX_TDS_MUX_LITE_UL, IPC_MEM_MAX_TDS_MUX_LITE_DL,
0038       IPC_MEM_MAX_DL_MUX_LITE_BUF_SIZE, WWAN_PORT_UNKNOWN },
0039     /* RPC - 0 */
0040     { IPC_MEM_CTRL_CHL_ID_1, IPC_MEM_PIPE_2, IPC_MEM_PIPE_3,
0041       IPC_MEM_MAX_TDS_RPC, IPC_MEM_MAX_TDS_RPC,
0042       IPC_MEM_MAX_DL_RPC_BUF_SIZE, WWAN_PORT_UNKNOWN },
0043     /* IAT0 */
0044     { IPC_MEM_CTRL_CHL_ID_2, IPC_MEM_PIPE_4, IPC_MEM_PIPE_5,
0045       IPC_MEM_MAX_TDS_AT, IPC_MEM_MAX_TDS_AT, IPC_MEM_MAX_DL_AT_BUF_SIZE,
0046       WWAN_PORT_AT },
0047     /* Trace */
0048     { IPC_MEM_CTRL_CHL_ID_3, IPC_MEM_PIPE_6, IPC_MEM_PIPE_7,
0049       IPC_MEM_TDS_TRC, IPC_MEM_TDS_TRC, IPC_MEM_MAX_DL_TRC_BUF_SIZE,
0050       WWAN_PORT_UNKNOWN },
0051     /* IAT1 */
0052     { IPC_MEM_CTRL_CHL_ID_4, IPC_MEM_PIPE_8, IPC_MEM_PIPE_9,
0053       IPC_MEM_MAX_TDS_AT, IPC_MEM_MAX_TDS_AT, IPC_MEM_MAX_DL_AT_BUF_SIZE,
0054       WWAN_PORT_AT },
0055     /* Loopback */
0056     { IPC_MEM_CTRL_CHL_ID_5, IPC_MEM_PIPE_10, IPC_MEM_PIPE_11,
0057       IPC_MEM_MAX_TDS_LOOPBACK, IPC_MEM_MAX_TDS_LOOPBACK,
0058       IPC_MEM_MAX_DL_LOOPBACK_SIZE, WWAN_PORT_UNKNOWN },
0059     /* MBIM Channel */
0060     { IPC_MEM_CTRL_CHL_ID_6, IPC_MEM_PIPE_12, IPC_MEM_PIPE_13,
0061       IPC_MEM_MAX_TDS_MBIM, IPC_MEM_MAX_TDS_MBIM,
0062       IPC_MEM_MAX_DL_MBIM_BUF_SIZE, WWAN_PORT_MBIM },
0063     /* Flash Channel/Coredump Channel */
0064     { IPC_MEM_CTRL_CHL_ID_7, IPC_MEM_PIPE_0, IPC_MEM_PIPE_1,
0065       IPC_MEM_MAX_TDS_FLASH_UL, IPC_MEM_MAX_TDS_FLASH_DL,
0066       IPC_MEM_MAX_DL_FLASH_BUF_SIZE, WWAN_PORT_UNKNOWN },
0067 };
0068
0069 int ipc_chnl_cfg_get(struct ipc_chnl_cfg *chnl_cfg, int index)
0070 {
0071     if (index >= ARRAY_SIZE(modem_cfg)) {
0072         pr_err("index: %d and array size %zu", index,
0073                ARRAY_SIZE(modem_cfg));
0074         return -ECHRNG;
0075     }
0076
0077     if (index == IPC_MEM_MUX_IP_CH_IF_ID)
0078         chnl_cfg->accumulation_backoff = IRQ_ACC_BACKOFF_MUX;
0079     else
0080         chnl_cfg->accumulation_backoff = IRQ_ACC_BACKOFF_OFF;
0081
0082     chnl_cfg->ul_nr_of_entries = modem_cfg[index].ul_nr_of_entries;
0083     chnl_cfg->dl_nr_of_entries = modem_cfg[index].dl_nr_of_entries;
0084     chnl_cfg->dl_buf_size = modem_cfg[index].dl_buf_size;
0085     chnl_cfg->id = modem_cfg[index].id;
0086     chnl_cfg->ul_pipe = modem_cfg[index].ul_pipe;
0087     chnl_cfg->dl_pipe = modem_cfg[index].dl_pipe;
0088     chnl_cfg->wwan_port_type = modem_cfg[index].wwan_port_type;
0089
0090     return 0;
0091 }