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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /* ZD1211 USB-WLAN driver for Linux
0003  *
0004  * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
0005  * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
0006  */
0007 
0008 #include <linux/kernel.h>
0009 
0010 #include "zd_rf.h"
0011 #include "zd_usb.h"
0012 #include "zd_chip.h"
0013 
0014 static const u32 chan_rv[][2] = {
0015     RF_CHANNEL( 1) = { 0x09ec00, 0x8cccc8 },
0016     RF_CHANNEL( 2) = { 0x09ec00, 0x8cccd8 },
0017     RF_CHANNEL( 3) = { 0x09ec00, 0x8cccc0 },
0018     RF_CHANNEL( 4) = { 0x09ec00, 0x8cccd0 },
0019     RF_CHANNEL( 5) = { 0x05ec00, 0x8cccc8 },
0020     RF_CHANNEL( 6) = { 0x05ec00, 0x8cccd8 },
0021     RF_CHANNEL( 7) = { 0x05ec00, 0x8cccc0 },
0022     RF_CHANNEL( 8) = { 0x05ec00, 0x8cccd0 },
0023     RF_CHANNEL( 9) = { 0x0dec00, 0x8cccc8 },
0024     RF_CHANNEL(10) = { 0x0dec00, 0x8cccd8 },
0025     RF_CHANNEL(11) = { 0x0dec00, 0x8cccc0 },
0026     RF_CHANNEL(12) = { 0x0dec00, 0x8cccd0 },
0027     RF_CHANNEL(13) = { 0x03ec00, 0x8cccc8 },
0028     RF_CHANNEL(14) = { 0x03ec00, 0x866660 },
0029 };
0030 
0031 static const u32 std_rv[] = {
0032     0x4ff821,
0033     0xc5fbfc,
0034     0x21ebfe,
0035     0xafd401, /* freq shift 0xaad401 */
0036     0x6cf56a,
0037     0xe04073,
0038     0x193d76,
0039     0x9dd844,
0040     0x500007,
0041     0xd8c010,
0042 };
0043 
0044 static const u32 rv_init1[] = {
0045     0x3c9000,
0046     0xbfffff,
0047     0x700000,
0048     0xf15d58,
0049 };
0050 
0051 static const u32 rv_init2[] = {
0052     0xf15d59,
0053     0xf15d5c,
0054     0xf15d58,
0055 };
0056 
0057 static const struct zd_ioreq16 ioreqs_sw[] = {
0058     { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
0059     { ZD_CR38,  0x38 }, { ZD_CR136, 0xdf },
0060 };
0061 
0062 static int zd1211b_al7230b_finalize(struct zd_chip *chip)
0063 {
0064     int r;
0065     static const struct zd_ioreq16 ioreqs[] = {
0066         { ZD_CR80,  0x30 }, { ZD_CR81,  0x30 }, { ZD_CR79,  0x58 },
0067         { ZD_CR12,  0xf0 }, { ZD_CR77,  0x1b }, { ZD_CR78,  0x58 },
0068         { ZD_CR203, 0x04 },
0069         { },
0070         { ZD_CR240, 0x80 },
0071     };
0072 
0073     r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0074     if (r)
0075         return r;
0076 
0077     if (chip->new_phy_layout) {
0078         /* antenna selection? */
0079         r = zd_iowrite16_locked(chip, 0xe5, ZD_CR9);
0080         if (r)
0081             return r;
0082     }
0083 
0084     return zd_iowrite16_locked(chip, 0x04, ZD_CR203);
0085 }
0086 
0087 static int zd1211_al7230b_init_hw(struct zd_rf *rf)
0088 {
0089     int r;
0090     struct zd_chip *chip = zd_rf_to_chip(rf);
0091 
0092     /* All of these writes are identical to AL2230 unless otherwise
0093      * specified */
0094     static const struct zd_ioreq16 ioreqs_1[] = {
0095         /* This one is 7230-specific, and happens before the rest */
0096         { ZD_CR240,  0x57 },
0097         { },
0098 
0099         { ZD_CR15,   0x20 }, { ZD_CR23,   0x40 }, { ZD_CR24,  0x20 },
0100         { ZD_CR26,   0x11 }, { ZD_CR28,   0x3e }, { ZD_CR29,  0x00 },
0101         { ZD_CR44,   0x33 },
0102         /* This value is different for 7230 (was: 0x2a) */
0103         { ZD_CR106,  0x22 },
0104         { ZD_CR107,  0x1a }, { ZD_CR109,  0x09 }, { ZD_CR110,  0x27 },
0105         { ZD_CR111,  0x2b }, { ZD_CR112,  0x2b }, { ZD_CR119,  0x0a },
0106         /* This happened further down in AL2230,
0107          * and the value changed (was: 0xe0) */
0108         { ZD_CR122,  0xfc },
0109         { ZD_CR10,   0x89 },
0110         /* for newest (3rd cut) AL2300 */
0111         { ZD_CR17,   0x28 },
0112         { ZD_CR26,   0x93 }, { ZD_CR34,   0x30 },
0113         /* for newest (3rd cut) AL2300 */
0114         { ZD_CR35,   0x3e },
0115         { ZD_CR41,   0x24 }, { ZD_CR44,   0x32 },
0116         /* for newest (3rd cut) AL2300 */
0117         { ZD_CR46,   0x96 },
0118         { ZD_CR47,   0x1e }, { ZD_CR79,   0x58 }, { ZD_CR80,  0x30 },
0119         { ZD_CR81,   0x30 }, { ZD_CR87,   0x0a }, { ZD_CR89,  0x04 },
0120         { ZD_CR92,   0x0a }, { ZD_CR99,   0x28 },
0121         /* This value is different for 7230 (was: 0x00) */
0122         { ZD_CR100,  0x02 },
0123         { ZD_CR101,  0x13 }, { ZD_CR102,  0x27 },
0124         /* This value is different for 7230 (was: 0x24) */
0125         { ZD_CR106,  0x22 },
0126         /* This value is different for 7230 (was: 0x2a) */
0127         { ZD_CR107,  0x3f },
0128         { ZD_CR109,  0x09 },
0129         /* This value is different for 7230 (was: 0x13) */
0130         { ZD_CR110,  0x1f },
0131         { ZD_CR111,  0x1f }, { ZD_CR112,  0x1f }, { ZD_CR113, 0x27 },
0132         { ZD_CR114,  0x27 },
0133         /* for newest (3rd cut) AL2300 */
0134         { ZD_CR115,  0x24 },
0135         /* This value is different for 7230 (was: 0x24) */
0136         { ZD_CR116,  0x3f },
0137         /* This value is different for 7230 (was: 0xf4) */
0138         { ZD_CR117,  0xfa },
0139         { ZD_CR118,  0xfc }, { ZD_CR119,  0x10 }, { ZD_CR120, 0x4f },
0140         { ZD_CR121,  0x77 }, { ZD_CR137,  0x88 },
0141         /* This one is 7230-specific */
0142         { ZD_CR138,  0xa8 },
0143         /* This value is different for 7230 (was: 0xff) */
0144         { ZD_CR252,  0x34 },
0145         /* This value is different for 7230 (was: 0xff) */
0146         { ZD_CR253,  0x34 },
0147 
0148         /* PLL_OFF */
0149         { ZD_CR251, 0x2f },
0150     };
0151 
0152     static const struct zd_ioreq16 ioreqs_2[] = {
0153         { ZD_CR251, 0x3f }, /* PLL_ON */
0154         { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
0155         { ZD_CR38,  0x38 }, { ZD_CR136, 0xdf },
0156     };
0157 
0158     r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
0159     if (r)
0160         return r;
0161 
0162     r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
0163     if (r)
0164         return r;
0165 
0166     r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
0167     if (r)
0168         return r;
0169 
0170     r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
0171     if (r)
0172         return r;
0173 
0174     r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
0175     if (r)
0176         return r;
0177 
0178     r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
0179     if (r)
0180         return r;
0181 
0182     r = zd_iowrite16_locked(chip, 0x06, ZD_CR203);
0183     if (r)
0184         return r;
0185     r = zd_iowrite16_locked(chip, 0x80, ZD_CR240);
0186     if (r)
0187         return r;
0188 
0189     return 0;
0190 }
0191 
0192 static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
0193 {
0194     int r;
0195     struct zd_chip *chip = zd_rf_to_chip(rf);
0196 
0197     static const struct zd_ioreq16 ioreqs_1[] = {
0198         { ZD_CR240, 0x57 }, { ZD_CR9,   0x9 },
0199         { },
0200         { ZD_CR10,  0x8b }, { ZD_CR15,  0x20 },
0201         { ZD_CR17,  0x2B }, /* for newest (3rd cut) AL2230 */
0202         { ZD_CR20,  0x10 }, /* 4N25->Stone Request */
0203         { ZD_CR23,  0x40 }, { ZD_CR24,  0x20 }, { ZD_CR26,  0x93 },
0204         { ZD_CR28,  0x3e }, { ZD_CR29,  0x00 },
0205         { ZD_CR33,  0x28 }, /* 5613 */
0206         { ZD_CR34,  0x30 },
0207         { ZD_CR35,  0x3e }, /* for newest (3rd cut) AL2230 */
0208         { ZD_CR41,  0x24 }, { ZD_CR44,  0x32 },
0209         { ZD_CR46,  0x99 }, /* for newest (3rd cut) AL2230 */
0210         { ZD_CR47,  0x1e },
0211 
0212         /* ZD1215 5610 */
0213         { ZD_CR48,  0x00 }, { ZD_CR49,  0x00 }, { ZD_CR51,  0x01 },
0214         { ZD_CR52,  0x80 }, { ZD_CR53,  0x7e }, { ZD_CR65,  0x00 },
0215         { ZD_CR66,  0x00 }, { ZD_CR67,  0x00 }, { ZD_CR68,  0x00 },
0216         { ZD_CR69,  0x28 },
0217 
0218         { ZD_CR79,  0x58 }, { ZD_CR80,  0x30 }, { ZD_CR81,  0x30 },
0219         { ZD_CR87,  0x0A }, { ZD_CR89,  0x04 },
0220         { ZD_CR90,  0x58 }, /* 5112 */
0221         { ZD_CR91,  0x00 }, /* 5613 */
0222         { ZD_CR92,  0x0a },
0223         { ZD_CR98,  0x8d }, /* 4804, for 1212 new algorithm */
0224         { ZD_CR99,  0x00 }, { ZD_CR100, 0x02 }, { ZD_CR101, 0x13 },
0225         { ZD_CR102, 0x27 },
0226         { ZD_CR106, 0x20 }, /* change to 0x24 for AL7230B */
0227         { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
0228         { ZD_CR112, 0x1f },
0229     };
0230 
0231     static const struct zd_ioreq16 ioreqs_new_phy[] = {
0232         { ZD_CR107, 0x28 },
0233         { ZD_CR110, 0x1f }, /* 5127, 0x13->0x1f */
0234         { ZD_CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
0235         { ZD_CR116, 0x2a }, { ZD_CR118, 0xfa }, { ZD_CR119, 0x12 },
0236         { ZD_CR121, 0x6c }, /* 5613 */
0237     };
0238 
0239     static const struct zd_ioreq16 ioreqs_old_phy[] = {
0240         { ZD_CR107, 0x24 },
0241         { ZD_CR110, 0x13 }, /* 5127, 0x13->0x1f */
0242         { ZD_CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
0243         { ZD_CR116, 0x24 }, { ZD_CR118, 0xfc }, { ZD_CR119, 0x11 },
0244         { ZD_CR121, 0x6a }, /* 5613 */
0245     };
0246 
0247     static const struct zd_ioreq16 ioreqs_2[] = {
0248         { ZD_CR113, 0x27 }, { ZD_CR114, 0x27 }, { ZD_CR115, 0x24 },
0249         { ZD_CR117, 0xfa }, { ZD_CR120, 0x4f },
0250         { ZD_CR122, 0xfc }, /* E0->FCh at 4901 */
0251         { ZD_CR123, 0x57 }, /* 5613 */
0252         { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
0253         { ZD_CR126, 0x6c }, /* 5613 */
0254         { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
0255         { ZD_CR130, 0x10 },
0256         { ZD_CR131, 0x00 }, /* 5112 */
0257         { ZD_CR137, 0x50 }, /* 5613 */
0258         { ZD_CR138, 0xa8 }, /* 5112 */
0259         { ZD_CR144, 0xac }, /* 5613 */
0260         { ZD_CR148, 0x40 }, /* 5112 */
0261         { ZD_CR149, 0x40 }, /* 4O07, 50->40 */
0262         { ZD_CR150, 0x1a }, /* 5112, 0C->1A */
0263         { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
0264         { ZD_CR251, 0x2f }, /* PLL_OFF */
0265     };
0266 
0267     static const struct zd_ioreq16 ioreqs_3[] = {
0268         { ZD_CR251, 0x7f }, /* PLL_ON */
0269         { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
0270         { ZD_CR38,  0x38 }, { ZD_CR136, 0xdf },
0271     };
0272 
0273     r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
0274     if (r)
0275         return r;
0276 
0277     if (chip->new_phy_layout)
0278         r = zd_iowrite16a_locked(chip, ioreqs_new_phy,
0279             ARRAY_SIZE(ioreqs_new_phy));
0280     else
0281         r = zd_iowrite16a_locked(chip, ioreqs_old_phy,
0282             ARRAY_SIZE(ioreqs_old_phy));
0283     if (r)
0284         return r;
0285 
0286     r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
0287     if (r)
0288         return r;
0289 
0290     r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
0291     if (r)
0292         return r;
0293 
0294     r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
0295     if (r)
0296         return r;
0297 
0298     r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
0299     if (r)
0300         return r;
0301 
0302     r = zd_iowrite16a_locked(chip, ioreqs_3, ARRAY_SIZE(ioreqs_3));
0303     if (r)
0304         return r;
0305 
0306     r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
0307     if (r)
0308         return r;
0309 
0310     return zd1211b_al7230b_finalize(chip);
0311 }
0312 
0313 static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
0314 {
0315     int r;
0316     const u32 *rv = chan_rv[channel-1];
0317     struct zd_chip *chip = zd_rf_to_chip(rf);
0318 
0319     static const struct zd_ioreq16 ioreqs[] = {
0320         /* PLL_ON */
0321         { ZD_CR251, 0x3f },
0322         { ZD_CR203, 0x06 }, { ZD_CR240, 0x08 },
0323     };
0324 
0325     r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
0326     if (r)
0327         return r;
0328 
0329     /* PLL_OFF */
0330     r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
0331     if (r)
0332         return r;
0333 
0334     r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
0335     if (r)
0336         return r;
0337 
0338     r = zd_rfwrite_cr_locked(chip, 0x3c9000);
0339     if (r)
0340         return r;
0341     r = zd_rfwrite_cr_locked(chip, 0xf15d58);
0342     if (r)
0343         return r;
0344 
0345     r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
0346     if (r)
0347         return r;
0348 
0349     r = zd_rfwritev_cr_locked(chip, rv, 2);
0350     if (r)
0351         return r;
0352 
0353     r = zd_rfwrite_cr_locked(chip, 0x3c9000);
0354     if (r)
0355         return r;
0356 
0357     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0358 }
0359 
0360 static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
0361 {
0362     int r;
0363     const u32 *rv = chan_rv[channel-1];
0364     struct zd_chip *chip = zd_rf_to_chip(rf);
0365 
0366     r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
0367     if (r)
0368         return r;
0369     r = zd_iowrite16_locked(chip, 0xe4, ZD_CR9);
0370     if (r)
0371         return r;
0372 
0373     /* PLL_OFF */
0374     r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
0375     if (r)
0376         return r;
0377     r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
0378     if (r)
0379         return r;
0380 
0381     r = zd_rfwrite_cr_locked(chip, 0x3c9000);
0382     if (r)
0383         return r;
0384     r = zd_rfwrite_cr_locked(chip, 0xf15d58);
0385     if (r)
0386         return r;
0387 
0388     r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
0389     if (r)
0390         return r;
0391 
0392     r = zd_rfwritev_cr_locked(chip, rv, 2);
0393     if (r)
0394         return r;
0395 
0396     r = zd_rfwrite_cr_locked(chip, 0x3c9000);
0397     if (r)
0398         return r;
0399 
0400     r = zd_iowrite16_locked(chip, 0x7f, ZD_CR251);
0401     if (r)
0402         return r;
0403 
0404     return zd1211b_al7230b_finalize(chip);
0405 }
0406 
0407 static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
0408 {
0409     struct zd_chip *chip = zd_rf_to_chip(rf);
0410     static const struct zd_ioreq16 ioreqs[] = {
0411         { ZD_CR11,  0x00 },
0412         { ZD_CR251, 0x3f },
0413     };
0414 
0415     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0416 }
0417 
0418 static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
0419 {
0420     struct zd_chip *chip = zd_rf_to_chip(rf);
0421     static const struct zd_ioreq16 ioreqs[] = {
0422         { ZD_CR11,  0x00 },
0423         { ZD_CR251, 0x7f },
0424     };
0425 
0426     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0427 }
0428 
0429 static int al7230b_switch_radio_off(struct zd_rf *rf)
0430 {
0431     struct zd_chip *chip = zd_rf_to_chip(rf);
0432     static const struct zd_ioreq16 ioreqs[] = {
0433         { ZD_CR11,  0x04 },
0434         { ZD_CR251, 0x2f },
0435     };
0436 
0437     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0438 }
0439 
0440 /* ZD1211B+AL7230B 6m band edge patching differs slightly from other
0441  * configurations */
0442 static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
0443 {
0444     struct zd_chip *chip = zd_rf_to_chip(rf);
0445     struct zd_ioreq16 ioreqs[] = {
0446         { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 },
0447     };
0448 
0449     /* FIXME: Channel 11 is not the edge for all regulatory domains. */
0450     if (channel == 1) {
0451         ioreqs[0].value = 0x0e;
0452         ioreqs[1].value = 0x10;
0453     } else if (channel == 11) {
0454         ioreqs[0].value = 0x10;
0455         ioreqs[1].value = 0x10;
0456     }
0457 
0458     dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel);
0459     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0460 }
0461 
0462 int zd_rf_init_al7230b(struct zd_rf *rf)
0463 {
0464     struct zd_chip *chip = zd_rf_to_chip(rf);
0465 
0466     if (zd_chip_is_zd1211b(chip)) {
0467         rf->init_hw = zd1211b_al7230b_init_hw;
0468         rf->switch_radio_on = zd1211b_al7230b_switch_radio_on;
0469         rf->set_channel = zd1211b_al7230b_set_channel;
0470         rf->patch_6m_band_edge = zd1211b_al7230b_patch_6m;
0471     } else {
0472         rf->init_hw = zd1211_al7230b_init_hw;
0473         rf->switch_radio_on = zd1211_al7230b_switch_radio_on;
0474         rf->set_channel = zd1211_al7230b_set_channel;
0475         rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
0476         rf->patch_cck_gain = 1;
0477     }
0478 
0479     rf->switch_radio_off = al7230b_switch_radio_off;
0480 
0481     return 0;
0482 }
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