zydas/zd1211rw/zd_rf_al2230.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /* ZD1211 USB-WLAN driver for Linux
0003  *
0004  * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
0005  * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
0006  */
0007
0008 #include <linux/kernel.h>
0009
0010 #include "zd_rf.h"
0011 #include "zd_usb.h"
0012 #include "zd_chip.h"
0013
0014 #define IS_AL2230S(chip) ((chip)->al2230s_bit || (chip)->rf.type == AL2230S_RF)
0015
0016 static const u32 zd1211_al2230_table[][3] = {
0017     RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
0018     RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
0019     RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
0020     RF_CHANNEL( 4) = { 0x03e790, 0x0b3331, 0x00000d, },
0021     RF_CHANNEL( 5) = { 0x03f7a0, 0x033331, 0x00000d, },
0022     RF_CHANNEL( 6) = { 0x03f7a0, 0x0b3331, 0x00000d, },
0023     RF_CHANNEL( 7) = { 0x03e7a0, 0x033331, 0x00000d, },
0024     RF_CHANNEL( 8) = { 0x03e7a0, 0x0b3331, 0x00000d, },
0025     RF_CHANNEL( 9) = { 0x03f7b0, 0x033331, 0x00000d, },
0026     RF_CHANNEL(10) = { 0x03f7b0, 0x0b3331, 0x00000d, },
0027     RF_CHANNEL(11) = { 0x03e7b0, 0x033331, 0x00000d, },
0028     RF_CHANNEL(12) = { 0x03e7b0, 0x0b3331, 0x00000d, },
0029     RF_CHANNEL(13) = { 0x03f7c0, 0x033331, 0x00000d, },
0030     RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
0031 };
0032
0033 static const u32 zd1211b_al2230_table[][3] = {
0034     RF_CHANNEL( 1) = { 0x09efc0, 0x8cccc0, 0xb00000, },
0035     RF_CHANNEL( 2) = { 0x09efc0, 0x8cccd0, 0xb00000, },
0036     RF_CHANNEL( 3) = { 0x09e7c0, 0x8cccc0, 0xb00000, },
0037     RF_CHANNEL( 4) = { 0x09e7c0, 0x8cccd0, 0xb00000, },
0038     RF_CHANNEL( 5) = { 0x05efc0, 0x8cccc0, 0xb00000, },
0039     RF_CHANNEL( 6) = { 0x05efc0, 0x8cccd0, 0xb00000, },
0040     RF_CHANNEL( 7) = { 0x05e7c0, 0x8cccc0, 0xb00000, },
0041     RF_CHANNEL( 8) = { 0x05e7c0, 0x8cccd0, 0xb00000, },
0042     RF_CHANNEL( 9) = { 0x0defc0, 0x8cccc0, 0xb00000, },
0043     RF_CHANNEL(10) = { 0x0defc0, 0x8cccd0, 0xb00000, },
0044     RF_CHANNEL(11) = { 0x0de7c0, 0x8cccc0, 0xb00000, },
0045     RF_CHANNEL(12) = { 0x0de7c0, 0x8cccd0, 0xb00000, },
0046     RF_CHANNEL(13) = { 0x03efc0, 0x8cccc0, 0xb00000, },
0047     RF_CHANNEL(14) = { 0x03e7c0, 0x866660, 0xb00000, },
0048 };
0049
0050 static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
0051     { ZD_CR240, 0x57 }, { ZD_CR9,   0xe0 },
0052 };
0053
0054 static const struct zd_ioreq16 ioreqs_init_al2230s[] = {
0055     { ZD_CR47,   0x1e }, /* MARK_002 */
0056     { ZD_CR106,  0x22 },
0057     { ZD_CR107,  0x2a }, /* MARK_002 */
0058     { ZD_CR109,  0x13 }, /* MARK_002 */
0059     { ZD_CR118,  0xf8 }, /* MARK_002 */
0060     { ZD_CR119,  0x12 }, { ZD_CR122,  0xe0 },
0061     { ZD_CR128,  0x10 }, /* MARK_001 from 0xe->0x10 */
0062     { ZD_CR129,  0x0e }, /* MARK_001 from 0xd->0x0e */
0063     { ZD_CR130,  0x10 }, /* MARK_001 from 0xb->0x0d */
0064 };
0065
0066 static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
0067 {
0068     int r;
0069     static const struct zd_ioreq16 ioreqs[] = {
0070         { ZD_CR80,  0x30 }, { ZD_CR81,  0x30 }, { ZD_CR79,  0x58 },
0071         { ZD_CR12,  0xf0 }, { ZD_CR77,  0x1b }, { ZD_CR78,  0x58 },
0072         { ZD_CR203, 0x06 },
0073         { },
0074
0075         { ZD_CR240, 0x80 },
0076     };
0077
0078     r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0079     if (r)
0080         return r;
0081
0082     /* related to antenna selection? */
0083     if (chip->new_phy_layout) {
0084         r = zd_iowrite16_locked(chip, 0xe1, ZD_CR9);
0085         if (r)
0086             return r;
0087     }
0088
0089     return zd_iowrite16_locked(chip, 0x06, ZD_CR203);
0090 }
0091
0092 static int zd1211_al2230_init_hw(struct zd_rf *rf)
0093 {
0094     int r;
0095     struct zd_chip *chip = zd_rf_to_chip(rf);
0096
0097     static const struct zd_ioreq16 ioreqs_init[] = {
0098         { ZD_CR15,   0x20 }, { ZD_CR23,   0x40 }, { ZD_CR24,  0x20 },
0099         { ZD_CR26,   0x11 }, { ZD_CR28,   0x3e }, { ZD_CR29,  0x00 },
0100         { ZD_CR44,   0x33 }, { ZD_CR106,  0x2a }, { ZD_CR107, 0x1a },
0101         { ZD_CR109,  0x09 }, { ZD_CR110,  0x27 }, { ZD_CR111, 0x2b },
0102         { ZD_CR112,  0x2b }, { ZD_CR119,  0x0a }, { ZD_CR10,  0x89 },
0103         /* for newest (3rd cut) AL2300 */
0104         { ZD_CR17,   0x28 },
0105         { ZD_CR26,   0x93 }, { ZD_CR34,   0x30 },
0106         /* for newest (3rd cut) AL2300 */
0107         { ZD_CR35,   0x3e },
0108         { ZD_CR41,   0x24 }, { ZD_CR44,   0x32 },
0109         /* for newest (3rd cut) AL2300 */
0110         { ZD_CR46,   0x96 },
0111         { ZD_CR47,   0x1e }, { ZD_CR79,   0x58 }, { ZD_CR80,  0x30 },
0112         { ZD_CR81,   0x30 }, { ZD_CR87,   0x0a }, { ZD_CR89,  0x04 },
0113         { ZD_CR92,   0x0a }, { ZD_CR99,   0x28 }, { ZD_CR100, 0x00 },
0114         { ZD_CR101,  0x13 }, { ZD_CR102,  0x27 }, { ZD_CR106, 0x24 },
0115         { ZD_CR107,  0x2a }, { ZD_CR109,  0x09 }, { ZD_CR110, 0x13 },
0116         { ZD_CR111,  0x1f }, { ZD_CR112,  0x1f }, { ZD_CR113, 0x27 },
0117         { ZD_CR114,  0x27 },
0118         /* for newest (3rd cut) AL2300 */
0119         { ZD_CR115,  0x24 },
0120         { ZD_CR116,  0x24 }, { ZD_CR117,  0xf4 }, { ZD_CR118, 0xfc },
0121         { ZD_CR119,  0x10 }, { ZD_CR120,  0x4f }, { ZD_CR121, 0x77 },
0122         { ZD_CR122,  0xe0 }, { ZD_CR137,  0x88 }, { ZD_CR252, 0xff },
0123         { ZD_CR253,  0xff },
0124     };
0125
0126     static const struct zd_ioreq16 ioreqs_pll[] = {
0127         /* shdnb(PLL_ON)=0 */
0128         { ZD_CR251,  0x2f },
0129         /* shdnb(PLL_ON)=1 */
0130         { ZD_CR251,  0x3f },
0131         { ZD_CR138,  0x28 }, { ZD_CR203,  0x06 },
0132     };
0133
0134     static const u32 rv1[] = {
0135         /* Channel 1 */
0136         0x03f790,
0137         0x033331,
0138         0x00000d,
0139
0140         0x0b3331,
0141         0x03b812,
0142         0x00fff3,
0143     };
0144
0145     static const u32 rv2[] = {
0146         0x000da4,
0147         0x0f4dc5, /* fix freq shift, 0x04edc5 */
0148         0x0805b6,
0149         0x011687,
0150         0x000688,
0151         0x0403b9, /* external control TX power (ZD_CR31) */
0152         0x00dbba,
0153         0x00099b,
0154         0x0bdffc,
0155         0x00000d,
0156         0x00500f,
0157     };
0158
0159     static const u32 rv3[] = {
0160         0x00d00f,
0161         0x004c0f,
0162         0x00540f,
0163         0x00700f,
0164         0x00500f,
0165     };
0166
0167     r = zd_iowrite16a_locked(chip, ioreqs_init, ARRAY_SIZE(ioreqs_init));
0168     if (r)
0169         return r;
0170
0171     if (IS_AL2230S(chip)) {
0172         r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
0173             ARRAY_SIZE(ioreqs_init_al2230s));
0174         if (r)
0175             return r;
0176     }
0177
0178     r = zd_rfwritev_locked(chip, rv1, ARRAY_SIZE(rv1), RF_RV_BITS);
0179     if (r)
0180         return r;
0181
0182     /* improve band edge for AL2230S */
0183     if (IS_AL2230S(chip))
0184         r = zd_rfwrite_locked(chip, 0x000824, RF_RV_BITS);
0185     else
0186         r = zd_rfwrite_locked(chip, 0x0005a4, RF_RV_BITS);
0187     if (r)
0188         return r;
0189
0190     r = zd_rfwritev_locked(chip, rv2, ARRAY_SIZE(rv2), RF_RV_BITS);
0191     if (r)
0192         return r;
0193
0194     r = zd_iowrite16a_locked(chip, ioreqs_pll, ARRAY_SIZE(ioreqs_pll));
0195     if (r)
0196         return r;
0197
0198     r = zd_rfwritev_locked(chip, rv3, ARRAY_SIZE(rv3), RF_RV_BITS);
0199     if (r)
0200         return r;
0201
0202     return 0;
0203 }
0204
0205 static int zd1211b_al2230_init_hw(struct zd_rf *rf)
0206 {
0207     int r;
0208     struct zd_chip *chip = zd_rf_to_chip(rf);
0209
0210     static const struct zd_ioreq16 ioreqs1[] = {
0211         { ZD_CR10,  0x89 }, { ZD_CR15,  0x20 },
0212         { ZD_CR17,  0x2B }, /* for newest(3rd cut) AL2230 */
0213         { ZD_CR23,  0x40 }, { ZD_CR24,  0x20 }, { ZD_CR26,  0x93 },
0214         { ZD_CR28,  0x3e }, { ZD_CR29,  0x00 },
0215         { ZD_CR33,  0x28 }, /* 5621 */
0216         { ZD_CR34,  0x30 },
0217         { ZD_CR35,  0x3e }, /* for newest(3rd cut) AL2230 */
0218         { ZD_CR41,  0x24 }, { ZD_CR44,  0x32 },
0219         { ZD_CR46,  0x99 }, /* for newest(3rd cut) AL2230 */
0220         { ZD_CR47,  0x1e },
0221
0222         /* ZD1211B 05.06.10 */
0223         { ZD_CR48,  0x06 }, { ZD_CR49,  0xf9 }, { ZD_CR51,  0x01 },
0224         { ZD_CR52,  0x80 }, { ZD_CR53,  0x7e }, { ZD_CR65,  0x00 },
0225         { ZD_CR66,  0x00 }, { ZD_CR67,  0x00 }, { ZD_CR68,  0x00 },
0226         { ZD_CR69,  0x28 },
0227
0228         { ZD_CR79,  0x58 }, { ZD_CR80,  0x30 }, { ZD_CR81,  0x30 },
0229         { ZD_CR87,  0x0a }, { ZD_CR89,  0x04 },
0230         { ZD_CR91,  0x00 }, /* 5621 */
0231         { ZD_CR92,  0x0a },
0232         { ZD_CR98,  0x8d }, /* 4804,  for 1212 new algorithm */
0233         { ZD_CR99,  0x00 }, /* 5621 */
0234         { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
0235         { ZD_CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
0236         { ZD_CR107, 0x2a },
0237         { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
0238         { ZD_CR110, 0x1f }, /* 4804, for 1212 new algorithm */
0239         { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
0240         { ZD_CR114, 0x27 },
0241         { ZD_CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut)
0242                      * AL2230
0243                      */
0244         { ZD_CR116, 0x24 },
0245         { ZD_CR117, 0xfa }, /* for 1211b */
0246         { ZD_CR118, 0xfa }, /* for 1211b */
0247         { ZD_CR119, 0x10 },
0248         { ZD_CR120, 0x4f },
0249         { ZD_CR121, 0x6c }, /* for 1211b */
0250         { ZD_CR122, 0xfc }, /* E0->FC at 4902 */
0251         { ZD_CR123, 0x57 }, /* 5623 */
0252         { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
0253         { ZD_CR126, 0x6c }, /* 5614 */
0254         { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
0255         { ZD_CR137, 0x50 }, /* 5614 */
0256         { ZD_CR138, 0xa8 },
0257         { ZD_CR144, 0xac }, /* 5621 */
0258         { ZD_CR150, 0x0d }, { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
0259     };
0260
0261     static const u32 rv1[] = {
0262         0x8cccd0,
0263         0x481dc0,
0264         0xcfff00,
0265         0x25a000,
0266     };
0267
0268     static const u32 rv2[] = {
0269         /* To improve AL2230 yield, improve phase noise, 4713 */
0270         0x25a000,
0271         0xa3b2f0,
0272
0273         0x6da010, /* Reg6 update for MP versio */
0274         0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
0275         0x116000,
0276         0x9dc020, /* External control TX power (ZD_CR31) */
0277         0x5ddb00, /* RegA update for MP version */
0278         0xd99000, /* RegB update for MP version */
0279         0x3ffbd0, /* RegC update for MP version */
0280         0xb00000, /* RegD update for MP version */
0281
0282         /* improve phase noise and remove phase calibration,4713 */
0283         0xf01a00,
0284     };
0285
0286     static const struct zd_ioreq16 ioreqs2[] = {
0287         { ZD_CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
0288         { ZD_CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
0289     };
0290
0291     static const u32 rv3[] = {
0292         /* To improve AL2230 yield, 4713 */
0293         0xf01b00,
0294         0xf01e00,
0295         0xf01a00,
0296     };
0297
0298     static const struct zd_ioreq16 ioreqs3[] = {
0299         /* related to 6M band edge patching, happens unconditionally */
0300         { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
0301     };
0302
0303     r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
0304         ARRAY_SIZE(zd1211b_ioreqs_shared_1));
0305     if (r)
0306         return r;
0307     r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
0308     if (r)
0309         return r;
0310
0311     if (IS_AL2230S(chip)) {
0312         r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
0313             ARRAY_SIZE(ioreqs_init_al2230s));
0314         if (r)
0315             return r;
0316     }
0317
0318     r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
0319     if (r)
0320         return r;
0321     r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
0322     if (r)
0323         return r;
0324
0325     if (IS_AL2230S(chip))
0326         r = zd_rfwrite_locked(chip, 0x241000, RF_RV_BITS);
0327     else
0328         r = zd_rfwrite_locked(chip, 0x25a000, RF_RV_BITS);
0329     if (r)
0330         return r;
0331
0332     r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
0333     if (r)
0334         return r;
0335     r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
0336     if (r)
0337         return r;
0338     r = zd_rfwritev_cr_locked(chip, rv3, ARRAY_SIZE(rv3));
0339     if (r)
0340         return r;
0341     r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
0342     if (r)
0343         return r;
0344     return zd1211b_al2230_finalize_rf(chip);
0345 }
0346
0347 static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
0348 {
0349     int r;
0350     const u32 *rv = zd1211_al2230_table[channel-1];
0351     struct zd_chip *chip = zd_rf_to_chip(rf);
0352     static const struct zd_ioreq16 ioreqs[] = {
0353         { ZD_CR138, 0x28 },
0354         { ZD_CR203, 0x06 },
0355     };
0356
0357     r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
0358     if (r)
0359         return r;
0360     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0361 }
0362
0363 static int zd1211b_al2230_set_channel(struct zd_rf *rf, u8 channel)
0364 {
0365     int r;
0366     const u32 *rv = zd1211b_al2230_table[channel-1];
0367     struct zd_chip *chip = zd_rf_to_chip(rf);
0368
0369     r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
0370         ARRAY_SIZE(zd1211b_ioreqs_shared_1));
0371     if (r)
0372         return r;
0373
0374     r = zd_rfwritev_cr_locked(chip, rv, 3);
0375     if (r)
0376         return r;
0377
0378     return zd1211b_al2230_finalize_rf(chip);
0379 }
0380
0381 static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
0382 {
0383     struct zd_chip *chip = zd_rf_to_chip(rf);
0384     static const struct zd_ioreq16 ioreqs[] = {
0385         { ZD_CR11,  0x00 },
0386         { ZD_CR251, 0x3f },
0387     };
0388
0389     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0390 }
0391
0392 static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
0393 {
0394     struct zd_chip *chip = zd_rf_to_chip(rf);
0395     static const struct zd_ioreq16 ioreqs[] = {
0396         { ZD_CR11,  0x00 },
0397         { ZD_CR251, 0x7f },
0398     };
0399
0400     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0401 }
0402
0403 static int al2230_switch_radio_off(struct zd_rf *rf)
0404 {
0405     struct zd_chip *chip = zd_rf_to_chip(rf);
0406     static const struct zd_ioreq16 ioreqs[] = {
0407         { ZD_CR11,  0x04 },
0408         { ZD_CR251, 0x2f },
0409     };
0410
0411     return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
0412 }
0413
0414 int zd_rf_init_al2230(struct zd_rf *rf)
0415 {
0416     struct zd_chip *chip = zd_rf_to_chip(rf);
0417
0418     rf->switch_radio_off = al2230_switch_radio_off;
0419     if (zd_chip_is_zd1211b(chip)) {
0420         rf->init_hw = zd1211b_al2230_init_hw;
0421         rf->set_channel = zd1211b_al2230_set_channel;
0422         rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
0423     } else {
0424         rf->init_hw = zd1211_al2230_init_hw;
0425         rf->set_channel = zd1211_al2230_set_channel;
0426         rf->switch_radio_on = zd1211_al2230_switch_radio_on;
0427     }
0428     rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
0429     rf->patch_cck_gain = 1;
0430     return 0;
0431 }