net/wireless/wl3501.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __WL3501_H__
0003 #define __WL3501_H__
0004
0005 #include <linux/spinlock.h>
0006 #include <linux/ieee80211.h>
0007
0008 /* define for WLA 2.0 */
0009 #define WL3501_BLKSZ 256
0010 /*
0011  * ID for input Signals of DRIVER block
0012  * bit[7-5] is block ID: 000
0013  * bit[4-0] is signal ID
0014 */
0015 enum wl3501_signals {
0016     WL3501_SIG_ALARM,
0017     WL3501_SIG_MD_CONFIRM,
0018     WL3501_SIG_MD_IND,
0019     WL3501_SIG_ASSOC_CONFIRM,
0020     WL3501_SIG_ASSOC_IND,
0021     WL3501_SIG_AUTH_CONFIRM,
0022     WL3501_SIG_AUTH_IND,
0023     WL3501_SIG_DEAUTH_CONFIRM,
0024     WL3501_SIG_DEAUTH_IND,
0025     WL3501_SIG_DISASSOC_CONFIRM,
0026     WL3501_SIG_DISASSOC_IND,
0027     WL3501_SIG_GET_CONFIRM,
0028     WL3501_SIG_JOIN_CONFIRM,
0029     WL3501_SIG_PWR_MGMT_CONFIRM,
0030     WL3501_SIG_REASSOC_CONFIRM,
0031     WL3501_SIG_REASSOC_IND,
0032     WL3501_SIG_SCAN_CONFIRM,
0033     WL3501_SIG_SET_CONFIRM,
0034     WL3501_SIG_START_CONFIRM,
0035     WL3501_SIG_RESYNC_CONFIRM,
0036     WL3501_SIG_SITE_CONFIRM,
0037     WL3501_SIG_SAVE_CONFIRM,
0038     WL3501_SIG_RFTEST_CONFIRM,
0039 /*
0040  * ID for input Signals of MLME block
0041  * bit[7-5] is block ID: 010
0042  * bit[4-0] is signal ID
0043  */
0044     WL3501_SIG_ASSOC_REQ = 0x20,
0045     WL3501_SIG_AUTH_REQ,
0046     WL3501_SIG_DEAUTH_REQ,
0047     WL3501_SIG_DISASSOC_REQ,
0048     WL3501_SIG_GET_REQ,
0049     WL3501_SIG_JOIN_REQ,
0050     WL3501_SIG_PWR_MGMT_REQ,
0051     WL3501_SIG_REASSOC_REQ,
0052     WL3501_SIG_SCAN_REQ,
0053     WL3501_SIG_SET_REQ,
0054     WL3501_SIG_START_REQ,
0055     WL3501_SIG_MD_REQ,
0056     WL3501_SIG_RESYNC_REQ,
0057     WL3501_SIG_SITE_REQ,
0058     WL3501_SIG_SAVE_REQ,
0059     WL3501_SIG_RF_TEST_REQ,
0060     WL3501_SIG_MM_CONFIRM = 0x60,
0061     WL3501_SIG_MM_IND,
0062 };
0063
0064 enum wl3501_mib_attribs {
0065     WL3501_MIB_ATTR_STATION_ID,
0066     WL3501_MIB_ATTR_AUTH_ALGORITHMS,
0067     WL3501_MIB_ATTR_AUTH_TYPE,
0068     WL3501_MIB_ATTR_MEDIUM_OCCUPANCY_LIMIT,
0069     WL3501_MIB_ATTR_CF_POLLABLE,
0070     WL3501_MIB_ATTR_CFP_PERIOD,
0071     WL3501_MIB_ATTR_CFPMAX_DURATION,
0072     WL3501_MIB_ATTR_AUTH_RESP_TMOUT,
0073     WL3501_MIB_ATTR_RX_DTIMS,
0074     WL3501_MIB_ATTR_PRIV_OPT_IMPLEMENTED,
0075     WL3501_MIB_ATTR_PRIV_INVOKED,
0076     WL3501_MIB_ATTR_WEP_DEFAULT_KEYS,
0077     WL3501_MIB_ATTR_WEP_DEFAULT_KEY_ID,
0078     WL3501_MIB_ATTR_WEP_KEY_MAPPINGS,
0079     WL3501_MIB_ATTR_WEP_KEY_MAPPINGS_LEN,
0080     WL3501_MIB_ATTR_EXCLUDE_UNENCRYPTED,
0081     WL3501_MIB_ATTR_WEP_ICV_ERROR_COUNT,
0082     WL3501_MIB_ATTR_WEP_UNDECRYPTABLE_COUNT,
0083     WL3501_MIB_ATTR_WEP_EXCLUDED_COUNT,
0084     WL3501_MIB_ATTR_MAC_ADDR,
0085     WL3501_MIB_ATTR_GROUP_ADDRS,
0086     WL3501_MIB_ATTR_RTS_THRESHOLD,
0087     WL3501_MIB_ATTR_SHORT_RETRY_LIMIT,
0088     WL3501_MIB_ATTR_LONG_RETRY_LIMIT,
0089     WL3501_MIB_ATTR_FRAG_THRESHOLD,
0090     WL3501_MIB_ATTR_MAX_TX_MSDU_LIFETIME,
0091     WL3501_MIB_ATTR_MAX_RX_LIFETIME,
0092     WL3501_MIB_ATTR_MANUFACTURER_ID,
0093     WL3501_MIB_ATTR_PRODUCT_ID,
0094     WL3501_MIB_ATTR_TX_FRAG_COUNT,
0095     WL3501_MIB_ATTR_MULTICAST_TX_FRAME_COUNT,
0096     WL3501_MIB_ATTR_FAILED_COUNT,
0097     WL3501_MIB_ATTR_RX_FRAG_COUNT,
0098     WL3501_MIB_ATTR_MULTICAST_RX_COUNT,
0099     WL3501_MIB_ATTR_FCS_ERROR_COUNT,
0100     WL3501_MIB_ATTR_RETRY_COUNT,
0101     WL3501_MIB_ATTR_MULTIPLE_RETRY_COUNT,
0102     WL3501_MIB_ATTR_RTS_SUCCESS_COUNT,
0103     WL3501_MIB_ATTR_RTS_FAILURE_COUNT,
0104     WL3501_MIB_ATTR_ACK_FAILURE_COUNT,
0105     WL3501_MIB_ATTR_FRAME_DUPLICATE_COUNT,
0106     WL3501_MIB_ATTR_PHY_TYPE,
0107     WL3501_MIB_ATTR_REG_DOMAINS_SUPPORT,
0108     WL3501_MIB_ATTR_CURRENT_REG_DOMAIN,
0109     WL3501_MIB_ATTR_SLOT_TIME,
0110     WL3501_MIB_ATTR_CCA_TIME,
0111     WL3501_MIB_ATTR_RX_TX_TURNAROUND_TIME,
0112     WL3501_MIB_ATTR_TX_PLCP_DELAY,
0113     WL3501_MIB_ATTR_RX_TX_SWITCH_TIME,
0114     WL3501_MIB_ATTR_TX_RAMP_ON_TIME,
0115     WL3501_MIB_ATTR_TX_RF_DELAY,
0116     WL3501_MIB_ATTR_SIFS_TIME,
0117     WL3501_MIB_ATTR_RX_RF_DELAY,
0118     WL3501_MIB_ATTR_RX_PLCP_DELAY,
0119     WL3501_MIB_ATTR_MAC_PROCESSING_DELAY,
0120     WL3501_MIB_ATTR_TX_RAMP_OFF_TIME,
0121     WL3501_MIB_ATTR_PREAMBLE_LEN,
0122     WL3501_MIB_ATTR_PLCP_HEADER_LEN,
0123     WL3501_MIB_ATTR_MPDU_DURATION_FACTOR,
0124     WL3501_MIB_ATTR_AIR_PROPAGATION_TIME,
0125     WL3501_MIB_ATTR_TEMP_TYPE,
0126     WL3501_MIB_ATTR_CW_MIN,
0127     WL3501_MIB_ATTR_CW_MAX,
0128     WL3501_MIB_ATTR_SUPPORT_DATA_RATES_TX,
0129     WL3501_MIB_ATTR_SUPPORT_DATA_RATES_RX,
0130     WL3501_MIB_ATTR_MPDU_MAX_LEN,
0131     WL3501_MIB_ATTR_SUPPORT_TX_ANTENNAS,
0132     WL3501_MIB_ATTR_CURRENT_TX_ANTENNA,
0133     WL3501_MIB_ATTR_SUPPORT_RX_ANTENNAS,
0134     WL3501_MIB_ATTR_DIVERSITY_SUPPORT,
0135     WL3501_MIB_ATTR_DIVERSITY_SELECTION_RS,
0136     WL3501_MIB_ATTR_NR_SUPPORTED_PWR_LEVELS,
0137     WL3501_MIB_ATTR_TX_PWR_LEVEL1,
0138     WL3501_MIB_ATTR_TX_PWR_LEVEL2,
0139     WL3501_MIB_ATTR_TX_PWR_LEVEL3,
0140     WL3501_MIB_ATTR_TX_PWR_LEVEL4,
0141     WL3501_MIB_ATTR_TX_PWR_LEVEL5,
0142     WL3501_MIB_ATTR_TX_PWR_LEVEL6,
0143     WL3501_MIB_ATTR_TX_PWR_LEVEL7,
0144     WL3501_MIB_ATTR_TX_PWR_LEVEL8,
0145     WL3501_MIB_ATTR_CURRENT_TX_PWR_LEVEL,
0146     WL3501_MIB_ATTR_CURRENT_CHAN,
0147     WL3501_MIB_ATTR_CCA_MODE_SUPPORTED,
0148     WL3501_MIB_ATTR_CURRENT_CCA_MODE,
0149     WL3501_MIB_ATTR_ED_THRESHOLD,
0150     WL3501_MIB_ATTR_SINTHESIZER_LOCKED,
0151     WL3501_MIB_ATTR_CURRENT_PWR_STATE,
0152     WL3501_MIB_ATTR_DOZE_TURNON_TIME,
0153     WL3501_MIB_ATTR_RCR33,
0154     WL3501_MIB_ATTR_DEFAULT_CHAN,
0155     WL3501_MIB_ATTR_SSID,
0156     WL3501_MIB_ATTR_PWR_MGMT_ENABLE,
0157     WL3501_MIB_ATTR_NET_CAPABILITY,
0158     WL3501_MIB_ATTR_ROUTING,
0159 };
0160
0161 enum wl3501_net_type {
0162     WL3501_NET_TYPE_INFRA,
0163     WL3501_NET_TYPE_ADHOC,
0164     WL3501_NET_TYPE_ANY_BSS,
0165 };
0166
0167 enum wl3501_scan_type {
0168     WL3501_SCAN_TYPE_ACTIVE,
0169     WL3501_SCAN_TYPE_PASSIVE,
0170 };
0171
0172 enum wl3501_tx_result {
0173     WL3501_TX_RESULT_SUCCESS,
0174     WL3501_TX_RESULT_NO_BSS,
0175     WL3501_TX_RESULT_RETRY_LIMIT,
0176 };
0177
0178 enum wl3501_sys_type {
0179     WL3501_SYS_TYPE_OPEN,
0180     WL3501_SYS_TYPE_SHARE_KEY,
0181 };
0182
0183 enum wl3501_status {
0184     WL3501_STATUS_SUCCESS,
0185     WL3501_STATUS_INVALID,
0186     WL3501_STATUS_TIMEOUT,
0187     WL3501_STATUS_REFUSED,
0188     WL3501_STATUS_MANY_REQ,
0189     WL3501_STATUS_ALREADY_BSS,
0190 };
0191
0192 #define WL3501_MGMT_CAPABILITY_ESS      0x0001  /* see 802.11 p.58 */
0193 #define WL3501_MGMT_CAPABILITY_IBSS     0x0002  /*      - " -      */
0194 #define WL3501_MGMT_CAPABILITY_CF_POLLABLE  0x0004  /*      - " -      */
0195 #define WL3501_MGMT_CAPABILITY_CF_POLL_REQUEST  0x0008  /*      - " -      */
0196 #define WL3501_MGMT_CAPABILITY_PRIVACY      0x0010  /*      - " -      */
0197
0198 #define IW_REG_DOMAIN_FCC   0x10    /* Channel 1 to 11  USA    */
0199 #define IW_REG_DOMAIN_DOC   0x20    /* Channel 1 to 11  Canada */
0200 #define IW_REG_DOMAIN_ETSI  0x30    /* Channel 1 to 13  Europe */
0201 #define IW_REG_DOMAIN_SPAIN 0x31    /* Channel 10 to 11 Spain  */
0202 #define IW_REG_DOMAIN_FRANCE    0x32    /* Channel 10 to 13 France */
0203 #define IW_REG_DOMAIN_MKK   0x40    /* Channel 14       Japan  */
0204 #define IW_REG_DOMAIN_MKK1  0x41    /* Channel 1-14     Japan  */
0205 #define IW_REG_DOMAIN_ISRAEL    0x50    /* Channel 3 - 9    Israel */
0206
0207 #define IW_MGMT_RATE_LABEL_MANDATORY 128 /* MSB */
0208
0209 enum iw_mgmt_rate_labels {
0210     IW_MGMT_RATE_LABEL_1MBIT   = 2,
0211     IW_MGMT_RATE_LABEL_2MBIT   = 4,
0212     IW_MGMT_RATE_LABEL_5_5MBIT = 11,
0213     IW_MGMT_RATE_LABEL_11MBIT  = 22,
0214 };
0215
0216 enum iw_mgmt_info_element_ids {
0217     IW_MGMT_INFO_ELEMENT_SSID,        /* Service Set Identity */
0218     IW_MGMT_INFO_ELEMENT_SUPPORTED_RATES,
0219     IW_MGMT_INFO_ELEMENT_FH_PARAMETER_SET,
0220     IW_MGMT_INFO_ELEMENT_DS_PARAMETER_SET,
0221     IW_MGMT_INFO_ELEMENT_CS_PARAMETER_SET,
0222     IW_MGMT_INFO_ELEMENT_CS_TIM,          /* Traffic Information Map */
0223     IW_MGMT_INFO_ELEMENT_IBSS_PARAMETER_SET,
0224     /* 7-15: Reserved, unused */
0225     IW_MGMT_INFO_ELEMENT_CHALLENGE_TEXT = 16,
0226     /* 17-31 Reserved for challenge text extension */
0227     /* 32-255 Reserved, unused */
0228 };
0229
0230 struct iw_mgmt_info_element {
0231     u8 id; /* one of enum iw_mgmt_info_element_ids,
0232           but sizeof(enum) > sizeof(u8) :-( */
0233     u8 len;
0234     u8 data[];
0235 } __packed;
0236
0237 struct iw_mgmt_essid_pset {
0238     struct iw_mgmt_info_element el;
0239     u8              essid[IW_ESSID_MAX_SIZE];
0240 } __packed;
0241
0242 /*
0243  * According to 802.11 Wireless Networks, the definitive guide - O'Reilly
0244  * Pg 75
0245  */
0246 #define IW_DATA_RATE_MAX_LABELS 8
0247
0248 struct iw_mgmt_data_rset {
0249     struct iw_mgmt_info_element el;
0250     u8              data_rate_labels[IW_DATA_RATE_MAX_LABELS];
0251 } __packed;
0252
0253 struct iw_mgmt_ds_pset {
0254     struct iw_mgmt_info_element el;
0255     u8              chan;
0256 } __packed;
0257
0258 struct iw_mgmt_cf_pset {
0259     struct iw_mgmt_info_element el;
0260     u8              cfp_count;
0261     u8              cfp_period;
0262     u16                 cfp_max_duration;
0263     u16                 cfp_dur_remaining;
0264 } __packed;
0265
0266 struct iw_mgmt_ibss_pset {
0267     struct iw_mgmt_info_element el;
0268     u16                 atim_window;
0269 } __packed;
0270
0271 struct wl3501_tx_hdr {
0272     u16 tx_cnt;
0273     u8  sync[16];
0274     u16 sfd;
0275     u8  signal;
0276     u8  service;
0277     u16 len;
0278     u16 crc16;
0279     u16 frame_ctrl;
0280     u16 duration_id;
0281     u8  addr1[ETH_ALEN];
0282     u8  addr2[ETH_ALEN];
0283     u8  addr3[ETH_ALEN];
0284     u16 seq_ctrl;
0285     u8  addr4[ETH_ALEN];
0286 };
0287
0288 struct wl3501_rx_hdr {
0289     u16 rx_next_blk;
0290     u16 rc_next_frame_blk;
0291     u8  rx_blk_ctrl;
0292     u8  rx_next_frame;
0293     u8  rx_next_frame1;
0294     u8  rssi;
0295     char    time[8];
0296     u8  signal;
0297     u8  service;
0298     u16 len;
0299     u16 crc16;
0300     u16 frame_ctrl;
0301     u16 duration;
0302     u8  addr1[ETH_ALEN];
0303     u8  addr2[ETH_ALEN];
0304     u8  addr3[ETH_ALEN];
0305     u16 seq;
0306     u8  addr4[ETH_ALEN];
0307 };
0308
0309 struct wl3501_start_req {
0310     u16             next_blk;
0311     u8              sig_id;
0312     u8              bss_type;
0313     u16             beacon_period;
0314     u16             dtim_period;
0315     u16             probe_delay;
0316     u16             cap_info;
0317     struct iw_mgmt_essid_pset   ssid;
0318     struct iw_mgmt_data_rset    bss_basic_rset;
0319     struct iw_mgmt_data_rset    operational_rset;
0320     struct iw_mgmt_cf_pset      cf_pset;
0321     struct iw_mgmt_ds_pset      ds_pset;
0322     struct iw_mgmt_ibss_pset    ibss_pset;
0323 };
0324
0325 struct wl3501_assoc_req {
0326     u16 next_blk;
0327     u8  sig_id;
0328     u8  reserved;
0329     u16 timeout;
0330     u16 cap_info;
0331     u16 listen_interval;
0332     u8  mac_addr[ETH_ALEN];
0333 };
0334
0335 struct wl3501_assoc_confirm {
0336     u16 next_blk;
0337     u8  sig_id;
0338     u8  reserved;
0339     u16 status;
0340 };
0341
0342 struct wl3501_assoc_ind {
0343     u16 next_blk;
0344     u8  sig_id;
0345     u8  mac_addr[ETH_ALEN];
0346 };
0347
0348 struct wl3501_auth_req {
0349     u16 next_blk;
0350     u8  sig_id;
0351     u8  reserved;
0352     u16 type;
0353     u16 timeout;
0354     u8  mac_addr[ETH_ALEN];
0355 };
0356
0357 struct wl3501_auth_confirm {
0358     u16 next_blk;
0359     u8  sig_id;
0360     u8  reserved;
0361     u16 type;
0362     u16 status;
0363     u8  mac_addr[ETH_ALEN];
0364 };
0365
0366 struct wl3501_get_req {
0367     u16 next_blk;
0368     u8  sig_id;
0369     u8  reserved;
0370     u16 mib_attrib;
0371 };
0372
0373 struct wl3501_get_confirm {
0374     u16 next_blk;
0375     u8  sig_id;
0376     u8  reserved;
0377     u16 mib_status;
0378     u16 mib_attrib;
0379     u8  mib_value[100];
0380 };
0381
0382 struct wl3501_req {
0383     u16             beacon_period;
0384     u16             dtim_period;
0385     u16             cap_info;
0386     u8              bss_type;
0387     u8              bssid[ETH_ALEN];
0388     struct iw_mgmt_essid_pset   ssid;
0389     struct iw_mgmt_ds_pset      ds_pset;
0390     struct iw_mgmt_cf_pset      cf_pset;
0391     struct iw_mgmt_ibss_pset    ibss_pset;
0392     struct iw_mgmt_data_rset    bss_basic_rset;
0393 };
0394
0395 struct wl3501_join_req {
0396     u16             next_blk;
0397     u8              sig_id;
0398     u8              reserved;
0399     struct iw_mgmt_data_rset    operational_rset;
0400     u16             reserved2;
0401     u16             timeout;
0402     u16             probe_delay;
0403     u8              timestamp[8];
0404     u8              local_time[8];
0405     struct wl3501_req       req;
0406 };
0407
0408 struct wl3501_join_confirm {
0409     u16 next_blk;
0410     u8  sig_id;
0411     u8  reserved;
0412     u16 status;
0413 };
0414
0415 struct wl3501_pwr_mgmt_req {
0416     u16 next_blk;
0417     u8  sig_id;
0418     u8  pwr_save;
0419     u8  wake_up;
0420     u8  receive_dtims;
0421 };
0422
0423 struct wl3501_pwr_mgmt_confirm {
0424     u16 next_blk;
0425     u8  sig_id;
0426     u8  reserved;
0427     u16 status;
0428 };
0429
0430 struct wl3501_scan_req {
0431     u16             next_blk;
0432     u8              sig_id;
0433     u8              bss_type;
0434     u16             probe_delay;
0435     u16             min_chan_time;
0436     u16             max_chan_time;
0437     u8              chan_list[14];
0438     u8              bssid[ETH_ALEN];
0439     struct iw_mgmt_essid_pset   ssid;
0440     enum wl3501_scan_type       scan_type;
0441 };
0442
0443 struct wl3501_scan_confirm {
0444     u16             next_blk;
0445     u8              sig_id;
0446     u8              reserved;
0447     u16             status;
0448     char                timestamp[8];
0449     char                localtime[8];
0450     struct wl3501_req       req;
0451     u8              rssi;
0452 };
0453
0454 struct wl3501_start_confirm {
0455     u16 next_blk;
0456     u8  sig_id;
0457     u8  reserved;
0458     u16 status;
0459 };
0460
0461 struct wl3501_md_req {
0462     u16 next_blk;
0463     u8  sig_id;
0464     u8  routing;
0465     u16 data;
0466     u16 size;
0467     u8  pri;
0468     u8  service_class;
0469     struct {
0470         u8  daddr[ETH_ALEN];
0471         u8  saddr[ETH_ALEN];
0472     } addr;
0473 };
0474
0475 struct wl3501_md_ind {
0476     u16 next_blk;
0477     u8  sig_id;
0478     u8  routing;
0479     u16 data;
0480     u16 size;
0481     u8  reception;
0482     u8  pri;
0483     u8  service_class;
0484     struct {
0485         u8  daddr[ETH_ALEN];
0486         u8  saddr[ETH_ALEN];
0487     } addr;
0488 };
0489
0490 struct wl3501_md_confirm {
0491     u16 next_blk;
0492     u8  sig_id;
0493     u8  reserved;
0494     u16 data;
0495     u8  status;
0496     u8  pri;
0497     u8  service_class;
0498 };
0499
0500 struct wl3501_resync_req {
0501     u16 next_blk;
0502     u8  sig_id;
0503 };
0504
0505 /* Definitions for supporting clone adapters. */
0506 /* System Interface Registers (SIR space) */
0507 #define WL3501_NIC_GCR ((u8)0x00)   /* SIR0 - General Conf Register */
0508 #define WL3501_NIC_BSS ((u8)0x01)   /* SIR1 - Bank Switching Select Reg */
0509 #define WL3501_NIC_LMAL ((u8)0x02)  /* SIR2 - Local Mem addr Reg [7:0] */
0510 #define WL3501_NIC_LMAH ((u8)0x03)  /* SIR3 - Local Mem addr Reg [14:8] */
0511 #define WL3501_NIC_IODPA ((u8)0x04) /* SIR4 - I/O Data Port A */
0512 #define WL3501_NIC_IODPB ((u8)0x05) /* SIR5 - I/O Data Port B */
0513 #define WL3501_NIC_IODPC ((u8)0x06) /* SIR6 - I/O Data Port C */
0514 #define WL3501_NIC_IODPD ((u8)0x07) /* SIR7 - I/O Data Port D */
0515
0516 /* Bits in GCR */
0517 #define WL3501_GCR_SWRESET ((u8)0x80)
0518 #define WL3501_GCR_CORESET ((u8)0x40)
0519 #define WL3501_GCR_DISPWDN ((u8)0x20)
0520 #define WL3501_GCR_ECWAIT  ((u8)0x10)
0521 #define WL3501_GCR_ECINT   ((u8)0x08)
0522 #define WL3501_GCR_INT2EC  ((u8)0x04)
0523 #define WL3501_GCR_ENECINT ((u8)0x02)
0524 #define WL3501_GCR_DAM     ((u8)0x01)
0525
0526 /* Bits in BSS (Bank Switching Select Register) */
0527 #define WL3501_BSS_FPAGE0 ((u8)0x20)    /* Flash memory page0 */
0528 #define WL3501_BSS_FPAGE1 ((u8)0x28)
0529 #define WL3501_BSS_FPAGE2 ((u8)0x30)
0530 #define WL3501_BSS_FPAGE3 ((u8)0x38)
0531 #define WL3501_BSS_SPAGE0 ((u8)0x00)    /* SRAM page0 */
0532 #define WL3501_BSS_SPAGE1 ((u8)0x08)
0533 #define WL3501_BSS_SPAGE2 ((u8)0x10)
0534 #define WL3501_BSS_SPAGE3 ((u8)0x18)
0535
0536 /* Define Driver Interface */
0537 /* Refer IEEE 802.11 */
0538 /* Tx packet header, include PLCP and MPDU */
0539 /* Tx PLCP Header */
0540 struct wl3501_80211_tx_plcp_hdr {
0541     u8  sync[16];
0542     u16 sfd;
0543     u8  signal;
0544     u8  service;
0545     u16 len;
0546     u16 crc16;
0547 } __packed;
0548
0549 struct wl3501_80211_tx_hdr {
0550     struct wl3501_80211_tx_plcp_hdr pclp_hdr;
0551     struct ieee80211_hdr        mac_hdr;
0552 } __packed __aligned(2);
0553
0554 /*
0555    Reserve the beginning Tx space for descriptor use.
0556
0557    TxBlockOffset -->    *----*----*----*----* \
0558     (TxFreeDesc)    |  0 |  1 |  2 |  3 |  \
0559             |  4 |  5 |  6 |  7 |   |
0560             |  8 |  9 | 10 | 11 |   TX_DESC * 20
0561             | 12 | 13 | 14 | 15 |   |
0562             | 16 | 17 | 18 | 19 |  /
0563    TxBufferBegin -->    *----*----*----*----* /
0564    (TxBufferHead)   |           |
0565    (TxBufferTail)   |           |
0566             |    Send Buffer    |
0567             |           |
0568             |           |
0569             *-------------------*
0570    TxBufferEnd    -------------------------/
0571
0572 */
0573
0574 struct wl3501_card {
0575     int             base_addr;
0576     u8              mac_addr[ETH_ALEN];
0577     spinlock_t          lock;
0578     wait_queue_head_t       wait;
0579     struct wl3501_get_confirm   sig_get_confirm;
0580     struct wl3501_pwr_mgmt_confirm  sig_pwr_mgmt_confirm;
0581     u16             tx_buffer_size;
0582     u16             tx_buffer_head;
0583     u16             tx_buffer_tail;
0584     u16             tx_buffer_cnt;
0585     u16             esbq_req_start;
0586     u16             esbq_req_end;
0587     u16             esbq_req_head;
0588     u16             esbq_req_tail;
0589     u16             esbq_confirm_start;
0590     u16             esbq_confirm_end;
0591     u16             esbq_confirm;
0592     struct iw_mgmt_essid_pset   essid;
0593     struct iw_mgmt_essid_pset   keep_essid;
0594     u8              bssid[ETH_ALEN];
0595     int             net_type;
0596     char                nick[32];
0597     char                card_name[32];
0598     char                firmware_date[32];
0599     u8              chan;
0600     u8              cap_info;
0601     u16             start_seg;
0602     u16             bss_cnt;
0603     u16             join_sta_bss;
0604     u8              rssi;
0605     u8              adhoc_times;
0606     u8              reg_domain;
0607     u8              version[2];
0608     struct wl3501_scan_confirm  bss_set[20];
0609
0610     struct iw_statistics        wstats;
0611     struct iw_spy_data      spy_data;
0612     struct iw_public_data       wireless_data;
0613     struct pcmcia_device        *p_dev;
0614 };
0615 #endif