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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * This file is part of wlcore
0004  *
0005  * Copyright (C) 2011 Texas Instruments Inc.
0006  */
0007 
0008 #ifndef __WLCORE_H__
0009 #define __WLCORE_H__
0010 
0011 #include <linux/platform_device.h>
0012 
0013 #include "wlcore_i.h"
0014 #include "event.h"
0015 #include "boot.h"
0016 
0017 /* The maximum number of Tx descriptors in all chip families */
0018 #define WLCORE_MAX_TX_DESCRIPTORS 32
0019 
0020 /*
0021  * We always allocate this number of mac addresses. If we don't
0022  * have enough allocated addresses, the LAA bit is used
0023  */
0024 #define WLCORE_NUM_MAC_ADDRESSES 3
0025 
0026 /* wl12xx/wl18xx maximum transmission power (in dBm) */
0027 #define WLCORE_MAX_TXPWR        25
0028 
0029 /* Texas Instruments pre assigned OUI */
0030 #define WLCORE_TI_OUI_ADDRESS 0x080028
0031 
0032 /* forward declaration */
0033 struct wl1271_tx_hw_descr;
0034 enum wl_rx_buf_align;
0035 struct wl1271_rx_descriptor;
0036 
0037 struct wlcore_ops {
0038     int (*setup)(struct wl1271 *wl);
0039     int (*identify_chip)(struct wl1271 *wl);
0040     int (*identify_fw)(struct wl1271 *wl);
0041     int (*boot)(struct wl1271 *wl);
0042     int (*plt_init)(struct wl1271 *wl);
0043     int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr,
0044                void *buf, size_t len);
0045     int (*ack_event)(struct wl1271 *wl);
0046     int (*wait_for_event)(struct wl1271 *wl, enum wlcore_wait_event event,
0047                   bool *timeout);
0048     int (*process_mailbox_events)(struct wl1271 *wl);
0049     u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);
0050     void (*set_tx_desc_blocks)(struct wl1271 *wl,
0051                    struct wl1271_tx_hw_descr *desc,
0052                    u32 blks, u32 spare_blks);
0053     void (*set_tx_desc_data_len)(struct wl1271 *wl,
0054                      struct wl1271_tx_hw_descr *desc,
0055                      struct sk_buff *skb);
0056     enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,
0057                          u32 rx_desc);
0058     int (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len);
0059     u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data,
0060                  u32 data_len);
0061     int (*tx_delayed_compl)(struct wl1271 *wl);
0062     void (*tx_immediate_compl)(struct wl1271 *wl);
0063     int (*hw_init)(struct wl1271 *wl);
0064     int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
0065     void (*convert_fw_status)(struct wl1271 *wl, void *raw_fw_status,
0066                   struct wl_fw_status *fw_status);
0067     u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl,
0068                     struct wl12xx_vif *wlvif);
0069     int (*get_pg_ver)(struct wl1271 *wl, s8 *ver);
0070     int (*get_mac)(struct wl1271 *wl);
0071     void (*set_tx_desc_csum)(struct wl1271 *wl,
0072                  struct wl1271_tx_hw_descr *desc,
0073                  struct sk_buff *skb);
0074     void (*set_rx_csum)(struct wl1271 *wl,
0075                 struct wl1271_rx_descriptor *desc,
0076                 struct sk_buff *skb);
0077     u32 (*ap_get_mimo_wide_rate_mask)(struct wl1271 *wl,
0078                       struct wl12xx_vif *wlvif);
0079     int (*debugfs_init)(struct wl1271 *wl, struct dentry *rootdir);
0080     int (*handle_static_data)(struct wl1271 *wl,
0081                   struct wl1271_static_data *static_data);
0082     int (*scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
0083               struct cfg80211_scan_request *req);
0084     int (*scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
0085     int (*sched_scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
0086                 struct cfg80211_sched_scan_request *req,
0087                 struct ieee80211_scan_ies *ies);
0088     void (*sched_scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
0089     int (*get_spare_blocks)(struct wl1271 *wl, bool is_gem);
0090     int (*set_key)(struct wl1271 *wl, enum set_key_cmd cmd,
0091                struct ieee80211_vif *vif,
0092                struct ieee80211_sta *sta,
0093                struct ieee80211_key_conf *key_conf);
0094     int (*channel_switch)(struct wl1271 *wl,
0095                   struct wl12xx_vif *wlvif,
0096                   struct ieee80211_channel_switch *ch_switch);
0097     u32 (*pre_pkt_send)(struct wl1271 *wl, u32 buf_offset, u32 last_len);
0098     void (*sta_rc_update)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
0099     int (*set_peer_cap)(struct wl1271 *wl,
0100                 struct ieee80211_sta_ht_cap *ht_cap,
0101                 bool allow_ht_operation,
0102                 u32 rate_set, u8 hlid);
0103     u32 (*convert_hwaddr)(struct wl1271 *wl, u32 hwaddr);
0104     bool (*lnk_high_prio)(struct wl1271 *wl, u8 hlid,
0105                   struct wl1271_link *lnk);
0106     bool (*lnk_low_prio)(struct wl1271 *wl, u8 hlid,
0107                  struct wl1271_link *lnk);
0108     int (*interrupt_notify)(struct wl1271 *wl, bool action);
0109     int (*rx_ba_filter)(struct wl1271 *wl, bool action);
0110     int (*ap_sleep)(struct wl1271 *wl);
0111     int (*smart_config_start)(struct wl1271 *wl, u32 group_bitmap);
0112     int (*smart_config_stop)(struct wl1271 *wl);
0113     int (*smart_config_set_group_key)(struct wl1271 *wl, u16 group_id,
0114                       u8 key_len, u8 *key);
0115     int (*set_cac)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
0116                bool start);
0117     int (*dfs_master_restart)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
0118 };
0119 
0120 enum wlcore_partitions {
0121     PART_DOWN,
0122     PART_WORK,
0123     PART_BOOT,
0124     PART_DRPW,
0125     PART_TOP_PRCM_ELP_SOC,
0126     PART_PHY_INIT,
0127 
0128     PART_TABLE_LEN,
0129 };
0130 
0131 struct wlcore_partition {
0132     u32 size;
0133     u32 start;
0134 };
0135 
0136 struct wlcore_partition_set {
0137     struct wlcore_partition mem;
0138     struct wlcore_partition reg;
0139     struct wlcore_partition mem2;
0140     struct wlcore_partition mem3;
0141 };
0142 
0143 enum wlcore_registers {
0144     /* register addresses, used with partition translation */
0145     REG_ECPU_CONTROL,
0146     REG_INTERRUPT_NO_CLEAR,
0147     REG_INTERRUPT_ACK,
0148     REG_COMMAND_MAILBOX_PTR,
0149     REG_EVENT_MAILBOX_PTR,
0150     REG_INTERRUPT_TRIG,
0151     REG_INTERRUPT_MASK,
0152     REG_PC_ON_RECOVERY,
0153     REG_CHIP_ID_B,
0154     REG_CMD_MBOX_ADDRESS,
0155 
0156     /* data access memory addresses, used with partition translation */
0157     REG_SLV_MEM_DATA,
0158     REG_SLV_REG_DATA,
0159 
0160     /* raw data access memory addresses */
0161     REG_RAW_FW_STATUS_ADDR,
0162 
0163     REG_TABLE_LEN,
0164 };
0165 
0166 struct wl1271_stats {
0167     void *fw_stats;
0168     unsigned long fw_stats_update;
0169     size_t fw_stats_len;
0170 
0171     unsigned int retry_count;
0172     unsigned int excessive_retries;
0173 };
0174 
0175 struct wl1271 {
0176     bool initialized;
0177     struct ieee80211_hw *hw;
0178     bool mac80211_registered;
0179 
0180     struct device *dev;
0181     struct platform_device *pdev;
0182 
0183     void *if_priv;
0184 
0185     struct wl1271_if_operations *if_ops;
0186 
0187     int irq;
0188     int wakeirq;
0189 
0190     int irq_flags;
0191     int wakeirq_flags;
0192 
0193     spinlock_t wl_lock;
0194 
0195     enum wlcore_state state;
0196     enum wl12xx_fw_type fw_type;
0197     bool plt;
0198     enum plt_mode plt_mode;
0199     u8 fem_manuf;
0200     u8 last_vif_count;
0201     struct mutex mutex;
0202 
0203     unsigned long flags;
0204 
0205     struct wlcore_partition_set curr_part;
0206 
0207     struct wl1271_chip chip;
0208 
0209     int cmd_box_addr;
0210 
0211     u8 *fw;
0212     size_t fw_len;
0213     void *nvs;
0214     size_t nvs_len;
0215 
0216     s8 hw_pg_ver;
0217 
0218     /* address read from the fuse ROM */
0219     u32 fuse_oui_addr;
0220     u32 fuse_nic_addr;
0221 
0222     /* we have up to 2 MAC addresses */
0223     struct mac_address addresses[WLCORE_NUM_MAC_ADDRESSES];
0224     int channel;
0225     u8 system_hlid;
0226 
0227     unsigned long links_map[BITS_TO_LONGS(WLCORE_MAX_LINKS)];
0228     unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
0229     unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
0230     unsigned long rate_policies_map[
0231             BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];
0232     unsigned long klv_templates_map[
0233             BITS_TO_LONGS(WLCORE_MAX_KLV_TEMPLATES)];
0234 
0235     u8 session_ids[WLCORE_MAX_LINKS];
0236 
0237     struct list_head wlvif_list;
0238 
0239     u8 sta_count;
0240     u8 ap_count;
0241 
0242     struct wl1271_acx_mem_map *target_mem_map;
0243 
0244     /* Accounting for allocated / available TX blocks on HW */
0245     u32 tx_blocks_freed;
0246     u32 tx_blocks_available;
0247     u32 tx_allocated_blocks;
0248     u32 tx_results_count;
0249 
0250     /* Accounting for allocated / available Tx packets in HW */
0251     u32 tx_pkts_freed[NUM_TX_QUEUES];
0252     u32 tx_allocated_pkts[NUM_TX_QUEUES];
0253 
0254     /* Transmitted TX packets counter for chipset interface */
0255     u32 tx_packets_count;
0256 
0257     /* Time-offset between host and chipset clocks */
0258     s64 time_offset;
0259 
0260     /* Frames scheduled for transmission, not handled yet */
0261     int tx_queue_count[NUM_TX_QUEUES];
0262     unsigned long queue_stop_reasons[
0263                 NUM_TX_QUEUES * WLCORE_NUM_MAC_ADDRESSES];
0264 
0265     /* Frames received, not handled yet by mac80211 */
0266     struct sk_buff_head deferred_rx_queue;
0267 
0268     /* Frames sent, not returned yet to mac80211 */
0269     struct sk_buff_head deferred_tx_queue;
0270 
0271     struct work_struct tx_work;
0272     struct workqueue_struct *freezable_wq;
0273 
0274     /* Pending TX frames */
0275     unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)];
0276     struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS];
0277     int tx_frames_cnt;
0278 
0279     /* FW Rx counter */
0280     u32 rx_counter;
0281 
0282     /* Intermediate buffer, used for packet aggregation */
0283     u8 *aggr_buf;
0284     u32 aggr_buf_size;
0285 
0286     /* Reusable dummy packet template */
0287     struct sk_buff *dummy_packet;
0288 
0289     /* Network stack work  */
0290     struct work_struct netstack_work;
0291 
0292     /* FW log buffer */
0293     u8 *fwlog;
0294 
0295     /* Number of valid bytes in the FW log buffer */
0296     ssize_t fwlog_size;
0297 
0298     /* FW log end marker */
0299     u32 fwlog_end;
0300 
0301     /* FW memory block size */
0302     u32 fw_mem_block_size;
0303 
0304     /* Hardware recovery work */
0305     struct work_struct recovery_work;
0306     bool watchdog_recovery;
0307 
0308     /* Reg domain last configuration */
0309     DECLARE_BITMAP(reg_ch_conf_last, 64);
0310     /* Reg domain pending configuration */
0311     DECLARE_BITMAP(reg_ch_conf_pending, 64);
0312 
0313     /* Pointer that holds DMA-friendly block for the mailbox */
0314     void *mbox;
0315 
0316     /* The mbox event mask */
0317     u32 event_mask;
0318     /* events to unmask only when ap interface is up */
0319     u32 ap_event_mask;
0320 
0321     /* Mailbox pointers */
0322     u32 mbox_size;
0323     u32 mbox_ptr[2];
0324 
0325     /* Are we currently scanning */
0326     struct wl12xx_vif *scan_wlvif;
0327     struct wl1271_scan scan;
0328     struct delayed_work scan_complete_work;
0329 
0330     struct ieee80211_vif *roc_vif;
0331     struct delayed_work roc_complete_work;
0332 
0333     struct wl12xx_vif *sched_vif;
0334 
0335     /* The current band */
0336     enum nl80211_band band;
0337 
0338     struct completion *elp_compl;
0339 
0340     /* in dBm */
0341     int power_level;
0342 
0343     struct wl1271_stats stats;
0344 
0345     __le32 *buffer_32;
0346     u32 buffer_cmd;
0347     u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
0348 
0349     void *raw_fw_status;
0350     struct wl_fw_status *fw_status;
0351     struct wl1271_tx_hw_res_if *tx_res_if;
0352 
0353     /* Current chipset configuration */
0354     struct wlcore_conf conf;
0355 
0356     bool sg_enabled;
0357 
0358     bool enable_11a;
0359 
0360     int recovery_count;
0361 
0362     /* Most recently reported noise in dBm */
0363     s8 noise;
0364 
0365     /* bands supported by this instance of wl12xx */
0366     struct ieee80211_supported_band bands[WLCORE_NUM_BANDS];
0367 
0368     /*
0369      * wowlan trigger was configured during suspend.
0370      * (currently, only "ANY" trigger is supported)
0371      */
0372     bool wow_enabled;
0373     bool irq_wake_enabled;
0374 
0375     /*
0376      * AP-mode - links indexed by HLID. The global and broadcast links
0377      * are always active.
0378      */
0379     struct wl1271_link links[WLCORE_MAX_LINKS];
0380 
0381     /* number of currently active links */
0382     int active_link_count;
0383 
0384     /* Fast/slow links bitmap according to FW */
0385     unsigned long fw_fast_lnk_map;
0386 
0387     /* AP-mode - a bitmap of links currently in PS mode according to FW */
0388     unsigned long ap_fw_ps_map;
0389 
0390     /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
0391     unsigned long ap_ps_map;
0392 
0393     /* Quirks of specific hardware revisions */
0394     unsigned int quirks;
0395 
0396     /* number of currently active RX BA sessions */
0397     int ba_rx_session_count;
0398 
0399     /* Maximum number of supported RX BA sessions */
0400     int ba_rx_session_count_max;
0401 
0402     /* AP-mode - number of currently connected stations */
0403     int active_sta_count;
0404 
0405     /* Flag determining whether AP should broadcast OFDM-only rates */
0406     bool ofdm_only_ap;
0407 
0408     /* last wlvif we transmitted from */
0409     struct wl12xx_vif *last_wlvif;
0410 
0411     /* work to fire when Tx is stuck */
0412     struct delayed_work tx_watchdog_work;
0413 
0414     struct wlcore_ops *ops;
0415     /* pointer to the lower driver partition table */
0416     const struct wlcore_partition_set *ptable;
0417     /* pointer to the lower driver register table */
0418     const int *rtable;
0419     /* name of the firmwares to load - for PLT, single role, multi-role */
0420     const char *plt_fw_name;
0421     const char *sr_fw_name;
0422     const char *mr_fw_name;
0423 
0424     u8 scan_templ_id_2_4;
0425     u8 scan_templ_id_5;
0426     u8 sched_scan_templ_id_2_4;
0427     u8 sched_scan_templ_id_5;
0428     u8 max_channels_5;
0429 
0430     /* per-chip-family private structure */
0431     void *priv;
0432 
0433     /* number of TX descriptors the HW supports. */
0434     u32 num_tx_desc;
0435     /* number of RX descriptors the HW supports. */
0436     u32 num_rx_desc;
0437     /* number of links the HW supports */
0438     u8 num_links;
0439     /* max stations a single AP can support */
0440     u8 max_ap_stations;
0441 
0442     /* translate HW Tx rates to standard rate-indices */
0443     const u8 **band_rate_to_idx;
0444 
0445     /* size of table for HW rates that can be received from chip */
0446     u8 hw_tx_rate_tbl_size;
0447 
0448     /* this HW rate and below are considered HT rates for this chip */
0449     u8 hw_min_ht_rate;
0450 
0451     /* HW HT (11n) capabilities */
0452     struct ieee80211_sta_ht_cap ht_cap[WLCORE_NUM_BANDS];
0453 
0454     /* the current dfs region */
0455     enum nl80211_dfs_regions dfs_region;
0456     bool radar_debug_mode;
0457 
0458     /* size of the private FW status data */
0459     size_t fw_status_len;
0460     size_t fw_status_priv_len;
0461 
0462     /* RX Data filter rule state - enabled/disabled */
0463     unsigned long rx_filter_enabled[BITS_TO_LONGS(WL1271_MAX_RX_FILTERS)];
0464 
0465     /* size of the private static data */
0466     size_t static_data_priv_len;
0467 
0468     /* the current channel type */
0469     enum nl80211_channel_type channel_type;
0470 
0471     /* mutex for protecting the tx_flush function */
0472     struct mutex flush_mutex;
0473 
0474     /* sleep auth value currently configured to FW */
0475     int sleep_auth;
0476 
0477     /* the number of allocated MAC addresses in this chip */
0478     int num_mac_addr;
0479 
0480     /* minimum FW version required for the driver to work in single-role */
0481     unsigned int min_sr_fw_ver[NUM_FW_VER];
0482 
0483     /* minimum FW version required for the driver to work in multi-role */
0484     unsigned int min_mr_fw_ver[NUM_FW_VER];
0485 
0486     struct completion nvs_loading_complete;
0487 
0488     /* interface combinations supported by the hw */
0489     const struct ieee80211_iface_combination *iface_combinations;
0490     u8 n_iface_combinations;
0491 
0492     /* dynamic fw traces */
0493     u32 dynamic_fw_traces;
0494 
0495     /* time sync zone master */
0496     u8 zone_master_mac_addr[ETH_ALEN];
0497 };
0498 
0499 int wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);
0500 int wlcore_remove(struct platform_device *pdev);
0501 struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size, u32 aggr_buf_size,
0502                      u32 mbox_size);
0503 int wlcore_free_hw(struct wl1271 *wl);
0504 int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
0505            struct ieee80211_vif *vif,
0506            struct ieee80211_sta *sta,
0507            struct ieee80211_key_conf *key_conf);
0508 void wlcore_regdomain_config(struct wl1271 *wl);
0509 void wlcore_update_inconn_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif,
0510                   struct wl1271_station *wl_sta, bool in_conn);
0511 
0512 static inline void
0513 wlcore_set_ht_cap(struct wl1271 *wl, enum nl80211_band band,
0514           struct ieee80211_sta_ht_cap *ht_cap)
0515 {
0516     memcpy(&wl->ht_cap[band], ht_cap, sizeof(*ht_cap));
0517 }
0518 
0519 /* Tell wlcore not to care about this element when checking the version */
0520 #define WLCORE_FW_VER_IGNORE    -1
0521 
0522 static inline void
0523 wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip,
0524               unsigned int iftype_sr, unsigned int major_sr,
0525               unsigned int subtype_sr, unsigned int minor_sr,
0526               unsigned int iftype_mr, unsigned int major_mr,
0527               unsigned int subtype_mr, unsigned int minor_mr)
0528 {
0529     wl->min_sr_fw_ver[FW_VER_CHIP] = chip;
0530     wl->min_sr_fw_ver[FW_VER_IF_TYPE] = iftype_sr;
0531     wl->min_sr_fw_ver[FW_VER_MAJOR] = major_sr;
0532     wl->min_sr_fw_ver[FW_VER_SUBTYPE] = subtype_sr;
0533     wl->min_sr_fw_ver[FW_VER_MINOR] = minor_sr;
0534 
0535     wl->min_mr_fw_ver[FW_VER_CHIP] = chip;
0536     wl->min_mr_fw_ver[FW_VER_IF_TYPE] = iftype_mr;
0537     wl->min_mr_fw_ver[FW_VER_MAJOR] = major_mr;
0538     wl->min_mr_fw_ver[FW_VER_SUBTYPE] = subtype_mr;
0539     wl->min_mr_fw_ver[FW_VER_MINOR] = minor_mr;
0540 }
0541 
0542 /* Firmware image load chunk size */
0543 #define CHUNK_SIZE  16384
0544 
0545 /* Quirks */
0546 
0547 /* Each RX/TX transaction requires an end-of-transaction transfer */
0548 #define WLCORE_QUIRK_END_OF_TRANSACTION     BIT(0)
0549 
0550 /* wl127x and SPI don't support SDIO block size alignment */
0551 #define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN     BIT(2)
0552 
0553 /* means aggregated Rx packets are aligned to a SDIO block */
0554 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN     BIT(3)
0555 
0556 /* Older firmwares did not implement the FW logger over bus feature */
0557 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED  BIT(4)
0558 
0559 /* Older firmwares use an old NVS format */
0560 #define WLCORE_QUIRK_LEGACY_NVS         BIT(5)
0561 
0562 /* pad only the last frame in the aggregate buffer */
0563 #define WLCORE_QUIRK_TX_PAD_LAST_FRAME      BIT(7)
0564 
0565 /* extra header space is required for TKIP */
0566 #define WLCORE_QUIRK_TKIP_HEADER_SPACE      BIT(8)
0567 
0568 /* Some firmwares not support sched scans while connected */
0569 #define WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN   BIT(9)
0570 
0571 /* separate probe response templates for one-shot and sched scans */
0572 #define WLCORE_QUIRK_DUAL_PROBE_TMPL        BIT(10)
0573 
0574 /* Firmware requires reg domain configuration for active calibration */
0575 #define WLCORE_QUIRK_REGDOMAIN_CONF     BIT(11)
0576 
0577 /* The FW only support a zero session id for AP */
0578 #define WLCORE_QUIRK_AP_ZERO_SESSION_ID     BIT(12)
0579 
0580 /* TODO: move all these common registers and values elsewhere */
0581 #define HW_ACCESS_ELP_CTRL_REG      0x1FFFC
0582 
0583 /* ELP register commands */
0584 #define ELPCTRL_WAKE_UP             0x1
0585 #define ELPCTRL_WAKE_UP_WLAN_READY  0x5
0586 #define ELPCTRL_SLEEP               0x0
0587 /* ELP WLAN_READY bit */
0588 #define ELPCTRL_WLAN_READY          0x2
0589 
0590 /*************************************************************************
0591 
0592     Interrupt Trigger Register (Host -> WiLink)
0593 
0594 **************************************************************************/
0595 
0596 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */
0597 
0598 /*
0599  * The host sets this bit to inform the Wlan
0600  * FW that a TX packet is in the XFER
0601  * Buffer #0.
0602  */
0603 #define INTR_TRIG_TX_PROC0 BIT(2)
0604 
0605 /*
0606  * The host sets this bit to inform the FW
0607  * that it read a packet from RX XFER
0608  * Buffer #0.
0609  */
0610 #define INTR_TRIG_RX_PROC0 BIT(3)
0611 
0612 #define INTR_TRIG_DEBUG_ACK BIT(4)
0613 
0614 #define INTR_TRIG_STATE_CHANGED BIT(5)
0615 
0616 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */
0617 
0618 /*
0619  * The host sets this bit to inform the FW
0620  * that it read a packet from RX XFER
0621  * Buffer #1.
0622  */
0623 #define INTR_TRIG_RX_PROC1 BIT(17)
0624 
0625 /*
0626  * The host sets this bit to inform the Wlan
0627  * hardware that a TX packet is in the XFER
0628  * Buffer #1.
0629  */
0630 #define INTR_TRIG_TX_PROC1 BIT(18)
0631 
0632 #define ACX_SLV_SOFT_RESET_BIT  BIT(1)
0633 #define SOFT_RESET_MAX_TIME 1000000
0634 #define SOFT_RESET_STALL_TIME   1000
0635 
0636 #define ECPU_CONTROL_HALT   0x00000101
0637 
0638 #define WELP_ARM_COMMAND_VAL    0x4
0639 
0640 #endif /* __WLCORE_H__ */
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